Semiconductor processing apparatus, method, and storage medium

Abstract

The present application provides semiconductor processing apparatus, method and storage medium. The semiconductor processing apparatus comprises a first reaction cavity, a gas trap, a remote plasma source and a controller. The first reaction cavity is connected with a first reaction source via a first reaction valve and connected with a second reaction source via a second reaction valve. The gas trap is connected with the first reaction cavity via a third reaction valve. The remote plasma source is connected with a cleaning gas source via a fourth reaction valve and connected with the first reaction cavity via a fifth reaction valve. The controller is configured to: in a split-flow stage before reaction, open the first reaction valve and the third reaction valve to introduce a first reactant into the first reaction cavity and collect unreacted first reactant and byproduct particles via the gas trap; and in a cleaning stage after reaction, open the fourth reaction valve and the fifth reaction valve and introduce cleaning gas via the remote plasma source to gasify byproduct particles and collect treated gaseous byproducts via the gas trap.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device processing, and more particularly to a semiconductor processing apparatus, a semiconductor processing method, and a computer-readable storage medium. Background Technology

[0002] During the TEOS (tetraethoxysilane) process, as the thickness of the thin film on the wafer surface increases, the amount of TEOS raw material required also increases, along with the amount of byproducts generated (e.g., silicon oxides, organic residues, etc.). Furthermore, the TEOS process requires a specific splitting step. In this step, the split TEOS is transported to the vacuum pump in the factory facility, where it further reacts under the high temperature environment of the vacuum pump, continuously generating new byproducts. As the number of wafers processed accumulates, these byproducts gradually accumulate inside the vacuum pump. When the accumulation reaches a certain level, it can cause vacuum pump blockage, leading to backflow. This not only contaminates the cavity and related components, resulting in a significant increase in equipment maintenance frequency and a shortened lifespan, but can also directly cause wafer surface contamination, leading to product scrap.

[0003] In order to overcome the above-mentioned defects in the existing technology, there is an urgent need in the field for an improved semiconductor processing equipment to prevent by-product particles from entering the vacuum pump at the back end, thereby extending the service life of the vacuum pump and improving the quality of the finished product of the semiconductor processing process. Summary of the Invention

[0004] The following provides a brief overview of one or more aspects to offer a basic understanding of them. This overview is not an exhaustive summary of all conceived aspects, nor is it intended to identify key or decisive elements of all aspects, nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed descriptions that follow.

[0005] To overcome the aforementioned deficiencies in the prior art, the present invention provides a semiconductor processing apparatus, a semiconductor processing method, and a computer-readable storage medium. By controlling the on / off state of corresponding pipelines at different stages of the semiconductor processing process, the gas trap can be controlled to capture unreacted first reactants and by-product particles. By introducing clean gas through a remote plasma source, the by-product particles are vaporized to prevent them from entering the vacuum pump at the downstream end, thereby extending the service life of the vacuum pump and improving the quality of the finished product from the semiconductor processing process.

[0006] Specifically, the semiconductor processing apparatus provided according to a first aspect of the present invention includes a first reaction chamber, a gas trap, a remote plasma source, and a controller. The first reaction chamber is connected to a first reaction source via a first reaction valve and to a second reaction source via a second reaction valve. The first reaction source contains a first reactant. The second reaction source contains a second reactant. The gas trap is connected to the first reaction chamber via a third reaction valve. The remote plasma source is connected to a cleaning gas source via a fourth reaction valve and to the first reaction chamber via a fifth reaction valve. The controller is configured to: in a pre-reaction diversion phase, open the first reaction valve and the third reaction valve to introduce the first reactant into the first reaction chamber and collect unreacted first reactant and byproduct particles via the gas trap; and in a post-reaction cleaning phase, open the fourth reaction valve and the fifth reaction valve and introduce cleaning gas via the remote plasma source to vaporize the byproduct particles and collect the processed gaseous byproducts via the gas trap.

[0007] Furthermore, in some embodiments of the present invention, after opening the first reaction valve and the third reaction valve in the pre-reaction diversion stage to introduce the first reactant into the first reaction chamber and collecting the unreacted first reactant and byproduct particles via the gas trap, the method further includes the following step: in the reaction stage, closing the first reaction valve and the third reaction valve, and opening the second reaction valve to introduce the second reactant into the first reaction chamber for semiconductor processing.

[0008] Furthermore, in some embodiments of the present invention, the semiconductor processing technology is a TEOS process. The first reactant is TEOS. The second reactant is O2. The cleaning gas is NF3.

[0009] Furthermore, in some embodiments of the present invention, the step of introducing a clean gas via the remote plasma source to gasify the byproduct particles includes: the NF3 being processed by the remote plasma source to generate fluoride ions; and the fluoride ions reacting with the byproduct particles to convert the byproduct particles from a solid state to a gaseous state.

[0010] Furthermore, in some embodiments of the present invention, the gas trap further includes a second reaction chamber. The step of opening the first reaction valve and the third reaction valve during the pre-reaction diversion stage to introduce the first reactant into the first reaction chamber, and collecting unreacted first reactant and byproduct particles via the gas trap, includes: during the diversion stage, opening the first reaction valve and the third reaction valve to introduce the first reactant into the first reaction chamber, and collecting unreacted first reactant via the second reaction chamber in the gas trap.

[0011] Furthermore, in some embodiments of the present invention, at least one of the first reaction valve, the second reaction valve, the third reaction valve, the fourth reaction valve, and the fifth reaction valve is electrically controlled or pneumatically controlled.

[0012] Furthermore, in some embodiments of the present invention, the semiconductor processing equipment further includes a temperature control pipeline and a temperature control device. The temperature control pipeline surrounds the first reaction chamber, with an inlet on one side and an outlet on the other side for flowing a temperature-controlled fluid. The temperature control device is connected to the temperature control pipeline and is used to control the temperature of the temperature-controlled fluid.

[0013] Furthermore, in some embodiments of the present invention, the semiconductor processing equipment further includes a vacuum pump connected to the gas trap for maintaining a vacuum environment in the first reaction chamber and the second reaction chamber and discharging the gaseous byproducts.

[0014] Furthermore, the semiconductor processing method provided by the second aspect of the present invention includes the following steps: in a pre-reaction diversion stage, opening a first reaction valve and a third reaction valve of the semiconductor processing apparatus provided by the first aspect of the present invention to introduce a first reactant into a first reaction chamber, and collecting unreacted first reactant and by-product particles via a gas trap; and in a post-reaction cleaning stage, opening a fourth reaction valve and a fifth reaction valve, and introducing a cleaning gas via a remote plasma source to vaporize the by-product particles, and collecting the processed gaseous by-products via the gas trap.

[0015] Furthermore, the computer-readable storage medium provided according to the second aspect of the present invention stores computer instructions thereon. When the computer instructions are executed by a controller, the semiconductor processing method as provided in the second aspect of the present invention is implemented. Attached Figure Description

[0016] The above-described features and advantages of the present invention will be better understood after reading the following detailed description of embodiments of the present disclosure in conjunction with the accompanying drawings. In the drawings, components are not necessarily drawn to scale, and components having similar related characteristics or features may have the same or similar reference numerals.

[0017] Figure 1 A schematic diagram of the framework of a semiconductor processing apparatus provided according to some embodiments of the present invention is shown.

[0018] Figure 2 A schematic diagram of the external structure of a semiconductor processing apparatus provided according to some embodiments of the present invention is shown.

[0019] Figure 3 A schematic diagram of the internal structure of a semiconductor processing apparatus provided according to some embodiments of the present invention is shown.

[0020] Figure 4 A cross-sectional schematic diagram of a semiconductor processing apparatus provided according to some embodiments of the present invention is shown.

[0021] Figure 5 A schematic diagram of a temperature-controlled pipeline flow provided according to some embodiments of the present invention is shown.

[0022] Figure 6 A schematic flowchart of a semiconductor processing method according to some embodiments of the present invention is shown.

[0023] Figure label:

[0024] 11 First Reaction Chamber

[0025] 12 Gas trap

[0026] 122 Second Reaction Chamber

[0027] 13 Remote Plasma Source

[0028] 141 First Reaction Valve

[0029] 142 Second Reaction Valve

[0030] 143 Third Reaction Valve

[0031] 144 Fourth Reaction Valve

[0032] 145 Fifth Reaction Valve

[0033] 15 Vacuum Pumps

[0034] 16 Temperature control piping

[0035] 161 Liquid Inlet

[0036] 162 liquid outlet Detailed Implementation

[0037] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Although the description of the present invention is presented in conjunction with preferred embodiments, this does not mean that the features of the invention are limited to these embodiments. On the contrary, the purpose of describing the invention in conjunction with embodiments is to cover other options or modifications that may be derived based on the claims of the present invention. To provide a thorough understanding of the invention, many specific details will be included in the following description. The invention may also be implemented without using these details. Furthermore, to avoid confusion or obscuring the focus of the invention, some specific details will be omitted in the description.

[0038] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0039] Furthermore, the terms "upper," "lower," "left," "right," "top," "bottom," "horizontal," and "vertical" used in the following description should be understood as the orientations shown in the relevant paragraphs and accompanying drawings. These relative terms are for illustrative purposes only and do not imply that the described apparatus must be manufactured or operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0040] It is understood that although terms such as "first," "second," and "third" may be used herein to describe various components, regions, layers, and / or parts, these components, regions, layers, and / or parts should not be limited by these terms, and these terms are only used to distinguish different components, regions, layers, and / or parts. Therefore, the first components, regions, layers, and / or parts discussed below may be referred to as second components, regions, layers, and / or parts without departing from some embodiments of the present invention.

[0041] As mentioned above, during the TEOS (tetraethoxysilane) process, the required amount of TEOS raw material increases with the increase in the thickness of the thin film on the wafer surface, and the amount of byproducts generated by the reaction (e.g., silicon oxides, organic residues, etc.) also increases accordingly. Furthermore, the TEOS process requires a specific splitting step. In this step, the split TEOS is transported to the vacuum pump in the factory facility, where it further reacts under the high temperature environment of the vacuum pump, continuously generating new byproducts. As the number of wafers processed accumulates, these byproducts gradually accumulate inside the vacuum pump. When the accumulation reaches a certain level, it can cause vacuum pump blockage, leading to backflow. This not only contaminates the inside of the chamber and related components, resulting in a significant increase in equipment maintenance frequency and a shortened lifespan, but may also directly cause wafer surface contamination, directly leading to product scrap.

[0042] To overcome the aforementioned deficiencies in the prior art, the present invention provides a semiconductor processing apparatus, a semiconductor processing method, and a computer-readable storage medium. By controlling the on / off state of corresponding pipelines at different stages of the semiconductor processing process, the gas trap can be controlled to capture unreacted first reactants and by-product particles. By introducing clean gas through a remote plasma source, the by-product particles are vaporized to prevent them from entering the vacuum pump at the downstream end, thereby extending the service life of the vacuum pump and improving the quality of the finished product from the semiconductor processing process.

[0043] In some non-limiting embodiments, the semiconductor processing apparatus provided in the first aspect of the present invention can be implemented based on the semiconductor processing method provided in the second aspect of the present invention.

[0044] Please refer to the reference for details. Figures 1-3 . Figure 1 A schematic diagram of the framework of a semiconductor processing apparatus provided according to some embodiments of the present invention is shown. Figure 2 A schematic diagram of the external structure of a semiconductor processing apparatus provided according to some embodiments of the present invention is shown. Figure 3 A schematic diagram of the internal structure of a semiconductor processing apparatus provided according to some embodiments of the present invention is shown.

[0045] exist Figure 1In the illustrated embodiment, the semiconductor processing apparatus provided by the first aspect of the present invention includes a first reaction chamber 11, a gas trap 12, and a remote plasma source 13. The first reaction chamber 11 is connected to a first reaction source via a first reaction valve 141 and to a second reaction source via a second reaction valve 142. Here, the first reaction source contains a first reactant. The second reaction source contains a second reactant. The gas trap 12 is connected to the first reaction chamber 11 via a third reaction valve 143. The remote plasma source 13 is connected to a clean gas source via a fourth reaction valve 144 and to the first reaction chamber 11 via a fifth reaction valve 145.

[0046] Furthermore, in some embodiments, the above-mentioned semiconductor processing technology is a TEOS (tetraethoxysilane) process. Here, the first reactant is TEOS, the second reactant is O2, and the cleaning gas is NF3.

[0047] Furthermore, in some embodiments, at least one of the first reaction valve 141, the second reaction valve 142, the third reaction valve 143, the fourth reaction valve 144, and the fifth reaction valve 145 is electrically or pneumatically controlled.

[0048] Furthermore, in some embodiments, the gas trap 12 further includes a second reaction chamber 122. This second reaction chamber 122 is used to collect unreacted first reactants and recycle them for further reaction.

[0049] In addition, Figure 1 In the illustrated embodiment, the semiconductor processing apparatus provided by the first aspect of the present invention further includes a vacuum pump 15 connected to a gas trap 12 for maintaining a vacuum environment in the first reaction chamber 11 and the second reaction chamber 121 and for discharging gaseous byproducts.

[0050] Please refer to the reference. Figure 4 and Figure 5 . Figure 4 A cross-sectional schematic diagram of a semiconductor processing apparatus provided according to some embodiments of the present invention is shown. Figure 5 A schematic diagram of a temperature-controlled pipeline flow provided according to some embodiments of the present invention is shown.

[0051] exist Figure 4 and Figure 5 In the illustrated embodiment, the semiconductor processing equipment provided by the first aspect of the present invention preferably further includes a temperature control pipeline 16 and a temperature control device. Here, the temperature control pipeline 16 surrounds the first reaction chamber 11, with an inlet 161 on one side and an outlet 162 on the other side for flowing a temperature-controlled fluid. The temperature control device is connected to the temperature control pipeline 16 and is used to control the temperature of the temperature-controlled fluid.

[0052] Here, the temperature control fluid can be HT 270, which has a high thermal conductivity and rapid heating and cooling function, so that the first reaction chamber 11 can be kept at a high temperature. This can also achieve the high temperature condition for the first reactant TEOS to react, ensuring that the first reactant TEOS reacts as much as possible in this step.

[0053] Furthermore, in some non-limiting embodiments, the semiconductor processing apparatus provided in the first aspect of the present invention includes a memory and a controller. Here, the memory includes, but is not limited to, the computer-readable storage medium provided in the third aspect, on which computer instructions are stored. The controller is connected to the memory and configured to execute the computer instructions stored in the memory to implement the semiconductor processing method as provided in the first aspect of the present invention.

[0054] The working principle of the above-described semiconductor processing equipment will be described below with reference to some embodiments of semiconductor processing methods. Those skilled in the art will understand that these embodiments of semiconductor processing methods are merely non-limiting implementations provided by the present invention, intended to clearly demonstrate the main concepts of the invention and provide specific solutions convenient for public implementation, rather than limiting all functions or operating methods of the semiconductor processing equipment. Similarly, the semiconductor processing equipment is also only one non-limiting implementation provided by the present invention and does not constitute a limitation on the executing entity and execution order of the steps in these semiconductor processing methods.

[0055] Please refer to Figure 6 . Figure 6 A schematic flowchart of a semiconductor processing method according to some embodiments of the present invention is shown.

[0056] like Figure 6 As shown, in the pre-reaction diversion stage, the controller can first open the first reaction valve 141 and the third reaction valve 143 of the semiconductor processing equipment provided in the first aspect of the present invention to introduce the first reactant into the first reaction chamber 11, and collect the unreacted first reactant and by-product particles via the gas trap 12.

[0057] Furthermore, in some preferred embodiments, during the diversion phase, the controller can open the first reaction valve 141 and the third reaction valve 143 to introduce the first reactant into the first reaction chamber 11, and collect the unreacted first reactant via the second reaction chamber 122 in the gas trap 12. Here, the second reaction chamber 122 can collect the unreacted first reactant and recycle it for further reaction.

[0058] Subsequently, during the reaction phase, the controller can close the first reaction valve 141 and the third reaction valve 143, and open the second reaction valve 142 to introduce the second reactant into the first reaction chamber 11 for semiconductor processing.

[0059] Subsequently, during the post-reaction cleaning phase, the controller can close the second reaction valve 142, open the third reaction valve 143, the fourth reaction valve 144 and the fifth reaction valve 145, and introduce cleaning gas through the remote plasma source 13 to vaporize the byproduct particles, and collect the processed gaseous byproducts through the gas trap 12.

[0060] Specifically, during the gasification of byproduct particles, the aforementioned clean gas NF3 is treated by a remote plasma source 13 to generate fluoride ions. The fluoride ions react with the byproduct particles to convert them from a solid state to a gaseous state.

[0061] In summary, the semiconductor processing equipment, semiconductor processing method, and computer-readable storage medium provided by the present invention can control the on / off state of corresponding pipelines at different stages of the semiconductor processing process, control the gas trap to capture unreacted first reactants and by-product particles, and introduce clean gas through a remote plasma source to vaporize the by-product particles, thereby preventing the by-product particles from entering the vacuum pump at the downstream end, thus extending the service life of the vacuum pump and improving the quality of the finished product of the semiconductor processing process.

[0062] Although the methods described above are illustrated and depicted as a series of actions for the sake of simplicity, it should be understood and appreciated that these methods are not limited by the order of the actions, as some actions may occur in a different order and / or concurrently with other actions from the illustrations and descriptions herein or not illustrated and described herein but which may be understood by those skilled in the art, according to one or more embodiments.

[0063] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of both. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor such that the processor can read and write information to / from the storage medium. In an alternative, the storage medium may be integrated into the processor. The processor and storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In an alternative, the processor and storage medium may reside as discrete components in the user terminal.

[0064] In one or more exemplary embodiments, the described functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software as a computer program product, the functionality may be stored or transmitted as one or more instructions or code on or through a computer-readable medium. A computer-readable medium includes both computer storage media and communication media, encompassing any medium that facilitates the transfer of a computer program from one location to another. A storage medium may be any available medium accessible to a computer. By way of example and not limitation, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disc storage, disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and is accessible to a computer. Any connection is also legitimately referred to as a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of a medium. As used in this article, disk and disc include compact discs (CDs), laser discs, optical discs, digital multi-purpose discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of these should also be included within the scope of computer-readable media.

[0065] The prior description of this disclosure is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the examples and designs described herein, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A semiconductor processing apparatus, characterized in that, include: A first reaction chamber is connected to a first reaction source via a first reaction valve and to a second reaction source via a second reaction valve, wherein the first reaction source contains a first reactant and the second reaction source contains a second reactant; A gas trap, which is connected to the first reaction chamber via a third reaction valve; A remote plasma source is connected to a clean gas source via a fourth reaction valve and to the first reaction chamber via a fifth reaction valve; as well as The controller is configured to: in the pre-reaction diversion phase, open the first reaction valve and the third reaction valve to introduce the first reactant into the first reaction chamber, and collect unreacted first reactant and byproduct particles via the gas trap; and in the post-reaction cleaning phase, open the fourth reaction valve and the fifth reaction valve, and introduce cleaning gas via the remote plasma source to vaporize the byproduct particles, and collect the processed gaseous byproducts via the gas trap.

2. The semiconductor processing equipment as described in claim 1, characterized in that, In the pre-reaction diversion stage, after opening the first reaction valve and the third reaction valve to introduce the first reactant into the first reaction chamber, and collecting unreacted first reactant and byproduct particles via the gas collector, the process further includes the following steps: During the reaction phase, the first reaction valve and the third reaction valve are closed, and the second reaction valve is opened to introduce the second reactant into the first reaction chamber for semiconductor processing.

3. The semiconductor processing equipment as described in claim 2, characterized in that, The semiconductor processing technology is the TEOS process, wherein the first reactant is TEOS, the second reactant is O2, and the cleaning gas is NF3.

4. The semiconductor processing equipment as described in claim 3, characterized in that, The step of introducing clean gas via the remote plasma source to vaporize the byproduct particles includes: The NF3, after being processed by the remote plasma source, generates fluoride ions; and The fluoride ions react with the byproduct particles to convert the byproduct particles from a solid state to a gaseous state.

5. The semiconductor processing equipment as described in claim 1, characterized in that, The gas trap further includes a second reaction chamber. The step of opening the first reaction valve and the third reaction valve during the pre-reaction diversion stage to introduce the first reactant into the first reaction chamber, and collecting unreacted first reactant and byproduct particles via the gas trap, includes: During the diversion phase, the first reaction valve and the third reaction valve are opened, the first reactant is introduced into the first reaction chamber, and the unreacted first reactant is collected through the second reaction chamber in the gas trap.

6. The semiconductor processing equipment as described in claim 1, characterized in that, At least one of the first reaction valve, the second reaction valve, the third reaction valve, the fourth reaction valve, and the fifth reaction valve is electrically or pneumatically controlled.

7. The semiconductor processing equipment as described in claim 1, characterized in that, Also includes: A temperature-controlled pipeline surrounds the first reaction chamber, with an inlet on one side and an outlet on the other side for the flow of temperature-controlled fluid. as well as A temperature control device, connected to the temperature control pipeline, is used to control the temperature of the temperature control fluid.

8. The semiconductor processing equipment as described in claim 1, characterized in that, Also includes: A vacuum pump, connected to the gas trap, is used to maintain a vacuum environment in the first and second reaction chambers and to discharge the gaseous byproducts.

9. A semiconductor processing method, characterized in that, Includes the following steps: In the pre-reaction diversion stage, the first reaction valve and the third reaction valve of the semiconductor processing equipment as described in any one of claims 1 to 8 are opened to introduce the first reactant into the first reaction chamber, and the unreacted first reactant and by-product particles are collected by a gas trap. as well as In the post-reaction cleaning phase, the fourth and fifth reaction valves are opened, and cleaning gas is introduced via a remote plasma source to vaporize the byproduct particles. The gaseous byproducts are then collected by the gas trap.

10. A computer-readable storage medium storing computer instructions thereon, characterized in that, When the computer instructions are executed by the controller, the semiconductor processing method as described in claim 9 is implemented.

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