A method for preparing a passivated solar cell cut surface and the solar cell

Abstract

This invention discloses a method for preparing a passivated solar cell cut surface and the solar cell itself, belonging to the field of solar cells. The method includes sequentially testing the entire solar cell, cutting it, depositing a silicon oxide layer / hydrogenated amorphous silicon layer / silicon nitride layer, or a silicon oxide layer / hydrogenated amorphous silicon layer to form a stacked passivation structure on the cut surface, secondary testing, sorting, and encapsulation. The beneficial effects of this invention are: by designing the above-mentioned stacked passivation structure, and not limited to a three-layer stack, a silicon oxide / hydrogenated amorphous silicon layer can also be achieved, which can significantly reduce laser cutting damage, reduce recombination, improve FF and turn-on voltage, and improve efficiency, thereby increasing module power; and by conducting tests before and after cell cutting, the problem of inconsistent cell performance before and after cutting is avoided.

Description

Technical Field

[0001] This invention relates to the field of solar cells, and more specifically, to a method for preparing a passivated solar cell cut surface and a solar cell. Background Technology

[0002] Over the past decade or so, the size of photovoltaic silicon wafers has been steadily increasing, from 125mm to 156mm, 166mm, 182mm, and even 210mm. The power output of photovoltaic modules has increased rapidly with the increase in wafer size, while costs have continued to decrease. However, as wafer size increases, the current per cell also increases, leading to greater losses per string. Currently, cutting large-size cells is commonly used to reduce module current and internal losses, thereby increasing module power output. This is mainly due to: First, the reduced series resistance and increased fill factor (FF) of half-cell modules result in lower operating temperatures compared to conventional modules, further enhancing their power generation capacity; Second, half-cell modules reduce power loss due to shading, significantly increasing power generation during early morning / late evening hours and when dust or snow accumulates on the lower edge of the module, improving the economic efficiency of the power plant; Third, compared to other new technologies, half-cell technology is currently the easiest to rapidly scale up for mass production, with minimal additional costs.

[0003] However, cutting the cell into half or multiple cells can cause side-cutting defects, such as: 1. Laser cutting a whole cell into equal half cells can cause micro-cracks and lattice damage on the cut surface. Carrier recombination at the cut surface defects will increase significantly, and the cell efficiency will decrease due to the reduced on-state voltage and filling capacity caused by laser damage; 2. After the whole cell is tested, it is cut into half cells and then directly welded and assembled. After being cut into half cells, the efficiency and PL / EL test results will be significantly different from those of the whole cell, resulting in inconsistencies in the efficiency and PL / EL test results and the loss of defects. Then, half-cell modules are manufactured according to the same grade, and the power concentration and PL / EL related defects will lead to cell degradation.

[0004] For example, invention patent CN111509091A discloses a method for edge passivation of a battery. A paste is printed onto the edges of the crystalline silicon battery requiring passivation using a coating method, and ultraviolet light is applied to the edges to form a silicon oxide passivation film under photocatalytic oxidation conditions. The paste contains hydrogen peroxide and SiO2 powder. After all the edges requiring passivation on the crystalline silicon battery have formed silicon oxide passivation films, the crystalline silicon battery undergoes annealing after photocatalytic oxidation. This method utilizes photocatalytic oxidation technology to achieve edge passivation of crystalline silicon solar cells, thereby improving the photoelectric conversion efficiency of the battery. However, because it only coats a single layer of silicon oxide passivation film, its ability to repair damage caused by cutting the solar cell is limited.

[0005] Therefore, how to provide a solution that effectively addresses the problems of decreased cell conversion efficiency and reduced PL / EL inspection yield caused by the current cutting process, thereby increasing the power output of half-cell modules and improving PL / EL inspection yield, has become a pressing technical problem for engineers. In view of this, the inventors conducted in-depth research to address this need, resulting in this invention. Summary of the Invention

[0006] To address the various defects caused by microcracks and lattice damage on the cut surfaces of large-size solar cells in existing technologies, and the significant differences in in-cell efficiency and PL / EL testing between whole cells and whole cells when cut into half-cells and directly welded together in current processes, this invention provides a method for preparing passivated solar cell cut surfaces and a solar cell, the technical solution of which is as follows:

[0007] A method for preparing a passivated solar cell cut surface includes the following steps:

[0008] Step 1: Conduct a test on the entire battery cell;

[0009] Step two: Cut the tested battery cells.

[0010] Step 3: Passivate the cut surface of the battery cell by sequentially depositing a silicon oxide layer, a hydrogenated amorphous silicon layer, or a silicon nitride layer to form a stacked passivation structure.

[0011] Step four: Perform secondary testing on the passivated solar cells;

[0012] Step 5: Sort and package the tested battery cells.

[0013] By setting the aforementioned stacked passivation structure on the cut surface of the solar cell, the main purpose is to analyze the damage state after laser cutting and then design corresponding dielectric film layers to repair it. Therefore, various combinations of stacked layers have certain effects. This application is not limited to three-layer stacking; it can also be two-layer stacking, such as a silicon oxide / hydrogenated amorphous silicon layer structure.

[0014] Preferably, the stacked passivation structure is a silicon oxide / hydrogenated amorphous silicon / silicon nitride layer structure. First, a silicon oxide layer is deposited to increase oxide density, reduce interface state density, and decrease the capture of charge carriers by surface defects such as dangling bonds, thereby suppressing nonradiative recombination. Then, a highly hydrogen-doped hydrogenated amorphous silicon layer is deposited, and combined with hydrogen passivation, hydrogen ions are activated to diffuse to the cut surface, further repairing interface defects and enhancing the passivation effect. The hydrogenated amorphous silicon layer exhibits better thermal stability in high-temperature processes, ensuring the durability of the passivation effect. Finally, a silicon nitride layer can be deposited to neutralize surface defects through hydrogen bonding, further suppressing nonradiative recombination. Simultaneously, the high insulation properties of silicon nitride can prevent the influence of subsequent processes on the sides. Therefore, by designing the above stacked passivation structure, laser cutting damage can be significantly reduced, recombination can be reduced, FF and on-state voltage can be improved, efficiency can be increased, and thus the module power can be improved.

[0015] Preferably, the refractive index of the stacked passivation structure is 1.9~2.4, the reflectivity is 4~15%, and the width of the side coating on both the front and back of the solar cell is less than 2mm. By controlling the width of the side coating on the front and back of the solar cell to within 2mm and achieving low reflectivity, degradation is avoided, and the appearance of the front and back and the power generation are not affected.

[0016] Preferably, the deposition of the silicon oxide layer in step three specifically includes: introducing SiH4 and N2O gases at a pressure of 1~600Pa, with a SiH4 flow rate of 2000~10000sccm and an N2O flow rate of 2000~10000sccm, and depositing at a temperature of 150~300℃ for 2~6min, to first deposit a 1~3nm silicon oxide layer on the cut surface of the battery cell.

[0017] Preferably, the deposition of the hydrogenated amorphous silicon layer in step three specifically includes: introducing SiH4 gas at a pressure of 1~600Pa, with a SiH4 flow rate of 2000~10000sccm, or simultaneously introducing H2 at a flow rate of 1000~5000sccm, depositing at a temperature of 150~300℃ for 5~20min, and then depositing another 10~50nm hydrogenated amorphous silicon layer doped with hydrogen on the cut surface of the cell.

[0018] First, an ultrathin silicon oxide layer (1~3nm) is deposited on the cut surface, and then a hydrogenated amorphous silicon layer is deposited. The hydrogenated amorphous silicon layer and the ultrathin silicon oxide layer reduce the interface state density through chemical bonding, thereby reducing the capture of charge carriers by surface dangling bonds. Moreover, the hydrogenated amorphous silicon layer forms a built-in electric field, which prevents minority charge carriers from migrating to the cut surface, thus enhancing the field passivation effect.

[0019] Preferably, the deposition of the silicon nitride layer in step three specifically includes: introducing SiH4 and NH3 gases at a pressure of 1~600Pa, with a SiH4 flow rate of 2000~5000sccm and an NH3 flow rate of 5000~10000sccm, depositing at a temperature of 150~300℃ for 5~10min, and then depositing another 10~30nm silicon nitride layer on the cut surface of the cell.

[0020] The outermost layer is a layer of silicon nitride (SiN). x The silicon nitride (SiN) layer can neutralize surface defects through hydrogen bonding, further suppressing nonradiative recombination. Furthermore, the high dielectric constant of the SiN layer enhances the electric field distribution, and the dual-field passivation effect significantly reduces the recombination current density. In addition, the good matching of the thermal expansion coefficients of SiN and polycrystalline silicon can alleviate thermal stress concentration caused by laser cutting, preventing cracking or peeling of the passivation layer and improving structural reliability. Secondly, the deposition of the polycrystalline silicon layer can fill the microcracks generated by laser cutting, while the SiN layer can seal defect areas through densification, blocking the recombination path of charge carriers at the damaged site. Furthermore, hydrogen atoms released during the deposition of the SiN layer diffuse to the cutting surface, combining with interface defects in the polycrystalline silicon layer to repair lattice distortion and enhance the passivation effect.

[0021] Preferably, the deposition method is PECVD.

[0022] Preferably, in step one, the side length of the entire solar cell is ≥166mm, and it can be rectangular, circular, or square. The entire solar cell is not limited to BC cells, TOPCon cells, PERC cells, HJT cells, or other crystalline silicon cells.

[0023] Preferably, the cutting of the entire battery cell in step two specifically includes: cutting the entire battery cell into n equal parts (n≥2, and n is a positive integer) using laser cutting according to the grid pattern.

[0024] Preferably, the testing of the solar cells in steps one and four specifically includes: EL testing, PL testing, and solar cell efficiency testing.

[0025] Photoluminescence (PL) testing involves irradiating photovoltaic materials with light of a specific wavelength. Electrons in the material absorb photon energy and are excited to higher energy states. When these excited electrons return to their ground state, they emit light of a specific wavelength. By detecting this emitted light, the properties of the material can be analyzed. PL testing can provide a preliminary assessment of the performance of solar cells, detect defects, impurities, and inhomogeneities in the material, and also evaluate crystal quality. High-quality crystals typically exhibit strong PL signals and specific luminescence characteristics.

[0026] Electroluminescence (EL) testing involves applying a voltage to the terminals of a photovoltaic cell, causing electrons and holes within the cell to recombine and emit light under the influence of an electric field. EL testing can also be used to detect defects in photovoltaic cells, such as cracks and broken grids, and can be used to evaluate the performance and efficiency of the cells, as well as to study the carrier transport and recombination processes within the cell.

[0027] Solar cell efficiency testing refers to the ability to convert solar energy into electrical energy. The test requires measuring the input and output power of the battery pack, and calculating efficiency using the following formula: Efficiency = Output Power / Input Power × 100%.

[0028] This application also provides a passivated solar cell with a cut surface, which is prepared by the above-described method for preparing a passivated solar cell cut surface.

[0029] Preferably, the passivation of the cut surface of the battery cell to form the stacked passivation structure is a silicon oxide layer / hydrogenated amorphous silicon layer / silicon nitride layer stacked passivation structure, or a silicon oxide layer / hydrogenated amorphous silicon layer stacked passivation structure.

[0030] The beneficial effects of adopting the technical solution of this invention are as follows:

[0031] (1) This application first deposits a silicon oxide layer to increase oxide density, reduce interface state density, and reduce the capture of charge carriers by defects such as surface dangling bonds, thereby suppressing nonradiative recombination; then deposits a hydrogen-doped amorphous silicon layer with high hydrogen ion doping, and combined with hydrogen passivation process, activates hydrogen ion diffusion to the cutting surface, further repairs interface defects and enhances passivation effect. The hydrogen-doped amorphous silicon layer exhibits better thermal stability in high-temperature processes, ensuring the durability of passivation effect; finally, a silicon nitride layer is deposited, which neutralizes surface defects through hydrogen bonding, further suppressing nonradiative recombination. At the same time, the high insulation of silicon nitride can eliminate the influence of subsequent process fabrication on the side surfaces. Therefore, by designing the above stacked passivation structure, and not limited to three-layer stacking, a silicon oxide / hydrogenated amorphous silicon layer structure can also be realized, which can significantly reduce laser cutting damage, reduce recombination, improve FF and turn-on voltage, improve efficiency, and thus improve module power.

[0032] (2) This application avoids the problem of inconsistent efficiency and PL / EL testing and defective cells being lost due to the large difference in performance between the whole cell and the whole cell after the cell is cut into half. This is achieved by performing EL testing, PL testing and cell efficiency testing before and after the cell is cut. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of them. Therefore, the following detailed description of the embodiments of the present invention is not intended to limit the scope of the claimed invention, but merely to represent selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of the present invention.

[0034] This embodiment significantly reduces laser cutting damage and composite degradation by depositing a multilayer passivation structure on the cut surface of the solar cell, thereby improving open-circuit voltage (FF) and on-state voltage (OSV), and ultimately increasing module power. Furthermore, this application performs EL (Elasticity), PL (Plasticity), and cell efficiency tests before and after cell cutting. This avoids the problem of unsorted cells due to significant performance differences between the half-cells and whole cells, leading to inconsistent OSV and other abnormalities caused by cutting, resulting in downgraded modules. Specific implementation details are as follows:

[0035] A method for preparing a passivated solar cell cut surface includes the following steps:

[0036] Step 1: Conduct a test on the entire battery cell;

[0037] Step two: Cut the tested battery cells.

[0038] Step 3: Passivate the cut surface of the battery cell by sequentially depositing a silicon oxide layer, a hydrogenated amorphous silicon layer, or a silicon nitride layer to form a stacked passivation structure.

[0039] Step four: Perform secondary testing on the passivated solar cells;

[0040] Step 5: Sort and package the tested battery cells.

[0041] By setting the aforementioned stacked passivation structure on the cut surface of the solar cell, the main purpose is to analyze the damage state after laser cutting and then design corresponding dielectric films to repair it. Therefore, various combinations of stacked layers have certain effects. This application is not limited to three-layer stacking; silicon oxide / hydrogenated amorphous silicon layer structures can also be achieved.

[0042] As a preferred embodiment, the stacked passivation structure is a silicon oxide / hydrogenated amorphous silicon / silicon nitride layer structure. First, a silicon oxide layer is deposited to increase oxide density, reduce interface state density, and decrease the capture of charge carriers by surface defects such as dangling bonds, thereby suppressing nonradiative recombination. Then, a highly hydrogen-doped hydrogenated amorphous silicon layer is deposited, and combined with hydrogen passivation, hydrogen ions are activated to diffuse to the cut surface, further repairing interface defects and enhancing the passivation effect. The hydrogenated amorphous silicon layer exhibits better thermal stability in high-temperature processes, ensuring the durability of the passivation effect. Finally, a silicon nitride layer can be deposited to neutralize surface defects through hydrogen bonding, further suppressing nonradiative recombination. Simultaneously, the high insulation properties of silicon nitride can prevent the influence of subsequent processes on the sides. Therefore, by designing the above stacked passivation structure, laser cutting damage can be significantly reduced, recombination can be decreased, FF and on-state voltage can be improved, efficiency can be increased, and thus the module power can be improved.

[0043] In a preferred embodiment, the refractive index of the stacked passivation structure is 1.9~2.4, the reflectivity is 4~15%, and the width of the side coating on both the front and back of the solar cell is less than 2mm. By controlling the width of the side coating on the front and back of the solar cell to within 2mm and achieving low reflectivity, degradation is avoided, and the appearance of the front and back and the power generation are not affected.

[0044] In a preferred embodiment, the deposition of the silicon oxide layer in step three specifically includes: introducing SiH4 and N2O gases at a pressure of 1~600Pa, with a SiH4 flow rate of 2000~10000sccm and an N2O flow rate of 2000~10000sccm, and depositing at a temperature of 150~300℃ for 2~6min, thereby depositing a 1~3nm silicon oxide layer on the cut surface of the solar cell.

[0045] As a preferred embodiment, the deposition of the hydrogenated amorphous silicon layer in step three specifically includes: introducing SiH4 gas at a pressure of 1~600Pa with a SiH4 flow rate of 2000~10000sccm, or simultaneously introducing H2 with a H2 flow rate of 1000~5000sccm, depositing at a temperature of 150~300℃ for 5~20min, and then depositing a 10~50nm hydrogenated amorphous silicon layer doped with hydrogen on the cut surface of the cell.

[0046] First, an ultrathin silicon oxide layer (1~3nm) is deposited on the cut surface, and then a hydrogenated amorphous silicon layer is deposited. The hydrogenated amorphous silicon layer and the ultrathin silicon oxide layer reduce the interface state density through chemical bonding, thereby reducing the capture of charge carriers by surface dangling bonds. Moreover, the hydrogenated amorphous silicon layer forms a built-in electric field, which prevents minority charge carriers from migrating to the cut surface, thus enhancing the field passivation effect.

[0047] As a preferred embodiment, the deposition of the silicon nitride layer in step three specifically includes: introducing SiH4 and NH3 gases at a pressure of 1~600Pa, with a SiH4 flow rate of 2000~5000sccm and an NH3 flow rate of 5000~10000sccm, depositing at a temperature of 150~300℃ for 5~10min, and then depositing another 10~30nm silicon nitride layer on the cut surface of the cell.

[0048] The outermost layer is a layer of silicon nitride (SiN). x The silicon nitride (SiN) layer can neutralize surface defects through hydrogen bonding, further suppressing nonradiative recombination. Furthermore, the high dielectric constant of the SiN layer enhances the electric field distribution, and the dual-field passivation effect significantly reduces the recombination current density. In addition, the good matching of the thermal expansion coefficients of SiN and polycrystalline silicon can alleviate thermal stress concentration caused by laser cutting, preventing cracking or peeling of the passivation layer and improving structural reliability. Secondly, the deposition of the polycrystalline silicon layer can fill the microcracks generated by laser cutting, while the SiN layer can seal defect areas through densification, blocking the recombination path of charge carriers at the damaged site. Furthermore, hydrogen atoms released during the deposition of the SiN layer diffuse to the cutting surface, combining with interface defects in the polycrystalline silicon layer to repair lattice distortion and enhance the passivation effect.

[0049] In a preferred embodiment, the deposition method is PECVD.

[0050] In a preferred embodiment, the side length of the entire solar cell in step one is ≥166mm, and it can be rectangular, circular, or square. The entire solar cell is not limited to BC cells, TOPCon cells, PERC cells, HJT cells, or other crystalline silicon cells.

[0051] As a preferred embodiment, the cutting of the entire battery cell in step two specifically includes: cutting the entire battery cell into n equal parts (n≥2, and n is a positive integer) using laser cutting according to the grid pattern.

[0052] In a preferred embodiment, the testing of the solar cells in steps one and four specifically includes: EL testing, PL testing, and solar cell efficiency testing.

[0053] Photoluminescence (PL) testing involves irradiating photovoltaic materials with light of a specific wavelength. Electrons in the material absorb photon energy and are excited to higher energy states. When these excited electrons return to their ground state, they emit light of a specific wavelength. By detecting this emitted light, the properties of the material can be analyzed. PL testing can provide a preliminary assessment of the performance of solar cells, detect defects, impurities, and inhomogeneities in the material, and also evaluate crystal quality. High-quality crystals typically exhibit strong PL signals and specific luminescence characteristics.

[0054] Electroluminescence (EL) testing involves applying a voltage to the terminals of a photovoltaic cell, causing electrons and holes within the cell to recombine and emit light under the influence of an electric field. EL testing can also be used to detect defects in photovoltaic cells, such as cracks and broken grids, and can be used to evaluate the performance and efficiency of the cells, as well as to study the carrier transport and recombination processes within the cell.

[0055] Solar cell efficiency testing refers to the ability to convert solar energy into electrical energy. The test requires measuring the input and output power of the battery pack, and calculating efficiency using the following formula: Efficiency = Output Power / Input Power × 100%.

[0056] This application also provides a passivated solar cell with a cut surface, which is prepared by the above-described method for preparing a passivated solar cell cut surface.

[0057] In a preferred embodiment, the passivation of the cut surface of the battery cell to form the stacked passivation structure is a silicon oxide layer / hydrogenated amorphous silicon layer / silicon nitride layer stacked passivation structure, or a silicon oxide layer / hydrogenated amorphous silicon layer stacked passivation structure.

[0058] The following examples further illustrate the beneficial effects of the method for preparing a passivated battery cell cutting surface according to the present invention.

[0059] Example 1:

[0060] This embodiment 1 provides a battery cell with a passivated cut surface, and the method for preparing the battery cell includes the following steps:

[0061] Step 1: Take a whole solar cell with a size of 210×210mm and perform EL test, PL test and solar cell efficiency test on the solar cell.

[0062] Step 2: Use a laser to cut the tested battery cell into two equal parts, resulting in two equally divided rectangular half-slices of 210×105mm.

[0063] Step 3: The cut surface of the solar cell is passivated using PECVD. A silicon oxide layer, a hydrogenated amorphous silicon layer, and a silicon nitride layer are deposited sequentially to form a silicon oxide / hydrogenated amorphous silicon / silicon nitride stacked passivation structure. Specifically, a 1nm silicon oxide layer is first deposited on the cut surface of the solar cell by introducing 2000sccm of SiH4 and 2000sccm of N2O at a pressure of 300Pa and depositing at 150℃ for 2min. Then, a 10nm hydrogenated amorphous silicon layer is deposited on the cut surface of the solar cell by introducing 2000sccm of SiH4 and 1000sccm of H2 at a pressure of 300Pa and depositing at 150℃ for 5min. Finally, a 10nm silicon nitride layer is deposited on the cut surface of the solar cell by introducing 2000sccm of SiH4 and 5000sccm of NH3 at a pressure of 300Pa and depositing at 150℃ for 5min.

[0064] Step four: Perform electrical performance tests on the passivated half-cells, including tests according to EL test standards, PL test standards, and cell efficiency test standards.

[0065] Step 5: After testing, the half-cell batteries are sorted by type and packaged into modules. The module packaging form is a 66×2 half-cell module.

[0066] Example 2:

[0067] This embodiment 2 provides a battery cell with a passivated cut surface, and the preparation method of the battery cell includes the following steps:

[0068] Step 1: Take a whole solar cell with a size of 210×210mm and perform EL test, PL test and solar cell efficiency test on the solar cell.

[0069] Step 2: Use a laser to cut the tested battery cell into two equal parts, resulting in two equally divided rectangular half-slices of 210×105mm.

[0070] Step 3: The cut surface of the solar cell is passivated using PECVD by sequentially depositing a silicon oxide layer and a hydrogenated amorphous silicon layer to form a silicon oxide / hydrogenated amorphous silicon layer stacked passivation structure. Specifically, a 2nm silicon oxide layer is first deposited on the cut surface of the solar cell by introducing 5000sccm of SiH4 and 5000sccm of N2O under a pressure of 300Pa and depositing at 200℃ for 4min. Then, a 20nm hydrogenated amorphous silicon layer is deposited on the cut surface of the solar cell by introducing 5000sccm of SiH4 and 2000sccm of H2 under a pressure of 300Pa and depositing at 200℃ for 10min.

[0071] Step four: Perform electrical performance tests on the passivated half-cells, including tests according to EL test standards, PL test standards, and cell efficiency test standards.

[0072] Step 5: After testing, the half-cell batteries are sorted by type and packaged into modules. The module packaging form is a 66×2 half-cell module.

[0073] Example 3:

[0074] This embodiment 3 provides a battery cell with a passivated cut surface, and the method for preparing the battery cell includes the following steps:

[0075] Step 1: Take a whole solar cell with a size of 183×182mm and perform EL test, PL test and solar cell efficiency test on the solar cell.

[0076] Step 2: Use a laser to cut the tested battery cell into two equal parts, resulting in two equally divided rectangular half-slices of 183×91mm.

[0077] Step 3: Passivation of the cut surface of the solar cell is performed using PECVD. A silicon oxide layer, a hydrogenated amorphous silicon layer, and a silicon nitride layer are deposited sequentially to form a silicon oxide / hydrogenated amorphous silicon / silicon nitride stacked passivation structure. Specifically, a 2nm silicon oxide layer is first deposited on the cut surface of the solar cell under a pressure of 300 Pa and a gas flow rate of 8000 sccm of SiH4 and 8000 sccm of N2O, and a deposition temperature of 250℃ for 4 minutes. Subsequently, a pressure of... At 300 Pa, SiH4 gas at 8000 sccm and H2 gas at 4000 sccm were introduced, and deposition was carried out at 250 °C for 15 min. Then, a 40 nm hydrogenated amorphous silicon layer was deposited on the cut surface of the cell. Finally, at a pressure of 300 Pa, SiH4 gas at 4000 sccm and NH3 gas at 8000 sccm were introduced, and deposition was carried out at 250 °C for 7 min. Then, a 20 nm silicon nitride layer was deposited on the cut surface of the cell.

[0078] Step four: Perform electrical performance tests on the passivated half-cells, including tests according to EL test standards, PL test standards, and cell efficiency test standards.

[0079] Step 5: After testing, the half-cell batteries are sorted by type and packaged into modules. The module packaging format is 72×2 half-cell modules.

[0080] Example 4:

[0081] This embodiment 4 provides a battery cell with a passivated cut surface, and the method for preparing the battery cell includes the following steps:

[0082] Step 1: Take a whole solar cell with a size of 183×182mm and perform EL test, PL test and solar cell efficiency test on the solar cell.

[0083] Step 2: Use a laser to cut the tested battery cell into two equal parts, resulting in two equally divided rectangular half-slices of 183×91mm.

[0084] Step 3: The cut surface of the solar cell is passivated using PECVD by sequentially depositing a silicon oxide layer and a hydrogenated amorphous silicon layer to form a silicon oxide / hydrogenated amorphous silicon layer stacked passivation structure. Specifically, a 3nm silicon oxide layer is first deposited on the cut surface of the solar cell by introducing 10000sccm of SiH4 and 10000sccm of N2O under a pressure of 300Pa and depositing at a temperature of 300℃ for 6min. Then, a 50nm hydrogenated amorphous silicon layer is deposited on the cut surface of the solar cell by introducing 10000sccm of SiH4 and 5000sccm of H2 under a pressure of 300Pa and depositing at a temperature of 300℃ for 20min.

[0085] Step four: Perform electrical performance tests on the passivated half-cells, including tests according to EL test standards, PL test standards, and cell efficiency test standards.

[0086] Step 5: After testing, the half-cell batteries are sorted by type and packaged into modules. The module packaging format is 72×2 half-cell modules.

[0087] Comparative Example 1:

[0088] Comparative Example 1 provides a battery cell, the preparation method of which includes the following steps:

[0089] Step 1: Take a whole battery cell with a size of 210×210mm;

[0090] Step two: Perform electrical performance tests on the entire solar cell, including tests according to EL testing standards, PL testing standards, and solar cell efficiency testing standards;

[0091] Step 3: After testing, the cells are sorted by type. The sorted cells are then cut into two equal rectangular halves of 210×105mm each using a laser.

[0092] Step four: The half-cell solar cells are encapsulated into a module, and the module encapsulation form is a 66×2 half-cell module.

[0093] Comparative Example 2:

[0094] Comparative Example 2 provides a battery cell with passivated cut surfaces, and the method for preparing the battery cell includes the following steps:

[0095] Step 1: Take a whole solar cell with a size of 210×210mm and perform EL test, PL test and solar cell efficiency test on the solar cell.

[0096] Step 2: Use a laser to cut the tested battery cell into two equal parts, resulting in two equally divided rectangular half-slices of 210×105mm.

[0097] Step 3: Passivate the cut surface of the solar cell using PECVD. Sequentially deposit a silicon oxide layer and a silicon nitride layer to form a silicon oxide / silicon nitride stacked passivation structure. Specifically, under a pressure of 300 Pa, 5000 sccm of SiH4 and 5000 sccm of N2O are introduced, and deposition is carried out at 200℃ for 4 min to first deposit a 2 nm silicon oxide layer on the cut surface of the solar cell. Subsequently, under a pressure of 300 Pa, 3000 sccm of SiH4 and 8000 sccm of NH3 are introduced, and deposition is carried out at 200℃ for 7 min to deposit a 20 nm silicon nitride layer on the cut surface of the solar cell.

[0098] Step four: Perform electrical performance tests on the passivated half-cells, including tests according to EL test standards, PL test standards, and cell efficiency test standards.

[0099] Step 5: After testing, the half-cell batteries are sorted by type and packaged into modules. The module packaging format is 72×2 half-cell modules.

[0100] Comparative Example 3:

[0101] Comparative Example 3 provides a battery cell, the preparation method of which includes the following steps:

[0102] Step 1: Take a whole battery cell with dimensions of 183×182mm;

[0103] Step two: Perform electrical performance tests on the entire solar cell, including tests according to EL testing standards, PL testing standards, and solar cell efficiency testing standards;

[0104] Step 3: After testing, the cells are sorted by type. The sorted cells are then cut into two equal rectangular halves of 183×91mm using a laser.

[0105] Step four: The half-cell solar cells are encapsulated into a module, and the module encapsulation form is a 72×2 half-cell module.

[0106] Comparative Example 4:

[0107] Comparative Example 4 provides a battery cell with passivated cut surfaces, and the method for preparing the battery cell includes the following steps:

[0108] Step 1: Take a whole solar cell with a size of 183×182mm and perform EL test, PL test and solar cell efficiency test on the solar cell.

[0109] Step 2: Use a laser to cut the tested battery cell into two equal parts, resulting in two equally divided rectangular half-slices of 183×91mm.

[0110] Step 3: Passivate the cut surface of the solar cell using PECVD. Sequentially deposit a silicon oxide layer and a silicon nitride layer to form a silicon oxide / silicon nitride stacked passivation structure. Specifically, under a pressure of 300 Pa, 10000 sccm of SiH4 and 10000 sccm of N2O are introduced, and deposition is carried out at a temperature of 300℃ for 6 min to first deposit a 3 nm silicon oxide layer on the cut surface of the solar cell. Subsequently, under a pressure of 300 Pa, 5000 sccm of SiH4 and 10000 sccm of NH3 are introduced, and deposition is carried out at a temperature of 300℃ for 10 min to deposit a 30 nm silicon nitride layer on the cut surface of the solar cell.

[0111] Step four: Perform electrical performance tests on the passivated half-cells, including tests according to EL test standards, PL test standards, and cell efficiency test standards.

[0112] Step 5: After testing, the half-cell batteries are sorted by type and packaged into modules. The module packaging format is 72×2 half-cell modules.

[0113] The performance of the solar cells obtained in the above embodiments and comparative examples is tested below, and the results are as follows:

[0114] Table 1. Performance test results of PL and EL of the solar cells in the examples and comparative examples.

[0115]

[0116] Table 2. Test results of cell efficiency improvement in the examples and comparative examples.

[0117]

[0118] As shown in Tables 1-2, Examples 1-2 are 66×2 half-cell modules prepared by cutting a 210×210mm whole cell into half-cell structures. By depositing the stacked passivation structure provided in this application on the cut surface, compared with Comparative Examples 1-2, the EL and PL adverse reactions of the half-cell module of this application are significantly reduced, the module power is significantly higher than that of Comparative Examples 1-2, and the cell conversion efficiency is also improved.

[0119] Examples 3-4 are 72×2 half-cell modules prepared by cutting a 183×182mm whole cell into half-cell structures. By depositing the stacked passivation structure provided in this application on the cut surface, compared with comparative examples 3-4, the EL and PL adverse reactions of the half-cell modules of this application are significantly reduced, and the module power is significantly higher than that of comparative examples 3-4, and the cell conversion efficiency is also improved.

[0120] As can be seen from the test results of Examples 1-2 and Comparative Example 2, and Examples 3-4 and Comparative Example 4, the stacked passivation structure formed in this application, namely the silicon oxide layer / hydrogenated amorphous silicon layer / silicon nitride layer or the silicon oxide layer / hydrogenated amorphous silicon layer, can effectively reduce the EL and PL of the solar cell and improve the module power and cell conversion efficiency compared to the silicon oxide layer / silicon nitride layer.

[0121] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the invention by those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the invention should be included within the scope of protection of the invention.

Claims

1. A method for preparing a passivated solar cell cut surface, characterized in that, Includes the following steps: Step 1: Conduct a test on the entire battery cell; Step two: Cut the tested battery cells. Step 3: Passivate the cut surface of the battery cell by sequentially depositing a silicon oxide layer, a hydrogenated amorphous silicon layer, or a silicon nitride layer to form a stacked passivation structure. Step four: Perform secondary testing on the passivated solar cells; Step 5: Sorting and packaging the tested battery cells; Specifically, step three, depositing the silicon oxide layer, includes: introducing SiH4 and N2O gases at a pressure of 1-600 Pa, with a SiH4 flow rate of 2000-10000 sccm and an N2O flow rate of 2000-10000 sccm, and depositing at a temperature of 150-300℃ for 2-6 minutes, depositing a 1-3 nm silicon oxide layer on the cut surface of the solar cell; depositing the hydrogenated amorphous silicon layer specifically includes: introducing SiH4 gas at a pressure of 1-600 Pa, with a SiH4 flow rate of 2000-10000 sccm, or simultaneously introducing H2, with the H2 flow rate... The deposition rate is 1000~5000 sccm, and the deposition temperature is 150~300℃ for 5~20 min. Then, a 10~50 nm hydrogen-doped amorphous silicon layer is deposited on the cut surface of the cell. The deposition of the silicon nitride layer specifically includes: under a pressure of 1~600 Pa, introducing SiH4 and NH3 gases, with a SiH4 flow rate of 2000~5000 sccm and an NH3 flow rate of 5000~10000 sccm, and depositing at a temperature of 150~300℃ for 5~10 min. Then, a 10~30 nm silicon nitride layer is deposited on the cut surface of the cell.

2. The method for preparing the passivated battery cell cutting surface according to claim 1, characterized in that, The refractive index of the stacked passivation structure is 1.9~2.4, the reflectivity is 4~15%, and the width of the side coating on both the front and back sides of the battery cell is less than 2mm.

3. The method for preparing the passivated solar cell cut surface according to any one of claims 1 to 2, characterized in that, The deposition method is PECVD.

4. The method for preparing the passivated battery cell cutting surface according to claim 1, characterized in that, The second step of cutting the entire battery cell specifically includes: cutting the entire battery cell into n equal parts according to the grid pattern using laser cutting, where n≥2 and n is a positive integer.

5. The method for preparing the passivated battery cell cutting surface according to claim 1, characterized in that, The testing of the solar cells in steps one and four specifically includes: EL testing, PL testing, and solar cell efficiency testing.

6. A battery cell with passivated cut surfaces, characterized in that, It is prepared by the method for preparing the passivated cell cut surface as described in any one of claims 1 to 5.

7. The battery cell according to claim 6, characterized in that, The passivation of the cut surfaces of the battery cell forms the stacked passivation structure, which is either a silicon oxide layer / hydrogenated amorphous silicon layer / silicon nitride layer stacked passivation structure or a silicon oxide layer / hydrogenated amorphous silicon layer stacked passivation structure.

Images