Light-emitting diode capable of improving electrode gold extrusion and preparation method of light-emitting diode
By optimizing the electrode area ratio and shape design, combined with Au layer protection, the problem of electrode gold extrusion during LED chip packaging was solved, achieving uniform current density and welding stability, and improving the luminous efficiency and reliability of LEDs.
Patent Information
- Application Number
- CN202510672317.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-23
- Publication Date
- 2025-10-28
AI Technical Summary
As LED chip size shrinks, the center distance between the P and N electrodes decreases, making the solder balls more prone to collisions during the packaging process. Furthermore, the electrode metal is easily plastically deformed or cracked under ultrasonic, pressure, or heat treatment, resulting in electrode gold extrusion.
By controlling the ratio of the projected area of the first electrode to the area of the light-emitting region to 0.25 to 0.35 and 0.22 to 0.32, respectively, the electric field concentration effect and mechanical stress are reduced. The use of arc surface and rounded corner design reduces electric field and stress concentration. An Au layer is used as a protective layer, and the metal evaporation rate is controlled to ensure electrode strength.
It effectively avoids unexpected plastic deformation of electrode metal and solder ball collision, reduces post-weld expansion, improves current density uniformity and luminous efficiency, and reduces gold extrusion.
Smart Images
Figure CN120857728A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light-emitting diode with improved electrode gold extrusion and its fabrication method. Background Technology
[0002] Light-emitting diodes (LEDs) are a highly influential new product in the optoelectronics industry. For indoor small-pitch display LED chips, the market urgently demands to reduce production costs by shrinking the size of LED chips.
[0003] In related technologies, as LED chips continue to shrink, the center-to-center distance between the P-electrode and the N-electrode also decreases dramatically. This change causes solder balls to collide with each other during the wire bonding stage of the packaging process. The common approach to address this problem is to reduce the area of the P-electrode and the N-electrode.
[0004] However, as the area of the P and N electrodes is reduced, the electrode metal is prone to unexpected plastic deformation or cracking under ultrasonic, pressure or heat during the wire bonding process, resulting in the phenomenon of "electrode extrusion". Summary of the Invention
[0005] This disclosure provides an improved light-emitting diode with enhanced electrode extrusion and its fabrication method, which can reasonably control the electrode size and improve the electrode extrusion problem. The technical solution is as follows:
[0006] On one hand, this disclosure provides a light-emitting diode (LED) comprising: an epitaxial layer, a first electrode, and a second electrode. The epitaxial layer includes a light-emitting region and a non-light-emitting region. The first electrode is located in the non-light-emitting region, and the second electrode is located in the light-emitting region. The orthographic projection of the first electrode onto the surface of the epitaxial layer is a first projection, and the orthographic projection of the second electrode onto the surface of the epitaxial layer is a second projection. The ratio of the area of the first projection to the area of the light-emitting region is 0.25 to 0.35, and the ratio of the area of the second projection to the area of the light-emitting region is 0.22 to 0.32.
[0007] Optionally, the shape of the first projection includes a semicircle and a rectangle, the radius of the semicircle is the same as the length of the short side of the rectangle, the straight side of the semicircle is connected to the short side of the rectangle, and the long side and the short side of the rectangle have rounded corners; the shape of the second projection is a circle, and in the long side direction of the epitaxial layer, the semicircle of the first projection is located between the second projection and the rectangle of the first projection.
[0008] Optionally, the contour line of the first projection includes trajectory segment M1, and the contour line of the second projection includes seven trajectory segments Mi connected end-to-end, 2≤i≤7; wherein trajectory segments M1, M3, M5, and M7 are circular arc segments, and the remaining trajectory segments are straight line segments; in a coordinate system with the first end of trajectory segment M2 as the origin, the direction parallel to the long side of the epitaxial layer as the X-axis, and the direction perpendicular to the long side of the epitaxial layer as the Y-axis; the trajectory function of each circular arc segment is:
[0009] X = X0 + Rcosα
[0010] Y = Y0 + Rsinα
[0011] In the formula, X0 and Y0 are the centers of the arc segment, R is the radius of the arc segment, and α is the angle corresponding to any point in the arc segment.
[0012] Optionally, trajectory segments M2 and M6 are the first straight line segments with a constant Y-axis coordinate; trajectory segment M4 is the second straight line segment with a constant X-axis coordinate.
[0013] Optionally, both the first electrode and the second electrode include multiple metal layers stacked sequentially, with the metal layer furthest from the epitaxial layer being an Au layer, and the thickness of the Au layer being less than or equal to 8000 angstroms.
[0014] Optionally, both the first electrode and the second electrode include a Cr layer, an Al layer, a first Ti layer, a first Ni layer, a first Pt layer, a second Ni layer, a second Pt layer, and an Au layer stacked sequentially; or, both the first electrode and the second electrode include a Cr layer, an Al layer, a first Ti layer, a second Ti layer, a first Pt layer, a third Ti layer, a second Pt layer, and an Au layer stacked sequentially.
[0015] Optionally, the thickness of the first Ni layer and the second Ni layer is greater than or equal to 2000 angstroms; the thickness of the second Ti layer and the third Ti layer is greater than or equal to 2000 angstroms.
[0016] Optionally, the ratio of the shortest distance between the first projection and the second projection to the length of the long side of the epitaxial layer is 0.2 to 0.25.
[0017] On the other hand, embodiments of this disclosure also provide a method for fabricating a light-emitting diode (LED), the method comprising: fabricating an epitaxial layer, the epitaxial layer including a light-emitting region and a non-light-emitting region; forming a first electrode and a second electrode on the epitaxial layer, the first electrode being located in the non-light-emitting region and the second electrode being located in the light-emitting region; the orthographic projection of the first electrode on the surface of the epitaxial layer being a first projection, the orthographic projection of the second electrode on the surface of the epitaxial layer being a second projection, the ratio of the area of the first projection to the area of the light-emitting region being 0.25 to 0.35, and the ratio of the area of the second projection to the area of the light-emitting region being 0.22 to 0.32.
[0018] Optionally, both the first electrode and the second electrode comprise a Cr layer, an Al layer, a first Ti layer, a first Ni layer, a first Pt layer, a second Ni layer, a second Pt layer, and an Au layer stacked sequentially; or, both the first electrode and the second electrode comprise a Cr layer, an Al layer, a first Ti layer, a second Ti layer, a first Pt layer, a third Ti layer, a second Pt layer, and an Au layer stacked sequentially; forming the first electrode and the second electrode on the epitaxial layer comprises: controlling the metal evaporation rate to be less than or equal to 3 Å / s when preparing the first Ni layer and the second Ni layer; controlling the metal evaporation rate to be less than or equal to 3 Å / s when preparing the second Ti layer and the third Ti layer; and controlling the metal evaporation rate to be less than or equal to 3 Å / s when preparing the Au layer.
[0019] The beneficial effects of the technical solutions provided in this disclosure include at least the following:
[0020] The first electrode of the light-emitting diode provided in this embodiment is disposed in the non-light-emitting region of the epitaxial layer, and the second electrode is disposed in the light-emitting region. The ratio of the projected area of the first electrode to the area of the light-emitting region is 0.25 to 0.35. By controlling the projected area of the first electrode and the area of the light-emitting region within the above range, the area of the first electrode can be reduced to a reasonable range, thereby reducing the electric field concentration effect at the edge of the first electrode, making the electric field distribution more uniform, and making the current density distribution more uniform. This avoids metal migration caused by local Joule heat accumulation, and prevents the electrode metal from being easily subjected to locally strong currents, thus preventing gold extrusion.
[0021] Furthermore, the ratio of the projected area of the second electrode to the area of the light-emitting region is 0.22 to 0.32. This allows the area of the second electrode to be reduced to a reasonable range, thereby reducing the electric field concentration effect at the edge of the second electrode, making the electric field distribution more uniform, and making the current density distribution more uniform. This avoids metal migration caused by local Joule heat accumulation, and prevents the electrode metal from being easily subjected to strong local currents, which could lead to gold extrusion.
[0022] Meanwhile, in related technologies, the electrode areas are relatively large, which can lead to stress concentration due to the area difference between the first and second electrodes. This embodiment reduces the electrode area while making the projected areas of the first and second electrodes similar, resulting in a more symmetrical distribution of mechanical stress during thermocompression welding. This reduces post-weld expansion and effectively avoids metal extrusion caused by plastic deformation. Attached Figure Description
[0023] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0024] Figure 1 This is a top view of a light-emitting diode provided in an embodiment of this disclosure;
[0025] Figure 2 This is a cross-sectional view of a light-emitting diode provided in an embodiment of this disclosure;
[0026] Figure 3 This is a top view of an electrode provided in an embodiment of this disclosure;
[0027] Figure 4 This is a test data diagram of a light-emitting diode provided in an embodiment of this disclosure;
[0028] Figure 5 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure.
[0029] The markings in the diagram are explained as follows:
[0030] 10. Substrate;
[0031] 20. Epitaxial layer; 21. First semiconductor layer; 22. Active layer; 23. Second semiconductor layer; 24. Groove;
[0032] 201. Emitting area; 202. Non-emitting area;
[0033] 31. First electrode; 32. Second electrode;
[0034] 40. Transparent conductive layer;
[0035] 50. Passivation layer. Detailed Implementation
[0036] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.
[0037] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.
[0038] Figure 1 This is a top view of a light-emitting diode provided in an embodiment of this disclosure. Figure 2 This is a cross-sectional view of a light-emitting diode provided in an embodiment of this disclosure. Figure 2 It is along Figure 1 A cross-sectional view taken from section AA.
[0039] like Figure 1 , 2 As shown, the light-emitting diode includes an epitaxial layer 20, a first electrode 31, and a second electrode 32. The epitaxial layer 20 includes a light-emitting region 201 and a non-light-emitting region 202. The first electrode 31 is located in the non-light-emitting region 202, and the second electrode 32 is located in the light-emitting region 201.
[0040] The orthographic projection of the first electrode 31 on the surface of the epitaxial layer 20 is the first projection, and the orthographic projection of the second electrode 32 on the surface of the epitaxial layer 20 is the second projection. The ratio of the area of the first projection to the area of the light-emitting region 201 is 0.25 to 0.35, and the ratio of the area of the second projection to the area of the light-emitting region 201 is 0.22 to 0.32.
[0041] The first electrode 31 of the light-emitting diode provided in this embodiment is disposed in the non-light-emitting region 202 of the epitaxial layer 20, and the second electrode 32 is disposed in the light-emitting region 201. The ratio of the projected area of the first electrode 31 to the area of the light-emitting region 201 is 0.25 to 0.35. By controlling the projected area of the first electrode 31 and the area of the light-emitting region 201 within the above range, the area of the first electrode 31 can be reduced to a reasonable range, thereby reducing the electric field concentration effect at the edge of the first electrode 31, making the electric field distribution more uniform, and making the current density distribution more uniform. This avoids metal migration caused by local Joule heat accumulation and prevents the electrode metal from being easily subjected to locally strong currents, thus preventing gold extrusion.
[0042] Furthermore, the ratio of the projected area of the second electrode 32 to the area of the light-emitting region 201 is 0.22 to 0.32. This allows the area of the second electrode 32 to be reduced to a reasonable range, thereby reducing the electric field concentration effect at the edge of the second electrode 32, making the electric field distribution more uniform, and making the current density distribution more uniform. This avoids metal migration caused by local Joule heat accumulation, and prevents the electrode metal from being easily subjected to strong local currents, which could lead to gold extrusion.
[0043] Meanwhile, in related technologies, the electrode areas are relatively large, which can lead to stress concentration due to the area difference between the first electrode 31 and the second electrode 32. This embodiment reduces the electrode area while making the projected areas of the first electrode 31 and the second electrode 32 similar, resulting in a more symmetrical distribution of mechanical stress during thermocompression welding. This reduces post-weld expansion and effectively avoids metal extrusion caused by plastic deformation.
[0044] Figure 3 This is a top view of an electrode provided in an embodiment of this disclosure. (See image below.) Figure 3 As shown, the shape of the first projection includes a semicircle and a rectangle. The radius of the semicircle is the same as the length of the short side of the rectangle. The straight side of the semicircle is connected to the short side of the rectangle. The long side and the short side of the rectangle have rounded corners.
[0045] By setting part of the side of the first electrode 31 as an arc surface and rounding some of the corner areas, excessive concentration of the electric field at the tip can be avoided. In addition, the arc surface and rounded corners can also alleviate stress concentration in the corner areas of the first electrode 31 and reduce the risk of gold extrusion caused by thermal expansion or packaging stress.
[0046] like Figure 3 As shown, the shape of the second projection is circular, and in the long side direction of the epitaxial layer 20, the semicircle of the first projection is located between the rectangle of the second projection and the rectangle of the first projection.
[0047] In this embodiment, by setting the second electrode 32 to be circular and aligning the arc-shaped surface of the first electrode 31 with the second electrode 32, compared to having the two electrodes face each other with planar surfaces, having the two electrodes face each other with arc-shaped surfaces ensures that only a local area on the opposing sides of the two electrodes is at the shortest distance, while the distance in most areas on the opposing sides of the two electrodes is greater than the shortest distance. This makes it less likely for the solder balls to collide with each other during the wire bonding process in the packaging process.
[0048] Optionally, the ratio of the shortest distance b between the first projection and the second projection to the length c of the long side of the epitaxial layer 20 is 0.2 to 0.25.
[0049] In this embodiment of the present disclosure, the outer contour of the epitaxial layer 20 can be rectangular, and the long side of the epitaxial layer 20 is the longer side on the outer contour of the epitaxial layer 20.
[0050] For example, the shortest distance between the first projection and the second projection is 28 μm, which is also the shortest distance between the first electrode 31 and the second electrode 32. The length of the long side of the epitaxial layer 20 is 125 μm. The ratio of the shortest distance between the first electrode 31 and the second electrode 32 to the length of the long side of the epitaxial layer 20 is 0.224.
[0051] When the ratio of the electrode spacing to the length of the epitaxial layer 20 is too small, the current will be excessively concentrated below the electrodes, leading to localized heating and decreased luminous efficiency; while an excessively large ratio may increase the equivalent resistance, affecting voltage characteristics. By controlling the shortest distance between the first electrode 31 and the second electrode 32 to be within 0.2 to 0.25 of the length of the long side of the epitaxial layer 20, the resistance of lateral current expansion and longitudinal current transmission can be balanced, reducing current congestion near the electrodes and effectively extending the current to the light-transmitting area of the epitaxial layer 20, thereby improving luminous efficiency.
[0052] Meanwhile, setting the distance between the first electrode 31 and the second electrode 32 within an appropriate range can reduce the electric field strength between the two electrodes, thereby reducing the risk of electrostatic breakdown. It can also prevent metal migration short circuits caused by excessively small electrode spacing. Furthermore, by limiting the distance between the two electrodes, heat accumulation caused by excessively high local current density can be reduced, thus lowering the chip temperature gradient.
[0053] Optionally, such as Figure 1 As shown, the side of the light-emitting area 201 near the first electrode 31 includes a first arc segment, a second arc segment and a third arc segment connected in sequence. The first arc segment and the third arc segment are both curved toward the direction of the first electrode 31, and the second arc segment is curved away from the direction of the first electrode 31.
[0054] In this embodiment, both the first and second arc segments bend toward the side where the first electrode 31 is located, which can increase the area of the light-emitting region 201 and thus improve the light-emitting effect of the light-emitting diode.
[0055] The side wall of the first electrode 31 near the light-emitting area 201 is an arc surface. By bending the second arc segment away from the second electrode 32, the second arc segment can form a concentric arc with the side wall of the first electrode 31 near the light-emitting area 201. This makes the distance from each position on the second arc segment to the first electrode 31 the same, which can easily control the shortest distance from the first electrode 31 to the light-emitting area 201 within the design requirements.
[0056] Meanwhile, by setting the sides of the light-emitting region 201 as arc segments, the sharp corners of the active layer 22 can be eliminated, avoiding excessive concentration of the electric field at the tips. The arc segments can also alleviate stress concentration at the corners of the epitaxial layer 20, reducing the risk of cracking caused by thermal expansion or encapsulation stress.
[0057] Optionally, such as Figure 3 As shown, the contour line of the first projection includes trajectory line segment M1, and the contour line of the second projection includes 7 trajectory line segments Mi connected end to end, 2≤i≤7.
[0058] Among them, trajectory segments M1, M3, M5 and M7 are circular arc segments, and the remaining trajectory segments are all straight line segments.
[0059] The first end of trajectory segment M2 ( Figure 3 In a coordinate system with the left endpoint of M2 as the origin, the X-axis parallel to the long side of the epitaxial layer 20, and the Y-axis perpendicular to the long side of the epitaxial layer 20, the trajectory function of each arc segment is:
[0060] X = X0 + Rcosα
[0061] Y = Y0 + Rsinα
[0062] In the formula, X0 and Y0 are the centers of the arc segment, R is the radius of the arc segment, α is the independent variable, and α is the angle corresponding to any point in the arc segment. Each arc segment is determined by the starting point α1, the ending point α2, and the rotation direction of the arc segment. The parameters of the arc segment M are shown in Table 1 below.
[0063] Table 1
[0064] Curve number X01(um) Y01(um) R(um) α1(°) α2(°) Rotation direction M1 -64 18 18 0 360 clockwise M3 13 5 5 270 360 counterclockwise M5 13 31 5 0 90 counterclockwise M7 0 18 18 90 270 counterclockwise
[0065] Meanwhile, considering the error in the process, the center coordinates and radius of each arc segment are allowed to be within ±5μm of the values assigned in Table 1, and the starting value α1 and ending value α2 of the independent variable α are allowed to be within ±5° of the values assigned in Table 1.
[0066] Optionally, such as Figure 3As shown, in the outer contour of the orthographic projection of the first electrode 31 on the surface of the epitaxial layer 20, trace segments M2 and M6 are the first straight line segments with a constant Y-axis coordinate, that is, the first straight line segments are parallel to the X-axis.
[0067] The trajectory function of each first straight line segment is: Y = Y0.
[0068] In the formula, Y0 is a constant. The values of the constant Y0 of the trajectory function of each first straight line segment, the starting value X1 and the ending value X2 of the range of the independent variable X are shown in Table 2 below.
[0069] Table 2
[0070] Curve number y0(um) x1(um) x2(um) M2 0 0 13 M6 36 13 0
[0071] Meanwhile, considering process errors, the values of Y0, starting point X1, and ending point X2 for each of the first straight segments can be allowed to be within ±5μm of the values assigned in Table 2.
[0072] Optionally, such as Figure 3 As shown, in the outer contour of the orthographic projection of the first electrode 31 on the surface of the epitaxial layer 20, the trajectory line segment M4 is a second straight line segment with a constant X-axis coordinate. That is, the second straight line segment is parallel to the Y-axis.
[0073] The trajectory function of each second straight line segment is: X = X0.
[0074] In the formula, X0 is a constant. The values of the constant X0 of the trajectory function of each second straight line segment, the starting value Y1 and the ending value Y2 of the range of the independent variable Y are shown in Table 3 below.
[0075] Table 3
[0076] Curve number x0(um) y1(um) y2(um) M4 18 5 31
[0077] Meanwhile, considering process errors, the values of X0, starting point Y1, and ending point Y2 for each of the above second straight segments are allowed to be within the range of ±5μm assigned in Table 3.
[0078] Optionally, both the first electrode 31 and the second electrode 32 include multiple metal layers stacked sequentially, with the metal layer furthest from the epitaxial layer 20 being an Au layer, and the thickness of the Au layer being less than or equal to 8000 angstroms.
[0079] Au is a chemically stable and inert metal. By placing an Au layer on top of the electrode, a dense protective layer is formed, tightly covering the electrode surface and effectively isolating the electrode from potential corrosion from the external environment. Au also enhances the connection strength between the bonding wire and the electrode due to its excellent ductility and adhesion.
[0080] In related technologies, the thickness of the Au layer is 12,000 angstroms. In this embodiment, the thickness of the Au layer in the electrode is reduced from 12,000 angstroms to 8,000 angstroms. Reducing the Au layer thickness results in less Au being extruded during wire bonding, decreasing the probability of Au extrusion and improving the problem of gold extrusion in the electrode. Simultaneously, reducing the Au thickness also lowers the manufacturing cost of the light-emitting diode.
[0081] Table 4 is a table of metal parameters of an electrode provided in an embodiment of this disclosure.
[0082] Table 4
[0083]
[0084] In one implementation, as shown in Table 4, both the first electrode 31 and the second electrode 32 include a Cr layer, an Al layer, a first Ti layer, a first Ni layer, a first Pt layer, a second Ni layer, a second Pt layer, and an Au layer stacked sequentially.
[0085] In the above implementation, the first two metal layers of the first electrode 31 and the second electrode 32 adopt a stacked structure of Cr and Al layers, which can serve to adhere the epitaxial layer 20 and provide reflection. The third layer adopts a Ti layer, which can prevent the Al and Ni layers from forming an alloy and also serve to adhere. The subsequent alternating stacked structure of Ni and Pt layers can eliminate internal stress in the electrode. The final Au layer forms a dense protective layer that tightly covers the electrode surface, effectively isolating the electrode from potential corrosion by the external environment.
[0086] The thickness of both the first Ni layer and the second Ni layer is greater than or equal to 2000 angstroms. By increasing the thickness of the first Ni layer and the second Ni layer from 1000 angstroms to 2000 angstroms, the overall thickness reduction of the electrode caused by the reduction in the thickness of the Au layer is compensated.
[0087] In another implementation, as shown in Table 4, both the first Ni layer and the second Ni layer are replaced with Ti layers. Both the first electrode 31 and the second electrode 32 include sequentially stacked Cr layers, Al layers, a first Ti layer, a second Ti layer, a first Pt layer, a third Ti layer, a second Pt layer, and an Au layer.
[0088] In the above implementation, the first two metal layers of the first electrode 31 and the second electrode 32 adopt a stacked structure of Cr and Al layers, which can serve to adhere the epitaxial layer 20 and reflect light. The third layer adopts a Ti layer, which can serve to block the Al layer and other metal layers. The subsequent alternating stacked structure of Ti and Pt layers can eliminate internal stress of the electrode. The final Au layer forms a dense protective layer that tightly covers the electrode surface, effectively isolating the electrode from potential corrosion by the external environment.
[0089] The thicknesses of the second and third Ti layers are both greater than or equal to 2000 angstroms. By increasing the thicknesses of the second and third Ti layers from 1000 angstroms to 2000 angstroms, the overall thickness reduction of the electrode caused by the decrease in the thickness of the Au layer is compensated.
[0090] Optionally, such as Figure 2 As shown, the light-emitting diode also includes a substrate 10, and an epitaxial layer 20 is located on the surface of the substrate 10.
[0091] For example, the substrate is a sapphire substrate. Sapphire substrates have high light transmittance, meaning they are transparent. Furthermore, sapphire material is relatively hard and chemically stable, giving the light-emitting diode (LED) good luminous efficacy and stability.
[0092] Optionally, such as Figure 2 As shown, the epitaxial layer 20 includes a first semiconductor layer 21, an active layer 22 and a second semiconductor layer 23 stacked sequentially, and the surface of the second semiconductor layer 23 has a groove 24 that exposes the first semiconductor layer 21.
[0093] The region where the first semiconductor layer 21 exposed in the groove 24 is located is the non-light-emitting region 202 on the epitaxial layer 20, and the region where the second semiconductor layer 23 is located is the light-emitting region 201.
[0094] The transparent conductive layer 40 is located on the surface of the second semiconductor layer 23, the second electrode 32 is located on the surface of the transparent conductive layer 40, the first electrode 31 is located in the groove 24, and the first electrode 31 is connected to the first semiconductor layer 21.
[0095] In this embodiment of the present disclosure, one of the first semiconductor layer 21 and the second semiconductor layer 23 is a p-type layer, and the other of the first semiconductor layer 21 and the second semiconductor layer 23 is an n-type layer.
[0096] As an example, the first semiconductor layer 21 is an n-type layer and the second semiconductor layer 23 is a p-type layer.
[0097] Optionally, the first semiconductor layer 21 is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer can be from 0.5 μm to 3 μm.
[0098] Optionally, the active layer 22 includes alternating InGaN quantum well layers and GaN quantum barrier layers. Specifically, the active layer 22 may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.
[0099] As an example, in an embodiment of this disclosure, the active layer 22 includes five alternating periods of InGaN quantum well layers and GaN quantum barrier layers.
[0100] Optionally, the thickness of the active layer 22 can be from 150 nm to 200 nm.
[0101] Optionally, the second semiconductor layer 23 is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer can be from 0.5 μm to 3 μm.
[0102] Among them, the first electrode 31 located in the groove 24 is an n electrode, and the electrode located on the second semiconductor layer 23 is a p electrode.
[0103] Optionally, such as Figure 2 As shown, the light-emitting diode also includes a transparent conductive layer 40 and a passivation layer 50. The transparent conductive layer 40 is located on the surface of the second semiconductor layer 23, and the passivation layer 50 is located at least on the surface of the second semiconductor layer 23, the surface of the transparent conductive layer 40, and the bottom surface of the groove 24.
[0104] For example, the passivation layer 50 has through holes that expose the first semiconductor layer 21 and the transparent conductive layer 40 respectively. The first electrode 31 is connected to the first semiconductor layer 21 through the through holes, and the second electrode 32 is connected to the transparent conductive layer 40 through the through holes.
[0105] Optionally, the passivation layer 50 may include a DBR layer or a silicon oxide layer.
[0106] The test data of the light-emitting diodes provided in the embodiments of this disclosure are as follows: Figure 4 As shown, the light-emitting diode provided in this embodiment of the present disclosure, through wire bonding verification, reduced the gold extrusion defect rate from 1.06% to 0.66%, thus meeting the requirements for improved gold extrusion. It is evident that the light-emitting diode provided in this embodiment can effectively prevent gold extrusion problems on the electrodes of the light-emitting diode while reducing electrode size and avoiding collisions between solder balls during the wire bonding process.
[0107] Figure 5 This is a flowchart illustrating a method for fabricating a light-emitting diode according to an embodiment of this disclosure. Figure 5 As shown, the preparation method includes:
[0108] Step 101: Prepare the epitaxial layer.
[0109] The epitaxial layer is fabricated on a substrate.
[0110] For example, the epitaxial layer may include a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked on a substrate. The first semiconductor layer has a first conductivity type, the second semiconductor layer has a second conductivity type different from the first conductivity type, and the active layer is used to generate light through electron-hole recombination.
[0111] In this process, one of the first semiconductor layer and the second semiconductor layer is a p-type layer, and the other of the first semiconductor layer and the second semiconductor layer is an n-type layer.
[0112] As an example, the first semiconductor layer is an n-type layer and the second semiconductor layer is a p-type layer.
[0113] The epitaxial layer includes a light-emitting region and a non-light-emitting region, and the second semiconductor layer of the epitaxial layer has a groove that exposes the first semiconductor layer. The first semiconductor layer exposed by the groove is the non-light-emitting region, and the second semiconductor layer is the light-emitting region.
[0114] Step 101, which involves fabricating the epitaxial wafer, may include the following steps:
[0115] The first step is to grow a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked sequentially on a substrate.
[0116] For example, the substrate can be a sapphire substrate. Because sapphire substrates have high light transmittance and are relatively hard and chemically stable, using a sapphire substrate enables the light-emitting diode to have good light-emitting effect and stability.
[0117] Optionally, the first semiconductor layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer can be from 0.5 μm to 3 μm.
[0118] Optionally, the active layer includes alternating InGaN quantum well layers and GaN quantum barrier layers. Specifically, the active layer may comprise 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.
[0119] As an example, in an embodiment of this disclosure, the active layer includes five alternating stacked InGaN quantum well layers and GaN quantum barrier layers.
[0120] Optionally, the thickness of the active layer can be from 150 nm to 200 nm.
[0121] Optionally, the second semiconductor layer is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer can be from 0.5 μm to 3 μm.
[0122] The second step is to etch the surface of the second semiconductor layer to form a groove that exposes the first semiconductor layer.
[0123] The third step is to etch the epitaxial layer to expose the substrate.
[0124] The fourth step is to form a transparent conductive layer in the light-emitting area.
[0125] For example, the transparent conductive layer may be an ITO layer or an IZO layer.
[0126] Specifically, this can include: developing a pattern from a photomask onto a photoresist using photolithography, and then removing the exposed ITO using wet etching.
[0127] Step 102: Form the first electrode and the second electrode on the epitaxial layer.
[0128] The first electrode is located in the non-light-emitting region, and the second electrode is located in the light-emitting region. The orthographic projection of the first electrode on the surface of the epitaxial layer is called the first projection, and the orthographic projection of the second electrode on the surface of the epitaxial layer is called the second projection. The ratio of the area of the first projection to the area of the light-emitting region is 0.25 to 0.35, and the ratio of the area of the second projection to the area of the light-emitting region is 0.22 to 0.32.
[0129] For example, such as Figure 2 As shown, the first electrode is located inside the groove, and the second electrode is located on the surface of the transparent conductive layer.
[0130] Specifically, this may include the following steps:
[0131] The first step is to create a passivation layer on the surface of the epitaxial layer and the surface of the transparent conductive layer.
[0132] Optionally, the passivation layer includes a silicon oxide layer.
[0133] In the preparation of the passivation layer, the deposition temperature is controlled between 150°C and 250°C, and the deposition rate is between 15 Å / s and 25 Å / s. The passivation layer prepared according to this process can release stress and improve the fabrication quality of the light-emitting diode.
[0134] For example, the passivation layer is deposited at a temperature of 200°C and at a deposition rate of 20 angstroms per second.
[0135] The second step is to create vias on the passivation layer that expose the transparent conductive layer and the first semiconductor layer, respectively.
[0136] Specifically, this may include: fabricating a photoresist layer on the surface of the passivation layer, making holes in the area of the photoresist layer corresponding to the vias, and then etching the passivation layer with a buffered oxide etchant.
[0137] The buffer oxide etching solution is either a mixture of hydrofluoric acid and water, or a mixture of ammonium fluoride and water.
[0138] The third step is to fabricate the first and second electrodes on the surface of the passivation layer after forming the through-hole.
[0139] In one implementation, as shown in Table 4, both the first electrode and the second electrode include a Cr layer, an Al layer, a first Ti layer, a first Ni layer, a first Pt layer, a second Ni layer, a second Pt layer, and an Au layer stacked sequentially.
[0140] The thickness of both the first Ni layer and the second Ni layer is greater than or equal to 2000 angstroms. By increasing the thickness of the first Ni layer and the second Ni layer from 1000 angstroms to 2000 angstroms, the overall thickness reduction of the electrode caused by the reduction in the thickness of the Au layer is compensated.
[0141] In another implementation, as shown in Table 4, both the first Ni layer and the second Ni layer are replaced with Ti layers. Both the first electrode and the second electrode comprise a Cr layer, an Al layer, a first Ti layer, a second Ti layer, a first Pt layer, a third Ti layer, a second Pt layer, and an Au layer stacked sequentially.
[0142] The thicknesses of the second and third Ti layers are both greater than or equal to 2000 angstroms. By increasing the thicknesses of the second and third Ti layers from 1000 angstroms to 2000 angstroms, the overall thickness reduction of the electrode caused by the decrease in the thickness of the Au layer is compensated.
[0143] Optionally, when preparing the first Ni layer and the second Ni layer, the metal evaporation rate is controlled to be less than or equal to 3 angstroms / second.
[0144] In the above implementation, by reducing the evaporation rate of the Ni layer to 3 Å / s, the Ni layer under the electrode becomes denser and harder, thereby preventing the problem of electrode gold extrusion.
[0145] Optionally, when preparing the second and third Ti layers, the metal evaporation rate is controlled to be less than or equal to 3 angstroms / second.
[0146] In the above implementation, by reducing the evaporation rate of the Ti layer to 3 Å / s, the Ti layer under the electrode becomes denser and harder, thereby preventing the problem of electrode gold extrusion.
[0147] Optionally, when preparing the Au layer, the metal evaporation rate is controlled to be less than or equal to 3 angstroms / second.
[0148] In the above implementation, by reducing the evaporation rate of the Au layer to 3 angstroms / second, the film of the Au layer under the electrode becomes denser and harder, thereby preventing the problem of electrode gold extrusion.
[0149] Finally, the sapphire can be invisibly cut to reduce brightness loss. Then, the light-emitting diode (LED) can be obtained through testing.
[0150] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.
Claims
1. A light-emitting diode, characterized in that, The light-emitting diode includes an epitaxial layer (20), a first electrode (31), and a second electrode (32). The epitaxial layer (20) includes a light-emitting region (201) and a non-light-emitting region (202). The first electrode (31) is located in the non-light-emitting region (202), and the second electrode (32) is located in the light-emitting region (201). The orthographic projection of the first electrode (31) on the surface of the epitaxial layer (20) is the first projection, and the orthographic projection of the second electrode (32) on the surface of the epitaxial layer (20) is the second projection. The ratio of the area of the first projection to the area of the light-emitting region (201) is 0.25 to 0.35, and the ratio of the area of the second projection to the area of the light-emitting region (201) is 0.22 to 0.
32.
2. The light-emitting diode according to claim 1, characterized in that, The shape of the first projection includes a semicircle and a rectangle. The radius of the semicircle is the same as the length of the short side of the rectangle. The straight side of the semicircle is connected to the short side of the rectangle. The long side and the short side of the rectangle have rounded corners. The second projection is circular in shape, and in the long side direction of the epitaxial layer (20), the semicircle of the first projection is located between the second projection and the rectangle of the first projection.
3. The light-emitting diode according to claim 2, characterized in that, The contour line of the first projection includes trajectory line segment M1, and the contour line of the second projection includes 7 trajectory line segments Mi connected end to end, 2≤i≤7. Among them, trajectory segments M1, M3, M5 and M7 are circular arc segments, and the remaining trajectory segments are all straight line segments; In a coordinate system with the first end of the trajectory line segment M2 as the origin, the direction parallel to the long side of the epitaxial layer (20) as the X-axis, and the direction perpendicular to the long side of the epitaxial layer (20) as the Y-axis; The trajectory function of each arc segment is: X = X0 + Rcosα Y = Y0 + Rsinα In the formula, X0 and Y0 are the centers of the arc segment, R is the radius of the arc segment, and α is the angle corresponding to any point in the arc segment.
4. The light-emitting diode according to claim 3, characterized in that, Trajectory segments M2 and M6 are the first straight line segments with a constant Y-axis coordinate; The trajectory segment M4 is the second straight line segment with a constant X-axis coordinate.
5. The light-emitting diode according to claim 1, characterized in that, Both the first electrode (31) and the second electrode (32) include multiple metal layers stacked sequentially, and the metal layer furthest from the epitaxial layer (20) is an Au layer with a thickness of less than or equal to 8000 angstroms.
6. The light-emitting diode according to claim 5, characterized in that, Both the first electrode (31) and the second electrode (32) comprise sequentially stacked layers of Cr, Al, a first Ti, a first Ni, a first Pt, a second Ni, a second Pt, and an Au; or, Both the first electrode (31) and the second electrode (32) include a Cr layer, an Al layer, a first Ti layer, a second Ti layer, a first Pt layer, a third Ti layer, a second Pt layer and an Au layer stacked sequentially.
7. The light-emitting diode according to claim 6, characterized in that, The thickness of both the first Ni layer and the second Ni layer is greater than or equal to 2000 angstroms; The thickness of both the second Ti layer and the third Ti layer is greater than or equal to 2000 angstroms.
8. The light-emitting diode according to any one of claims 1 to 4, characterized in that, The ratio of the shortest distance between the first projection and the second projection to the length of the long side of the epitaxial layer (20) is 0.2 to 0.
25.
9. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: An epitaxial layer is fabricated, the epitaxial layer comprising a light-emitting region and a non-light-emitting region; A first electrode and a second electrode are formed on the epitaxial layer, the first electrode being located in the non-light-emitting region and the second electrode being located in the light-emitting region; the orthographic projection of the first electrode on the surface of the epitaxial layer is a first projection, and the orthographic projection of the second electrode on the surface of the epitaxial layer is a second projection; the ratio of the area of the first projection to the area of the light-emitting region is 0.25 to 0.35, and the ratio of the area of the second projection to the area of the light-emitting region is 0.22 to 0.
32.
10. The preparation method according to claim 9, characterized in that, Both the first electrode and the second electrode comprise sequentially stacked layers of Cr, Al, a first Ti, a first Ni, a first Pt, a second Ni, a second Pt, and an Au layer; or, Both the first electrode and the second electrode comprise a Cr layer, an Al layer, a first Ti layer, a second Ti layer, a first Pt layer, a third Ti layer, a second Pt layer, and an Au layer stacked sequentially. Forming the first electrode and the second electrode on the epitaxial layer includes: When preparing the first Ni layer and the second Ni layer, the metal evaporation rate is controlled to be less than or equal to 3 angstroms / second; When preparing the second Ti layer and the third Ti layer, the metal evaporation rate is controlled to be less than or equal to 3 angstroms / second; When preparing the Au layer, the metal evaporation rate is controlled to be less than or equal to 3 angstroms / second.