Method, device and medium for time synchronization of memristor neural networks

Abstract

This invention provides a time synchronization method, device, and medium for memristor neural networks, belonging to the fundamental field of artificial intelligence. The method includes: obtaining the time synchronization of the first... i The first state of the nth neuron at the current moment, and the nth neuron in the response system. i The second state of the nth neuron at the current moment; both the first and second states are obtained based on the time-delay memristor neural network model; based on the first and second states at the current moment, the nth neuron in the driving system and the response system are calculated. i The synchronization error of each neuron at the current moment is calculated; a control signal is generated based on the synchronization error delay and the synchronization error at the current moment, and sent to the response system so that the response system adjusts its second state until it achieves state synchronization with the driving system; the synchronization error delay is based on the first... j The synchronization error of each neuron at a historical moment is obtained. i and j All belong to N,N= {1, 2, ..., n This invention improves the accuracy and controllability of state synchronization.

Description

Technical Field

[0001] This invention relates to the field of artificial intelligence technology, specifically to a time synchronization method, device, and medium for memristor neural networks. Background Technology

[0002] Currently, memristor-based memristor neural networks (MNNs) have shown great potential in mimicking the information processing mechanisms of the human brain and have been widely applied in fields such as neuromorphic computing, edge computing, secure communication, image encryption, and intelligent control. To achieve multi-agent collaborative tasks (such as cluster decision-making and distributed sensing), network synchronization control has become a key technology. Network synchronization control mainly employs adaptive control and feedback control strategies. Its technical principle is to design a state feedback or impulse coupling controller based on Lyapunov stability theory, combined with inequality techniques, to ensure that the network reaches a synchronized state under specific constraints.

[0003] There are two common synchronization states in existing technologies: asymptotic synchronization, which achieves precise synchronization after an infinite extension of time, and finite-time synchronization, which achieves precise synchronization after a finite amount of time. Asymptotic synchronization suffers from the following problems: while the theoretical time for the system to reach synchronization is unlimited, the convergence time is unpredictable, making it difficult to meet the demands of high real-time scenarios (such as real-time encryption and high-speed robot control). Furthermore, the convergence speed is greatly affected by initial errors, and uncertainties in practical applications lead to uncontrollable synchronization time. Finite-time synchronization faces the following problems: the time for the system to reach synchronization typically depends on initial conditions. Deriving an upper bound for the finite time based on Lyapunov stability theory is not only highly complex, but the derived upper bound is often much larger than the actual requirements, resulting in conservative time estimation and wasted resources. Summary of the Invention

[0004] In view of this, it is necessary to provide a time synchronization method, device and medium for memristor neural networks to solve the technical problems of time synchronization in the prior art.

[0005] To address the aforementioned technical problems, in a first aspect, the present invention provides a time synchronization method for memristor neural networks, comprising: Get the first in the driver system i The first state of the n neurons at the current moment, and the nth state described in the response system. i The second state of each neuron at the current time; both the first state and the second state are obtained based on a time-delay memristor neural network model;i belong N, N= {1, 2, ..., n}; Based on the first state and the second state at the current moment, the relationship between the driving system and the response system is calculated. i The synchronization error of each neuron at the current moment; A control signal is generated based on the synchronization error delay and the synchronization error at the current moment, and sent to the response system so that the response system adjusts the second state until it achieves state synchronization with the drive system; the synchronization error delay is based on the... j The synchronization error of each neuron at a historical moment is obtained. j belong N, N= {1, 2, ..., n}

[0006] In one possible implementation, the formula for generating the control signal is:

[0007] in, The control signal, For the gain parameter of the linear feedback term, For the gain parameter of the superlinear term, For the gain parameter of the time delay compensation term, The gain parameter is the term that increases the error convergence. For the first i Synchronization error of individual neurons For symbolic functions, For low-power exponent parameters, For parameters of higher powers, For the first j Synchronization error of individual neurons For the first j The time delay of each neuron, For the robustness term gain parameter, It is a real number. All are normal numbers.

[0008] In one possible implementation, generating the control signal based on the synchronization error delay and the synchronization error at the current moment includes: The system control parameters should satisfy the following inequalities: ; ; ; The control signal used to eliminate the dependence on the initial state is generated based on the system parameters; in, The norm order and , For the first i The self-feedback coefficient of each neuron, All are constants. Activation functions The corresponding Lipschitz constant, Activation functions The critical value, All of these are synaptic connection rights.

[0009] In one possible implementation, generating the control signal based on the synchronization error delay and the synchronization error at the current moment includes: If the synchronization error is greater than zero, a control signal for reducing the rate of change of the second state is generated based on the synchronization error time delay and the synchronization error. If the synchronization error is less than zero, a control signal is generated based on the synchronization error delay and the synchronization error to increase the rate of change of the second state.

[0010] In one possible implementation, generating the control signal based on the synchronization error delay and the synchronization error at the current moment includes: Setting an upper limit for synchronization time satisfies the following:

[0011] in, For the number of neurons, This is the first adjustable gain parameter. This is the second adjustable gain parameter. The norm order and , ; The control signal is generated based on the upper limit of the synchronization time.

[0012] In one possible implementation, generating the control signal based on the synchronization error delay and the synchronization error at the current moment includes: The first adjustable gain parameter and the second adjustable gain parameter are set to a first set value and a second set value, respectively. The first set value is the minimum value among the superlinear term gain parameters corresponding to all neurons, and the second set value is the minimum value among the error convergence amplification term gain parameters corresponding to all neurons. A portion of the control signal is generated based on the synchronization error time delay, the adjusted first adjustable gain parameter, and the second adjustable gain parameter, so that the response system achieves state synchronization with the drive system within the fixed time period.

[0013] In one possible implementation, generating the control signal based on the synchronization error delay and the synchronization error at the current moment includes: The first adjustable gain parameter is set to the product of a preset ratio and a first set value, and the second adjustable gain parameter is set to the product of the preset ratio and the second set value; the preset ratio is the ratio of the fixed time to the preset time, and the preset time is less than the fixed time; A portion of the control signal is generated based on the synchronization error time delay, the adjusted first adjustable gain parameter, and the second adjustable gain parameter, so that the response system achieves state synchronization with the drive system within the fixed time period.

[0014] In one possible implementation, the control signal is generated by a synchronization controller and sent to the response system, wherein the driving system is the encryption end and the response system is the decryption end.

[0015] In a second aspect, the present invention also provides an electronic device, including a memory and a processor, wherein, The memory is used to store programs; The processor, coupled to the memory, is used to execute the program stored in the memory to implement the steps in the time synchronization method of the memristor neural network described in any of the above implementations.

[0016] Thirdly, the present invention also provides a computer-readable storage medium for storing a computer-readable program or instruction, which, when executed by a processor, can implement the steps in the time synchronization method of the memristor neural network described in any of the above implementations.

[0017] The beneficial effects of this invention are: the time synchronization method for memristor neural networks provided by this invention first obtains the first... i The first / second state of the neuron at the current moment is used to calculate the instantaneous synchronization error. The control signal is then generated jointly from the current synchronization error and its time delay. This introduces a memory mechanism through the synchronization error time delay, suppressing oscillations caused by sudden disturbances or parameter mismatches, allowing the system to maintain stable synchronization even under non-ideal conditions. Furthermore, since the control signal of this invention depends only on the current synchronization error state and historical synchronization error time delays, and not on the initial state, synchronization can be forcibly achieved within a preset / fixed time period regardless of the initial state (e.g., extremely large differences in the initial voltage of neurons). This overcomes the sensitivity of traditional methods to the initial state, thereby improving the accuracy and controllability of state synchronization. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A schematic flowchart of an embodiment of the memristor neural network time synchronization method provided by the present invention; Figure 2 For the present invention Figure 1 A schematic diagram of an embodiment of S300; Figure 3 For the present invention Figure 1 Another embodiment of the S300 is illustrated in the flowchart. Figure 4 A schematic diagram of an embodiment of the electronic device provided by the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0021] In the description of the embodiments of the present invention, unless otherwise stated, "multiple" means two or more. "And / or" describes the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0022] The terms "first," "second," etc., used in the embodiments of this invention are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a technical feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature.

[0023] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0024] Before demonstrating the embodiments, the following terms will be explained.

[0025] Memristors, as the fourth basic circuit element after resistors, capacitors, and inductors, are ideal carriers for simulating biological synapses due to their unique memory characteristics (resistance value changes with the amount of charge passing through).

[0026] The time-delay memristor neural network model is a neural network model that combines the characteristics of memristors and the time-delay effect. It is mainly used to study the behavior and control problems of complex dynamic systems.

[0027] Lyapunov stability theory is a core mathematical tool in control theory and dynamical system analysis. It constructs a virtual "energy function" (Lyapunov function) and determines the stability of the system by analyzing the trend of this function's change.

[0028] In mathematics and control theory, a solution in the Filippov sense is a generalized definition of a solution when dealing with discontinuous systems (such as non-smooth or discontinuous dynamic systems). This definition allows the solution at the discontinuity point to be multivalued, rather than a single definite value. Specifically, a solution in the Filippov sense is defined using Filippov's differential inclusion theory.

[0029] The Lipschitz constant is a key indicator in mathematics and engineering for measuring the "smoothness" or "upper limit of the rate of change" of a function.

[0030] Synaptic Weight: The weight values ​​of connections (synapses) between neurons in an artificial neural network are physically realized and stored using a special electronic component called a memristor.

[0031] Young's inequality is a fundamental inequality in mathematical analysis used to control the product of two non-negative real numbers.

[0032] This invention provides a time synchronization method, device, and medium for memristor neural networks, which are described below.

[0033] Figure 1 A schematic flowchart of an embodiment of the memristor neural network time synchronization method provided by the present invention is shown below. Figure 1 As shown, the time synchronization method of memristor neural networks includes: S100, Obtain the first [number] in the driver system i The first state of the n neurons at the current moment, and the nth state described in the response system. iThe second state of each neuron at the current time; both the first state and the second state are obtained based on a time-delay memristor neural network model; i belong N, N= {1, 2, ..., n}; S200. Based on the first state and the second state at the current moment, calculate the first state of the driving system and the second state of the response system. i The synchronization error of each neuron at the current moment; S300: Generate a control signal based on the synchronization error delay and the synchronization error at the current moment, and send it to the response system so that the response system adjusts the second state until it achieves state synchronization with the drive system; the synchronization error delay is based on the... j The synchronization error of each neuron at a historical moment is obtained. j belong N, N= {1, 2, ..., n}

[0034] Specifically, the drive system and the response system communicate with each other, and the synchronization controller communicates with both the drive system and the response system. The synchronization controller only controls the response system. The synchronization controller obtains the first... i The first state of the nth neuron at the current moment, and obtain the nth neuron from the response system. i The second state of each neuron at the current moment is determined. Then, the synchronization error at the current moment is obtained by subtracting the first state of the driving system from the second state of the response system. The synchronization controller then calculates the synchronization error based on the second state of the first neuron. j The synchronization error delay is calculated by taking the synchronization error of each neuron at all historical moments. Then, the synchronization controller generates a control signal based on the synchronization error delay and the synchronization error at the current moment. The synchronization controller transmits the generated control signal to the response system. After receiving the control signal, the response system adjusts its second state until the response system and the driving system achieve state synchronization.

[0035] In this embodiment of the invention, the first step is to obtain the first... iThe first / second state of the neuron at the current moment is used to calculate the instantaneous synchronization error. The control signal is then generated jointly from the current synchronization error and its time delay. This introduces a memory mechanism through the synchronization error time delay, suppressing oscillations caused by sudden disturbances or parameter mismatches, allowing the system to maintain stable synchronization even under non-ideal conditions. Furthermore, since the control signal of this invention depends only on the current synchronization error state and historical synchronization error time delays, and not on the initial state, synchronization can be forcibly achieved within a preset / fixed time period regardless of the initial state (e.g., extremely large differences in the initial voltage of neurons). This overcomes the sensitivity of traditional methods to the initial state, thereby improving the accuracy and controllability of state synchronization.

[0036] In some embodiments of the present invention, the formula for generating the control signal is:

[0037] in, The control signal, For the gain parameter of the linear feedback term, For the gain parameter of the superlinear term, For the gain parameter of the time delay compensation term, The gain parameter is the term that increases the error convergence. For the first i Synchronization error of individual neurons For symbolic functions, For low-power exponent parameters, For parameters of higher powers, For the first j Synchronization error of individual neurons For the first j The time delay of each neuron, For the robustness term gain parameter, It is a real number. All are normal numbers.

[0038] Specifically, the expression for the time-delay memristor neural network model is shown in equation (1) below. The first step in the driving system can be obtained from equation (1). i The first state of each neuron at the current moment .

[0039] (1) in, It is the first i The self-feedback coefficient of a neuron represents the neuron's own decay rate. It is a positive real number. It is the first in the drive system iA neuron at time 1 t The first state, It is an activation function. n It refers to the number of neurons in a neural network. t It is a time variable. Indicates the first j Each neuron has a time-varying time-delay, satisfying . It is the memristor synaptic connection right. The function is user-defined. It is a constant, defined by the upper bound of the function. .

[0040] Specifically, the expression for the control signal has a total of five terms on the right side, the first term being... For linear feedback terms, the second term is... It is a superlinear term. For time delay compensation, This is the term that increases with error convergence. This is the robustness term. The linear feedback term is used for basic error feedback, providing stability, while the superlinear term enhances convergence in the small error region (because...). Therefore, the amplitude is large when the error is small. The time delay compensation term is used to directly offset the effect of time delay, and the error convergence amplification term is used to enhance the convergence force in the large error region (because...). (Large error amplitude), robust term is used to resist memristor switching and parameter uncertainty.

[0041] Hypothesis 1: Neuron activation function It is bounded. And for (express (where is any real number) satisfies the following equation (2).

[0042] (2) in, It is the independent variable and , These are activation functions The Lipschitz constant, and They can be equal. Furthermore, suppose... .

[0043] Assumption 2: For any There are positive numbers It satisfies the following equation (3).

[0044] (3) In fact, a memristor neural network is a right-hand discontinuous switching system, specifically for equation (1). This considers the solution in the Filippov sense.

[0045] Using differential inclusion theory, the time-delay memristor neural network of the driving system shown in equation (1) can be transformed into the following equation (4).

[0046] (4) in, , , , .

[0047] Therefore, for There exists a constant This transforms equation (1) into equation (5).

[0048] (5) Considering the state synchronization between the response system and the driving system, the first state in the response system can be obtained by referring to equation (1) in the above embodiment. i The second state of each neuron at the current moment It satisfies the following equation (6). (6) in, It is the first in the response system i A neuron at time 1 t The second state, The control signal is generated by the synchronous controller and only responds to the second state of the system. Control signals generated by the synchronous controller Influence.

[0049] Similar to equation (1) for the aforementioned driving system, the parameters in equation (6) for the response system can also be defined as: ,

[0050] in, For threshold parameters, The driving system and the response system are based on threshold parameters. Dynamically selected synaptic connection rights All are constants.

[0051] According to the differential inclusion theory, the time-delay memristor neural network of the response system shown in equation (6) can also be transformed into the following equation (7).

[0052] (7) in, , , , .

[0053] Therefore, for There exists a constant This transforms equation (6) into equation (8).

[0054] (8) The synchronization error is established based on the first state of the drive system and the second state of the response system, that is, the synchronization error is... The expression for the synchronization error system is shown in equation (9).

[0055] (9) in, , .

[0056] make And the following definitions and lemmas are introduced.

[0057] Definition 1: If for any initial value of the synchronization error system There exists a settling time function and constant , making any When the following equation (10) is satisfied, and for any , If established, the driving system and the response system can operate in time. It achieves state synchronization within a fixed time period.

[0058] (10) in, It is a constant representing the initial time.

[0059] Definition 2: For a time interval independent of the initial state and system parameters (memristor synaptic connection weights) , Given a preset time, by adjusting the parameters of the synchronization controller, the settling time for the response system to become synchronized with the drive system can be made less than [a certain time]. If any If the following equation (11) is satisfied, the drive system and the response system can achieve state synchronization within a preset time.

[0060] (11) Lemma 1: Consider a sequence of nonnegative real numbers and real numbers and satisfy If , then the following inequality (12) holds.

[0061] (12) Lemma 2: For a synchronization error system, if there exists a C-regular function... (representing the mapping from vector to real number) If the following equation (13) is satisfied, then the driving system and the response system reach state synchronization within a fixed time and reach a steady state with the same synchronization error within a fixed time. It satisfies the following equation (14).

[0062] (13) in, and , express Belongs to set All data except 0.

[0063] (14) in, , It is the exponential parameter in Lyapunov stability analysis, used to describe the convergence behavior of synchronization errors (e.g., during state synchronization over a fixed time). , ).

[0064] Furthermore, if the following equation (15) is satisfied, and ( It is a preset time. When the time is fixed, then the drive system and the response system are in The state is synchronized within a preset time.

[0065] (15) Thus, based on the above equations (1), (6) and (9), the controlled object is defined, and equations (13), (14) and (15) provide a convergence framework. The control signals generated by the synchronous controller can be designed to satisfy the following equation (16).

[0066] (16) in, The control signal, For the gain parameter of the linear feedback term, For the gain parameter of the superlinear term, For the gain parameter of the time delay compensation term, The gain parameter is the term that increases the error convergence. For the first i Synchronization error of individual neurons For symbolic functions, For low-power exponent parameters, For parameters of higher powers, For the first Synchronization error of individual neurons For the first j The time delay of each neuron, For the robustness term gain parameter, It is a real number. All are normal numbers.

[0067] It should be noted that, Same or different are both acceptable. The value only needs to satisfy the sufficient condition in Theorem 1. In equation (15) One component.

[0068] In the embodiments of this application, the control signal generated according to formula (16) has multi-dimensional error compensation and adjustment capabilities, which can achieve fast and stable synchronization, significantly enhance the robustness of the system, and is applicable to various complex time-delay memristor neural network systems.

[0069] In some embodiments of the present invention, generating a control signal based on the synchronization error delay and the synchronization error at the current moment includes: The system control parameters should satisfy the following inequalities: ; ; ; The control signal used to eliminate the dependence on the initial state is generated based on the system control parameters; in, The norm order and , For the first i The self-feedback coefficient of each neuron, All are constants. Activation functions The corresponding Lipschitz constant, Activation functions The critical value, All of these are synaptic connection rights.

[0070] Specifically, Theorem 1: When the norm order If at that time, The following equations (17), (18), and (19) are satisfied.

[0071] (17) (18) (19) Equations (17) and (18) ensure stable synchronization of the system even in the presence of time delays and parameter uncertainties by limiting the gain parameter of the control signal. This effectively addresses the impact of synchronization error delays on the system's synchronization performance and improves the system's robustness. Equation (19) sets the robustness term gain parameter... The range of parameters can resist memristor switching and parameter uncertainty, further enhancing the system's robustness to parameter uncertainty and memristor switching. Then, the memristor neural network driving system and response system can achieve fixed-time synchronization under the action of the synchronous controller, and can eliminate the dependence on the initial state, making the global convergence rate independent of the initial state.

[0072] This application ensures that the drive system and the response system achieve state synchronization within a fixed time by satisfying the above inequalities, namely equations (17) to (19). This fixed-time synchronization method avoids the sensitivity to the initial state in traditional synchronization methods, enabling the system to complete synchronization within a predetermined time under any initial conditions. Through system control parameters (including...) ), and The generated control signal can ensure that the synchronization error approaches zero within a fixed time, thereby achieving high-precision synchronization. In addition, by reasonably setting the gain parameter, the convergence speed of the synchronization error can be accelerated, enabling the system to reach the synchronization state more quickly. Furthermore, the synchronization time can be flexibly controlled to meet the needs of different application scenarios.

[0073] In some embodiments of the present invention, generating a control signal based on the synchronization error delay and the synchronization error at the current moment includes: If the synchronization error is greater than zero, a control signal for reducing the rate of change of the second state is generated based on the synchronization error time delay and the synchronization error. If the synchronization error is less than zero, a control signal is generated based on the synchronization error delay and the synchronization error to increase the rate of change of the second state.

[0074] Specifically, due to synchronization error Therefore, when hour, The synchronization controller then generates a control signal based on the synchronization error delay and the synchronization error itself. This signal reduces the rate of change of the second state of the response system, thereby forcing the synchronization error to decrease. This slows down the rate of change of the response system's state, gradually bringing it closer to the drive system. Conversely, when... hour, The synchronization controller then generates a control signal based on the synchronization error delay and the synchronization error itself. This signal increases the rate of change of the second state of the response system, forcing the synchronization error to increase and approach zero. This slows down the rate of change of the response system's state, gradually bringing it closer to the drive system. Thus, regardless of whether the synchronization error is positive or negative, the control signal generated by the synchronization controller always drives the synchronization error close to zero, eliminating the need to adjust parameters individually based on the sign, and thus slowing down the rate of change of the response system's state, gradually bringing it closer to the drive system.

[0075] In some embodiments of the present invention, generating a control signal based on the synchronization error delay and the synchronization error at the current moment includes: Setting an upper limit for synchronization time satisfies the following:

[0076] in, For the number of neurons, This is the first adjustable gain parameter. This is the second adjustable gain parameter. The norm order and , ; The control signal is generated based on the upper limit of the synchronization time.

[0077] This application ensures that the system completes synchronization within a predetermined fixed time by setting an upper limit for the synchronization time, which is crucial for real-time performance and reliability in practical applications. This can be achieved by adjusting the parameters. and This system allows for flexible control of the synchronization time, meeting the needs of various application scenarios. By using a control signal formula based on the upper limit of the synchronization time, control signals can be precisely generated, ensuring that the response system can quickly and stably adjust its state to achieve synchronization with the driving system. Through the combination of superlinear terms and error convergence amplification terms, the control signal can provide strong convergence forces in both small and large error regions, accelerating the system's synchronization process. This not only ensures system stability but also efficiently completes the synchronization task within a predetermined time.

[0078] In some embodiments of the present invention, such as Figure 2As shown, it includes: S211. Set the first adjustable gain parameter and the second adjustable gain parameter to a first set value and a second set value, respectively. The first set value is the minimum value among the superlinear term gain parameters corresponding to all neurons, and the second set value is the minimum value among the error convergence amplification term gain parameters corresponding to all neurons. S212. Generate a portion of the control signal based on the synchronization error time delay, the adjusted first adjustable gain parameter, and the second adjustable gain parameter, so that the response system achieves state synchronization with the drive system within the fixed time.

[0079] Specifically, based on the above equations (17), (18) and (19), the drive system and response system can achieve state synchronization within a fixed time under the action of the synchronization controller.

[0080] If you choose And the following conditions are met at a fixed time:

[0081] in , yes The smallest value in the middle, yes If the minimum value is found, then the response system, under the action of the synchronization controller, can achieve state synchronization with the driving new system within a fixed time.

[0082] The proof is as follows: First, construct the Lyapunov function as shown in equation (20). (20) Calculate the derivative of the Lyapunov function based on the synchronization error system.

[0083]

[0084] Based on assumptions 1 and 2, we have:

[0085]

[0086] in, The driving system and the response system are based on threshold parameters. Dynamically selected synaptic connection rights.

[0087]

[0088] According to Young's inequality, we have: (twenty one) Next:

[0089] Further analysis reveals:

[0090] make According to equations (17), (18) and (19), we can obtain: (twenty two) According to Lemma 1, choose ,but: (twenty three) According to Lemma 2, we have: (twenty four) According to equation (24), the time-delay memristor neural network driving system and response system are in a fixed time... Internal state synchronization can be achieved.

[0091] By adjusting the first and second adjustable gain parameters, control signals can be precisely generated, ensuring that the response system can quickly and stably adjust its state to achieve synchronization with the driving system. The control signal can be dynamically adjusted based on the current synchronization error and its time delay, improving the system's adaptability. Through the combination of superlinear terms and error convergence amplification terms, the control signal provides strong convergence force in both large and small error regions, accelerating the synchronization process and enabling the response system to converge faster when approaching synchronization, thus improving synchronization accuracy. Time delay compensation and robustness terms effectively resist synchronization error time delays and parameter uncertainties, enhancing the system's robustness and ensuring stable synchronization even with time delays and parameter changes, thereby improving system reliability. In summary, this application can effectively set and generate control signals to ensure stable synchronization of a time-delay memristor neural network system within a fixed time. This method not only improves the system's adaptability and robustness but also simplifies the implementation process, making it suitable for various complex application scenarios.

[0092] In some embodiments of the present invention, such as Figure 3 As shown, it includes: S221. Set the first adjustable gain parameter to the product of a preset ratio and the first set value, and the second adjustable gain parameter to the product of the preset ratio and the second set value; the preset ratio is the ratio of the fixed time to the preset time, and the preset time is less than the fixed time; S222. Generate a portion of the control signal based on the synchronization error time delay, the adjusted first adjustable gain parameter, and the second adjustable gain parameter, so that the response system achieves state synchronization with the drive system within the fixed time.

[0093] Specifically, make the parameters satisfy the conditions. Furthermore, we can obtain the following equation (25), then the response system, under the action of the synchronous controller, can communicate with the driving new system within a preset time. Internal state synchronization is achieved.

[0094] (25) By adjusting the gain parameters, the control signal can achieve synchronization in a shorter time. This design significantly improves the system's synchronization speed, enabling the system to complete state synchronization within a preset time. The time delay compensation and robustness terms effectively resist synchronization error delays and parameter uncertainties, enhancing the system's robustness and ensuring stable synchronization even with time delays and parameter changes, thus improving system reliability. Generating the control signal using the adjusted gain parameters allows for dynamic adjustment of the control signal strength based on the current synchronization error and its delay, ensuring the response system can quickly and stably adjust its state to achieve synchronization with the drive system. The ability to adjust the control signal strength according to actual needs enhances the system's adaptability. Furthermore, generating the control signal using the adjusted gain parameters still meets the requirements of Lyapunov stability analysis, ensuring system stability and convergence.

[0095] In this embodiment of the invention, a conservative fixed-time upper bound can be compressed to a user-specified preset time using simple scaling, achieving the "state synchronization within a preset time" function. The gain is amplified but far lower than the exponential gain required by some traditional preset-time methods, reducing energy consumption and hardware implementation complexity. Furthermore, since this invention is still based on fixed-time theory, the system remains robust to initial states and parameter perturbations, ensuring timely synchronization under arbitrary startup conditions within a short period. In summary, control signals can be effectively set and generated to ensure stable state synchronization of the time-delay memristor neural network system within a preset time. This method not only improves the system's adaptability and robustness but also simplifies the implementation process, making it suitable for various complex application scenarios. By flexibly adjusting the preset time, the system can optimize the synchronization time according to actual needs, improving the system's response speed and reliability.

[0096] In this invention, a suitable synchronization controller is designed using differential inclusion and Lyapunov stability theory to enable the driving system and the response system to achieve fixed / preset time p-norm synchronization. The synchronization controller of this invention ensures that the system reaches a synchronized state within a preset time by adjusting the controller parameters, meeting the specific synchronization time requirements of different scenarios. Different synchronization needs are achieved by adjusting the parameters. The control signal generated in this application adjusts the state of the response system, which is completely independent of the initial system state. Regardless of the initial conditions, accurate synchronization can be achieved within the preset time, ensuring the determinism and controllability of the synchronization time. Furthermore, an improved time estimation method reduces conservatism and provides more accurate synchronization time prediction. The synchronization controller allows users to preset the synchronization time according to actual needs, improving the system's applicability and response speed. It allows users to preset the synchronization time according to actual needs, ensuring that a synchronized state is achieved within a specified time by adjusting the controller parameters, meeting the specific synchronization time requirements of different scenarios. In other words, the synchronization controller integrates the function of fixed / preset time synchronization, achieving simultaneous time synchronization with a single controller. Particularly suitable for applications requiring high precision and rapid response (such as robot control, secure communication, and image encryption), preset time synchronization or fixed time synchronization ensures that the system completes state synchronization within a specified time, improving system performance and reliability. Users can achieve "on-demand synchronization" by adjusting the preset time, without worrying about changes in initial state or system parameters. Compared to traditional preset time control, this invention only linearly amplifies the gain by a factor of several, reducing hardware power consumption and implementation complexity. Based on fixed-time theory, the system is robust to initial errors, time delay disturbances, and parameter uncertainties. In addition, the synchronization controller has a simple structure (requiring only two gain scaling parameters) and is easy to deploy on FPGA, DSP, or embedded platforms.

[0097] In some embodiments of the present invention, the control signal is generated by a synchronization controller and sent to the response system, wherein the driving system is an encryption end and the response system is a decryption end.

[0098] Specifically, suppose we design an encryption and decryption system based on a time-delay memristor neural network, where the driving system acts as the encryption end and the response system as the decryption end. The encryption and decryption process is completed by synchronizing the states of the driving and response systems through control signals. The driving system (encryption end) contains a 10-neuron time-delay memristor neural network to generate the encryption signal. The response system (decryption end) also contains a 10-neuron time-delay memristor neural network to decrypt the signal from the driving system. A synchronization controller generates control signals and sends them to the response system to ensure state synchronization between the response and driving systems. This encryption and decryption system based on a time-delay memristor neural network can achieve fast and stable state synchronization through control signals. This not only improves the system's synchronization speed and robustness but also simplifies the implementation process. By flexibly adjusting parameters, the system can optimize the synchronization time according to actual needs, improving the system's response speed and reliability, and ensuring the security and confidentiality of data transmission.

[0099] To better implement the time synchronization method for memristor neural networks in this invention, based on the time synchronization method for memristor neural networks, the corresponding method is as follows: Figure 4 As shown, the present invention also provides an electronic device 400. The electronic device 400 includes a processor 401, a memory 402, and a display 403. Figure 4 Only some components of the electronic device 400 are shown, but it should be understood that it is not required to implement all the components shown, and more or fewer components may be implemented instead.

[0100] In some embodiments, processor 401 may be a central processing unit (CPU), microprocessor, or other data processing chip, used to run program code stored in memory 402 or process data, such as the memristor neural network time synchronization method of the present invention.

[0101] In some embodiments, processor 401 may be a single server or a group of servers. The server group may be centralized or distributed. In some embodiments, processor 401 may be local or remote. In some embodiments, processor 401 may be implemented on a cloud platform. In one embodiment, the cloud platform may include a private cloud, public cloud, hybrid cloud, community cloud, distributed cloud, intranet, multi-cloud, etc., or any combination thereof.

[0102] In some embodiments, memory 402 may be an internal storage unit of electronic device 400, such as a hard disk or memory of electronic device 400. In other embodiments, memory 402 may also be an external storage device of electronic device 400, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc. equipped on electronic device 400.

[0103] Furthermore, the memory 402 may include both internal storage units of the electronic device 400 and external storage devices. The memory 402 is used to store application software and various types of data installed on the electronic device 400.

[0104] In some embodiments, display 403 may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen. Display 403 is used to display information from electronic device 400 and to display a visual user interface. Components 401-403 of electronic device 400 communicate with each other via a system bus.

[0105] In one embodiment, when processor 401 executes the magnetic resonance image optimization program in memory 402, the following steps can be implemented: Obtain the first state of the i-th neuron in the driving system at the current time, and the second state of the i-th neuron in the response system at the current time; both the first state and the second state are obtained based on a time-delay memristor neural network model; i belongs to N, N= {1, 2, ..., n}; Based on the first state and the second state at the current moment, the synchronization error of the i-th neuron in the driving system and the response system at the current moment is calculated. A control signal is generated based on the synchronization error delay and the synchronization error at the current moment, and sent to the response system so that the response system adjusts the second state until it achieves state synchronization with the driving system; the synchronization error delay is obtained based on the synchronization error at the historical moment of the j-th neuron, where j belongs to N, N= {1, 2, ..., n}

[0106] It should be understood that when the processor 401 executes the time synchronization program of the memristor neural network in the memory 402, in addition to the functions mentioned above, it can also perform other functions, as can be found in the description of the corresponding method embodiments above.

[0107] Furthermore, this embodiment of the invention does not specifically limit the type of electronic device 400 mentioned. Electronic device 400 can be a mobile phone, tablet computer, personal digital assistant (PDA), wearable device, laptop computer, or other portable electronic device. Exemplary embodiments of portable electronic devices include, but are not limited to, portable electronic devices running iOS, Android, Microsoft, or other operating systems. The aforementioned portable electronic device can also be other portable electronic devices, such as a laptop computer with a touch-sensitive surface (e.g., a touch panel). It should also be understood that in some other embodiments of the invention, electronic device 400 may not be a portable electronic device, but rather a desktop computer with a touch-sensitive surface (e.g., a touch panel).

[0108] Accordingly, this application also provides a computer-readable storage medium for storing a computer-readable program or instruction. When the program or instruction is executed by a processor, it can implement the steps or functions of the memristor neural network time synchronization method provided in the above-described method embodiments.

[0109] Those skilled in the art will understand that all or part of the processes of the methods described in the above embodiments can be implemented by a computer program instructing related hardware (such as a processor, controller, etc.), and the computer program can be stored in a computer-readable storage medium. The computer-readable storage medium may be a disk, optical disk, read-only memory, or random access memory, etc.

[0110] The time synchronization method, device, and medium of the memristor neural network provided by the present invention have been described in detail above. Specific examples have been used to illustrate the principle and implementation of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation and application scope based on the idea of ​​the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A time synchronization method of a memristor neural network, characterized in that, include: Get the first in the driver system i The first state of the n neurons at the current moment, and the nth state described in the response system. i The second state of each neuron at the current moment; The first state and the second state are both obtained based on a time-delay memristive neural network model; i Belonging to N, N= {1, 2, …, n}; Based on the first state and the second state at the current moment, the relationship between the driving system and the response system is calculated. i The synchronization error of each neuron at the current moment; A control signal is generated based on the synchronization error delay and the synchronization error at the current moment, and sent to the response system so that the response system adjusts the second state until it achieves state synchronization with the drive system; the synchronization error delay is based on the... j The synchronization error of each neuron at a historical moment is obtained. j belong N, N= {1, 2, ..., n }; The step of generating a control signal based on the synchronization error delay and the synchronization error at the current moment includes: The first adjustable gain parameter and the second adjustable gain parameter are set to a first set value and a second set value, respectively. The first set value is the minimum value among the superlinear term gain parameters corresponding to all neurons, and the second set value is the minimum value among the error convergence amplification term gain parameters corresponding to all neurons. A portion of the control signal is generated based on the synchronization error time delay, the adjusted first adjustable gain parameter, and the second adjustable gain parameter, so that the response system achieves state synchronization with the drive system within a fixed time period; the formula for generating the control signal is: in, The control signal, For the gain parameter of the linear feedback term, For the gain parameter of the superlinear term, For the gain parameter of the time delay compensation term, The gain parameter is the term that increases the error convergence. For the first i Synchronization error of individual neurons For symbolic functions, For low-power exponent parameters, For parameters of higher powers, For the first j Synchronization error of individual neurons For the first j The time delay of each neuron, For the robustness term gain parameter, It is a real number. All are positive numbers; The control signal is generated by the synchronization controller and sent to the response system, wherein the drive system is the encryption end and the response system is the decryption end.

2. The method of Claim 1, wherein, The step of generating a control signal based on the synchronization error delay and the synchronization error at the current moment includes: The system control parameters should satisfy the following inequalities: ； ； ； The control signal used to eliminate the dependence on the initial state is generated based on the system control parameters; in, The norm order and , For the first i The self-feedback coefficient of each neuron, All are constants. Activation functions The corresponding Lipschitz constant, Activation functions The critical value, All of these are synaptic connection rights.

3. The method of Claim 1, wherein, The step of generating a control signal based on the synchronization error delay and the synchronization error at the current moment includes: If the synchronization error is greater than zero, a control signal for reducing the rate of change of the second state is generated based on the synchronization error time delay and the synchronization error. If the synchronization error is less than zero, a control signal is generated based on the synchronization error delay and the synchronization error to increase the rate of change of the second state.

4. The method of Claim 3, wherein, The step of generating a control signal based on the synchronization error delay and the synchronization error at the current moment includes: Setting an upper limit for synchronization time satisfies the following: in, For the number of neurons, This is the first adjustable gain parameter. This is the second adjustable gain parameter. The norm order and , ; The control signal is generated based on the upper limit of the synchronization time.

5. The method of Claim 1, wherein, The step of generating a control signal based on the synchronization error delay and the synchronization error at the current moment includes: The first adjustable gain parameter is set to the product of a preset ratio and a first set value, and the second adjustable gain parameter is set to the product of the preset ratio and the second set value; the preset ratio is the ratio of the fixed time to the preset time, and the preset time is less than the fixed time; A portion of the control signal is generated based on the synchronization error time delay, the adjusted first adjustable gain parameter, and the second adjustable gain parameter, so that the response system achieves state synchronization with the drive system within the fixed time period.

6. An electronic device, comprising: Including memory and processor, among which, The memory is used to store programs; The processor, coupled to the memory, is used to execute the program stored in the memory to implement the steps in the time synchronization method of the memristor neural network according to any one of claims 1 to 5.

7. A computer readable storage medium characterized in that, Used to store computer-readable programs or instructions, which, when executed by a processor, can implement the steps in the time synchronization method of the memristor neural network according to any one of claims 1 to 5.

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