Power switch arrangement method, device and electronic equipment

By dividing the circuit module layout into multiple physical partitions and dynamically adjusting the number of power switches, the problem of redundant PSWs in the low-power area of ​​the power gating circuit is solved, achieving area savings and reduced static power consumption.

CN120911390BActive Publication Date: 2026-07-21HAIGUANG INTEGRATED CIRCUIT DESIGN (BEIJING) CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HAIGUANG INTEGRATED CIRCUIT DESIGN (BEIJING) CO LTD
Filing Date
2025-07-22
Publication Date
2026-07-21

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Abstract

The application discloses a power switch arrangement method and device and electronic equipment, and belongs to the technical field of computers. The method comprises the following steps: dividing a first circuit module layout into a plurality of physical partitions; for any physical partition, determining power switch information of the physical partition based on power consumption information of the physical partition; and rearranging power switches in the first circuit module layout according to the power switch information of each physical partition to obtain a second circuit module layout. The above scheme divides the circuit module layout into a plurality of physical partitions and dynamically adjusts the number of power switches (PSWs) based on the power consumption of each partition, thereby avoiding the waste of redundant PSWs in a low-power-consumption partition, saving area overhead, and releasing wiring channels in the low-power-consumption area through non-uniform arrangement to release winding resources. Finally, the number of PSWs is accurately matched with the leakage demand of the partition, the leakage current of invalid switches is reduced, and the static power consumption after the power switch is turned off is reduced.
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Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method, apparatus, and electronic device for arranging a power switch. Background Technology

[0002] Power gating is a common method for reducing static power consumption. This technique allows the power supply to a circuit to be directly disconnected when that circuit is not in operation. This is typically achieved through a power switch cell (PSW). In power gating circuits, PSWs are usually evenly distributed, which results in a large number of redundant PSWs in areas with low power consumption. This not only wastes chip area and wiring resources but also leads to higher static power consumption. Summary of the Invention

[0003] This application provides a method, apparatus, and electronic device for arranging power switches, avoiding the waste of redundant PSWs in low-power zones, saving area overhead, and freeing up wiring channels in low-power zones through non-uniform arrangement, thus freeing up winding resources. Finally, it precisely matches the number of PSWs with the leakage current requirements of each zone, reducing leakage current from ineffective switches and lowering static power consumption after the power switch is turned off. The technical solution is as follows:

[0004] On one hand, a method for arranging power switches is provided, the method comprising:

[0005] The layout of the first circuit module is divided into multiple physical partitions, and the power switches in the layout of the first circuit module are arranged in a uniform distribution.

[0006] For any physical partition, based on the power consumption information of the physical partition, the power switch information of the physical partition is determined. The power consumption information is used to indicate the power consumption of the components contained in the physical partition, and the power switch information is used to indicate the number of power switches required for the physical partition.

[0007] Based on the power switch information of each physical partition, the power switches in the first circuit module layout are rearranged to obtain the second circuit module layout.

[0008] In some embodiments, dividing the first circuit module layout into multiple physical partitions includes any one of the following:

[0009] The layout of the first circuit module is evenly divided into multiple physical partitions of equal area;

[0010] The first circuit module layout is divided into multiple physical partitions according to function, and each functional module corresponds to at least one physical partition.

[0011] The first circuit module layout is divided into multiple physical partitions according to the power domain, and each power domain corresponds to at least one physical partition.

[0012] The layout of the first circuit module is divided into multiple physical partitions according to thermal density.

[0013] In some embodiments, dividing the first circuit module layout into multiple physical partitions includes:

[0014] The first circuit module layout is divided into multiple functional modules according to their functions;

[0015] For any functional module, the functional module is divided into multiple regions according to the power domain;

[0016] For any given region, the region is uniformly divided into multiple physical zones according to thermal density.

[0017] In some embodiments, determining the power switch information of the physical partition based on the power consumption information of the physical partition includes:

[0018] Based on the power consumption information of the physical partition, determine the total power consumption of the physical partition;

[0019] Obtain the resistance of the power switch, the total voltage of the first circuit module layout, and the voltage drop ratio of the power switch in the first circuit module layout;

[0020] The power switch information of the physical partition is determined based on the total power consumption of the physical partition, the resistance of the power switch, the total voltage of the first circuit module layout, and the voltage drop ratio.

[0021] In some embodiments, the method further includes:

[0022] Based on the total power consumption and total voltage of the circuit module, determine the total current of the circuit module.

[0023] Based on the total design current of the circuit module and the voltage drop ratio of the power switches in the circuit module, determine the equivalent resistance of all power switches in the circuit module.

[0024] The number of power switches in the circuit module is determined based on the equivalent resistance and the resistance of the power switch.

[0025] Based on the number of power switches in the circuit module, the power switches are evenly distributed in the circuit module layout of the circuit module to obtain the first circuit module layout.

[0026] In some embodiments, the method further includes:

[0027] A power consumption analysis is performed on the first circuit module layout to obtain the power consumption distribution information of the first circuit module layout, which includes the power consumption information of each physical partition.

[0028] In some embodiments, the method further includes:

[0029] Power consumption analysis is performed on the layout of the first circuit module under multiple application scenarios to obtain multiple power consumption distribution information. Each application scenario corresponds to one power consumption distribution information, and the power consumption distribution information includes the power consumption information of each physical partition.

[0030] For any physical partition, the power consumption information that indicates the highest power consumption of the physical partition among the multiple power consumption distribution information is determined as the power consumption information of the physical partition.

[0031] In some embodiments, the method further includes:

[0032] For any physical partition, the power consumption information of the physical partition is determined based on the design power consumption of each component in the physical partition.

[0033] On the other hand, a power switch arrangement device is provided, the device comprising:

[0034] The partitioning module is used to divide the layout of the first circuit module into multiple physical partitions, wherein the power switches in the layout of the first circuit module are arranged in a uniform distribution.

[0035] The determination module is used to determine the power switch information of any physical partition based on the power consumption information of the physical partition. The power consumption information is used to indicate the power consumption of the components contained in the physical partition, and the power switch information is used to indicate the number of power switches required for the physical partition.

[0036] The layout module is used to rearrange the power switches in the first circuit module layout according to the power switch information of each physical partition to obtain the second circuit module layout.

[0037] In some embodiments, the partitioning module is configured to implement any of the following:

[0038] The layout of the first circuit module is evenly divided into multiple physical partitions of equal area;

[0039] The first circuit module layout is divided into multiple physical partitions according to function, and each functional module corresponds to at least one physical partition.

[0040] The first circuit module layout is divided into multiple physical partitions according to the power domain, and each power domain corresponds to at least one physical partition.

[0041] The layout of the first circuit module is divided into multiple physical partitions according to thermal density.

[0042] In some embodiments, the partitioning module is used to divide the first circuit module layout into multiple functional modules according to function; for any functional module, the functional module is divided into multiple regions according to power domain; for any region, the region is uniformly divided into multiple physical partitions according to heat density.

[0043] In some embodiments, the determining module is configured to determine the total power consumption of the physical partition based on the power consumption information of the physical partition; obtain the resistance of the power switch, the total voltage of the first circuit module layout, and the voltage drop ratio of the power switch in the first circuit module layout; and determine the power switch information of the physical partition based on the total power consumption of the physical partition, the resistance of the power switch, the total voltage of the first circuit module layout, and the voltage drop ratio.

[0044] In some embodiments, the determining module is further configured to: determine the total design current of the circuit module based on the total design power consumption and the total design voltage of the circuit module; determine the equivalent resistance of all power switches in the circuit module based on the total design current of the circuit module and the voltage drop ratio of the power switches in the circuit module; determine the number of power switches in the circuit module based on the equivalent resistance and the resistance of the power switches; and evenly distribute the power switches in the circuit module layout based on the number of power switches in the circuit module to obtain the first circuit module layout.

[0045] In some embodiments, the apparatus further includes:

[0046] The power consumption analysis module is used to perform power consumption analysis on the layout of the first circuit module to obtain power consumption distribution information of the layout of the first circuit module, wherein the power consumption distribution information includes power consumption information of each physical partition.

[0047] In some embodiments, the apparatus further includes:

[0048] The power consumption analysis module is used to perform power consumption analysis on the layout of the first circuit module under multiple application scenarios to obtain multiple power consumption distribution information. Each application scenario corresponds to one power consumption distribution information, and the power consumption distribution information includes the power consumption information of each physical partition.

[0049] The determining module is further configured to, for any physical partition, determine the power consumption information that indicates the highest power consumption of the physical partition among the plurality of power consumption distribution information as the power consumption information of the physical partition.

[0050] In some embodiments, the determining module is further configured to determine the power consumption information of any physical partition based on the design power consumption of each component in the physical partition.

[0051] On the other hand, an electronic device is provided, comprising a processor and a memory, the memory storing a computer program which is loaded and executed by the processor to implement the above-described arrangement of the power switch.

[0052] On the other hand, a computer-readable storage medium is provided, characterized in that the computer-readable storage medium stores a computer program, which is loaded and executed by a processor to implement the above-described arrangement method of the power switch.

[0053] The technical solution provided in this application divides the circuit module layout into multiple physical partitions and dynamically adjusts the number of power switches (PSWs) based on the power consumption of each partition. This avoids the waste of redundant PSWs in low-power partitions, saves area overhead, and releases wiring channels in low-power areas through non-uniform arrangement, freeing up winding resources. Finally, it accurately matches the number of PSWs with the leakage current requirements of the partitions, reduces the leakage current of ineffective switches, and lowers the static power consumption after the power switches are turned off. Attached Figure Description

[0054] Figure 1 This is a schematic diagram of the implementation environment of a power switch arrangement method provided in an embodiment of this application;

[0055] Figure 2 An exemplary schematic diagram of a power supply gating circuit is shown;

[0056] Figure 3 An exemplary schematic diagram of a power switch being uniformly distributed is shown;

[0057] Figure 4 This is a flowchart of a power switch arrangement method according to an embodiment of this application;

[0058] Figure 5 This is a flowchart of another method for arranging a power switch according to an embodiment of this application;

[0059] Figure 6 This is a schematic diagram of power consumption distribution information provided according to an embodiment of this application;

[0060] Figure 7 This is a comparative schematic diagram of a power switch provided according to an embodiment of this application;

[0061] Figure 8 This is a schematic diagram of a power switch arrangement device according to an embodiment of this application;

[0062] Figure 9 This is a block diagram of an electronic device provided according to an embodiment of this application. Detailed Implementation

[0063] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0064] In this application, the terms "first," "second," etc., are used to distinguish identical or similar items that have essentially the same function. It should be understood that there is no logical or temporal dependency between "first," "second," and "nth," nor does it limit the quantity or execution order. It should also be understood that although the following description uses the terms "first," "second," etc., to describe various elements, these elements should not be limited by the terms.

[0065] These terms are simply used to distinguish one element from another. For example, without departing from the various examples, the first element can be referred to as the second element, and similarly, the second element can be referred to as the first element. Both the first and second elements can be elements, and in some cases, they can be separate and distinct elements.

[0066] "At least one" means one or more elements. For example, at least one element can be one element, two elements, three elements, or any integer number of elements greater than or equal to one. "At least two" means two or more elements. For example, at least two elements can be two elements, three elements, or any integer number of elements greater than or equal to two.

[0067] Figure 1 This is a schematic diagram illustrating an implementation environment of a power switch arrangement method according to an embodiment of this application. The electronic device can be a terminal; see [link to relevant documentation]. Figure 1 The implementation environment specifically includes: terminal 101 and server 102. Terminal 101 can be connected to server 102 via wireless network or wired network.

[0068] Terminal 101 can be at least one of the following devices: smartphone, desktop computer, laptop, and foldable computer. Users can use terminal 101 to draw and adjust circuit module layouts.

[0069] Terminal 101 can refer to one of a plurality of terminals, and this embodiment uses terminal 101 as an example. Those skilled in the art will know that the number of terminals can be more or less. For example, there can be several terminals, or dozens or hundreds of terminals, or more. This embodiment does not limit the number of terminals or the type of devices.

[0070] Server 102 provides backend services to terminal 101. Server 102 may include a database storing templates of circuit module layouts and information on various components. Server 102 can be at least one of a single server, multiple servers, a cloud computing platform, and a virtualization center. Optionally, the number of servers may be more or fewer, and this disclosure does not limit this. Of course, server 102 may also include other functional servers to provide more comprehensive and diversified services.

[0071] In some embodiments, server 102 undertakes the primary computing task, and terminal 101 undertakes the secondary computing task; or, server 102 undertakes the secondary computing task, and terminal 101 undertakes the primary computing task; or, server 102 and terminal 101 collaborate on computing using a distributed computing architecture. Server 102 can be connected to terminal 101 and other terminals via a wireless network or a wired network. Optionally, the number of servers can be more or less, and this disclosure does not limit this.

[0072] The power gating circuit is described below.

[0073] Power gating is an important technique in low-power chip design. It's used to switch the power supply to a circuit module when it's not in operation, significantly reducing static power consumption (also known as leakage power). A circuit module refers to a functional module within the chip whose power supply can be independently controlled, such as a computing module or a storage module.

[0074] In modern CMOS (Complementary Metal-Oxide-Semiconductor) technology, even when transistors are in a static, non-switching state, they still consume energy due to subthreshold leakage current, resulting in static power consumption. Disconnecting the power supply to certain modules via a power switch completely de-energizes those modules, thereby eliminating leakage current.

[0075] The core of a power supply gating circuit is the power switch, typically composed of a high-threshold voltage (High-Vt) transistor to reduce leakage current in the power switch itself. See also Figure 2 As shown, Figure 2 An exemplary schematic diagram of a power supply gating circuit is shown. For example... Figure 2As shown, 201 is a PMOS (positive channel metal-oxide-semiconductor, n-type substrate, p-channel, MOSFET that carries current through hole flow) type power switch. This power switch 201 is connected between power rail 202 and the core circuit's power rail 203. The voltage of power rail 202 is VDD (Voltage Drain). The voltage of the core circuit's power rail 203 is VDDSW (Voltage Drain for Switch). Power switch 201 controls the on / off state of the core circuit's power supply via an enable signal. When the enable signal is 0, power switch 201 is on, and the voltages VDD and VDDSW across power switch 201 are equal, connecting the core circuit to power. At this time, leakage power is present in the core circuit. When the enable signal is 1, the power switch 201 is open, and the current in the power rail 202 cannot flow to the core circuit 203 through the power switch 201. That is, the power supply to the core circuit is cut off, and there is no leakage power consumption in the core circuit. The enable signal is a key control signal in digital circuits and chip design, used to activate or disable specific functional modules, data paths, or power domains.

[0076] The power switch arrangement method provided in this application differs from the method of uniformly arranging power switches in existing power gating circuits. See also... Figure 3 , Figure 3 An exemplary schematic diagram shows a power switch with uniform distribution. For example... Figure 3 As shown, an exemplary circuit module with multiple power switches is illustrated. The power switches within this circuit module are evenly arranged. That is, the power switches are arranged in a fixed pattern throughout the circuit module, like standard units. The input terminals of the power switches are connected to a first power rail of the main power supply, and the output terminals are connected to a second power rail of the core circuit (not shown in the figure). The core circuit can be disconnected by disconnecting the first and second power rails.

[0077] The above-described method of uniformly arranging power switches ensures stable power supply and reduces IR drop (voltage drop). This is because the distribution of components in different areas of a circuit module is uneven, resulting in varying power consumption across these areas, and consequently, varying currents flowing through the power switches in each area. In areas with high power consumption, the total current flowing through that area is larger, leading to a larger current carried by each individual power switch and thus a greater voltage drop across the circuit module. Conversely, in areas with low power consumption, the total current flowing through that area is smaller, resulting in a smaller current carried by each individual power switch and a smaller voltage drop across the circuit module. To reduce the overall voltage drop of the circuit module, the density of power switches is typically increased uniformly to reduce the current flowing through each individual power switch, thereby reducing the voltage drop across the circuit module. However, the power consumption of components varies in different areas. While uniformly increasing the number of power switches can reduce the voltage drop in high-power areas, the power switches themselves also occupy a certain area and winding resources, and will generate leakage power consumption. Therefore, this arrangement will cause redundancy of power switches in low-power areas, resulting in additional area and winding costs. Furthermore, additional leakage power consumption will occur when the connected circuit is disconnected.

[0078] Figure 4 This is a flowchart illustrating a method for arranging a power switch according to an embodiment of this application, such as... Figure 4 As shown, the method is performed by an electronic device and includes the following steps:

[0079] 401. The layout of the first circuit module is divided into multiple physical partitions, and the power switches in the layout of the first circuit module are arranged in a uniform distribution.

[0080] In this embodiment, the circuit module layout can be a layout of a single circuit module or a layout of multiple circuit modules. Layout is the final result of integrated circuit physical design. The circuit module layout defines the location and connection relationships of all physical structures such as transistors, interconnects, power / ground networks, and input / output units within the circuit module in a geometric form. Optionally, the circuit module layout may also include special circuits, such as clock trees, electrostatic discharge protection circuits, and power gating circuits.

[0081] Transistors are the basic components that make up logic gates (such as NAND gates and NOR gates) and memory cells. Interconnects are wires made of metal layers used to connect transistors and modules. Power / ground networks provide stable power and ground connections for the entire chip. Input / output units are the interfaces through which the chip communicates with external circuits.

[0082] This application uses a first circuit module layout that includes a power gating circuit as an example for illustration. In this first circuit module layout, the power switches are evenly distributed.

[0083] In this embodiment, the first circuit module layout is divided into multiple physical partitions, and different numbers of power switches are arranged in different physical partitions. A physical partition refers to dividing the entire circuit module layout into several smaller, relatively independent areas. Since the first circuit module layout includes one or more circuit modules, and a circuit module refers to a functional module in a chip that can independently control the power supply, such as a computing module or a storage module, when the first circuit module layout includes multiple circuit modules, each physical partition contains different functional modules, i.e., different circuit modules. Alternatively, when the first circuit module layout includes one circuit module, each physical partition contains different components within that circuit module.

[0084] 402. For any physical partition, determine the power switch information of the physical partition based on the power consumption information of the physical partition.

[0085] In this embodiment, each physical partition includes multiple components, and the power consumption information of the physical partition is used to indicate the power consumption of the components contained in the physical partition. These components include capacitors, resistors, inductors, memory cells, and diodes, etc., and this embodiment does not impose any limitations on them.

[0086] Since the power switch can only handle a limited amount of current, while the circuit module draws a larger current when it is in operation, the circuit module can be connected to multiple power switches, which work together to disconnect the power supply to the circuit module.

[0087] It should be noted that since the current of a component is positively correlated with its power consumption, the total power consumption of the components within a physical partition can be determined by analyzing the power consumption information of that partition. A higher total power consumption indicates a larger current flowing through the components in that partition, thus requiring more power switches; conversely, a lower total power consumption indicates a smaller current flowing through the components in that partition, requiring fewer power switches. Therefore, the power consumption information of a physical partition can determine the number of power switches required for that partition, i.e., the power switch information. This power switch information is used to indicate the number of power switches required for a physical partition.

[0088] 403. Based on the power switch information of each physical partition, rearrange the power switches in the first circuit module layout to obtain the second circuit module layout.

[0089] In this embodiment, after determining the number of power switches required for each physical partition based on the power consumption information of each physical partition, the corresponding number of power switches can be evenly distributed among the physical partitions. That is, some physical partitions have higher total power consumption, so more power switches are evenly distributed among them, while some physical partitions have lower total power consumption, so fewer power switches are evenly distributed among them. After the distribution is completed, the second circuit module layout is obtained. Compared with the first circuit module layout, the power switches in the second circuit module layout are not evenly distributed overall, but they are evenly distributed within each physical partition.

[0090] The power switch arrangement scheme provided in this application divides the circuit module layout into multiple physical partitions and dynamically adjusts the number of power switches (PSWs) based on the power consumption of each partition. This avoids the waste of redundant PSWs in low-power partitions, saves area overhead, and releases wiring channels in low-power areas through non-uniform arrangement, freeing up winding resources. Finally, it accurately matches the number of PSWs with the leakage current requirements of each partition, reduces the leakage current of ineffective switches, and lowers the static power consumption after the power switch is turned off.

[0091] The above Figure 4 The diagram shown is a flowchart of a power switch arrangement method according to the present disclosure. The power switch arrangement scheme provided by the present disclosure will be further described below. Figure 5 This is a flowchart of another power switch arrangement method according to an embodiment of this application, see [link to flowchart]. Figure 5 This method is performed by an electronic device and includes the following steps:

[0092] 501. Based on the total power consumption and total voltage of the circuit module, determine the total current of the circuit module.

[0093] In this embodiment, the circuit module can be one circuit module, multiple circuit modules, or all circuit modules in the chip. The total power consumption of the circuit module refers to the theoretical total power consumption of the components in the circuit module. Correspondingly, the total voltage of the circuit module refers to the theoretical operating voltage of the circuit module. The total current of the circuit module can be determined according to the following calculation formula (1). This total current is the theoretical total current of the circuit module.

[0094] I = P / U (1)

[0095] Where P is the total power consumption of the circuit module, U is the total voltage of the circuit module, and I is the total current of the circuit module.

[0096] 502. Based on the total design current of the circuit module and the voltage drop ratio of the power switches in the circuit module, determine the equivalent resistance of all power switches in the circuit module.

[0097] In this embodiment, the voltage drop ratio refers to the voltage drop across the power switches in the circuit module. Assuming the voltage drop ratio across the power switches is 1%, the equivalent resistance of all power switches in the circuit module can be obtained using the following formula (2).

[0098] R = V drop / =I0.01U / I=0.01U 2 / P (2)

[0099] Among them, V drop I is the voltage drop ratio, P is the total design current of the circuit module, U is the total design power consumption of the circuit module, and R is the equivalent resistance of all power switches in the circuit module.

[0100] 503. Determine the number of power switches in the circuit module based on the equivalent resistance and the resistance of the power switches.

[0101] In this embodiment of the application, since all the power switches in the circuit module are connected in parallel, the following formulas (3) and (4) can be obtained according to the calculation method of parallel resistance.

[0102] 1 / R p +1 / R p +…+1 / R p =1 / R (3)

[0103] N / R p =1 / R (4)

[0104] Among them, R p R is the resistance of a single power switch. R is the equivalent resistance of all power switches in the circuit module. N is the number of power switches in the circuit module when the voltage drop is 1%.

[0105] Based on the above formulas (3) and (4), the following formula (5) can be derived.

[0106] N = R p *P / (0.01U 2 (5)

[0107] Where P is the total power consumption of the circuit module, U is the total voltage of the circuit module, and R... p The resistance of a single power switch is given by , and N is the number of power switches in the circuit module when the voltage drop of the power switch is 1%.

[0108] 504. Based on the number of power switches in the circuit module, the power switches are evenly distributed in the circuit module layout to obtain the first circuit module layout.

[0109] In this embodiment of the application, when designing the circuit module layout, the first circuit module layout can be obtained by evenly arranging the N power switches determined in the above steps into the circuit module layout.

[0110] 505. The layout of the first circuit module is divided into multiple physical partitions, and the power switches in the layout of the first circuit module are arranged in a uniform distribution.

[0111] In this embodiment, the arrangement of the first circuit module layout causes redundancy in the power switches of the low-power area, resulting in additional area overhead and wiring overhead, and additional leakage power consumption when the connected circuit is disconnected. Therefore, to improve the above problems, this application divides the first circuit module layout into multiple physical partitions, and arranges power switches in each physical partition separately.

[0112] This application uses the example of uniformly dividing the layout of a first circuit module into multiple physical partitions of equal area for illustration. The partitioning method can be through grid division per unit area.

[0113] Alternatively, the following are some other ways to divide the first circuit module layout into multiple physical partitions.

[0114] Method 1: The first circuit module layout is divided into multiple physical partitions according to function, with each functional module corresponding to at least one physical partition. Correspondingly, the first circuit module layout is partitioned according to the boundaries of the logical functional modules, with each functional module corresponding to at least one physical partition. That is, a functional module can be divided into one physical partition, or it can be divided into multiple physical partitions. For example, if the area of ​​a certain functional module is less than an area threshold, then that functional module is divided into one physical partition. If the area of ​​another functional module is greater than the area threshold, then that functional module is divided into multiple physical partitions, with the area of ​​each physical partition not exceeding the area threshold. Optionally, these multiple physical partitions may or may not overlap; this embodiment does not impose any restrictions on this.

[0115] Method 2: Divide the first circuit module layout into multiple physical zones according to power domains, with each power domain corresponding to at least one physical zone. This division method divides the first circuit module layout into multiple regions according to power supply characteristics, with each power domain corresponding to one or more physical regions. Optionally, according to voltage levels, circuit modules with different operating voltages are divided into different physical zones. Optionally, according to power mode, circuit modules requiring independent switching and normally open circuit modules are divided into different physical zones. Optionally, according to current requirements, high-current circuit modules are divided into a separate physical zone. This application does not limit the specific division method.

[0116] Method 3: Divide the first circuit module layout into multiple physical zones based on thermal density. This method involves analyzing the thermal distribution characteristics of the circuit module and dividing the layout into physical zones with different thermal density levels. Thermal density is a key indicator for measuring the heat intensity per unit area of ​​the circuit module. Higher thermal density indicates higher heat intensity of components per unit area, resulting in higher power consumption and consequently, a greater number of power switches required.

[0117] Alternatively, the first circuit module layout can be divided into multiple physical partitions directly according to the density of the components. This density can be the cell density, which reflects the number of components within a given area.

[0118] In some embodiments, the first circuit module layout can also be divided into multiple physical partitions through a hierarchical approach. Specifically, firstly, the first circuit module layout is divided into multiple functional modules according to their function. Then, for any functional module, it is divided into multiple regions according to its power domain. Finally, for any region, it is evenly divided into multiple physical partitions according to its heat density. This achieves the division of the first circuit module layout into multiple physical partitions. This partitioning method, while ensuring logical integrity, can accurately divide the first circuit module layout into different physical partitions based on the power consumption and heat density of different regions, thereby enabling the accurate placement of the appropriate number of power switches in each physical partition.

[0119] 506. Perform power consumption analysis on the layout of the first circuit module to obtain the power consumption distribution information of the layout of the first circuit module. The power consumption distribution information includes the power consumption information of each physical partition.

[0120] In this embodiment of the application, power consumption analysis can be performed on the first circuit module layout using a power consumption analysis tool to obtain the power consumption of each component. Then, based on Vector (test vector) or Vectorless (no vector), the power consumption information of each physical partition can be determined, thereby obtaining the power consumption distribution information of the first circuit module layout.

[0121] For example, see Figure 6 As shown, Figure 6 This is a schematic diagram of power consumption distribution information provided according to an embodiment of this application. For example... Figure 6 As shown, the layout of the first circuit module is evenly divided into multiple physical partitions, with each square representing one physical partition. The grayscale value of each square represents the power consumption of the corresponding physical partition; the higher the power consumption, the larger the grayscale value.

[0122] In some embodiments, the power consumption distribution of the first circuit module layout differs under different application scenarios. This is because some components operate in some application scenarios but not in others. For example, taking a Wi-Fi module as an example, components such as the power amplifier and baseband encoding module belonging to the transmit link operate in transmit mode, while components in the receive link are turned off. Components such as the low-noise amplifier and signal decoding module belonging to the receive link operate in receive mode, while components in the transmit link are turned off. In idle mode, only the components in the clock and monitoring units operate. Accordingly, to address different application scenarios, power consumption analysis is performed on the first circuit module layout under multiple application scenarios to obtain multiple power consumption distribution information. Each application scenario corresponds to one power consumption distribution information, which includes the power consumption information of each physical partition. Then, for any physical partition, the power consumption information indicating the highest power consumption of the physical partition among the multiple power consumption distribution information is determined as the power consumption information of the physical partition. By obtaining the power consumption information of the physical partition under different application scenarios, the corresponding number of power switches can be arranged according to the power consumption information, so that the number of power switches can meet the needs of high power consumption application scenarios, and can also control the number of power switches in each physical partition to a certain extent.

[0123] 507. For any physical partition, determine the power switch information of the physical partition based on the power consumption information of the physical partition.

[0124] In this embodiment, for any physical partition, the power consumption information of the physical partition is used to indicate the power consumption of the components contained in the physical partition. Therefore, based on this power consumption information, the total power consumption of the components in the physical partition can be determined. Similarly, for the entire circuit module, the number of power switches for each physical partition can be determined based on the power consumption. Accordingly, according to the above formula (5), combined with the resistance of the power switches and the voltage of the circuit module, the number of power switches required for the physical partition, i.e., the power switch information for that physical partition, can be determined.

[0125] It should be noted that the power consumption information of the aforementioned physical partition refers to the power consumption information actually measured after arranging the components and power switches according to the first circuit module layout. In other words, this power consumption information is used to indicate the actual power consumption of the components in that physical partition. Optionally, for any physical partition, the power consumption information of that physical partition can also be determined based on the design power consumption of each component in the physical partition. Determining the power consumption information based on the design power consumption can save time in actually arranging the components and detecting power consumption, thereby improving the efficiency of determining power switch information.

[0126] 508. Based on the power switch information of each physical partition, rearrange the power switches in the first circuit module layout to obtain the second circuit module layout.

[0127] In this embodiment, the power switch information of a physical partition indicates the number of power switches arranged in that physical partition. Specifically, for a given physical partition, the power switches are evenly distributed within that partition. Based on the number of power switches in each physical partition, a new circuit module layout, referred to as the second circuit module layout, is obtained by evenly rearranging the power switches in each physical partition.

[0128] Figure 7 This is a comparative schematic diagram of a power switch provided according to an embodiment of this application. For example... Figure 7 As shown, an exemplary example is illustrated with four physical partitions R1, R2, R3, and R4, with each physical partition comprising a circuit module, and each circuit module having multiple power switches. Figure 7 As can be seen in (a), before the rearrangement, the switching power supplies in the four physical zones were evenly distributed. However, through... Figure 7 As can be seen from (b) above, after the switching power supplies in the above four physical zones are rearranged, the switching power supplies in the four physical zones are unevenly distributed, and the distribution of the switching power supplies in each physical zone is not exactly the same.

[0129] It should be noted that this application embodiment uses the rearrangement of power switches as an example for illustration. Optionally, depending on actual needs, after obtaining the second circuit module layout, the corresponding circuit module structure can be implemented based on the second circuit module layout, and then power consumption analysis can be performed on the second circuit module layout. Based on the power consumption information of each physical partition, it can be determined whether to further adjust the number of power switches in each physical partition. This application embodiment does not impose any restrictions on this.

[0130] The power switch arrangement scheme provided in this application divides the circuit module layout into multiple physical partitions and dynamically adjusts the number of power switches (PSWs) based on the power consumption of each partition. This avoids the waste of redundant PSWs in low-power partitions, saves area overhead, and releases wiring channels in low-power areas through non-uniform arrangement, freeing up winding resources. Finally, it accurately matches the number of PSWs with the leakage current requirements of each partition, reduces the leakage current of ineffective switches, and lowers the static power consumption after the power switch is turned off.

[0131] Figure 8 This is a schematic diagram of a power switch arrangement device according to an embodiment of this application. The device is configured in an electronic device and includes: a division module 801, a determination module 802, and an arrangement module 803.

[0132] The partitioning module 801 is used to divide the layout of the first circuit module into multiple physical partitions, and the power switches in the layout of the first circuit module are arranged in a uniform distribution.

[0133] The determination module 802 is used to determine the power switch information of any physical partition based on the power consumption information of the physical partition. The power consumption information is used to indicate the power consumption of the components contained in the physical partition, and the power switch information is used to indicate the number of power switches required for the physical partition.

[0134] The layout module 803 is used to rearrange the power switches in the first circuit module layout according to the power switch information of each physical partition to obtain the second circuit module layout.

[0135] In some embodiments, the partitioning module 801 is configured to implement any of the following:

[0136] The layout of the first circuit module is evenly divided into multiple physical partitions of equal area;

[0137] The first circuit module layout is divided into multiple physical partitions according to function, with each functional module corresponding to at least one physical partition.

[0138] The first circuit module layout is divided into multiple physical partitions according to the power domain, and each power domain corresponds to at least one physical partition.

[0139] The layout of the first circuit module is divided into multiple physical partitions according to thermal density.

[0140] In some embodiments, the partitioning module 801 is used to divide the first circuit module layout into multiple functional modules according to function; for any functional module, the functional module is divided into multiple regions according to power domain; for any region, the region is uniformly divided into multiple physical partitions according to heat density.

[0141] In some embodiments, the determining module 802 is used to determine the total power consumption of a physical partition based on the power consumption information of the physical partition; obtain the resistance of the power switch, the total voltage of the first circuit module layout, and the voltage drop ratio of the power switch in the first circuit module layout; and determine the power switch information of the physical partition based on the total power consumption of the physical partition, the resistance of the power switch, the total voltage of the first circuit module layout, and the voltage drop ratio.

[0142] In some embodiments, the determining module 802 is further configured to: determine the total design current of the circuit module based on the total design power consumption and the total design voltage of the circuit module; determine the equivalent resistance of all power switches in the circuit module based on the total design current of the circuit module and the voltage drop ratio of the power switches in the circuit module; determine the number of power switches in the circuit module based on the equivalent resistance and the resistance of the power switches; and evenly distribute the power switches in the circuit module layout based on the number of power switches in the circuit module to obtain a first circuit module layout.

[0143] In some embodiments, the apparatus further includes:

[0144] The power consumption analysis module is used to perform power consumption analysis on the layout of the first circuit module to obtain the power consumption distribution information of the layout of the first circuit module, including the power consumption information of each physical partition.

[0145] In some embodiments, the apparatus further includes:

[0146] The power consumption analysis module is used to perform power consumption analysis on the layout of the first circuit module in multiple application scenarios to obtain multiple power consumption distribution information. Each application scenario corresponds to one power consumption distribution information, which includes the power consumption information of each physical partition.

[0147] The determining module 802 is also used to determine, for any physical partition, the power consumption information that indicates the highest power consumption of the physical partition among multiple power consumption distribution information as the power consumption information of the physical partition.

[0148] In some embodiments, the determining module 802 is further configured to determine the power consumption information of any physical partition based on the design power consumption of each component in the physical partition.

[0149] The power switch arrangement device provided in this application divides the circuit module layout into multiple physical partitions and dynamically adjusts the number of power switches (PSWs) based on the power consumption of each partition. This avoids the waste of redundant PSWs in low-power partitions, saves area overhead, and releases wiring channels in low-power areas through non-uniform arrangement, freeing up winding resources. Finally, it accurately matches the number of PSWs with the leakage current requirements of each partition, reduces the leakage current of ineffective switches, and lowers the static power consumption after the power switch is turned off.

[0150] In the embodiments of this disclosure, the electronic device can be a terminal or a server. When the electronic device is a terminal, the terminal acts as the execution subject to implement the technical solutions provided in the embodiments of this disclosure; when the electronic device is a server, the server acts as the execution subject to implement the technical solutions provided in the embodiments of this disclosure; or, the technical solutions provided in this disclosure can be implemented through interaction between the terminal and the server. This disclosure does not limit the scope of the embodiments.

[0151] Figure 9 This is a block diagram of an electronic device according to an embodiment of this application. Typically, the electronic device 900 includes a processor 901 and a memory 902.

[0152] Processor 901 may include one or more processing cores, such as a quad-core processor, an octa-core processor, etc. Processor 901 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). Processor 901 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 901 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 901 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0153] The memory 902 may include one or more computer-readable storage media, which may be non-transitory. The memory 902 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments, the non-transitory computer-readable storage media in the memory 902 are used to store at least one program code, which is executed by the processor 901 to implement the power switch arrangement method provided in the method embodiments of this disclosure.

[0154] In some embodiments, the electronic device 900 may also optionally include a peripheral device interface 903 and at least one peripheral device. The processor 901, memory 902, and peripheral device interface 903 can be connected via a bus or signal lines. Each peripheral device can be connected to the peripheral device interface 903 via a bus, signal lines, or a circuit board.

[0155] Peripheral device interface 903 can be used to connect at least one I / O (Input / Output) related peripheral device to processor 901 and memory 902. In some embodiments, processor 901, memory 902 and peripheral device interface 903 are integrated on the same chip or circuit board; in some other embodiments, any one or two of processor 901, memory 902 and peripheral device interface 903 can be implemented on separate chips or circuit boards, which is not limited in this embodiment.

[0156] Those skilled in the art will understand that Figure 9 The structure shown does not constitute a limitation on the electronic device 900, and may include more or fewer components than shown, or combine certain components, or use different component arrangements.

[0157] In some embodiments, a computer-readable storage medium including instructions is also provided, such as a memory 902 including instructions, which can be executed by a processor 901 of an electronic device 900 to complete the above-described power switch arrangement method. Optionally, the computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0158] In some embodiments, a computer program product is also provided, including a computer program that, when executed by a processor, implements the above-described arrangement method of the power switch.

[0159] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for arranging power switches, characterized in that, The method includes: A first circuit module layout is obtained, which is generated by evenly arranging the estimated total number of power switches in the layout of the circuit module based on the total design power consumption of the circuit module. Power consumption analysis is performed on the layout of the first circuit module to obtain the power consumption distribution information of the layout of the first circuit module. Based on the power distribution information, the first circuit module layout is divided into multiple physical partitions. The power distribution information includes the power consumption information of each physical partition, and the power consumption information is used to indicate the power consumption of the components contained in the corresponding physical partition. For any physical partition, based on the power consumption information of the physical partition, the power switch information of the physical partition is determined, and the power switch information is used to indicate the number of power switches required for the physical partition; Based on the power switch information of each physical partition, the power switches are rearranged in the corresponding physical partition to obtain the second circuit module layout. In the second circuit module layout, the power switches are evenly distributed in each physical partition, and the distribution density between different physical partitions is positively correlated with the power consumption information of the corresponding physical partition.

2. The method according to claim 1, characterized in that, The step of dividing the layout of the first circuit module into multiple physical partitions includes any one of the following: The layout of the first circuit module is evenly divided into multiple physical partitions of equal area; The first circuit module layout is divided into multiple physical partitions according to function, and each functional module corresponds to at least one physical partition. The first circuit module layout is divided into multiple physical partitions according to the power domain, and each power domain corresponds to at least one physical partition. The layout of the first circuit module is divided into multiple physical partitions according to thermal density.

3. The method according to claim 1, characterized in that, The step of dividing the first circuit module layout into multiple physical partitions includes: The first circuit module layout is divided into multiple functional modules according to their functions; For any functional module, the functional module is divided into multiple regions according to the power domain; For any given region, the region is uniformly divided into multiple physical zones according to thermal density.

4. The method according to claim 1, characterized in that, Determining the power switch information of the physical partition based on the power consumption information of the physical partition includes: Based on the power consumption information of the physical partition, determine the total power consumption of the physical partition; Obtain the resistance of the power switch, the total voltage of the first circuit module layout, and the voltage drop ratio of the power switch in the first circuit module layout; The power switch information of the physical partition is determined based on the total power consumption of the physical partition, the resistance of the power switch, the total voltage of the first circuit module layout, and the voltage drop ratio.

5. The method according to any one of claims 1-4, characterized in that, The method further includes: Based on the total power consumption and total voltage of the circuit module, determine the total current of the circuit module. Based on the total design current of the circuit module and the voltage drop ratio of the power switches in the circuit module, determine the equivalent resistance of all power switches in the circuit module. The number of power switches in the circuit module is determined based on the equivalent resistance and the resistance of the power switch. Based on the number of power switches in the circuit module, the power switches are evenly distributed in the circuit module layout of the circuit module to obtain the first circuit module layout.

6. The method according to any one of claims 1-4, characterized in that, The method further includes: Power consumption analysis is performed on the layout of the first circuit module under multiple application scenarios to obtain multiple power consumption distribution information. Each application scenario corresponds to one power consumption distribution information, and the power consumption distribution information includes the power consumption information of each physical partition. For any physical partition, the power consumption information that indicates the highest power consumption of the physical partition among the multiple power consumption distribution information is determined as the power consumption information of the physical partition.

7. The method according to any one of claims 1-4, characterized in that, The method further includes: For any physical partition, the power consumption information of the physical partition is determined based on the design power consumption of each component in the physical partition.

8. A power switch arrangement device, characterized in that, The device includes: A partitioning module is used to obtain a first circuit module layout, which is generated by evenly distributing the estimated total number of power switches across the circuit module layout based on the total design power consumption of the circuit module. Power consumption analysis is performed on the first circuit module layout to obtain power consumption distribution information. Based on the power consumption distribution information, the first circuit module layout is divided into multiple physical partitions. The power consumption distribution information includes power consumption information for each physical partition, and the power consumption information is used to indicate the power consumption of the components contained in the corresponding physical partition. The determination module is used to determine the power switch information of any physical partition based on the power consumption information of the physical partition, wherein the power switch information is used to indicate the number of power switches required for the physical partition; The layout module is used to rearrange the power switches in the corresponding physical partitions according to the power switch information of each physical partition, so as to obtain the second circuit module layout. In the second circuit module layout, the power switches are evenly distributed in each physical partition, and the distribution density between different physical partitions is positively correlated with the power consumption information of the corresponding physical partition.

9. An electronic device, characterized in that, The electronic device includes a processor and a memory, the memory storing a computer program that is loaded and executed by the processor to implement the arrangement method of the power switch as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which is loaded and executed by a processor to implement the arrangement method of the power switch as described in any one of claims 1 to 7.