Command processing method and device, chip product, equipment and storage medium

Abstract

A command processing method, apparatus, chip product, device, and storage medium are disclosed, relating to the field of computer technology. The method includes: receiving a synchronization command, the synchronization command including address information and operation information, the address information indicating the storage locations of m semaphores, where m is an integer greater than 1; acquiring the m semaphores according to the address information; processing the m semaphores according to the operation mode indicated by the operation information, and obtaining a processing result, the processing result indicating the execution status of the commands corresponding to the m semaphores respectively. This application supports acquiring multiple semaphores for processing through a single synchronization command, which is beneficial for improving the storage access efficiency and processing efficiency of semaphores.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a command processing method, apparatus, chip product, device, and storage medium. Background Technology

[0002] In the field of computer technology, a semaphore is a synchronization mechanism that can be used for resource access control, task synchronization control, and data execution order control. A semaphore is typically implemented as an integer counter, whose value can be used to represent the number of available resources.

[0003] The related technology designs a set of semaphore-based synchronization primitives, including wait operations (P operations) and signal operations (V operations) for semaphores. Each synchronization primitive can operate on one semaphore at a time to control the execution order of tasks in the GPU (Graphics Processing Unit). For example, if task B needs to be executed after task A, after task A is completed, the GPU updates the semaphore to 1 via a signal operation. Before executing task B, the GPU checks if the semaphore is 1 via a wait operation; only if the semaphore is 1 will the GPU execute task B.

[0004] However, when task A requires updating multiple semaphores, the GPU needs to initiate multiple memory accesses to update these multiple semaphores, resulting in low memory access efficiency. Summary of the Invention

[0005] This application provides a command processing method, apparatus, chip product, device, and storage medium. The technical solutions provided by this application include the following.

[0006] According to one aspect of the embodiments of this application, a command processing method is provided, the method comprising:

[0007] Receive a synchronization command, the synchronization command including address information and operation information, the address information being used to indicate the storage location of m semaphores, where m is an integer greater than 1;

[0008] Based on the address information, obtain the m semaphores;

[0009] According to the operation mode indicated by the operation information, the m semaphores are processed to obtain the processing result, which is used to indicate the execution status of the commands corresponding to the m semaphores respectively.

[0010] According to one aspect of the embodiments of this application, a command processing apparatus is provided, the apparatus comprising:

[0011] The command receiving module is used to receive synchronization commands, which include address information and operation information. The address information is used to indicate the storage location of m semaphores, where m is an integer greater than 1.

[0012] A semaphore acquisition module is used to acquire the m semaphores based on the address information;

[0013] The semaphore processing module is used to process the m semaphores according to the operation mode indicated by the operation information, and obtain the processing result. The processing result is used to indicate the execution status of the command corresponding to the m semaphores respectively.

[0014] According to one aspect of the embodiments of this application, a chip is provided, the chip including programmable logic circuits and / or program instructions, the chip being used to implement the above-described command processing method when running.

[0015] According to one aspect of the embodiments of this application, a computer device is provided, the computer device including a processor and a memory, the memory storing a computer program, the computer program being loaded and executed by the processor to implement the above-described command processing method.

[0016] According to one aspect of the embodiments of this application, a computer-readable storage medium is provided, wherein a computer program is stored in the storage medium, the computer program being loaded and executed by a processor to implement the above-described command processing method.

[0017] According to one aspect of the embodiments of this application, a computer program product is provided, the computer program product including a computer program stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, causing the computer device to perform the command processing method described above.

[0018] The technical solutions provided in this application embodiment may include the following beneficial effects.

[0019] It supports acquiring and processing multiple semaphores through a single synchronization command, eliminating the need for multiple synchronization commands to acquire multiple semaphores. This improves the efficiency of semaphore acquisition and processing, reduces bandwidth consumption for synchronization command transmission, and thus enhances bandwidth utilization. Furthermore, based on address information, multiple semaphores can be acquired with a single storage access, eliminating the need for multiple storage accesses for multiple synchronization commands. This further improves storage access efficiency and reduces storage access complexity for semaphores. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of a processor provided in one possible implementation of this application;

[0022] Figure 2 This is a schematic diagram of a processor provided in another possible implementation of this application;

[0023] Figure 3 This is a flowchart of a command processing method provided in one possible implementation of this application;

[0024] Figure 4 This is a schematic diagram of a synchronization command provided in one possible implementation of this application;

[0025] Figure 5 This is a schematic diagram of the synchronization command provided in another possible implementation of this application;

[0026] Figure 6 This is a schematic diagram of the synchronization command provided in another possible implementation of this application;

[0027] Figure 7 This is a flowchart of the command processing method provided in another possible implementation of this application;

[0028] Figure 8 This is a schematic diagram of a wait command provided in one possible implementation of this application;

[0029] Figure 9 This is a schematic diagram of the wait command provided in another possible implementation of this application;

[0030] Figure 10 This is a schematic diagram of a waiting command provided in another possible implementation of this application;

[0031] Figure 11 This is a flowchart of a command processing method provided in another possible implementation of this application;

[0032] Figure 12 This is a schematic diagram of a signal command provided in one possible implementation of this application;

[0033] Figure 13 This is a schematic diagram of the signal commands provided in another possible implementation of this application;

[0034] Figure 14 This is a schematic diagram of the signal commands provided in another possible implementation of this application;

[0035] Figure 15 This is a schematic diagram of a command processing method provided in one possible implementation of this application;

[0036] Figure 16 This is a block diagram of a command processing apparatus provided in one possible implementation of this application;

[0037] Figure 17 This is a block diagram of the command processing apparatus provided in another possible implementation of this application;

[0038] Figure 18 This is a simplified structural block diagram of a computer device provided in one possible implementation of this application. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0040] In the field of computer technology, a semaphore is a synchronization mechanism that can be used for resource access control, task synchronization control, and data execution order control. A semaphore is typically implemented as an integer counter, whose value can be used to represent the number of available resources. For example, a semaphore value of 1 indicates that a resource is available (e.g., the resource is in a triggered state); a semaphore value of 0 indicates that no resource is available (e.g., the resource is in a non-triggered state). This application does not limit the meaning or range of semaphore values.

[0041] Optionally, the semaphore may be stored in a storage unit, such as at least one of the following: ROM (Read-Only Memory), RAM (Random-Access Memory), SSD (SolidState Drives), optical disk, video memory, or RAM. This application does not limit the specific implementation of the semaphore.

[0042] For example, in a GPU, semaphores can be used for synchronization across queues or devices, typically to ensure data is processed in the correct order to avoid resource conflicts. GPUs manage commands through queues; after the graphics driver submits commands to a queue, the GPU executes these commands sequentially. At least one queue exists within a GPU. The primary function of semaphores is to coordinate operations between queues, such as ensuring that a task in a queue waits for another task in that queue to complete before it can begin execution.

[0043] For example, in GPUs, semaphores can be used for synchronization between different queues, such as coordination between graphics queues and compute queues. Graphics queues handle graphics-related tasks, such as rendering 3D graphics and processing textures. Compute queues perform computational tasks, such as scientific computing and data processing. Optionally, in a multi-GPU configuration, semaphores can help multiple GPUs share resources.

[0044] Semaphores achieve synchronization through signaling operations (P (probe, attempt)) and waiting operations (V (verhogen, increment)). A signaling operation refers to the process of signaling the completion of a task by emitting a signal through a semaphore after certain operations have been performed in the queue. For example, after a graphics rendering task is completed, the GPU can control the computation queue to start subsequent computation tasks by manipulating the semaphore. Optionally, a signaling operation on a semaphore can refer to updating the semaphore's value.

[0045] A wait operation refers to the process by which a task uses a semaphore to wait for the preceding task to complete. For example, in graphics rendering, the framebuffer can use a semaphore to determine whether texture calculation is complete, thus waiting for the texture calculation to finish. Optionally, a semaphore operation can refer to comparing the semaphore value with a set reference value.

[0046] In this embodiment, the command used to implement signal operations is a signal command, and the command used to implement wait operations is a wait command. Each task can correspond to a command sequence, and the command sequence can include at least one command, that is, at least one command together completes a specific task. Signal commands and wait commands can be inserted into the command sequence. For example, a wait command can be inserted at the beginning of the command sequence to wait for the previous command sequence to complete, and a signal command can be inserted at the end of the command sequence to control the execution of the next command sequence. Commands generally refer to instructions issued by a user or program to control the behavior of a computer or program, such as GPU commands used to control the GPU to perform specific operations.

[0047] In one example, in the fields of computer science and information technology, a primitive is a basic, indivisible operation or instruction that forms the fundamental unit for constructing more complex operations and programs. For instance, a primitive refers to a program segment consisting of several instructions or machine instructions used to implement a specific function, and its execution is uninterruptible and atomic. In the embodiments of this application, primitives can be used to implement semaphore management functions. For example, signal operations and wait operations can be implemented as primitives for semaphores.

[0048] The related technology designs a set of synchronization primitives based on semaphores, including wait operations (i.e., P operations) and signal operations (i.e., V operations) for semaphores. The synchronization primitives can operate on one semaphore at a time to control the execution order of tasks in the GPU.

[0049] However, when multiple semaphores need to be manipulated, the GPU must perform multiple wait operations or semaphore operations, as well as initiate multiple memory accesses, to achieve the operation on those multiple semaphores. For example, if task A is executed, and then tasks B, C, and D are executed, and then task E is executed, for task E, before executing task E, the GPU needs to perform wait operations on the semaphores of tasks B, C, and D respectively. After tasks B, C, and D are executed, the GPU needs to perform semaphore operations on the semaphores of tasks B, C, and D respectively. This results in low memory access efficiency for semaphores and high bandwidth loss required for synchronization primitive transmission.

[0050] The technical solution provided in this application supports triggering the acquisition of multiple semaphores for comparison using a single wait command (corresponding to a wait operation). For example, a single wait command can trigger the simultaneous acquisition of semaphores for tasks B, C, and D for comparison. It also supports triggering the updating of multiple semaphores using a single signal command (corresponding to a signal operation). For example, a single signal command can trigger the updating of semaphores for tasks B, C, and D, without requiring multiple wait commands to acquire multiple semaphores for comparison or multiple signal commands to update multiple semaphores. This improves the operational efficiency (comparison and updating) for semaphores and reduces the bandwidth consumption required for transmitting wait commands or signal commands, thereby improving bandwidth utilization.

[0051] In addition, by supporting the operation of multiple semaphores with a single storage access, instead of acquiring multiple semaphores through multiple storage accesses for multiple wait commands, or updating multiple semaphores through multiple storage accesses for multiple signal commands, this helps to improve the efficiency and complexity of storage access for semaphores.

[0052] The technical solutions provided in this application mainly relate to the processing of wait commands and signal commands for semaphores. The execution subject of each step can be a processor, such as the front end of the processor.

[0053] Please refer to Figure 1 This is a schematic diagram of a processor provided in one possible implementation of this application.

[0054] The processor 100 is a core component of the computer device, responsible for executing instructions in the program, processing data, and performing computational tasks. For example, the processor 100 can be implemented as a very large-scale integrated circuit, serving as the computing and control core of the computer device.

[0055] This application does not limit the type of processor 100. The processor 100 can be a completely new design or an improvement on an existing processor. For example, the processor 100 can be implemented as at least one of the following: a central processing unit (CPU), a graphics processing unit (GPU), a general-purpose graphics processing unit (GPGPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a tensor processing unit (TPU), a field-programmable gate array (FPGA), a tensor core, or an NPU (Neural Processing Unit).

[0056] In one example, processor 100 includes a frontend 110 and a core engine 120. The frontend 110 is responsible for fetching and parsing instructions, while the core engine 120 is responsible for executing instructions. For example, taking processor 100 as a GPU, the GPU includes a GPU frontend and a Graphics Core Engine (GCE). The GPU frontend is used to fetch and parse GPU commands and to distribute GPU commands to the Graphics Core Engine, which in turn processes the GPU commands distributed by the GPU frontend.

[0057] For example, the GPU front-end can be used to parse and process GPU command sequences sent by the CPU. Each GPU command sequence can be used to implement a task. The CPU can encode insertion signal commands and wait commands in the GPU command sequence to ensure the execution order of tasks. The GPU front-end can directly pass the GPU command sequence to the graphics core engine, or it can parse the GPU command sequence and then pass it to the graphics core engine.

[0058] Optionally, the processor 100 includes at least one core engine 120, and the front end 110 can assign different tasks (i.e. different sequences of commands) to different core engines 120.

[0059] In one example, front-end 110 includes a storage arbitration unit 111 for accessing second storage unit 130 to read commands from second storage unit 130. Commands may originate from other processors; for example, in the case of a GPU, GPU commands may be sent from the CPU to the second storage unit 130 by the graphics driver in the CPU. Optionally, commands in the second storage unit 130 may exist in the form of queues to form at least one command queue, such as a sequence of commands for different tasks forming a single command queue in the second storage unit 130.

[0060] Optionally, the storage arbitration unit 111 is responsible for managing the priority and arbitration of storage access to the second storage unit 130. It ensures that multiple storage access requests can access the memory resources of the second storage unit 130 fairly and efficiently, thereby avoiding conflicts and resource waste.

[0061] The second storage unit 130 can be implemented as a storage unit accessible to the processor 100. This application embodiment does not limit the second storage unit 130; it can be ROM, RAM, SSD, optical disc, memory, etc. Optionally, the second storage unit 130 can be implemented as a storage unit external to the processor 100.

[0062] In this embodiment, the second storage unit 130 can be used not only to store commands but also to store data, such as semaphores and data required for processing tasks. That is, semaphores can be deployed outside the processor 100 through the second storage unit 130.

[0063] Optionally, the front-end 110 further includes a command acquisition unit 112, which manages command acquisition. The front-end 110 is responsible for acquiring command sequences from the second storage unit 130 and passing these sequences to subsequent components to ensure that commands are correctly acquired and passed to other components for processing. For example, the command acquisition unit 112 can acquire commands from the second storage unit 130 through the storage arbitration unit 111 according to preset rules, instruction information, etc. For instance, for a GPU, the GPU can determine the storage location and length of the command sequence based on the instruction information sent by the CPU, and the command acquisition unit 112 can then read the command sequence from the corresponding storage location.

[0064] Optionally, the front end 110 also includes a command analysis unit 113, which is responsible for parsing the command sequence obtained from the second storage unit 130. The command analysis unit 113 can split the command sequence into multiple commands and decode the commands into a form that the processor 100 can understand and execute, to ensure that the commands are correctly interpreted and executed.

[0065] For example, the command analysis unit 113 is used to receive the command sequence sent by the command acquisition unit 112, parse the commands in the command sequence, and send the parsed command sequence to the downstream first command processing unit 114.

[0066] In this embodiment, the first command processing unit 114 is used to process synchronization commands, which are commands used for command synchronization. For example, a synchronization command can be used for synchronization of the same command sequence to ensure the execution order of each command in the same command sequence. A synchronization command can also be used for synchronization between different command sequences to ensure the execution order between different command sequences; this embodiment does not limit this. The synchronization command is constructed based on multiple semaphores. Optionally, the synchronization command can be implemented as at least one of the following: a wait command, a signal command.

[0067] For example, the first command processing unit 114 can be used to process waiting commands and signal commands, that is, to implement waiting operations and signal operations. For instance, the first command processing unit 114 can process waiting commands and signal commands in the command sequence sent by the command analysis unit 113, and send other commands in the command sequence to the downstream second command processing unit 115. Here, other commands refer to commands in the command sequence other than waiting commands and signal commands.

[0068] The second command processing unit 115 is used to process other commands in the command sequence, including but not limited to draw calls, status setting commands, register setting commands, and dispatch mesh commands. The command sequence processed by the second command processing unit 115 is further sent to the downstream core engine 120. For example, for a GPU, the command sequence processed by the second command processing unit 115 is further sent to the downstream graphics core engine to complete the GPU's rendering or computation functions.

[0069] In one example, the storage arbitration unit 111 in the front end 110 can be used to receive storage access requests from the command acquisition unit 112, the first command processing unit 114, and the second command processing unit 115, and to complete storage access to the second storage unit 130 through arbitration. Optionally, the storage arbitration unit 111 can arbitrate storage access requests according to their priority. For example, if the priority of the storage access request from the first command processing unit 114 is higher than the priority of the storage access request from the command acquisition unit 112, the storage arbitration unit 111 will prioritize the storage access request from the first command processing unit 114.

[0070] Among them, the storage access request from the first command processing unit 114 is used to request access to the semaphore in the second storage unit 130. For example, the storage access request generated based on the wait command is used to request to read the semaphore in the second storage unit 130; the storage access request generated based on the signal command is used to request to read or update the semaphore in the second storage unit 130.

[0071] A storage access request from command acquisition unit 112 is used to request to read commands from the second storage unit 130, such as requesting to obtain the command sequence corresponding to a certain task.

[0072] A storage access request from the second command processing unit 115 is used to request to read or update data in the second storage unit 130.

[0073] In one example, such as Figure 2 As shown, the front end 110 may further include a first storage unit 116, which is used to store semaphores. Optionally, the first storage unit 116 may be implemented as a storage unit inside the processor 100. For example, the first storage unit 116 may be implemented as an array or array for storing semaphores, etc., and this embodiment of the application does not limit this.

[0074] That is, semaphores can be deployed inside the processor 100 through the first storage unit 116. In this embodiment of the application, the number of semaphores stored in the first storage unit 116 is not limited, such as a fixed 32 available semaphores or a fixed 64 available semaphores, which can be set and adjusted according to actual usage requirements.

[0075] Optionally, if the semaphore is stored only in the first storage unit 116, the first command processing unit 114 no longer needs to interact with the second storage unit 130, but only with the first storage unit 116. For example, the first command processing unit 114 can directly access the semaphore in the first storage unit 116 to perform read operations, update operations, etc. on the semaphore.

[0076] The following will use method embodiments to describe in detail the technical solutions provided in the embodiments of this application. For content not described in the method embodiments, please refer to the above embodiments, and it will not be repeated here.

[0077] Please refer to Figure 3 The diagram illustrates a flowchart of a command processing method provided in one possible implementation of this application. The execution entity for each step of this method can be... Figure 1 The processor 100 shown is such as the front end 110 in the processor 100. The method may include at least one of the following steps (301-303).

[0078] Step 301: Receive a synchronization command. The synchronization command includes address information and operation information. The address information is used to indicate the storage location of m semaphores, where m is an integer greater than 1.

[0079] In this embodiment, the synchronization command can be implemented as at least one of the following: a wait command or a semaphore command. The wait command instructs the processor's front end to perform a wait operation on multiple semaphores indicated by the wait command. For example, taking a GPU as an example, the wait command instructs the GPU's front end to acquire multiple semaphores and compare each semaphore with its respective reference value to determine whether to continue executing the next command of the wait command or to block the next command until all semaphores are triggered. The reference values ​​corresponding to the semaphores can be set and adjusted according to actual usage requirements.

[0080] Signal commands are used to instruct the processor's front end to perform signal operations on multiple semaphores specified by the signal command. For example, in a GPU, a signal command instructs the GPU's front end to update multiple semaphores based on multiple update values ​​specified by the signal command, causing these semaphores to enter a triggered state, thus indicating that the next command can be executed. The update values ​​corresponding to the semaphores can be set and adjusted according to actual usage requirements.

[0081] The address information above is used to indicate the storage locations of the m semaphores in the memory cells. For example, refer to... Figure 1 When m semaphores are stored in the second storage unit 130, the address information is used to indicate the storage location of each of the m semaphores in the second storage unit 130; Reference Figure 2 When m semaphores are stored in the first storage unit 116, the first address information is used to indicate the storage location of the m semaphores in the first storage unit 116.

[0082] The above operation information is used to indicate the operation method for m semaphores. The operation method refers to the way the semaphores are processed. For example, when the synchronization command is a wait command, the operation information is used to indicate the comparison method between the semaphore and its corresponding synchronization parameter (i.e., reference value), and the comparison method is used to indicate how the semaphores are compared; when the synchronization command is a signal command, the operation information is used to indicate the update method corresponding to each of the m semaphores, and the update method is used to indicate how the semaphores are updated.

[0083] In this embodiment, a semaphore can be a counter maintained based on a synchronization mechanism. Its value is used to manage resources in the processor, such as storage resources, register resources, computing resources, communication resources, interface resources, and any shared resources. For example, a semaphore can be used to indicate the resource occupancy status of a command, a wait operation on a semaphore can be used to request resources for a command to be executed, and a signal operation on a semaphore can be used to release resources for a command that has completed execution. The execution of tasks and the processing of commands are essentially processes of resource management within the processor.

[0084] In one example, the synchronization command can be generated by the processor itself or by another processor outside of it; this application embodiment does not limit this. For example, the wait command or signal command received by the GPU can be generated by a CPU that has established a communication connection with the GPU, such as an application in the CPU.

[0085] For example, if a task needs to wait for multiple tasks to complete before it can be executed, a wait command for the task can be generated based on the semaphores corresponding to the multiple tasks. The address information in the wait command can be used to indicate the storage location of the semaphores corresponding to the multiple tasks.

[0086] If multiple semaphores need to be triggered to indicate that multiple tasks can be executed after a task is completed, a signal command for the task can be generated based on the multiple semaphores. The address information in the signal command can be used to indicate the storage location of the multiple semaphores.

[0087] In one example, the synchronization command is processed by the aforementioned processor, such as by a first command processing unit in the front end of the processor. Exemplarily, the synchronization command is received by and processed by the first command processing unit in the front end. For example, refer to... Figure 1The command acquisition unit 112 sends a storage access request to the storage arbitration unit 111 to obtain a command sequence for a certain task from the second storage unit 130. The command sequence is then sent to the command analysis unit 113. The command analysis unit 113 parses the command sequence and sends it to the first command processing unit 114. The first command processing unit 114 processes the waiting commands or signal commands in the command sequence and, based on the processing status of the waiting commands or signal commands, issues other commands in the command sequence to the second command processing unit 115. This embodiment does not limit the source of the commands in the second storage unit 130.

[0088] For a waiting command, after the waiting command has been processed, the first command processing unit 114 may send other commands in the command sequence that follow the waiting command to the second command processing unit 115. If the waiting command has not been processed, the first command processing unit 114 will block other commands in the command sequence that follow the waiting command.

[0089] For signal commands, after the signal command is processed, the first command processing unit 114 can send other commands in the command sequence that follow the signal command to the second command processing unit 115. If the signal command is not processed, the first command processing unit 114 will block other commands in the command sequence that follow the signal command.

[0090] Step 302: Obtain m semaphores based on the address information.

[0091] Optionally, when the first command processing unit receives a synchronization command, it extracts address information from the synchronization command, determines the sub-address information corresponding to each of the m semaphores based on the address information, and then obtains the m semaphores based on the sub-address information corresponding to each of the m semaphores.

[0092] For example, the process of acquiring a semaphore may include the following.

[0093] 1. Based on the address information, obtain the sub-address information corresponding to each of the m semaphores.

[0094] The sub-address information of a semaphore is used to indicate the storage location of the semaphore. For example, the sub-address information of a semaphore is used to indicate the starting storage address of the semaphore in the memory cell.

[0095] In one example, the address information includes initial address information. The front end can determine the sub-address information corresponding to each of the m semaphores based on the initial address information. The process of determining the sub-address information of the semaphores can include the following.

[0096] (1) Determine the initial address information as the sub-address information of the first semaphore among m semaphores.

[0097] In this embodiment, m semaphores are arranged sequentially in the storage unit. This can be done by arranging the m semaphores adjacently or at equal intervals; this embodiment does not limit the specific arrangement. The size of the semaphores can also be set and adjusted according to actual usage requirements. For example, the size of the semaphore (used to indicate the storage length of the semaphore) can be 32 bits, or 4 bytes. For instance, if m semaphores are arranged sequentially in the storage unit, each semaphore occupies 4 bytes, and the m semaphores occupy a total of 4m bytes.

[0098] Optionally, when the initial address information is the sub-address information of the first semaphore among the m semaphores, the first semaphore may refer to the semaphore that ranks first among the m semaphores; when the initial address information is the sub-address information of the last semaphore among the m semaphores, the first semaphore may refer to the semaphore that ranks last among the m semaphores, and this application embodiment does not limit this.

[0099] (2) For other semaphores among the m semaphores, the sub-address information of the other semaphores is obtained based on the arrangement position of the other semaphores among the m semaphores, the address update step size and the sub-address information of the first semaphore. The address update step size is used to indicate the difference between the sub-address information of two adjacent semaphores.

[0100] Other semaphores can refer to semaphores other than the first semaphore among m semaphores. The arrangement position of other semaphores among the m semaphores can be represented by their ordinal numbers. The address update step size can be a fixed preset value or a value dynamically set in the synchronization command according to actual usage requirements. For example, the address update step size can be an integer multiple of the semaphore size. For instance, when semaphores are stored adjacently, the address update step size can be the size of the semaphore; when semaphores are stored with a gap of one semaphore length, the address update step size can be twice the size of the semaphore. Optionally, the synchronization command includes information indicating the address update step size, and the first command processing unit can directly extract the address update step size from the waiting command.

[0101] Optionally, for any other signal, the difference between the arrangement position of the other semaphore and the arrangement position of the first semaphore is obtained; then, the address distance between the other semaphore and the first semaphore is determined based on the difference and the address update step size; finally, the sub-address information of the other semaphore is determined based on the address distance and the sub-address information of the first semaphore.

[0102] The product of the difference and the address update step size is used to determine the address distance.

[0103] For example, when the initial address information is the sub-address information of the first semaphore among m semaphores, an accumulation method can be used to determine the address information corresponding to each of the m semaphores. For instance, for the second semaphore, the sum of the initial address information and one times the address update step size can be used to determine the sub-address information of the second semaphore; for the third semaphore, the sum of the initial address information and two times the address update step size can be used to determine the sub-address information of the third semaphore, and so on, to obtain the sub-address information corresponding to each of the m semaphores.

[0104] When the initial address information is the sub-address information of the last semaphore among m semaphores, a cumulative subtraction method can be used to determine the sub-address information corresponding to each of the m semaphores. For example, for the (m-1)th semaphore, the difference between the initial address information and one times the address update step size can be used to determine the sub-address information of the (m-1)th semaphore; for the (m-2)th semaphore, the difference between the initial address information and twice the address update step size can be used to determine the sub-address information of the (m-1)th semaphore, and so on, to obtain the sub-address information corresponding to each of the m semaphores.

[0105] For example, refer to Figure 4 The synchronization command 400 may include identification information "synchronization command," which indicates that the command is a synchronization command. The synchronization command 400 may also include initial address information "Addr" and a quantity parameter "count." The initial address information "Addr" indicates the sub-address information of the first semaphore among "count" semaphores, and the quantity parameter "count" indicates the number of semaphores to be processed. The synchronization command 400 may also include a parameter "mode" indicating the address update step size.

[0106] Optionally, the synchronization command 400 records relevant information at a granularity of at least one of 64 bits, 32 bits, 16 bits, and 4 bits. Taking 32 bits as an example, the first 32 bits in the synchronization command 400 can be used to record the identification information "synchronization command", the address update step size parameter "mode", and the quantity parameter "count". For example, the high bits of the first 32 bits are used to record the identification information "synchronization command", and the low bits of the first 32 bits are used to record the address update step size parameter "mode" and the quantity parameter "count". The second 32 bits in the synchronization command 400 can be used to record operation information and the initial address information "Addr". For example, the high bits of the second 32 bits are used to record the operation information, and the low bits of the second 32 bits are used to record the initial address information "Addr".

[0107] With the address update step size fixed at 32 bits (the size of the semaphore), the sub-address information of the first semaphore can be the initial address information "Addr", the sub-address information of the second semaphore is "Addr" + 1, the address information of the third semaphore is "Addr" + 2, and so on. With the mode indicating an address update step size of 64 bits, the sub-address information of the first semaphore can be the initial address information "Addr", the sub-address information of the second semaphore is "Addr" + 2, the sub-address information of the third semaphore is "Addr" + 4, and so on.

[0108] This application embodiment determines the sub-address information of each of the m semaphores based on the initial address information, address update step size, and arrangement position, without having to record the sub-address information of each of the m semaphores in the synchronization command. This makes the synchronization command more compact and supports the comparison of multiple semaphores by the same synchronization command, thereby reducing the bandwidth loss required for synchronization command transmission and thus improving the performance of the processor.

[0109] In one example, the address information includes sub-address information corresponding to each of the m semaphores. The first command processing unit can directly extract the sub-address information corresponding to each of the m semaphores from the address information without additional calculation. This helps to reduce the difficulty of obtaining sub-address information, thereby improving the efficiency and convenience of obtaining sub-address information.

[0110] For example, refer to Figure 5 The synchronization command 500 includes "count" address information entries: address information 0 to address information (count-1). Each address information corresponds to a semaphore. For example, address information 0 indicates the sub-address information of the first semaphore, address information (count-1) indicates the sub-address information of the (count-1)th semaphore, and so on. Optionally, the lower 32 bits of the even-numbered sequence in the synchronization command 500 are used to record the address information.

[0111] In one example, the synchronization command also includes a mask parameter, which comprises m elements, each corresponding one-to-one with one of the m semaphores. The mask parameter instructs the first command processing unit which semaphores to acquire. For example, for any of the m elements, if the element has a first value, the first command processing unit acquires the semaphore corresponding to that element and retrieves the corresponding sub-address information from the address information; if the element has a second value, the first command processing unit neither acquires the semaphore corresponding to that element nor retrieves the corresponding sub-address information from the address information. The first and second values ​​can be set and adjusted according to actual usage requirements, and this embodiment does not limit this. For example, the first value is 1, and the second value is 0.

[0112] For example, if the mask parameter is 00010001, it can be determined that the 4th and 8th semaphores can be obtained, and the sub-address information of the 4th and 8th semaphores can be obtained from the address information. Since the mask parameter can indicate the number of semaphores, the quantity parameter does not need to be set in the synchronization command. For example, 00010001 can indicate that the number of semaphores is 8.

[0113] Optionally, if all m elements are the first value, the front end determines the sub-address information corresponding to each of the m semaphores based on the address information. If all m elements are the first value, the first command processing unit needs to acquire all m semaphores.

[0114] In one example, if the t-th element out of m elements is the first value, then the sub-address information of the semaphore corresponding to the t-th element is obtained from the address information, where t is an integer greater than 0 and less than m+1. The t-th element can refer to any element among the m elements.

[0115] Optionally, if the address information includes sub-address information corresponding to each of the m semaphores, the first command processing unit directly extracts the sub-address information corresponding to each of the m semaphores from the address information; if the address information only includes the initial address information, the first command processing unit determines the sub-address information corresponding to each of the m semaphores based on the initial address information and the mask parameter.

[0116] For example, for the t-th element in the mask parameter, the sub-address information of the t-th semaphore is obtained based on the arrangement position of the t-th semaphore corresponding to the t-th element among the m semaphores, as well as the address update step size and initial address information (i.e., the sub-address information of the first semaphore mentioned above). This application embodiment does not limit this.

[0117] For example, refer to Figure 6The synchronization command 600 includes a mask parameter "mask", which is recorded as the second 32-bit in the synchronization command 600. Since there is no need to record the count parameter, the count parameter "count" can be deleted from the first 32 bits and replaced with other parameters, such as operation information, which indicates the operation mode of the semaphore.

[0118] Optionally, the synchronization command 600 may also include sub-address information corresponding to each of the m semaphores, or it may only include the initial address information (not shown in the figure) and the parameter "mode" of the address update step size. This application embodiment does not limit this.

[0119] The embodiments of this application indicate which semaphores the first command processing unit needs to acquire through mask parameters, without dynamically adjusting the semaphores indicated by the synchronization command, thereby improving the versatility of the synchronization command.

[0120] In one example, at least two of the above-mentioned synchronization commands 400, 500 and 600 may exist in the processor at the same time. However, if different settings are used to distinguish them by the parameter "mode", the processor may also have only one of the above-mentioned synchronization commands 400, 500 and 600. This application embodiment does not limit this.

[0121] 2. Based on the sub-address information corresponding to each of the m semaphores, read the m semaphores from the storage unit.

[0122] In the embodiments of this application, the above-mentioned storage unit can be implemented as at least one of the following: a first storage unit and a second storage unit.

[0123] Optionally, if m semaphores are stored in the first memory unit inside the processor, the m semaphores are read from the first memory unit according to the sub-address information corresponding to each of the m semaphores.

[0124] like Figure 2 As shown, when m semaphores are stored in the first storage unit 116, the sub-address information corresponding to each of the m semaphores is used to indicate the storage location of each of the m semaphores in the first storage unit 116. The first command processing unit 114 can directly read the m semaphores from the first storage unit 116 through a single storage access based on the sub-address information corresponding to each of the m semaphores.

[0125] Compared to related technologies that require multiple storage accesses to acquire m semaphores for multiple synchronization commands (such as wait commands or signal commands), the embodiments of this application only require one storage access to acquire m semaphores, effectively reducing the number of storage accesses required to acquire m semaphores, thereby improving the efficiency of semaphore acquisition and the bandwidth utilization of the storage unit.

[0126] Optionally, if the m semaphores are stored in a second memory unit outside the processor, a first access request is sent to the memory arbitration unit in the processor. The first access request includes sub-address information corresponding to each of the m semaphores. The first access request is used to request to read the m semaphores from the second memory unit; and the m semaphores sent by the memory arbitration unit are received.

[0127] like Figure 1 As shown, when m semaphores are stored in the second storage unit 130, the sub-address information corresponding to each of the m semaphores is used to indicate the storage location of each of the m semaphores in the second storage unit 130. Since the first command processing unit 114 cannot directly access the second storage unit 130, but needs to access the second storage unit 130 through the storage arbitration unit 111, the first command processing unit 114 generates a first access request based on the sub-address information corresponding to each of the m semaphores, and sends the first access request to the storage arbitration unit 111, so as to obtain the m semaphores from the second storage unit 130 through the storage arbitration unit 111.

[0128] Compared to related technologies that require generating multiple first access requests for multiple synchronization commands (such as wait commands or signal commands) and performing multiple storage accesses to acquire m semaphores, the embodiments of this application only require generating one first access request, which effectively reduces the number of storage accesses required to acquire m semaphores, thereby improving the efficiency of semaphore acquisition and the bandwidth utilization of the second storage unit 130.

[0129] This application embodiment supports not only scenarios where semaphores are stored in memory units outside the processor, but also scenarios where semaphores are stored in memory units inside the processor, thereby effectively expanding the application scenarios of the technical solutions provided in this application embodiment.

[0130] Step 303: Process m semaphores according to the operation mode indicated by the operation information to obtain the processing result. The processing result is used to indicate the execution status of the commands corresponding to the m semaphores.

[0131] The operation information can be used to indicate the operation mode corresponding to each of the m semaphores. For any semaphore among the m semaphores, the first command processing unit processes the semaphore according to the operation mode corresponding to the semaphore, obtains the sub-processing result of the semaphore, and combines the sub-processing results corresponding to the m semaphores to obtain the processing result.

[0132] For example, when the synchronization information is a waiting command, the operation information can be used to indicate the comparison method corresponding to each of the m semaphores. For any one of the m semaphores, the first command processing unit processes the semaphore according to the comparison method corresponding to that semaphore to obtain the comparison result of that semaphore. The above processing result includes the comparison results corresponding to each of the m semaphores.

[0133] When the synchronization information is a signal command, the operation information can be used to indicate the update method corresponding to each of the m semaphores. For any one of the m semaphores, the first command processing unit processes the semaphore according to the update method corresponding to that semaphore to obtain the update result of that semaphore. The above processing result includes the update results corresponding to each of the m semaphores.

[0134] The execution status of a command indicates whether the command has been completed. Optionally, each command may correspond to at least one semaphore, each semaphore may correspond to one command, and m semaphores may correspond to at least one command.

[0135] For example, when the synchronization information is a waiting command, the comparison results in the processing result are used to determine whether the commands corresponding to the m semaphores have been processed. If all the commands corresponding to the m semaphores have been processed, the first command processing unit processes the next command, which is the command received after the synchronization command and adjacent to the synchronization command. If any of the commands corresponding to the m semaphores have not been processed, the first command processing unit blocks the next command.

[0136] When the synchronization information is a signal command, the update results in the processing results indicate whether the commands corresponding to the m semaphores have been processed successfully. If all commands corresponding to the m semaphores have been processed successfully, the m semaphores are updated to their set values. If any command corresponding to the m semaphores has not been processed successfully, some of the m semaphores will not be updated to their set values. The set value of each semaphore is set and adjusted according to actual usage requirements.

[0137] In one example, the operation information includes m operation parameters, each of which corresponds to one of the m semaphores. Each operation parameter is used to indicate the operation mode of the corresponding semaphore.

[0138] In the embodiments of this application, the operation mode of m semaphores can be the same, and the operation mode of different semaphores can also be different.

[0139] For example, refer to Figure 5 The synchronization command 500 includes count operation parameters (forming operation information), each operation parameter indicating the operation mode of the corresponding semaphore. Taking the first semaphore as an example, based on the operation parameters of the first semaphore, the operation parameters of the first semaphore are determined, and the first semaphore is processed using the operation parameters of the first semaphore to obtain the sub-processing result of the first semaphore, and so on.

[0140] In one example, the operation information includes one operation parameter, and the operation mode of each of the m semaphores is the operation mode indicated by the one operation parameter.

[0141] For example, refer to Figure 4 The synchronization command 400 includes an operation parameter. For any semaphore among the m semaphores, the operation mode indicated by the operation parameter is used to process it and obtain the processing result.

[0142] This application supports processing multiple semaphores at once, enabling batch processing of semaphores without having to process a semaphore for each synchronization command, which helps improve the processing efficiency of semaphores.

[0143] In addition, by supporting setting the operation mode for each of the m semaphores separately and setting the same operation mode for the m semaphores, the flexibility of setting the operation mode is improved.

[0144] Optionally, the above synchronization command further includes m synchronization parameters, each corresponding to one of the m semaphores. For any semaphore among the m semaphores, the first command processing unit processes the semaphore according to the operation mode corresponding to the semaphore and the synchronization parameters corresponding to the semaphore, and obtains the processing result of the semaphore.

[0145] For example, when the synchronization information is a waiting command, the first command processing unit compares the semaphore with the synchronization parameters corresponding to the semaphore according to the comparison method corresponding to the semaphore, and obtains the comparison result of the semaphore. When the synchronization information is a signal command, the first command processing unit updates the semaphore using the synchronization parameters corresponding to the semaphore according to the update method corresponding to the semaphore, and obtains the update result of the semaphore.

[0146] In summary, the technical solution provided in this application supports acquiring and processing multiple semaphores through a single synchronization command, eliminating the need for multiple synchronization commands to acquire multiple semaphores. This improves the efficiency of semaphore acquisition and processing, reduces bandwidth consumption for synchronization command transmission, and thus enhances bandwidth utilization. Furthermore, based on address information, multiple semaphores can be acquired with a single storage access, eliminating the need for multiple storage accesses for multiple synchronization commands. This improves storage access efficiency and reduces storage access complexity for semaphores.

[0147] Please refer to Figure 7 The diagram illustrates a flowchart of a command processing method provided in another possible implementation of this application. The execution entity for each step of this method can be... Figure 1 The processor 100 shown is, for example, the front end 110 in the processor 100. The method may include at least one of the following steps (701-703).

[0148] Step 701: Receive a wait command. The wait command includes address information and operation information. The address information is used to indicate the storage location of m semaphores, where m is an integer greater than 1.

[0149] When the synchronization command is a wait command, the operation information indicates the comparison method between the semaphore and its corresponding synchronization parameters. The synchronization parameters corresponding to the semaphore are the reference values ​​for the semaphore.

[0150] The synchronization parameters (i.e. reference values) corresponding to the m semaphores can be set and adjusted according to actual usage requirements, and the comparison methods corresponding to the m semaphores can also be set and adjusted according to actual usage requirements. This application embodiment does not limit this.

[0151] In this embodiment, the comparison method for m semaphores can be the same, or the comparison methods for different semaphores can be different. The comparison method for semaphores includes at least one of the following: greater than, greater than or equal to, less than, less than or equal to, equal to, and not equal to. Taking "greater than" as an example, this comparison method is used to determine whether the semaphore is greater than the reference value corresponding to the semaphore.

[0152] Step 702: Obtain m semaphores based on the address information.

[0153] Optionally, when the first command processing unit receives a waiting command, it extracts address information from the waiting command, determines the sub-address information corresponding to each of the m semaphores based on the address information, and then obtains the m semaphores based on the sub-address information corresponding to each of the m semaphores.

[0154] For example, the process of acquiring a semaphore may include the following.

[0155] 1. Based on the address information, obtain the sub-address information corresponding to each of the m semaphores.

[0156] In one example, the address information includes initial address information. The front end can determine the sub-address information corresponding to each of the m semaphores based on the initial address information. The process of determining the sub-address information of the semaphores can include the following: determining the initial address information as the sub-address information of the first semaphore among the m semaphores; for the other semaphores among the m semaphores, obtaining the sub-address information of the other semaphores based on their arrangement position among the m semaphores, the address update step size, and the sub-address information of the first semaphore.

[0157] For example, refer to Figure 8 The wait command 800 may include the identification information "wait". The wait command 800 may also include the initial address information "Addr", the count parameter "count", and the address update step size parameter "mode".

[0158] Optionally, the wait command 800 records relevant information at a granularity of at least one of 64 bits, 32 bits, 16 bits, and 4 bits. When the address update step size is fixed at 32 bits (the size of the semaphore), the sub-address information of the first semaphore can be the initial address information "Addr", the sub-address information of the second semaphore is "Addr" + 1, the address information of the third semaphore is "Addr" + 2, and so on. When the mode indicates an address update step size of 64 bits, the sub-address information of the first semaphore can be the initial address information "Addr", the sub-address information of the second semaphore is "Addr" + 2, the sub-address information of the third semaphore is "Addr" + 4, and so on.

[0159] In one example, the address information includes sub-address information corresponding to each of the m semaphores. The first command processing unit can directly extract the sub-address information corresponding to each of the m semaphores from the address information without additional calculation. This helps to reduce the difficulty of obtaining sub-address information, thereby improving the efficiency and convenience of obtaining sub-address information.

[0160] For example, refer to Figure 9The wait command 900 includes "count" address information entries: address information 0 to address information (count-1). Each address information corresponds to a semaphore. For example, address information 0 indicates the sub-address information of the first semaphore, address information (count-1) indicates the sub-address information of the (count-1)th semaphore, and so on. Optionally, the lower 32 bits of the even-numbered sequence in the wait command 900 are used to record the address information.

[0161] In one example, the wait command also includes a mask parameter, which consists of m elements, each corresponding one-to-one with one of the m semaphores. For example, see reference... Figure 10 The wait command 1000 includes a mask parameter "mask", such as the mask parameter "mask" recorded as the second 32-bit record in the wait command 1000. The wait command 1000 may also include sub-address information corresponding to m semaphores, or it may only include the initial address information (not shown in the figure) and the parameter "mode" of the address update step size. This application embodiment does not limit this.

[0162] Optionally, if the t-th element among the m elements is the first value, then the sub-address information of the semaphore corresponding to the t-th element is obtained from the address information, where t is an integer greater than 0 and less than m+1. The t-th element can refer to any element among the m elements.

[0163] 2. Based on the sub-address information corresponding to each of the m semaphores, read the m semaphores from the storage unit.

[0164] Optionally, if m semaphores are stored in the first memory unit inside the processor, the m semaphores are read from the first memory unit according to the sub-address information corresponding to each of the m semaphores.

[0165] Optionally, if the m semaphores are stored in a second memory unit outside the processor, a first access request is sent to the memory arbitration unit in the processor. The first access request includes sub-address information corresponding to each of the m semaphores. The first access request is used to request to read the m semaphores from the second memory unit; and the m semaphores sent by the memory arbitration unit are received.

[0166] Step 703: For any semaphore among the m semaphores, compare the semaphore with the corresponding synchronization parameters according to the semaphore comparison method to obtain the comparison result corresponding to the semaphore. The processing result includes the comparison results corresponding to each of the m semaphores.

[0167] Optionally, the comparison result is used to indicate whether the comparison was successful. For example, the comparison result can be represented by a third value or a fourth value. The third value indicates whether the comparison was successful, and the fourth value indicates whether the comparison failed. This embodiment does not limit the third and fourth values; for example, the third value can be 1 and the fourth value can be 0.

[0168] For example, taking the comparison method of m semaphores as greater than, for any semaphore among the m semaphores, if the semaphore is greater than the reference value corresponding to the semaphore, the comparison result corresponding to the semaphore can be determined to be the third value, that is, the comparison is successful and the semaphore is in the triggered state; if the semaphore is not greater than the reference value corresponding to the semaphore, the comparison result corresponding to the semaphore can be determined to be the fourth value, that is, the comparison is unsuccessful and the semaphore is in the untriggered state.

[0169] For example, refer to Figure 8 The wait command 800 includes a comparison mode parameter (i.e., operation parameter) and reference values ​​(i.e., synchronization parameters) corresponding to *count* semaphores: reference values ​​0 to reference value (*count-1*), where reference value 0 corresponds to the first semaphore and reference value (*count-1*) corresponds to the *count*th semaphore. The operation parameter in the wait command 800 is used to indicate that the *count* semaphores correspond to the same comparison mode. Optionally, each reference value occupies a granularity, such as 32 bits. The high-order bits of the second 32 bits are used to record the operation parameter.

[0170] The first command processing unit compares the first semaphore with the reference value 0. If the first semaphore is greater than the reference value 0, the comparison is considered successful, and the result is the third value. The first command processing unit compares the second semaphore with the reference value 1. If the second semaphore is less than or equal to the reference value 1, the comparison is considered unsuccessful, and the result is the fourth value, and so on. If all count semaphores are successfully compared, then the count semaphores are deemed to meet the comparison conditions in the waiting command 800.

[0171] For example, refer to Figure 9 The wait command 900 includes `count` comparison mode parameters, each indicating the comparison mode for the corresponding semaphore. Taking the first semaphore as an example, based on its comparison mode parameters, the comparison mode for the first semaphore is determined, and using this mode, the semaphore is compared with its reference value 0 to obtain the comparison result. This process continues in the same manner. Optionally, each reference value occupies a granularity, such as 32 bits. The 32 bits with even-numbered sequence numbers in the wait command 900 are used to record the comparison mode parameters for each semaphore.

[0172] In this embodiment of the application, if the m comparison results corresponding to m semaphores meet the comparison conditions, the next command is processed. The next command is the command received after the synchronization command and is adjacent to the synchronization command.

[0173] The comparison condition is used to indicate whether the m semaphores match the reference values ​​corresponding to the m semaphores respectively. If the m semaphores meet the comparison condition, all m semaphores are in the triggered state, and the first command processing unit does not need to block the next command.

[0174] For example, if the comparison results of m semaphores are all the third value, the front end determines that the m semaphores meet the comparison conditions and processes the next command. The next command can be the command in the command sequence that is located after the waiting command and adjacent to the waiting command.

[0175] This application supports comparing multiple semaphores at once, enabling batch comparison of semaphores without having to compare a semaphore for each wait command. This is beneficial for improving the processing efficiency of wait operations for semaphores.

[0176] In one example, if m semaphores do not meet the comparison conditions, the embodiments of this application may further include the following.

[0177] 1. If m comparison results do not meet the comparison conditions, determine the update address information. The update address information is used to indicate the storage location of n semaphores. The n semaphores are the semaphores that do not meet the comparison conditions among the m semaphores, and n is a positive integer less than or equal to m.

[0178] Optionally, if there is a failed match among the m semaphores, it can be determined that the m semaphores do not meet the match conditions, and the first command processing unit needs to block the next command until the m semaphores meet the match conditions.

[0179] The n semaphores are the semaphores that failed to match among the m semaphores. The first command processing unit only needs to perform a waiting operation on the n semaphores, instead of performing a waiting operation on all m semaphores, which helps to reduce bandwidth loss.

[0180] For example, the first command processing unit can extract the sub-address information of n semaphores from the sub-address information corresponding to m semaphores respectively, and thus obtain the update address information.

[0181] 2. After a set time interval, obtain n semaphores based on the updated address information.

[0182] The time interval can be set and adjusted according to actual usage needs, and this application embodiment does not limit it in this regard.

[0183] like Figure 1 As shown, the first command processing unit 114 can further obtain n semaphores from the second storage unit 130 according to the update address information through the storage arbitration unit 111; such as Figure 2 As shown, the first command processing unit 114 can also directly obtain n semaphores from the first storage unit 116 according to the update address information.

[0184] 3. If the n semaphores meet the comparison conditions, process the next command.

[0185] Optionally, if all n semaphores are successfully matched, it can be determined that the n semaphores meet the matching condition, and the first command processing unit stops blocking the next command, such as sending the next command to the second command processing unit. The first command processing unit first determines whether the next command is a synchronization command. If the next command is not a synchronization command, it sends the next command to the second command processing unit. If the next command is a synchronization command, it executes the next command.

[0186] If there are still semaphores among the n semaphores that fail to match, then it is determined that the n semaphores do not meet the matching conditions, and the waiting operation continues to be performed on the semaphores that fail to match until the n semaphores meet the matching conditions. Optionally, a limit can be set for the number of waiting operations for the same waiting command. If the number of waiting operations reaches (e.g., exceeds) the limit, then the waiting command is determined to be invalid or erroneous, and other processors are notified.

[0187] This application embodiment also supports batch comparison for semaphores that fail to match, which helps to improve the processing efficiency of waiting operations for semaphores.

[0188] In summary, the technical solution provided in this application supports acquiring multiple semaphores for comparison using a single wait command, instead of acquiring multiple semaphores for comparison using multiple wait commands. This improves the comparison efficiency of semaphores and reduces the bandwidth consumption required for wait command transmission, thereby improving bandwidth utilization. Furthermore, based on address information, multiple semaphores can be acquired with a single storage access, eliminating the need for multiple storage accesses for multiple wait commands. This improves the storage access efficiency and reduces storage access complexity for semaphores.

[0189] Please refer to Figure 11 The diagram illustrates a flowchart of a command processing method provided in another possible implementation of this application. The execution entity for each step of this method can be... Figure 1 The processor 100 shown is, for example, the front end 110 in the processor 100. The method may include at least one of the following steps (1101 to 1104).

[0190] Step 1101: Receive signal command. The signal command includes address information and operation information. The address information is used to indicate the storage location of m semaphores, where m is an integer greater than 1.

[0191] When the synchronization command is a signal command, the operation information indicates the update method between the semaphore and its corresponding synchronization parameters. The synchronization parameters corresponding to the semaphore are the updated values ​​corresponding to the semaphore.

[0192] The synchronization parameters (i.e. update values) corresponding to the m semaphores can be set and adjusted according to actual usage requirements, and the update methods corresponding to the m semaphores can also be set and adjusted according to actual usage requirements. This application embodiment does not limit this.

[0193] In this embodiment, the update methods for the m semaphores can be the same, or the update methods for different semaphores can be different. The update methods for semaphores include at least one of the following: direct update, atomic accumulation update, and atomic comparison update. For example, when the update method for a semaphore is direct update, the value of the semaphore is directly replaced with the corresponding updated value; when the update method for a semaphore is atomic accumulation update, the value of the semaphore is replaced with the sum of the semaphore's value and its corresponding updated value; when the update method for a semaphore is atomic comparison update, if the updated value corresponding to the semaphore is greater than (or less than) the value of the semaphore, then the value of the semaphore is replaced with its corresponding updated value. This embodiment does not limit the specific methods used in this application.

[0194] Step 1102: Obtain m semaphores based on the address information.

[0195] Optionally, when the first command processing unit receives a signal command, it extracts address information from the signal command, determines the sub-address information corresponding to each of the m semaphores based on the address information, and then obtains the m semaphores based on the sub-address information corresponding to each of the m semaphores.

[0196] For example, the process of acquiring a semaphore may include the following.

[0197] 1. Based on the address information, obtain the sub-address information corresponding to each of the m semaphores.

[0198] In one example, the address information includes initial address information. The front end can determine the sub-address information corresponding to each of the m semaphores based on the initial address information. The process of determining the sub-address information of the semaphores can include the following: determining the initial address information as the sub-address information of the first semaphore among the m semaphores; for the other semaphores among the m semaphores, obtaining the sub-address information of the other semaphores based on their arrangement position among the m semaphores, the address update step size, and the sub-address information of the first semaphore.

[0199] For example, refer to Figure 12 The signal command 1200 may include the identification information "signal". The signal command 1200 may also include the initial address information "Addr", the quantity parameter "count", and the address update step size parameter "mode".

[0200] Optionally, the signal command 1200 records relevant information at a granularity of at least one of 64 bits, 32 bits, 16 bits, and 4 bits. When the address update step size is fixed at 32 bits (the size of the semaphore), the sub-address information of the first semaphore can be the initial address information "Addr", the sub-address information of the second semaphore is "Addr" + 1, the address information of the third semaphore is "Addr" + 2, and so on. When the mode indicates an address update step size of 64 bits, the sub-address information of the first semaphore can be the initial address information "Addr", the sub-address information of the second semaphore is "Addr" + 2, the sub-address information of the third semaphore is "Addr" + 4, and so on.

[0201] In one example, the address information includes sub-address information corresponding to each of the m semaphores. The first command processing unit can directly extract the sub-address information corresponding to each of the m semaphores from the address information without additional calculation. This helps to reduce the difficulty of obtaining sub-address information, thereby improving the efficiency and convenience of obtaining sub-address information.

[0202] For example, refer to Figure 13 The signal command 1300 includes "count" address information entries: address information 0 to address information (count-1). Each address information corresponds to a semaphore. For example, address information 0 indicates the sub-address information of the first semaphore, address information (count-1) indicates the sub-address information of the (count-1)th semaphore, and so on. Optionally, the lower 32 bits of the even-numbered sequence in the wait command 900 are used to record the address information.

[0203] In one example, the signal command also includes a mask parameter, which consists of m elements, each corresponding one-to-one with one of the m semaphores. For example, see reference... Figure 14 The signal command 1400 includes a mask parameter "mask", such as the mask parameter "mask" recorded as the second 32-bit record in the signal command 1400. The signal command 1400 may also include sub-address information corresponding to m semaphores, or it may only include the parameter "mode" of the initial address information (not shown in the figure) and the address update step size. This application embodiment does not limit this.

[0204] Optionally, if the t-th element among the m elements is the first value, then the sub-address information of the semaphore corresponding to the t-th element is obtained from the address information, where t is an integer greater than 0 and less than m+1. The t-th element can refer to any element among the m elements.

[0205] 2. Based on the sub-address information corresponding to each of the m semaphores, read the m semaphores from the storage unit.

[0206] Optionally, if m semaphores are stored in the first memory unit inside the processor, the m semaphores are read from the first memory unit according to the sub-address information corresponding to each of the m semaphores.

[0207] Optionally, if the m semaphores are stored in a second memory unit outside the processor, a first access request is sent to the memory arbitration unit in the processor. The first access request includes sub-address information corresponding to each of the m semaphores. The first access request is used to request to read the m semaphores from the second memory unit; and the m semaphores sent by the memory arbitration unit are received.

[0208] Step 1103: When m semaphores are stored in the first memory unit inside the processor, for any semaphore among the m semaphores, update the semaphore using the synchronization parameters corresponding to the semaphore according to the semaphore update method to obtain the updated semaphore, and store the updated semaphore into the first memory unit according to the storage location of the semaphore.

[0209] like Figure 2As shown, when m semaphores are stored in the first storage unit 116, the sub-address information corresponding to each of the m semaphores is used to indicate the storage location of each semaphore in the first storage unit 116. For any one of the m semaphores, guided by the sub-address information, the first command processing unit 114 can directly update the semaphore in the first storage unit 116 according to the semaphore update method, using the semaphore update value (i.e., synchronization parameter), to obtain the updated semaphore. For example, after obtaining the m updated semaphores, the first command processing unit 114 will replace the m semaphores in the first storage unit 116 with the m updated semaphores, with a one-to-one correspondence between the m semaphores and the m updated semaphores.

[0210] refer to Figure 12 The signal command 1200 includes an update mode parameter (i.e., an operation parameter) and update values ​​corresponding to *count* semaphores: update values ​​0 to (count-1), where update value 0 corresponds to the first semaphore and update value (count-1) corresponds to the *count*th semaphore. The update mode parameter in the signal command 1200 indicates that the *count* semaphores correspond to the same update mode. Optionally, each update value occupies a granularity, such as 32 bits. The high-order bits of the second 32 bits are used to record the update mode parameter.

[0211] When the update method parameter indicates that the update method for all m semaphores is direct replacement, for the first semaphore, guided by its sub-address information, the value of the first semaphore can be directly replaced with its update value of 0 to obtain the updated first semaphore. This process is repeated to obtain the updated m semaphores. The m semaphores in the first storage unit are then replaced with the m updated semaphores. Optionally, when the update method is direct replacement for all semaphores, the first command processing unit also directly replaces the updated semaphore values ​​with the semaphore values ​​during storage.

[0212] For example, refer to Figure 13 The signal command 1300 includes `count` update mode parameters, each indicating the update mode for the corresponding semaphore. Optionally, each update value occupies a granularity, such as 32 bits. The high-order bits of the even-numbered 32 bits in the signal command 1300 are used to record the update mode parameter for each semaphore.

[0213] For the first semaphore among m semaphores, the update method of the first semaphore is determined according to the update method parameter of the first semaphore. If it is direct replacement, then guided by the sub-address information of the first semaphore, the value of the first semaphore can be directly replaced with the update value of 0 to obtain the updated first semaphore. By analogy, the updated m semaphores can be obtained.

[0214] Compared to related technologies that require multiple storage accesses to update m semaphores for multiple signal commands, the embodiments of this application only require one storage access to update m semaphores, effectively reducing the number of storage accesses required to update m semaphores, thereby improving the update efficiency of semaphores and the bandwidth utilization of storage units.

[0215] In this embodiment of the application, the updated semaphore is the semaphore update result, and the above processing result includes the updated semaphores corresponding to m semaphores respectively.

[0216] If all m semaphores have been updated, the processing result indicates that the commands corresponding to the m semaphores have been executed successfully, and by handling the waiting command, the next command is not blocked. If there are semaphores in the m semaphore storage that have not been updated, the processing result indicates that the commands corresponding to the m semaphores have not been fully executed, and by handling the waiting command, the next command is blocked.

[0217] Step 1104: When m semaphores are stored in the second storage unit outside the processor, for any semaphore among the m semaphores, update the semaphore using the synchronization parameters corresponding to the semaphore according to the semaphore update method to obtain the updated semaphore; send a storage request to the storage arbitration unit in the processor. The storage request includes the updated semaphore and is used to request that the updated semaphore be stored in the second storage unit according to the storage location of the semaphore.

[0218] like Figure 1As shown, when m semaphores are stored in the second storage unit 130, the sub-address information corresponding to each of the m semaphores is used to indicate the storage location of each semaphore in the second storage unit 130. Since the first command processing unit 114 cannot directly access the second storage unit 130, but needs to access it through the storage arbitration unit 111, the first command processing unit 114 generates a first access request based on the sub-address information corresponding to each of the m semaphores, and sends the first access request to the storage arbitration unit 111 to obtain the m semaphores for updating. Based on the generated storage request including the updated m semaphores, the storage request is sent to the storage arbitration unit 111 to update the updated m semaphores into the second storage unit 130.

[0219] In a feasible example, the first access request also includes update values ​​and update method parameters for m semaphores, which are used to trigger the storage arbitration unit 111 to update the m semaphores in the second storage unit 130 according to the sub-address information, update values ​​and update method parameters corresponding to the m semaphores respectively. This helps to reduce the number of accesses to the second storage unit 130, thereby improving the update efficiency and update complexity of the semaphores.

[0220] Optionally, for any one of the m semaphores, the storage arbitration unit 111, guided by the sub-address information of the semaphore, replaces the updated semaphore with the corresponding semaphore in the second storage unit 130; or, the storage arbitration unit 111 updates the corresponding semaphore in the second storage unit 130 with the updated value of the semaphore according to the semaphore update method.

[0221] Compared to related technologies that require generating multiple first access requests and storage requests for multiple signal commands and performing multiple storage accesses to update m semaphores, the embodiments of this application only require generating one first access request and one storage request, which effectively reduces the number of storage accesses required to update m semaphores, thereby improving the update efficiency of semaphores and the bandwidth utilization of storage units.

[0222] In summary, the technical solution provided in this application supports updating multiple semaphores through a single signal command, eliminating the need for multiple signal commands to update multiple semaphores. This improves the efficiency of semaphore updates and reduces the bandwidth consumption required for signal command transmission, thereby improving bandwidth utilization. Furthermore, based on the second address information, multiple semaphores can be updated with a single storage access, eliminating the need for multiple storage accesses for multiple signal commands. This improves the efficiency and complexity of semaphore storage access.

[0223] In some embodiments, the aforementioned synchronization commands (such as wait commands and signal commands) are processed by a first command processing unit in the processor. If the first command processing unit receives other commands, it sends the other commands to a second command processing unit in the processor. The other commands are commands other than the synchronization commands.

[0224] For example, when the first command processing unit receives a command, it can determine whether the command is a waiting command or a signal command based on the identification information in the command. If the command is a waiting command or a signal command, the first command processing unit processes the command; if the command is neither a waiting command nor a signal command, the first command processing unit sends the command to the second command processing unit.

[0225] This application embodiment ensures the consistency of operations for semaphores by supporting the unified processing of wait commands and signal commands by a separate command processing unit.

[0226] In some embodiments, when the synchronization command is a waiting command and is located at the head of the first command queue, if m semaphores are greater than or equal to the second value, the remaining commands in the first command queue are executed sequentially.

[0227] The remaining commands in the first command queue are those excluding waiting commands. If the number of m semaphores is greater than or equal to the second value, it can be determined that the commands corresponding to each of the m semaphores have been executed, and the execution of the first command queue can begin. The commands corresponding to the m semaphores can form a second command queue, which can refer to the queue of commands executed before the first command queue.

[0228] For example, taking a GPU as an example, the second command queue is used to implement graphics rendering tasks, and the first command queue is used to implement computation tasks. If all m semaphores are greater than or equal to 0, it can be determined that the graphics rendering task has been completed, the resources occupied by the graphics rendering task have been released, and the task result of the graphics rendering task has been stored, then the computation task can continue to be executed.

[0229] For each command in the second command queue, the execution order can also be ensured by waiting for commands. For example, in a graphics rendering task, the semaphore in the waiting command can be used to determine whether texture and other related tasks have been calculated, in order to decide whether to execute the command corresponding to the frame buffer.

[0230] Optionally, if the synchronization command is a semaphore command and is located at the tail of the second command queue, then if each other command in the second command queue is executed, the m semaphores are updated to be greater than or equal to the second value.

[0231] The signal command located at the tail of the second command queue is used to indicate whether the second command queue has been completed, while the wait command located at the head of the first command queue is used to detect whether the second command queue has been completed. Only when m semaphores are updated to be greater than or equal to the second value through the signal command can the front end trigger the execution of the first command queue through the wait command.

[0232] This application embodiment ensures that the first command queue is processed only after the second command queue has been processed, by applying wait commands and signal commands between two command queues, thereby ensuring the execution order between command queues.

[0233] In some embodiments, m semaphores are used to indicate whether the resource set corresponding to the m semaphores is released. The resource set includes the resources occupied when the command corresponding to the m semaphores is executed. The resources include at least one of the following: storage resources, register resources, computing resources, communication resources, and interface resources.

[0234] Storage resources can refer to the resources occupied by the input or output of stored commands. Register resources refer to the registers required for processing commands. Computational resources refer to the computing units required for processing commands. Communication resources refer to the communication bandwidth required for processing commands. Interface resources refer to the communication interfaces required for processing commands; however, this application does not limit these.

[0235] Optionally, if the synchronization command is a waiting command, and if m semaphores are greater than or equal to the second value, then the target command is executed, and the target command is executed based on the resource set.

[0236] If the m semaphores are greater than or equal to the second value, it can be determined that the resource set has been released. If the computing and storage resources required by the command set corresponding to the m semaphores are released, then the target command that requires the computing and storage resources can be executed. Optionally, the target command can be a command executed based on all resources in the resource set, or it can be a command executed based on some resources in the resource set. This application embodiment does not limit this.

[0237] For example, if the processing result of the command set needs to be stored in the first register and the second register, and the target command needs to obtain the processing result of the command set from the first register and the second register (or needs to store the processing result of the target command in the first register or the second register), if the m semaphores are greater than or equal to the second value, then the target command is executed to obtain the processing result of the command set from the first register and the second register (or to store the processing result of the target command in the first register or the second register) to achieve the task of the target command; otherwise, the target command is blocked until the m semaphores are greater than or equal to the second value.

[0238] This application embodiment implements resource access control through a wait command including semaphores, thereby ensuring that data is processed in the correct order and avoiding resource conflicts.

[0239] In some embodiments, the technical solutions provided in this application can be applied to synchronization between processors of the same type, or to synchronization between processors of different types. For example, the technical solutions provided in this application can be applied to at least one of the following scenarios: synchronization between CPU and GPU, synchronization between GPUs, synchronization between CPUs, synchronization between CPUs and DSPs, synchronization between CPU and GPGPU, and synchronization between CPU and FPGA.

[0240] The front-end provided in this application embodiment can also be applied to at least one of the following processors: GPU, DSP, GPGPU, ASIC, CPU, but this application embodiment does not limit it.

[0241] For example, refer to Figure 15 Taking GPU as an example, the embodiments of this application can be applied to at least one of the following scenarios.

[0242] 1. Graphics rendering pipeline: Semaphores are used in the rendering pipeline to coordinate different stages, such as data sharing between compute shaders and fragment shaders.

[0243] 2. Multitasking: In high-performance computing (HPC), semaphores can ensure that computing tasks on the GPU are completed sequentially.

[0244] 3. Resource sharing and conflict avoidance: Semaphores can be used to avoid resource contention, such as preventing multiple queues from writing to the same texture or buffer at the same time.

[0245] Semaphores, as a key synchronization mechanism in GPU parallel computing and graphics rendering, can significantly improve GPU efficiency and ensure the correct execution of tasks.

[0246] In one example, refer to Figure 15 Taking the GPU front end as an example, the processing flow of the first command processing unit may include the following:

[0247] 1. Receive a command.

[0248] The first command processing unit receives commands sent by the command analysis unit.

[0249] The first command processing unit determines whether the command is a waiting command, a signal command, or another type of command based on the identification information in the command.

[0250] 2. When the command is to wait for another command, obtain the first address information.

[0251] The first command processing unit obtains the first address information from the waiting command. The first address information is used to indicate the storage location of m semaphores.

[0252] The first command processing unit determines the comparison method corresponding to each of the m semaphores based on the comparison method parameter (i.e., operation parameter) in the waiting command.

[0253] The first command processing unit extracts the reference values ​​(i.e., synchronization parameters) corresponding to m semaphores from the waiting command.

[0254] 3. Send the first access request and read the semaphore.

[0255] The first command processing unit generates a first access request based on the sub-address information corresponding to each of the m semaphores, and sends the first access request to the storage arbitration unit to obtain the m semaphores from the second storage unit through the storage arbitration unit. Alternatively, the first command processing unit directly obtains the m semaphores from the first storage unit based on the sub-address information corresponding to each of the m semaphores.

[0256] 4. Compare the signal quantity with the reference value according to the comparison method.

[0257] For any semaphore among m semaphores, the first command processing unit compares the semaphore with its corresponding reference value according to the semaphore comparison method, and obtains the comparison result of the semaphore.

[0258] The first command processing unit determines whether there are any failed matching signals based on the comparison results corresponding to the m signals.

[0259] 5. If a semaphore fails to match, generate an update access request based on the sub-address information of the semaphore that failed to match, and jump to step 3; if no semaphore fails to match, jump to step 9.

[0260] The update access request includes updating address information, which is used to request the acquisition of the failed matching semaphore for rematching, until all m semaphores are successfully matched.

[0261] 6. If the command is a signal command, obtain the second address information.

[0262] The first command processing unit obtains the second address information from the signal command. The second address information is used to indicate the storage location of p semaphores. The second address information is used to determine the sub-address information corresponding to each of the p semaphores, where p is an integer greater than 1.

[0263] The first command processing unit determines the update method corresponding to each of the p semaphores based on the update method parameter in the signal command.

[0264] The first command processing unit extracts the update values ​​corresponding to p semaphores from the signal command.

[0265] 7. Update the semaphore and proceed to step 9.

[0266] The first command processing unit generates a storage request based on the sub-address information, update method, and update value corresponding to each of the p semaphores, and sends the storage request to the storage arbitration unit to update the p semaphores in the second storage unit. Alternatively, the first command processing unit directly updates the p semaphores in the first storage unit based on the sub-address information, update method, and update value corresponding to each of the p semaphores.

[0267] 8. If the command is any other command, send the command to the next stage of processing.

[0268] If the first command processing unit detects that the command is neither a wait command nor a signal command, it sends the command to the second command processing unit.

[0269] 9. Command processing completed.

[0270] That is, for the first command processing unit, the command processing is complete.

[0271] In summary, by introducing wait commands that support triggering comparisons of multiple semaphores and signal commands that support triggering updates of multiple semaphores, it is beneficial to improve the GPU's access efficiency to memory units and the bandwidth utilization of memory units, while also reducing the bandwidth consumption required for transmitting wait commands and signal commands.

[0272] For example, in a 256-bit bus system (such as a GPU), if the semaphore size is 32 bits, then for eight consecutive and aligned semaphores (256 bits in total), only one memory access is needed, instead of eight separate memory accesses as required in related technologies. Furthermore, compact wait and signal commands save coding space, thus reducing the number of wait or signal commands deployed in the command sequence, resulting in a more efficient and concise command sequence. This helps reduce the bandwidth loss required for command sequence transmission.

[0273] The following are embodiments of the apparatus described in this application, which can be used to execute the embodiments of the method described in this application. For details not disclosed in the apparatus embodiments of this application, please refer to the embodiments of the method described in this application.

[0274] Please refer to Figure 16 This diagram illustrates a block diagram of a command processing apparatus provided in one possible implementation of this application. The apparatus has the functionality to implement the method examples described above; this functionality can be implemented in hardware or by hardware executing corresponding software. The apparatus can be the computer device described above, or it can be located within a computer device. Figure 16 As shown, the device 1600 includes: a command receiving module 1601, a semaphore acquisition module 1602, and a semaphore processing module 1603.

[0275] The command receiving module 1601 is used to receive synchronization commands, which include address information and operation information. The address information is used to indicate the storage location of m semaphores, where m is an integer greater than 1.

[0276] Semaphore acquisition module 1602 is used to acquire the m semaphores based on the address information.

[0277] The semaphore processing module 1603 is used to process the m semaphores according to the operation mode indicated by the operation information and obtain the processing result. The processing result is used to indicate the execution status of the command corresponding to the m semaphores respectively.

[0278] In some embodiments, such as Figure 17 As shown, the semaphore acquisition module 1602 includes: an address information acquisition submodule 1602a and a semaphore acquisition submodule 1602b.

[0279] Address information acquisition submodule 1602a is used to acquire sub-address information corresponding to the m semaphores respectively based on the address information.

[0280] The semaphore acquisition submodule 1602b is used to read the m semaphores from the storage unit according to the sub-address information corresponding to the m semaphores respectively.

[0281] In some embodiments, the address information includes initial address information; the address information acquisition submodule 1602a is used for:

[0282] The initial address information is determined as the sub-address information of the first semaphore among the m semaphores;

[0283] For the other semaphores among the m semaphores, the sub-address information of the other semaphores is obtained based on the arrangement position of the other semaphores among the m semaphores, the address update step size, and the sub-address information of the first semaphore. The address update step size is used to indicate the difference between the sub-address information of two adjacent semaphores.

[0284] In some embodiments, the synchronization command further includes a mask parameter, which includes m elements, each of which corresponds one-to-one with one of the m semaphores, and the address information includes sub-address information corresponding to each of the m semaphores.

[0285] The address information acquisition submodule 1602a is further configured to acquire the sub-address information of the semaphore corresponding to the t-th element from the address information if the t-th element among the m elements is a first value, where t is an integer greater than 0 and less than m+1.

[0286] In some embodiments, the synchronization command is processed by a processor; the semaphore acquisition submodule 1602b is used for:

[0287] When the m semaphores are stored in the first memory unit inside the processor, the m semaphores are read from the first memory unit according to the sub-address information corresponding to each of the m semaphores.

[0288] When the m semaphores are stored in a second storage unit outside the processor, a first access request is sent to the storage arbitration unit in the processor. The first access request includes sub-address information corresponding to each of the m semaphores. The first access request is used to request to read the m semaphores from the second storage unit; and the m semaphores sent by the storage arbitration unit are received.

[0289] In some embodiments, the operation information includes m operation parameters, each of which corresponds one-to-one with one of the m semaphores, and each operation parameter is used to indicate the operation mode of the corresponding semaphore;

[0290] Alternatively, the operation information may include one operation parameter, and the operation modes of the m semaphores may all be the operation modes indicated by the one operation parameter.

[0291] In some embodiments, the synchronization command further includes m synchronization parameters, each of which corresponds one-to-one with one of the m semaphores. When the synchronization command is a wait command, the operation information is used to indicate the comparison method between the semaphore and the synchronization parameter corresponding to the semaphore.

[0292] The semaphore processing module 1603 is used to compare any semaphore among the m semaphores with the synchronization parameters corresponding to the semaphore according to the comparison method of the semaphores, and obtain the comparison result corresponding to the semaphore. The processing result includes the comparison results corresponding to the m semaphores respectively. Wherein, if the m comparison results corresponding to the m semaphores meet the comparison conditions, the next command is processed. The next command is the command received after the synchronization command and adjacent to the synchronization command.

[0293] In some embodiments, such as Figure 17 As shown, the device 1600 further includes: an update address acquisition module 1604 and a next command processing module 1605.

[0294] The update address acquisition module 1604 is used to determine update address information when the m comparison results do not meet the comparison conditions. The update address information is used to indicate the storage location of n semaphores, where the n semaphores are the semaphores among the m semaphores that do not meet the comparison conditions, and n is a positive integer less than or equal to m.

[0295] The semaphore acquisition module 1602 is further configured to acquire the n semaphores according to the updated address information after a set time interval;

[0296] The next command processing module 1605 is used to process the next command if the n semaphores satisfy the comparison conditions.

[0297] In some embodiments, the synchronization command is processed by a processor, and the synchronization command further includes m synchronization parameters, each corresponding one-to-one with one of the m semaphores. When the synchronization command is a semaphore command, the operation information is used to indicate the update method corresponding to each of the m semaphores; the semaphore processing module 1603 is further configured to:

[0298] When the m semaphores are stored in the first storage unit inside the processor, for any one of the m semaphores, the semaphore is updated using the synchronization parameters corresponding to the semaphore according to the semaphore update method to obtain the updated semaphore, and the updated semaphore is stored in the first storage unit according to the storage location of the semaphore.

[0299] Alternatively, if the m semaphores are stored in a second storage unit outside the processor, for any one of the m semaphores, the semaphore is updated using the synchronization parameters corresponding to the semaphore according to the semaphore update method to obtain the updated semaphore; a storage request is sent to the storage arbitration unit in the processor, the storage request including the updated semaphore, the storage request being used to request that the updated semaphore be stored in the second storage unit according to the storage location of the semaphore;

[0300] The processing result includes the updated semaphores corresponding to the m semaphores respectively.

[0301] In some embodiments, the synchronization command is processed by a first command processing unit in the processor; such as Figure 17 As shown, the device 1600 also includes: an other command sending module 1606.

[0302] Other command sending module 1606 is used to send other commands to the second command processing unit in the processor when the first command processing unit receives other commands, wherein the other commands are commands other than the synchronization command.

[0303] In some embodiments, the next command processing module 1605 is further configured to, if the synchronization command is a waiting command and is located at the head of the first command queue, execute the remaining commands in the first command queue in sequence if the m semaphores are greater than or equal to the second value.

[0304] The semaphore processing module 1603 is further configured to update the m semaphores to a value greater than or equal to the second value if the synchronization command is a semaphore command and is located at the tail of the second command queue, and if each other command in the second command queue is executed.

[0305] In some embodiments, the m semaphores are used to indicate whether the resource set corresponding to the m semaphores is released. The resource set includes resources occupied when the command corresponding to the m semaphores is executed, and the resources include at least one of the following: storage resources, register resources, computing resources, communication resources, and interface resources; such as Figure 17 As shown, the device 1600 further includes a target command processing module 1607.

[0306] The target command processing module 1607 is configured to execute a target command if the m semaphores are greater than or equal to a second value when the synchronization command is a waiting command, and the target command is executed based on the resource set.

[0307] In summary, the technical solution provided in this application supports acquiring and processing multiple semaphores through a single synchronization command, eliminating the need for multiple synchronization commands to acquire multiple semaphores. This improves the efficiency of semaphore acquisition and processing, reduces bandwidth consumption for synchronization command transmission, and thus enhances bandwidth utilization. Furthermore, based on address information, multiple semaphores can be acquired with a single storage access, eliminating the need for multiple storage accesses for multiple synchronization commands. This improves storage access efficiency and reduces storage access complexity for semaphores.

[0308] It should be noted that the apparatus provided in the above embodiments is only illustrated by the division of the above functional modules when implementing its functions. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the apparatus and method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process can be found in the method embodiments, which will not be repeated here.

[0309] Please refer to Figure 18 This is a simplified structural block diagram of a computer device 1800 provided in one possible implementation of this application. The computer device 1800 can be used to implement the command processing method provided in the above embodiments.

[0310] Typically, computer device 1800 includes a processor 1801 and a memory 1802.

[0311] Processor 1801 may include one or more processing cores, such as a quad-core processor, an octa-core processor, etc. Processor 1801 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field Programmable Gate Array), and PLA (Programmable Logic Array). Processor 1801 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 1801 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 1801 may also include an AI processor for handling computational operations related to machine learning.

[0312] The memory 1802 may include one or more computer-readable storage media, which may be non-transitory. The memory 1802 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments, the non-transitory computer-readable storage media in the memory 1802 are used to store a computer program configured to be executed by one or more processors to implement the command processing method described above.

[0313] Those skilled in the art will understand that Figure 18 The structure shown does not constitute a limitation on the computer device 1800, and may include more or fewer components than shown, or combine certain components, or use different component arrangements.

[0314] Optionally, the computer device 1800 may be a server, a server cluster, an artificial intelligence computing cluster, a cloud computing cluster, etc., wherein the artificial intelligence computing cluster may also be referred to as an intelligent computing cluster or a smart computing cluster, and this application does not limit it.

[0315] In some embodiments, a chip product is also provided, the chip product including programmable logic circuits and / or program instructions, the chip product being used to implement the above command processing method when running.

[0316] In some embodiments, a computer-readable storage medium is also provided, wherein a computer program is stored therein, which, when executed by a processor of a computer device, implements the above-described command processing method.

[0317] Optionally, the computer-readable storage medium may include: ROM (Read-Only Memory), RAM (Random-Access Memory), SSD (Solid State Drives), or optical disc, etc. The random access memory may include ReRAM (Resistance Random Access Memory) and DRAM (Dynamic Random Access Memory).

[0318] In some embodiments, a computer program product is also provided, the computer program product comprising a computer program stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, causing the computer device to perform the command processing method described above.

[0319] It should be understood that "multiple" as used herein refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. Furthermore, the step numbers described herein are merely illustrative of one possible execution order. In some other embodiments, the steps may not be executed in numerical order, such as two steps with different numbers being executed simultaneously, or two steps with different numbers being executed in the reverse order of the illustration. This application does not limit this.

[0320] The above description is merely an exemplary embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A command processing method, characterized in that, The method is executed by the front-end of a processor, the front-end including a first command processing unit and a second command processing unit; the method includes: A synchronization command is received, the synchronization command includes address information and operation information, the address information is used to indicate the storage location of m semaphores, and the operation information is used to indicate the operation mode of each of the m semaphores, where m is an integer greater than 1, and the synchronization command is processed by the first command processing unit; Based on the address information, obtain the m semaphores; According to the operation method indicated by the operation information, the m semaphores are processed to obtain the processing result. The processing result is used to indicate the execution status of the command corresponding to the m semaphores respectively. The execution status is used to indicate whether the command has been executed completely. If other commands are received, and the synchronization command is processed by the first command processing unit, then the other commands are sent to the second command processing unit; if the synchronization command is not processed by the first command processing unit, then the other commands are blocked, and the other commands are commands that follow the synchronization command in the command sequence.

2. The method according to claim 1, characterized in that, The step of obtaining the m semaphores based on the address information includes: Based on the address information, obtain the sub-address information corresponding to each of the m semaphores; Based on the sub-address information corresponding to each of the m semaphores, the m semaphores are read from the storage unit.

3. The method according to claim 2, characterized in that, The address information includes initial address information; The step of obtaining the sub-address information corresponding to each of the m semaphores based on the address information includes: The initial address information is determined as the sub-address information of the first semaphore among the m semaphores; For the other semaphores among the m semaphores, the sub-address information of the other semaphores is obtained based on the arrangement position of the other semaphores among the m semaphores, the address update step size, and the sub-address information of the first semaphore. The address update step size is used to indicate the difference between the sub-address information of two adjacent semaphores.

4. The method according to claim 2, characterized in that, The synchronization command also includes a mask parameter, which includes m elements, each of which corresponds one-to-one with one of the m semaphores. The address information includes sub-address information corresponding to each of the m semaphores. The step of obtaining the sub-address information corresponding to each of the m semaphores based on the address information includes: If the t-th element among the m elements is the first value, then the sub-address information of the semaphore corresponding to the t-th element is obtained from the address information, where t is an integer greater than 0 and less than m+1.

5. The method according to claim 2, characterized in that, The step of reading the m semaphores from the storage unit based on the sub-address information corresponding to each of the m semaphores includes: When the m semaphores are stored in the first memory unit inside the processor, the m semaphores are read from the first memory unit according to the sub-address information corresponding to each of the m semaphores. When the m semaphores are stored in a second storage unit outside the processor, a first access request is sent to the storage arbitration unit in the front end of the processor. The first access request includes sub-address information corresponding to each of the m semaphores. The first access request is used to request to read the m semaphores from the second storage unit; and the storage arbitration unit sends the m semaphores.

6. The method according to any one of claims 1 to 5, characterized in that, The operation information includes m operation parameters, each of which corresponds one-to-one with one of the m semaphores. Each operation parameter is used to indicate the operation mode of the corresponding semaphore. or, The operation information includes one operation parameter, and the operation mode of each of the m semaphores is the operation mode indicated by the one operation parameter.

7. The method according to any one of claims 1 to 5, characterized in that, The synchronization command also includes m synchronization parameters, each of which corresponds one-to-one with one of the m semaphores. When the synchronization command is a wait command, the operation information is used to indicate the comparison method between the semaphore and the synchronization parameter corresponding to the semaphore. The step of processing the m semaphores according to the operation mode indicated by the operation information to obtain the processing result includes: For any one of the m semaphores, the semaphore is compared with the synchronization parameter corresponding to the semaphore according to the comparison method of the semaphores, and the comparison result corresponding to the semaphore is obtained. The processing result includes the comparison results corresponding to the m semaphores respectively. Wherein, if the m comparison results corresponding to the m semaphores meet the comparison conditions, the next command is processed. The next command is the command received after the synchronization command and adjacent to the synchronization command.

8. The method according to claim 7, characterized in that, The method further includes: If the m comparison results do not meet the comparison conditions, update address information is determined. The update address information is used to indicate the storage location of n semaphores, where the n semaphores are the semaphores among the m semaphores that do not meet the comparison conditions, and n is a positive integer less than or equal to m. After a set time interval, the n semaphores are obtained based on the updated address information; If the n semaphores satisfy the comparison conditions, then process the next command.

9. The method according to any one of claims 1 to 5, characterized in that, The synchronization command also includes m synchronization parameters, which correspond one-to-one with the m semaphores. When the synchronization command is a semaphore command, the operation information is used to indicate the update method corresponding to each of the m semaphores. The step of processing the m semaphores according to the operation mode indicated by the operation information to obtain the processing result includes: When the m semaphores are stored in the first storage unit inside the processor, for any one of the m semaphores, the semaphore is updated using the synchronization parameters corresponding to the semaphore according to the semaphore update method to obtain the updated semaphore, and the updated semaphore is stored in the first storage unit according to the storage location of the semaphore. or, When the m semaphores are stored in a second storage unit outside the processor, for any one of the m semaphores, the semaphore is updated using the synchronization parameters corresponding to the semaphore according to the semaphore update method to obtain the updated semaphore; a storage request is sent to the storage arbitration unit in the front end of the processor, the storage request including the updated semaphore, the storage request being used to request that the updated semaphore be stored in the second storage unit according to the storage location of the semaphore; The processing result includes the updated semaphores corresponding to the m semaphores respectively.

10. The method according to any one of claims 1 to 5, characterized in that, The method further includes: If the synchronization command is a waiting command and is located at the head of the first command queue, and if the m semaphores are greater than or equal to the second value, then the remaining commands in the first command queue are executed sequentially. or, If the synchronization command is a semaphore command and is located at the tail of the second command queue, then if each other command in the second command queue is executed, the m semaphores are updated to be greater than or equal to the second value.

11. The method according to any one of claims 1 to 5, characterized in that, The m semaphores are used to indicate whether the resource set corresponding to the m semaphores is released. The resource set includes the resources occupied when the command corresponding to the m semaphores is executed, and the resources include at least one of the following: storage resources, register resources, computing resources, communication resources, and interface resources; the method further includes: If the synchronization command is a waiting command, and the m semaphores are greater than or equal to the second value, then the target command is executed, and the target command is executed based on the resource set.

12. A command processing device, characterized in that, The device includes: The command receiving module is used to receive synchronization commands. The synchronization commands include address information and operation information. The address information is used to indicate the storage location of m semaphores, and the operation information is used to indicate the operation mode of each of the m semaphores. m is an integer greater than 1. The synchronization commands are processed by the first command processing unit in the front end of the processor. A semaphore acquisition module is used to acquire the m semaphores based on the address information; The semaphore processing module is used to process the m semaphores according to the operation mode indicated by the operation information and obtain the processing result. The processing result is used to indicate the execution status of the command corresponding to the m semaphores respectively. The execution status is used to indicate whether the command has been executed completely. The other command sending module is configured to, upon receiving other commands, send the other commands to the second command processing unit in the front end if the synchronization command has been processed by the first command processing unit; and block the other commands if the synchronization command has not been processed by the first command processing unit, wherein the other commands are commands that follow the synchronization command in the command sequence.

13. A chip product, characterized in that, The chip product includes programmable logic circuits and / or program instructions, and the chip product is used to implement the method as described in any one of claims 1 to 11 when it is executed.

14. A computer device, characterized in that, The computer device includes a processor and a memory, the memory storing a computer program that is loaded and executed by the processor to implement the method as claimed in any one of claims 1 to 11.

15. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which is loaded and executed by a processor to implement the method as described in any one of claims 1 to 11.

16. A computer program product, characterized in that, The computer program product includes a computer program that is executed by a processor to implement the method as described in any one of claims 1 to 11.

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