Driving method of display panel, timing control board and display device

Abstract

Embodiments of the present application provide a display panel driving method, a timing control board and a display device. The display panel driving method determines different scanning signals according to different types of frames to be displayed by the display panel. Specifically, when the type of the frame to be displayed by the display panel is an odd frame or an even frame, the display panel driving method determines a first scanning signal of all pixel units of the display panel and a second scanning signal of pixel units of even rows of the display panel, respectively. The low voltage of the first scanning signal is greater than the low voltage of the second scanning signal. The display panel is driven according to the first scanning signal or the second scanning signal. Different scanning signals can be determined according to different frames to be displayed. The charging time of the pixel units of the even rows in the even frame is less than the charging time of the pixel units of all rows in the odd frame. The time difference between the charging time of the pixel units of the even rows and the charging time of the pixel units of the odd frame is shortened. The bright and dark horizontal stripe problem of the display panel is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a driving method for a display panel, a timing control board, and a display device. Background Technology

[0002] With the development of display technology, the demand for high refresh rate display panels in existing display devices is increasing. Existing display devices improve refresh rates by shortening the single-frame scan time; for example, the single-frame scan time of a 120Hz display device is half that of a 60Hz display device. Specifically, existing display devices use ASF (Adaptive Scan for Frame Rate Doubling) technology to increase the refresh rate. ASF technology refers to splitting the odd and even lines of a single frame into two frames for output, thus achieving a 120Hz effect on a 60Hz product. However, in display devices using ASF technology, it has been found that after refreshing the even lines of the previous frame, when refreshing the odd lines of the current frame begins, it takes half a frame time (half a frame in 60Hz) before refreshing the even lines. This results in an interleaved and superimposed state of the odd and even lines, causing a "fishbone" problem in the display. To address the issues with display devices employing ASF technology, existing display devices utilize DLG (Dual Line Gate) technology in conjunction with ASF technology. However, in display devices using DLG technology in conjunction with ASF technology, it has been found that the different charging times of pixels in odd-numbered rows and even-numbered rows cause bright and dark horizontal stripes to appear on the display screen, affecting the display effect.

[0003] Therefore, existing display devices using DLG technology combined with ASF technology have a technical problem where the pixel charging time differs between odd-numbered rows and even-numbered rows, resulting in bright and dark horizontal stripes on the displayed image. Summary of the Invention

[0004] This application provides a driving method for a display panel, a timing control board, and a display device to alleviate the technical problem that existing display devices using DLG technology combined with ASF technology have different pixel charging times for odd-numbered rows and even-numbered rows, resulting in bright and dark horizontal stripes on the display screen.

[0005] This application provides a method for driving a display panel, the method comprising:

[0006] Determine the type of the frame to be displayed on the display panel;

[0007] When the type of the frame to be displayed on the display panel is an odd-numbered frame, a first scan signal for the pixel units of all rows of the display panel is determined; when the type of the frame to be displayed on the display panel is an even-numbered frame, a second scan signal for the pixel units of even-numbered rows of the display panel is determined; the low potential voltage of the first scan signal is greater than the low potential voltage of the second scan signal.

[0008] The display panel is driven according to either the first scan signal or the second scan signal.

[0009] In some embodiments, the step of determining the type of the frame to be displayed on the display panel includes:

[0010] Determine the type of the current display frame of the display panel;

[0011] The type of the frame to be displayed on the display panel is determined based on the type of the current display frame on the display panel.

[0012] In some embodiments, the step of determining the first scan signal of the pixel units of all rows of the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame includes:

[0013] When the type of the frame to be displayed on the display panel is an odd-numbered frame, the first high potential voltage and the first low potential voltage of each row of pixel units on the display panel are determined; the first high potential voltage of each row of pixel units on the display panel is equal, and the first low potential voltage of each row of pixel units on the display panel is equal.

[0014] The first scan signal of all rows of pixel units in the display panel is determined based on the first high potential voltage and the first low potential voltage of each row of pixel units in the display panel.

[0015] In some embodiments, the step of determining the second scan signal of the pixel units in the even-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame includes:

[0016] When the frame to be displayed on the display panel is an even number of frames, a second high potential voltage and a second low potential voltage are determined for the pixel units in the even-numbered rows of the display panel; the second high potential voltage is equal to the first high potential voltage, and the second low potential voltage is less than the first low potential voltage.

[0017] The second scan signal of the pixel unit in the even-numbered row of the display panel is determined based on the second high potential voltage and the second low potential voltage of the pixel unit in the even-numbered row of the display panel.

[0018] In some embodiments, the step of determining the second scan signal of the pixel units in the even-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame further includes:

[0019] When the type of the frame to be displayed on the display panel is an even frame, a third scan signal for the pixel unit of the odd row of the display panel is determined; the low potential voltage of the third scan signal is equal to the low potential voltage of the second scan signal.

[0020] In some embodiments, prior to the step of driving the display panel according to the first scan signal or the second scan signal, the method further includes:

[0021] When the type of the frame to be displayed on the display panel is an odd frame, the current display frame is determined to be an even frame, and the low potential voltage of the first scan signal is acquired during the blank time period of the even frame.

[0022] When the type of the frame to be displayed on the display panel is an even frame, the current display frame is determined to be an odd frame, and the low potential voltage of the second scan signal is acquired during the blank time period of the odd frame.

[0023] In some embodiments, the step of driving the display panel according to the first scan signal or the second scan signal includes:

[0024] When the type of the frame to be displayed on the display panel is an odd-numbered frame, the display panel is driven according to the low potential voltage of the first scan signal and the high potential voltage of the current display frame;

[0025] When the type of the frame to be displayed on the display panel is an even-numbered frame, the display panel is driven according to the low potential voltage of the second scan signal and the high potential voltage of the current display frame.

[0026] In some embodiments, the step of driving the display panel according to the first scan signal or the second scan signal further includes:

[0027] When the type of the frame to be displayed on the display panel is an odd-numbered frame, the first data signal of the pixel unit of all rows of the display panel is obtained, and the display panel is driven according to the first scan signal and the first data signal;

[0028] When the type of the frame to be displayed on the display panel is an even frame, the second data signal of the pixel unit of all rows of the display panel is obtained, and the display panel is driven according to the second scan signal and the second data signal.

[0029] Meanwhile, embodiments of this application provide a timing control board, which includes:

[0030] The determination module is used to determine the type of the frame to be displayed on the display panel;

[0031] The determining module is configured to determine a first scan signal of pixel units in all rows of the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame, and to determine a second scan signal of pixel units in even-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame; wherein the low potential voltage of the first scan signal is greater than the low potential voltage of the second scan signal.

[0032] The output module is used to drive the display panel according to the first scan signal or the second scan signal.

[0033] Meanwhile, this application provides a display device, which includes a display panel, a timing control board as described in any of the above embodiments, and a power management chip. The timing control board is electrically connected to the display panel, and the timing control board is electrically connected to the power management chip.

[0034] Beneficial Effects: This application provides a driving method, timing control board, and display device for a display panel. The driving method for the display panel determines the type of the frame to be displayed on the display panel. When the type of the frame to be displayed on the display panel is an odd-numbered frame, it determines a first scan signal for the pixel units of all rows of the display panel. When the type of the frame to be displayed on the display panel is an even-numbered frame, it determines a second scan signal for the pixel units of the even-numbered rows of the display panel. The low potential voltage of the first scan signal is greater than the low potential voltage of the second scan signal. The display panel is driven according to the first scan signal or the second scan signal. This allows different scan signals to be determined according to different frames to be displayed, making the charging time of the pixel units of even-numbered rows in even-numbered frames less than the charging time of all rows of pixel units in odd-numbered frames. This shortens the time difference between the charging time of the pixel units of even-numbered rows and the pixel units of odd-numbered frames, improving the problem of bright and dark horizontal stripes on the display panel. Attached Figure Description

[0035] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0036] Figure 1 A schematic diagram of a conventional display device provided in an embodiment of this application.

[0037] Figure 2 Timing diagram of a conventional display device provided for embodiments of this application.

[0038] Figure 3 A schematic diagram illustrating the appearance of bright and dark stripes in a conventional display device provided in this application embodiment.

[0039] Figure 4 This is a schematic diagram of a screen displaying bright and dark stripes on a conventional display device provided in an embodiment of this application.

[0040] Figure 5 A flowchart illustrating a method for driving a display panel as provided in an embodiment of this application.

[0041] Figure 6 Timing diagram of a display device provided in an embodiment of this application.

[0042] Figure 7 A schematic diagram illustrating the principle of eliminating bright and dark stripes in the display device provided in this application embodiment.

[0043] Figure 8 This is a schematic diagram of the timing control board provided in an embodiment of this application.

[0044] Figure 9 This is a schematic diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0045] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0046] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0047] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0048] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0049] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0050] like Figure 1 As shown, taking display devices with refresh rates of 60Hz and 120Hz as examples, from... Figure 1 As can be seen, Figure 1 In the coordinate axis, t represents time, with the unit being ms (milliseconds). When the refresh rate of display device 11 is 60 Hz, the duration of one frame on display device 11 is 16.7 ms. To improve the refresh rate of display devices, existing display devices use AFS (Advanced Front-Side Frame) technology, which splits the original frame into odd-numbered frames and even-numbered frames. Odd-numbered lines are opened within odd-numbered frames, and even-numbered lines are opened within even-numbered frames, such as... Figure 1 As shown, when the display device 11 is at 120 Hz, one frame duration is 8.3 ms, which improves the refresh rate of the display device. However, when the display device 11 displays the image at a refresh rate of 60 Hz and 120 Hz respectively, as shown... Figure 1As shown, taking a white screen on display device 11 as an example, and the white screen being moved to the right, it can be seen that when display device 11 displays at a refresh rate of 60 Hz, all rows of pixels are turned on simultaneously. When display device 11 displays at a refresh rate of 120 Hz, it can be seen that in the first frame, after the even-numbered rows of the previous frame are refreshed, the odd-numbered rows of the first frame are refreshed, while the even-numbered rows of the previous frame have not yet been refreshed. This causes the pixels of odd-numbered and even-numbered rows to overlap in the first frame, resulting in a "fishbone" phenomenon. In the second frame, refreshing the even-numbered rows can eliminate this problem, but in the third frame, the "fishbone" phenomenon still occurs, thus causing the display device 11 to have a display defect.

[0051] To address the problems of display devices using ASF technology, such as Figure 2 As shown, in the timing of two frames of a display device using DLG (Dual Line Gate) technology combined with ASF technology, the first time period T1 is the time period of odd-numbered frames, the second time period T2 is a blank time period, and the third time period T3 is the time period of even-numbered frames. Reset & STV are the reset signal and the vertical synchronization signal, respectively, and their timings are identical. CK1 to CK8 are the clock signal lines controlling the gate drive circuit. When the refresh rate of the display device is 120 Hz, T1 equals T3, and T1 is 8.3 milliseconds. Figure 2 As can be seen, in odd-numbered frames, CK1 through CK8 all input signals to open all rows of pixel units in odd-numbered frames, thus avoiding the "fishbone" problem. In even-numbered frames, CK2, CK4, CK6, and CK8 operate, while CK1, CK3, CK5, and CK7 do not input signals to open even-numbered rows of pixel units in even-numbered frames. This achieves 120Hz data writing within a 60Hz duration, and the data writing is conflict-free. However, as can be seen from the above analysis, even-numbered row pixel units are charged in both odd and even-numbered frames, while odd-numbered row pixel units are charged only in odd-numbered frames. Figure 3 As shown, comparing the leakage current curves of pixel units in odd-numbered rows and even-numbered rows, it can be seen that pixel units in odd-numbered rows continuously leak current, while pixel units in even-numbered rows charge after leaking current and then leak again. This results in different charging times for odd-numbered and even-numbered rows. When displayed, as... Figure 4 As shown, display device 11 exhibits bright and dark stripes, resulting in poor display quality. Therefore, existing display devices using DLG technology combined with ASF technology have a technical problem where the pixel charging time differs between odd-numbered and even-numbered rows, leading to bright and dark horizontal stripes on the displayed image.

[0052] This application provides a driving method for a display panel, a timing control board, and a display device to address the aforementioned technical problems.

[0053] like Figure 5 As shown, this application embodiment provides a driving method for a display panel, the driving method for the display panel including:

[0054] S1, determine the type of frame to be displayed on the display panel.

[0055] Specifically, the type of the frame to be displayed on the display panel can be determined first. Then, different scanning signals can be output according to the different types of the frames to be displayed on the display panel, thereby shortening the time difference of charging time for pixel units in odd-numbered rows and even-numbered rows and avoiding display defects.

[0056] Specifically, the frame to be displayed on the display panel refers to one or more frames that the display panel is about to display. It can be the first frame that the display panel needs to display when it changes from a power-off state to a power-on state, or it can be a frame when the display panel changes from one frame to another.

[0057] Specifically, the frames to be displayed on the display panel can be either odd or even.

[0058] Specifically, before determining the type of the frame to be displayed on the display panel, a display request from the display panel can be received, and the type of the frame to be displayed on the display panel can be determined based on the display request.

[0059] Specifically, the display request of the display panel can carry the information to be displayed on the display panel, so that the timing control board can perform corresponding processing through the display request of the display panel.

[0060] Specifically, the information to be displayed on the display panel can include information about the image to be displayed on the display panel. The image to be displayed on the display panel can be the next frame or multiple frames to be displayed. The image to be displayed can be the first frame to be displayed when the display panel changes from a power-off state to a power-on state, or it can be the image that needs to be changed when the display panel changes from one frame to another. It can be understood that the image to be displayed can be a completely black screen, a screen with all pixels having the same grayscale, a screen with all pixels having different grayscale, a screen with some pixels having the same grayscale and some pixels having different grayscale, a screen with all pixels having the same display color, a screen with all pixels having different display colors, or a screen with some pixels having the same display color and some pixels having different display colors.

[0061] Specifically, it is understood that the driving method in the embodiments of this application uses DLG technology combined with AFS technology. Therefore, when the screen to be displayed is the first frame to be displayed when the screen is in the power-off state to the power-on state, it is understood that the odd-numbered frames will be displayed first. When changing from one frame to another, the frame can change from an odd-numbered frame to an even-numbered frame, or vice versa.

[0062] Specifically, when the display panel displays multiple frames, it can be understood that the display will alternate between odd and even frames, and the corresponding processing can be performed.

[0063] Specifically, the information to be displayed on the display panel can also include the display frequency of the display panel. For example, if the display panel can display images at multiple frequencies, the information to be displayed on the display panel can include the display frequency of the display panel. For example, if the display panel can display at refresh rates of 60 Hz, 120 Hz and 240 Hz, then when receiving a display request from the display panel, the display frequency that it needs to display can be received.

[0064] Specifically, the information to be displayed on the display panel may also include the display data of the display panel. The display data of the display panel may include the grayscale of each pixel of the image to be displayed on the display panel, the position of each pixel, and the correspondence between the position of each pixel and the grayscale.

[0065] Specifically, grayscale is used as an example for explanation. However, it is understood that the data signal will undergo digital-to-analog conversion, and when the data signal is a data voltage, there will be a correspondence between the data voltage and the grayscale. Therefore, the grayscale mentioned here can be replaced with the corresponding voltage, or the analog signal before digital-to-analog conversion. That is, the display data of the display panel may include the analog signal of each pixel or the data voltage of each pixel. In this embodiment, since it does not involve voltage compensation of a single pixel unit or a single sub-pixel unit, the voltage data mentioned above can be the compensation data in other schemes. Each grayscale corresponds to the voltage data and the analog signal, which will not be repeated in the following embodiments of this application.

[0066] Specifically, the grayscale of each pixel can include the grayscale of each sub-pixel unit; the position of each pixel includes the row and column number of the pixel, or the coordinates of the pixel within the panel; the correspondence between the position of each pixel and the grayscale can be illustrated as follows: the grayscale of the pixel in the first row and first column is the first grayscale, the grayscale of the pixel in the second row and second column is the second grayscale, so the correspondence between the position of each pixel and the grayscale can be determined. For example, when determining that the pixel is the pixel in the first row and first column, its grayscale can be determined to be the first grayscale.

[0067] Specifically, the steps to determine the type of the frame to be displayed on the display panel can be either to determine whether the frame to be displayed on the display panel is an even number of frames based on the display request of the display panel, or to determine whether the frame to be displayed on the display panel is an odd number of frames based on the display request of the display panel.

[0068] In some embodiments, the step of determining the type of the frame to be displayed on the display panel includes: determining the type of the current display frame on the display panel; and determining the type of the frame to be displayed on the display panel based on the type of the current display frame. When determining the frame to be displayed on the display panel, since odd and even frames are displayed alternately to increase the refresh rate, the type of the current display frame can be determined first, and then the type of the frame to be displayed can be determined based on the type of the current display frame.

[0069] Specifically, for example, if the display panel is currently displaying odd-numbered frames, then the type of the frame to be displayed can be determined to be an even-numbered frame, and the corresponding processing can be performed.

[0070] S2, when the type of the frame to be displayed on the display panel is an odd-numbered frame, a first scan signal for the pixel units of all rows of the display panel is determined; when the type of the frame to be displayed on the display panel is an even-numbered frame, a second scan signal for the pixel units of even-numbered rows of the display panel is determined; the low potential voltage of the first scan signal is greater than the low potential voltage of the second scan signal.

[0071] Specifically, the first scan signal refers to the signal output on the clock signal line corresponding to each pixel unit. This signal can be used to determine the scan line signal on the scan line connected to each pixel unit, thereby turning the transistors in each pixel unit on or off, and charging or stopping the charging of each pixel unit. Similarly, the second scan signal refers to the signal output on the clock signal line corresponding to the even-numbered rows of pixel units. This signal can be used to determine the scan line signal on the scan line connected to the even-numbered rows of pixel units, thereby turning the transistors in the even-numbered rows of pixel units on or off, and charging or stopping the charging of the even-numbered rows of pixel units.

[0072] Specifically, the first scan signal consists of a high potential voltage and a low potential voltage, and similarly, the second scan signal also consists of a high potential voltage and a low potential voltage.

[0073] In some embodiments, the step of determining the first scan signal of pixel units in all rows of the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame includes: determining a first high potential voltage and a first low potential voltage of pixel units in each row of the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame; the first high potential voltages of pixel units in each row of the display panel are equal, and the first low potential voltages of pixel units in each row of the display panel are equal; and determining the first scan signal of pixel units in all rows of the display panel based on the first high potential voltages and the first low potential voltages of pixel units in each row of the display panel. By determining the first high potential voltage and the first low potential voltage when each row of pixel units is turned on, and making the first high potential voltage and the first low potential voltage of each row of pixel units equal, the first scan signal can be determined, and correspondingly, all rows of pixel units are turned on in the odd-numbered frames.

[0074] Specifically, taking the turn-on voltage of each pixel unit as the voltage on the scan line, and assuming the voltage on the scan line is the same as the voltage on the clock signal line, for example... Figure 6 As shown, Figure 6 Taking a display panel refresh rate of 120 Hz as an example, the first time period T4 and the second time period T6 are 1 / 120 milliseconds. Here, we take the duration of each frame as 8.3 milliseconds as an example (the duration of each frame may vary depending on the difference in the blank time period, for example, it may be 8.2 milliseconds. These differences are not considered here, but it is understood that data with certain differences can still use the display panel driving method provided in the embodiments of this application). Figure 6 In this context, H represents the reference unit for the duration within a frame. For example, the Reset signal and the STV signal will be at a high potential for 3H, and the interval between the high potentials of each signal input can be determined. H can be set according to requirements, but this application does not limit this.

[0075] from Figure 6 As can be seen, within the first time period T4 of the odd-numbered frames, the first high-potential voltage V1 and the first low-potential voltage V2 of each row of pixel units can be determined. Simultaneously, since the first high-potential voltage V1 of each row of pixel units is equal, and the first low-potential voltage V2 of each row of pixel units is equal, the timing of the first scan signal can be determined. The timing of the first scan signal includes the timing of the first clock signal line CK1 to the eighth clock signal line CK8 within the odd-numbered frames, as follows... Figure 6As shown, taking a display panel with 8 clock signal lines as an example, the high potential voltage of the first clock signal line CK1, the second clock signal line CK2, the third clock signal line CK3, the fourth clock signal line CK4, the fifth clock signal line CK5, the sixth clock signal line CK6, the seventh clock signal line CK7 and the eighth clock signal line CK8 is the first high potential voltage V1, and the low potential voltage of the first clock signal line CK1 to the eighth clock signal line CK8 is the first low potential voltage V2, so that the pixel units of all rows can be turned on in odd-numbered frames.

[0076] In some embodiments, the step of determining the second scan signal of the pixel units in the even-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame includes: determining a second high potential voltage and a second low potential voltage of the pixel units in the even-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame; the second high potential voltage is equal to the first high potential voltage, and the second low potential voltage is less than the first low potential voltage; and determining the second scan signal of the pixel units in the even-numbered rows of the display panel based on the second high potential voltage and the second low potential voltage of the pixel units in the even-numbered rows of the display panel. By determining the second high potential voltage and the second low potential voltage when the pixel units in the even-numbered rows are turned on, and making the second high potential voltage and the second low potential voltage of each even-numbered row of pixel units equal, the second scan signal can be determined, and the pixel units in the even-numbered rows are turned on accordingly in the even-numbered frames.

[0077] Specifically, such as Figure 6 As shown, taking the turn-on voltage of each pixel unit as the voltage on the scan line, and assuming the voltage on the scan line is the same as the voltage on the clock signal line, for example... Figure 6 As shown, within the second time period T6 of the even-numbered frames, the second high potential voltage V3 and the second low potential voltage V4 of the pixel units in each even-numbered row can be determined. Simultaneously, since the second high potential voltage V3 of the pixel units in each even-numbered row is equal, and the second low potential voltage V4 of the pixel units in each even-numbered row is equal, the timing of the second scan signal can be determined. The timing of the second scan signal includes the timing of the second clock signal line CK2, the fourth clock signal line CK4, the sixth clock signal line CK6, and the eighth clock signal line CK8 within the even-numbered frames. For example... Figure 6 As shown, taking a display panel with 8 clock signal lines as an example, the high potential voltage of the second clock signal line CK2, the fourth clock signal line CK4, the sixth clock signal line CK6, and the eighth clock signal line CK8 is the second high potential voltage V3, and the low potential voltage of the second clock signal line CK2, the fourth clock signal line CK4, the sixth clock signal line CK6, and the eighth clock signal line CK8 is the second low potential voltage V4. This allows the even-numbered rows of pixel units to be activated in even-numbered frames, and reduces the charging time of the even-numbered rows of pixel units.

[0078] In some embodiments, the step of determining the second scan signal of the pixel units in the even-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame further includes: determining the third scan signal of the pixel units in the odd-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame; the low potential voltage of the third scan signal is equal to the low potential voltage of the second scan signal. When determining the second scan signal of the pixel units in the even-numbered rows of the even-numbered frame, the third scan signal of the pixel units in the odd-numbered rows of the even-numbered frame can be determined, thereby driving the pixel units in all rows within the even-numbered frames, enabling the display panel to display normally; and since the low potential voltage of the third scan signal is equal to the low potential voltage of the second scan signal, there is no need to set multiple low potential voltages, thus allowing the pixel units in all rows to be driven in the even-numbered frames.

[0079] Specifically, such as Figure 6 As shown, taking the turn-on voltage of each pixel unit as the voltage on the scan line, and assuming the voltage on the scan line is the same as the voltage on the clock signal line, for example... Figure 6 As shown, within the second time period T6 of the even-numbered frames, the timing of the third scan signal can be determined. The timing of the third scan signal includes the timing of the first clock signal line CK1, the third clock signal line CK3, the fifth clock signal line CK5, and the seventh clock signal line CK7 within the even-numbered frames. Figure 6 As shown, taking a display panel with 8 clock signal lines as an example, the first clock signal line CK1, the third clock signal line CK3, the fifth clock signal line CK5 and the seventh clock signal line CK7 are all at the second low potential voltage V4, so that the pixel units of the odd-numbered rows can be turned off in even-numbered frames.

[0080] Specifically, such as Figure 7 As shown, taking the first low potential voltage of the first scan signal as -10V (volts) in odd-numbered frames and the second low potential voltage of the second scan signal as -16V in even-numbered frames, and assuming the voltage on the scan line gate is the same as the voltage of the first and second scan signals, from... Figure 7 As can be seen, when the timing of the data line Source remains unchanged, the charging time of the pixel unit is less when the voltage on the scan line Gate is -16V than when the voltage on the scan line Gate is -10V. This reduces the charging time of the pixel units in even-numbered rows within even-numbered frames. The difference between the charging time when the voltage on the scan line Gate is -16V and the charging time when the voltage on the scan line Gate is -10V is the area of ​​the intersection of the two voltages with the data line Source.

[0081] S3, drive the display panel according to the first scan signal or the second scan signal.

[0082] In some embodiments, before the step of driving the display panel according to the first scan signal or the second scan signal, the method further includes: when the type of the frame to be displayed on the display panel is an odd frame, determining that the current display frame is an even frame, and acquiring a low potential voltage of the first scan signal during the blank time period of the even frame; when the type of the frame to be displayed on the display panel is an even frame, determining that the current display frame is an odd frame, and acquiring a low potential voltage of the second scan signal during the blank time period of the odd frame. By sending a first acquisition signal to the power management chip during the blank time period of even-numbered frames when the display panel is displaying an odd-numbered frame, and receiving the low potential voltage of the first scan signal returned by the power management chip, the low potential voltage of the odd-numbered frames can be changed. When the display panel is displaying an even-numbered frame, a second acquisition signal can be sent to the power management chip during the blank time period of odd-numbered frames, and receiving the low potential voltage of the second scan signal returned by the power management chip. This allows the low potential voltage of the first scan signal and the low potential voltage of the second scan signal to be different in odd-numbered and even-numbered frames, thereby shortening the charging time of the pixel units in even-numbered rows and the time difference between the charging time of the pixel units in even-numbered rows and the pixel units in odd-numbered frames, and improving the problem of bright and dark horizontal stripes on the display panel.

[0083] Specifically, when acquiring the low potential voltage of the first scan signal, a first acquisition signal can be sent to the power management chip to receive the low potential voltage of the first scan signal returned by the power management chip.

[0084] Specifically, when acquiring the low potential voltage of the second scan signal, a first acquisition signal can be sent to the power management chip to receive the low potential voltage of the second scan signal returned by the power management chip.

[0085] Specifically, in the display device, the timing control board has only one low-potential output port. Therefore, when the low-potential voltages of odd-numbered frames and even-numbered frames are different, the timing control board needs to communicate with the power management chip to change the low-potential voltage, so that the timing control board outputs different low-potential voltages in different frames.

[0086] Specifically, such as Figure 6 As shown, the timing control board and the power management chip can communicate via the I2C bus during the blank time period T5 of odd-numbered frames. Similarly, the timing control board and the power management chip can communicate via the I2C bus during the blank time period of even-numbered frames.

[0087] In some embodiments, the step of driving the display panel according to the first scan signal or the second scan signal includes: when the type of the frame to be displayed on the display panel is an odd-numbered frame, driving the display panel according to the low potential voltage of the first scan signal and the high potential voltage of the current display frame; and when the type of the frame to be displayed on the display panel is an even-numbered frame, driving the display panel according to the low potential voltage of the second scan signal and the high potential voltage of the current display frame. When the low potential voltages of the odd-numbered frames and even-numbered frames of the display panel are different, the high potential voltages of the odd-numbered frames and even-numbered frames of the display panel can be made the same, thereby reducing the charging time of the pixel units in the even-numbered rows of the even-numbered frames by only changing the low potential voltage of each frame, shortening the time difference between the charging time of the pixel units in the even-numbered rows and the pixel units in the odd-numbered frames, and improving the problem of bright and dark horizontal stripes on the display panel.

[0088] Specifically, when changing the low-potential voltage during the blank time periods of each frame, there is no need to change the high-potential voltage.

[0089] In some embodiments, the step of driving the display panel according to the first scan signal or the second scan signal further includes: when the type of the frame to be displayed on the display panel is an odd-numbered frame, acquiring first data signals of pixel units in all rows of the display panel, and driving the display panel according to the first scan signal and the first data signals; when the type of the frame to be displayed on the display panel is an even-numbered frame, acquiring second data signals of pixel units in all rows of the display panel, and driving the display panel according to the second scan signal and the second data signals. When determining the scan signal of each frame to be displayed, the data signals of each row of pixel units can also be determined, thereby driving the display panel according to the scan signals and data signals of each row of pixel units, enabling the display panel to function normally.

[0090] Specifically, the first data signal refers to the data signal of all pixel units in odd-numbered frames. This data signal includes the data signal of pixel units in each row. This data signal can be all 0, all non-zero data, or partially 0 and partially non-zero data, so that the display panel can display the required image in odd-numbered frames (this image can include a black screen, an image with some pixels illuminated, or an image with all pixels illuminated). Similarly, the second data signal refers to the data signal of all pixel units in even-numbered frames. This data signal includes the data signal of pixel units in each row. This data signal can be all 0, all non-zero data, or partially 0 and partially non-zero data, so that the display panel can display the required image in odd-numbered frames (this image can include a black screen, an image with some pixels illuminated, or an image with all pixels illuminated).

[0091] Specifically, in even-numbered frames, although odd-numbered rows are not enabled, considering that odd-numbered rows can also have a data signal, such as 0 or non-zero data, the second data signal can be the data signal of the pixel units of all rows.

[0092] Specifically, since all pixel units in all rows are turned on in odd-numbered frames, the first data signal can drive all pixel units in all rows. However, in even-numbered frames, only pixel units in even-numbered rows are turned on. Therefore, even if the pixel units in odd-numbered rows in the second data signal are non-zero data, the second data signal can only drive pixel units in even-numbered rows.

[0093] Specifically, the first low potential voltage can be -10 volts, and the second low potential voltage can be -16 volts.

[0094] Specifically, the above embodiments are illustrated by taking the example that the voltage on the scan line is the same as the voltage on the clock signal line. However, the embodiments of this application are not limited to this. For example, if there is a fixed coefficient or difference between the voltage on the clock signal line and the voltage on the scan line (for example, the voltage drop caused by impedance causes a difference between the two), the second scan signal can be determined based on the voltage on the scan line required to turn on the pixel unit.

[0095] Specifically, the above embodiment is illustrated by taking an example of having 8 clock signal lines in the display panel, but the embodiments of this application are not limited to this. For example, the display panel may have only 4 clock signal lines.

[0096] This application provides a driving method for a display panel. This method determines the type of the frame to be displayed on the display panel. When the type of the frame to be displayed is an odd-numbered frame, it determines a first scan signal for all rows of pixel units on the display panel. When the type of the frame to be displayed is an even-numbered frame, it determines a second scan signal for even-numbered rows of pixel units on the display panel. The low-potential voltage of the first scan signal is greater than the low-potential voltage of the second scan signal. The display panel is driven according to either the first or second scan signal. This allows different scan signals to be determined based on different frames to be displayed, making the charging time of even-numbered rows of pixel units in even-numbered frames shorter than the charging time of all rows of pixel units in odd-numbered frames. This shortens the time difference between the charging times of even-numbered rows of pixel units and those in odd-numbered frames, improving the problem of bright and dark horizontal stripes on the display panel.

[0097] At the same time, such as Figure 8 As shown, this application embodiment provides a timing control board, the timing control board 32 including:

[0098] The judgment module 201 is used to determine the type of the frame to be displayed on the display panel;

[0099] The determining module 202 is configured to determine a first scan signal of pixel units in all rows of the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame, and to determine a second scan signal of pixel units in even-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame; the low potential voltage of the first scan signal is greater than the low potential voltage of the second scan signal.

[0100] The output module 203 is used to drive the display panel according to the first scan signal or the second scan signal.

[0101] In some embodiments, the determining module 201 is used to determine the type of the current display frame of the display panel; and to determine the type of the frame to be displayed on the display panel based on the type of the current display frame of the display panel.

[0102] In some embodiments, the determining module 202 is configured to determine a first high potential voltage and a first low potential voltage of each row of pixel units in the display panel when the type of the frame to be displayed in the display panel is an odd-numbered frame; the first high potential voltage of each row of pixel units in the display panel is equal, and the first low potential voltage of each row of pixel units in the display panel is equal; and determine a first scan signal of all rows of pixel units in the display panel based on the first high potential voltage and the first low potential voltage of each row of pixel units in the display panel.

[0103] In some embodiments, the determining module 202 is configured to determine a second high potential voltage and a second low potential voltage of the pixel units in the even-numbered rows of the display panel when the frame to be displayed on the display panel is an even-numbered frame; the second high potential voltage is equal to the first high potential voltage, and the second low potential voltage is less than the first low potential voltage; and determine a second scan signal of the pixel units in the even-numbered rows of the display panel based on the second high potential voltage and the second low potential voltage of the pixel units in the even-numbered rows of the display panel.

[0104] In some embodiments, the determining module 202 is used to determine a third scan signal of the pixel units in the odd-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame; the low potential voltage of the third scan signal is equal to the low potential voltage of the second scan signal.

[0105] In some embodiments, the driving device for the display panel further includes an acquisition module, which is configured to determine that the current display frame is an even frame when the type of the frame to be displayed on the display panel is an odd frame, and acquire the low potential voltage of the first scan signal during the blank time period of the even frame; and to determine that the current display frame is an odd frame when the type of the frame to be displayed on the display panel is an even frame, and acquire the low potential voltage of the second scan signal during the blank time period of the odd frame.

[0106] In some embodiments, the output module 203 is configured to drive the display panel according to the low potential voltage of the first scan signal and the high potential voltage of the current display frame when the type of the frame to be displayed on the display panel is an odd-numbered frame; and to drive the display panel according to the low potential voltage of the second scan signal and the high potential voltage of the current display frame when the type of the frame to be displayed on the display panel is an even-numbered frame.

[0107] In some embodiments, the output module 203 is configured to, when the type of the frame to be displayed on the display panel is an odd-numbered frame, acquire a first data signal of the pixel units of all rows of the display panel, and drive the display panel according to the first scan signal and the first data signal; when the type of the frame to be displayed on the display panel is an even-numbered frame, acquire a second data signal of the pixel units of all rows of the display panel, and drive the display panel according to the second scan signal and the second data signal.

[0108] Meanwhile, embodiments of this application provide a display device, such as... Figure 9 As shown, the display device 3 includes a display panel 31, a timing control board 32 as described in any of the above embodiments, and a power management chip 33. The timing control board 32 is electrically connected to the display panel 31, and the timing control board 32 is electrically connected to the power management chip 33.

[0109] Specifically, this application uses a timing control board as an example for illustration, but this application is not limited to this. The display device may have a SoC (System-on-a-Chip) chassis board with timing and data processing functions, and data processing is performed through the SoC chassis board.

[0110] As can be seen from the above embodiments:

[0111] This application provides a driving method, timing control board, and display device for a display panel. The driving method determines the type of the frame to be displayed on the display panel. When the type of the frame to be displayed is an odd-numbered frame, it determines a first scan signal for the pixel units of all rows of the display panel. When the type of the frame to be displayed is an even-numbered frame, it determines a second scan signal for the pixel units of the even-numbered rows of the display panel. The low potential voltage of the first scan signal is greater than the low potential voltage of the second scan signal. The display panel is driven according to the first scan signal or the second scan signal. This allows different scan signals to be determined according to different frames to be displayed, so that the charging time of the pixel units in the even-numbered rows of even-numbered frames is less than the charging time of the pixel units in all rows of odd-numbered frames. This shortens the time difference between the charging time of the pixel units in the even-numbered rows and the pixel units in the odd-numbered frames, thus improving the problem of bright and dark horizontal stripes on the display panel.

[0112] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0113] The driving method, timing control board, and display device for a display panel provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A driving method for a display panel, characterized in that, include: Determine the type of the frame to be displayed on the display panel; When the type of the frame to be displayed on the display panel is an odd-numbered frame, a first scan signal for the pixel units of all rows of the display panel is determined; when the type of the frame to be displayed on the display panel is an even-numbered frame, a second scan signal for the pixel units of even-numbered rows of the display panel is determined; the low potential voltage of the first scan signal is greater than the low potential voltage of the second scan signal. The display panel is driven according to the first scan signal or the second scan signal; The step of determining the first scan signal of the pixel units of all rows of the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame includes: determining the first high potential voltage and the first low potential voltage of each row of pixel units on the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame; the first high potential voltage of each row of pixel units on the display panel is equal, and the first low potential voltage of each row of pixel units on the display panel is equal; and determining the first scan signal of the pixel units of all rows of the display panel based on the first high potential voltage and the first low potential voltage of each row of pixel units on the display panel.

2. The driving method for the display panel as described in claim 1, characterized in that, The step of determining the type of the frame to be displayed on the display panel includes: Determine the type of the current display frame of the display panel; The type of the frame to be displayed on the display panel is determined based on the type of the current display frame on the display panel.

3. The driving method for the display panel as described in claim 1, characterized in that, The step of determining the second scan signal of the pixel unit of the even-numbered row of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame includes: When the frame to be displayed on the display panel is an even number of frames, a second high potential voltage and a second low potential voltage are determined for the pixel units in the even-numbered rows of the display panel; the second high potential voltage is equal to the first high potential voltage, and the second low potential voltage is less than the first low potential voltage. The second scan signal of the pixel unit in the even-numbered row of the display panel is determined based on the second high potential voltage and the second low potential voltage of the pixel unit in the even-numbered row of the display panel.

4. The driving method for the display panel as described in claim 1, characterized in that, The step of determining the second scan signal of the pixel unit of the even-numbered row of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame further includes: When the type of the frame to be displayed on the display panel is an even frame, a third scan signal for the pixel unit of the odd row of the display panel is determined; the low potential voltage of the third scan signal is equal to the low potential voltage of the second scan signal.

5. The driving method for a display panel as described in claim 1, characterized in that, Before the step of driving the display panel according to the first scan signal or the second scan signal, the method further includes: When the type of the frame to be displayed on the display panel is an odd frame, the current display frame is determined to be an even frame, and the low potential voltage of the first scan signal is acquired during the blank time period of the even frame. When the type of the frame to be displayed on the display panel is an even frame, the current display frame is determined to be an odd frame, and the low potential voltage of the second scan signal is acquired during the blank time period of the odd frame.

6. The driving method for a display panel as described in claim 1, characterized in that, The step of driving the display panel according to the first scan signal or the second scan signal includes: When the type of the frame to be displayed on the display panel is an odd-numbered frame, the display panel is driven according to the low potential voltage of the first scan signal and the high potential voltage of the current display frame; When the type of the frame to be displayed on the display panel is an even-numbered frame, the display panel is driven according to the low potential voltage of the second scan signal and the high potential voltage of the current display frame.

7. The driving method for a display panel as described in claim 1, characterized in that, The step of driving the display panel according to the first scan signal or the second scan signal further includes: When the type of the frame to be displayed on the display panel is an odd-numbered frame, the first data signal of the pixel unit of all rows of the display panel is obtained, and the display panel is driven according to the first scan signal and the first data signal; When the type of the frame to be displayed on the display panel is an even frame, the second data signal of the pixel unit of all rows of the display panel is obtained, and the display panel is driven according to the second scan signal and the second data signal.

8. A timing control board, characterized in that, include: The judgment module is used to determine the type of the frame to be displayed on the display panel; A determining module is configured to: determine a first scan signal for pixel units in all rows of the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame; and determine a second scan signal for pixel units in even-numbered rows of the display panel when the type of the frame to be displayed on the display panel is an even-numbered frame; wherein the low potential voltage of the first scan signal is greater than the low potential voltage of the second scan signal; specifically, it is configured to: determine a first high potential voltage and a first low potential voltage for pixel units in each row of the display panel when the type of the frame to be displayed on the display panel is an odd-numbered frame; wherein the first high potential voltages and the first low potential voltages of pixel units in each row of the display panel are equal; and determine the first scan signal for pixel units in all rows of the display panel based on the first high potential voltages and the first low potential voltages of pixel units in each row of the display panel. The output module is used to drive the display panel according to the first scan signal or the second scan signal.

9. A display device, characterized in that, It includes a display panel, a timing control board as described in claim 8, and a power management chip, wherein the timing control board is electrically connected to the display panel and the timing control board is electrically connected to the power management chip.

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