Storage data recovery method and device, flash memory device and storage medium

Abstract

The application discloses a storage data recovery method and device, a flash memory device and a storage medium, to improve data reading performance and reading success rate. The storage data recovery method comprises the steps of reading a current threshold voltage in a flash memory; analyzing a current decision line corresponding to the current threshold voltage; calculating a decision line offset according to a default decision line and the current decision line; obtaining a threshold voltage offset according to the decision line offset; writing data into the flash memory, verifying whether the read data based on the threshold voltage offset is correct; if the verification is passed, recording the threshold voltage offset into a register of the flash memory; obtaining a plurality of threshold voltage offsets of successful verification, taking an average value of the plurality of threshold voltage offsets of successful verification as a set voltage offset of the flash memory, and performing data reading according to the set voltage offset.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and in particular to a method, apparatus, flash memory device, and storage medium for recovering stored data. Background Technology

[0002] With the rapid advancement of information technology, non-volatile memory is increasingly widely used in data storage. Among them, NAND flash memory, with its high density and non-volatile characteristics, has been widely used in mobile phones, portable computers, and cloud storage. However, with the continuous increase in storage density, NAND flash memory also faces multiple challenges. Especially in high-temperature environments, charge leakage in storage cells can cause lateral shifts in the threshold voltage distribution, thus affecting data read performance.

[0003] Traditional read mechanisms typically require multiple read retries to determine the valid data window in such situations. This not only prolongs the read time but may also introduce additional data errors. Furthermore, existing read retry techniques often rely on pre-set parameter settings. When using these preset parameter settings for sequential rereading, a significant portion of the reread time is consumed, especially when the memory is aging or operating under non-standard environmental conditions. Using preset parameters for rereading can significantly increase the reread time.

[0004] Therefore, improving data reading performance and success rate when the threshold voltage distribution undergoes lateral shift is becoming increasingly important. Summary of the Invention

[0005] The purpose of this application is to provide a storage data recovery method, apparatus, flash memory device, and storage medium to improve data reading performance and read success rate.

[0006] This application discloses a method for recovering stored data, the method comprising the following steps:

[0007] Read the current threshold voltage from the flash memory;

[0008] Analyze the current decision line corresponding to the current threshold voltage;

[0009] Calculate the decision line offset based on the default decision line and the current decision line;

[0010] The threshold voltage offset is derived based on the decision line offset.

[0011] Write data to the flash memory and verify whether the data read based on the threshold voltage offset is correct;

[0012] If the verification passes, the threshold voltage offset is recorded in the register of the flash memory; if the verification fails, the current threshold voltage is readjusted according to the threshold voltage offset, and the new threshold voltage offset is obtained again through the above steps.

[0013] The threshold voltage offsets that have been successfully verified are obtained, and the average value of the threshold voltage offsets that have been successfully verified is taken as the set voltage offset of the flash memory. Data is then read according to the set voltage offset.

[0014] Optionally, in the step of writing data to the flash memory and verifying whether the read data is correct, the correctness of the read data is verified by an ECC correction mechanism.

[0015] Optionally, the register includes a temporary threshold voltage record table, and the verified threshold voltage offset is recorded in the temporary threshold voltage record table.

[0016] Optionally, before reading the current threshold voltage in the flash memory, the page data of a storage page in the flash memory is read first. If the page data reading fails, the current threshold voltage in the flash memory is read. In the step of obtaining multiple successfully verified threshold voltage offsets, taking the average of the multiple successfully verified threshold voltage offsets as the set voltage offset of the flash memory, and reading data according to the set voltage offset, the page data of other storage pages in the flash memory are read according to the set voltage offset.

[0017] Optionally, the flash memory includes a first storage page, a second storage page, a third storage page, a first register, a second register, and a third register. The first register corresponds to the first storage page, the second register corresponds to the second storage page, and the third register corresponds to the third storage page. A total of seven different decision lines are provided in the first register, the second register, and the third register. If the read page data is stored in the first storage page, the current decision line is analyzed from the decision lines in the first register based on the current threshold voltage. If the read page data is stored in the second storage page, the current decision line is analyzed from the decision lines in the second register based on the current threshold voltage. If the read page data is stored in the third storage page, the current decision line is analyzed from the decision lines in the third register based on the current threshold voltage.

[0018] Optionally, the first register has two decision lines, the second register has three decision lines, and the third register has two decision lines.

[0019] Optionally, the average of at least ten successfully verified threshold voltage offsets may be taken as the set voltage offset of the flash memory.

[0020] This application also discloses a storage data recovery device, which includes a reading unit, a calculation unit, a verification unit, and a storage unit. The reading unit is used to read the current threshold voltage in the flash memory and analyze the current decision line corresponding to the current threshold voltage. The calculation unit is used to calculate the decision line offset based on the default decision line and the current decision line, and to obtain the threshold voltage offset based on the decision line offset. The verification unit is used to verify whether the read data is correct, and the storage unit is used to record the successfully verified threshold voltage offset into the register of the flash memory.

[0021] This application also discloses a flash memory device, which includes a processor and a memory. The memory stores a computer program, and the processor executes the computer program to implement the data recovery method described above.

[0022] This application also discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the storage data recovery method described above.

[0023] The beneficial effects of this application are as follows: Compared to the scheme that determines the effective data window through multiple retries to effectively read data when the threshold voltage distribution shifts laterally, this application adopts a real-time voltage compensation mechanism, which allows the read data to be analyzed in real time to obtain a better threshold voltage offset, thereby performing fewer reads, avoiding erroneous data, and improving read performance. Specifically, this application calculates the decision line offset, derives the threshold voltage offset based on the decision line offset, and then averages the verified threshold voltage offset, using the averaged threshold voltage offset as the set voltage offset for data reading. Through the above design, this application can obtain a verified set voltage offset after the shift, pre-write the set voltage offset into the NAND flash memory register, and subsequently read data based on the set voltage offset, effectively overcoming the defect of lateral drift in the threshold voltage distribution under high temperature conditions and avoiding the problem of low read efficiency caused by multiple retries. Attached Figure Description

[0024] The accompanying drawings, which form part of the specification, are used to provide a further understanding of the embodiments of this application and illustrate the implementation methods of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any creative effort. In the drawings:

[0025] Figure 1 This is a flowchart of a data recovery method provided in an embodiment of this application;

[0026] Figure 2 This is a flowchart of another method for recovering stored data provided in an embodiment of this application;

[0027] Figure 3 This is a schematic diagram of a data recovery device provided in an embodiment of this application;

[0028] Figure 4 This is a schematic diagram of a flash memory device provided in an embodiment of this application;

[0029] Figure 5 This is a schematic diagram of a computer-readable storage medium provided in an embodiment of this application.

[0030] 10. Storage data recovery device; 11. Reading unit; 12. Calculation unit; 13. Verification unit; 14. Storage unit; 100. Flash memory device; 200. Processor; 300. Memory; 400. Computer program; 500. Computer-readable storage medium. Detailed Implementation

[0031] It should be understood that the terminology, specific structural and functional details used herein are merely for describing particular embodiments and are representative. However, this application can be implemented in many alternative forms and should not be construed as being limited to the embodiments set forth herein. The invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0032] In high-temperature environments, charge leakage in flash memory cells can cause a lateral shift in the threshold voltage distribution, degrading read performance and requiring multiple retries to locate the valid data window, thus impacting data read performance. Furthermore, the multiple-retry read method is typically based on pre-set parameter settings, making it difficult to comprehensively handle all possible error scenarios.

[0033] To address this issue, this application provides a data recovery method that enables fast and accurate reading of data within flash memory even after charge leakage and lateral shift in threshold voltage distribution occur in the storage cells, thereby improving data reading efficiency and performance.

[0034] like Figure 1 As shown, the storage data recovery method provided in this application embodiment includes the following steps:

[0035] S1: Read the current threshold voltage in the flash memory;

[0036] S2: Analyze the current decision line corresponding to the current threshold voltage;

[0037] S3: Calculate the decision line offset based on the default decision line and the current decision line;

[0038] S4: The threshold voltage offset is obtained based on the decision line offset;

[0039] S5: Write data to the flash memory and verify whether the data read based on the threshold voltage offset is correct;

[0040] If the verification passes, proceed to step S6: record the threshold voltage offset into the register of the flash memory;

[0041] If the verification fails, return to step S1 and readjust the current threshold voltage according to the threshold voltage offset. Specifically, the decision line can be shifted left or right by sending a command, or the current threshold voltage can be combined with the threshold voltage offset of the failed verification and then a new threshold voltage offset can be obtained by going through the above steps S1-S5.

[0042] S7: Obtain multiple successfully verified threshold voltage offsets, take the average of the multiple successfully verified threshold voltage offsets as the set voltage offset of the flash memory, and read data according to the set voltage offset.

[0043] Compared to schemes that determine the effective data window (effective data range) through multiple retries to effectively read data when the threshold voltage distribution shifts laterally, this application embodiment employs a real-time voltage compensation mechanism. This allows for real-time analysis of the read data to determine the optimal threshold voltage offset, resulting in fewer reads, avoiding erroneous data, and improving read performance. Furthermore, since this application embodiment does not require repeated trials to determine the effective data range, it avoids prolonged data reading and the introduction of additional data errors. Specifically, this application embodiment calculates the decision line offset, derives the threshold voltage offset based on the decision line offset, and averages the successfully obtained threshold voltage offset. This averaged threshold voltage offset is then used as the set voltage offset for data reading. Through the above design, this application embodiment can obtain a verified set voltage offset after the shift, pre-write the set voltage offset into the flash memory register, and subsequently read data based on the set voltage offset. This effectively overcomes the defect of lateral drift in the threshold voltage distribution under high-temperature environments and avoids the problem of low read efficiency caused by multiple retries.

[0044] In this embodiment, step S5 verifies the correctness of the read data through an ECC correction mechanism. Specifically, before writing data, a threshold voltage after offset is set based on the threshold voltage offset. When writing data, the data is randomized and a check bit is added. When reading, the result of reading the check bit is checked to see if it meets the requirements. If it does, it means that the data is read correctly and the threshold voltage offset is also correct, thus meeting the conditions.

[0045] In steps S1 and S2, the current threshold voltage can be directly read, and the current decision line can be analyzed based on the threshold voltage distribution. In step S3, the voltage value of the default decision line is configured by the NAND manufacturer; the decision line offset can be obtained by simply calculating the difference between the default decision line and the current decision line. In step S4, the threshold voltage offset can also be obtained by combining the threshold voltage distribution with the decision line offset. In step S5, a command is issued to shift the default decision line left or right to the position that meets the threshold voltage offset, and then verification is performed through data writing and reading.

[0046] In this embodiment of the application, before step S1, a temporary threshold voltage record table can be established in the register of the flash memory, and the temporary threshold voltage record table can be divided into multiple groups to facilitate the storage of multiple groups of successfully read threshold voltage offsets.

[0047] Correspondingly, in step S7, after each successful verification, the threshold voltage offset is recorded in the temporary threshold voltage record table. In step S7, when the number of threshold voltage offsets recorded in the temporary threshold voltage record table reaches the required level, the average of these threshold voltage offsets in the temporary threshold voltage record table is calculated to obtain the set voltage offset.

[0048] In some embodiments, the threshold voltage temporary record table is divided into ten groups to record and store ten successfully verified threshold voltage offsets. The average of the ten successfully verified threshold voltage offsets is used as the set voltage offset. This satisfies most storage page count requirements and improves the accuracy of the set voltage offset. In other embodiments, the threshold voltage temporary record table can be divided into more than ten groups to record and store more than ten successfully verified threshold voltage offsets, and the average of these ten or more successfully verified threshold voltage offsets is used as the set voltage offset. Alternatively, in other embodiments, the threshold voltage temporary record table can be divided into 1 to 9 groups to record and store 1 to 9 successfully verified threshold voltage offsets, and the average of these 1 to 9 successfully verified threshold voltage offsets is used as the set voltage offset. The number of threshold voltage offsets that can be recorded and stored in the threshold voltage temporary record table can be selected according to actual needs; naturally, a larger number of offsets results in higher accuracy of the set voltage offset.

[0049] Furthermore, the embodiments of this application employ an adaptive read scheme based on dynamic voltage calibration. When used in flash memory and related products, the storage data recovery method provided in these embodiments runs automatically. Once the threshold voltage offset recorded in the threshold voltage temporary record table reaches the required value, each time a new threshold voltage offset is added, the earliest recorded threshold voltage offset in the threshold voltage temporary record table is deleted. This achieves dynamic adjustment of the threshold voltage temporary record table and the set voltage offset, enabling real-time voltage compensation. Even when the threshold voltage offset changes, it will not affect the read performance. Therefore, the storage data recovery method adopted in these embodiments has good flexibility and adaptability.

[0050] Of course, in other embodiments, the stored data recovery method provided in this application will only start when the degree of threshold voltage distribution deviation is detected to meet the requirements.

[0051] Because current technology lacks a real-time voltage compensation mechanism, it cannot dynamically adjust the read voltage parameters according to the read status of different memory pages, resulting in poor read performance. Furthermore, it lacks sufficient flexibility and adaptability when dealing with complex page types and error correction algorithms, making it difficult to meet the read requirements of various types of memory.

[0052] This application embodiment establishes a real-time voltage compensation mechanism to record and save the optimal reference voltage parameters (i.e., set voltage offset) and write them into the flash memory register, specifically the NAND configuration register. This can largely save read errors and reduce the error rate during subsequent data reading.

[0053] In this embodiment, after analyzing and calculating the data of a storage page in the flash memory to obtain a set voltage offset, the set voltage offset is placed in a register to directly read the data of other storage pages. The data in other storage pages is very likely to be read successfully on the first try, thereby speeding up the reading performance of the entire flash memory.

[0054] Specifically, such as Figure 2 As shown, before reading the current threshold voltage in the flash memory, step S0 is also included: reading page data of a storage page in the flash memory.

[0055] If page data reading fails, the current threshold voltage in the flash memory is read; if the reading is successful, it means that the threshold voltage has not shifted or has not shifted further, and no further steps are needed. It should be noted that in step S0, a default voltage needs to be set, and the page data of the storage page is read based on the default voltage.

[0056] Correspondingly, in step S7, the specific steps are as follows:

[0057] Step S71: Obtain multiple successfully verified threshold voltage offsets, and take the average of the multiple successfully verified threshold voltage offsets as the set voltage offset of the flash memory;

[0058] Step S72: Read page data of other storage pages in the flash memory according to the set voltage offset.

[0059] Since different storage pages within a flash memory are exposed to the same high-temperature environment, their threshold voltage distribution lateral drift defects are also similar. Therefore, when the threshold voltage of a storage page is adjusted to an offset threshold voltage, this threshold voltage offset also applies to other storage pages. Not to mention, in this embodiment, the average of multiple successfully verified threshold voltage offsets is used as the set voltage offset to satisfy the reading of other storage pages. The data in other storage pages is very likely to be successfully read on the first try, thereby accelerating the reading performance of the entire flash memory.

[0060] As a specific implementation, the flash memory adopts TLC (Triple-Level Cell) technology. The flash memory includes a first storage page P1, a second storage page P2, a third storage page P3, a first register M1, a second register M2, and a third register M3. The first register M1 corresponds to the first storage page P1, the second register M2 corresponds to the second storage page P2, and the third register M3 corresponds to the third storage page P3. Furthermore, the first register M1, the second register M2, and the third register M3 have a total of seven different decision lines, each with a different offset.

[0061] If the read page data is stored in the first storage page P1, the current decision line is analyzed in the decision line of the first register M1 based on the current threshold voltage; if the read page data is stored in the second storage page P2, the current decision line is analyzed in the decision line of the second register M2 based on the current threshold voltage; if the read page data is stored in the third storage page P3, the current decision line is analyzed in the decision line of the third register M3 based on the current threshold voltage.

[0062] As a concrete example, taking the reading of page data in the first storage page P1 as an example, in step S0, a default voltage is set, and the page data in the first storage page P1 is read according to the default voltage. In step S1, the threshold voltage corresponding to the first storage page P1 is read, i.e., the current threshold voltage. In step S2, the position of the optimal decision line of the current threshold voltage is analyzed, i.e., the current decision line. In step S7, the average of multiple successfully verified threshold voltage offsets is taken as the set voltage offset of the flash memory. This avoids increasing the success rate and efficiency of read retry under the same environment, and also improves the success rate of the first read, comprehensively improving the overall performance of data reading after the flash drive data is retained.

[0063] More specifically, under the same environment, the offsets of the seven decision lines of all TLC WLs in a NAND flash memory are roughly the same. Therefore, it is only necessary to obtain at least ten sets of threshold voltage offsets for successful reads and then calculate the average value. This average offset value can satisfy the situation of most other WLs in this NAND flash memory. So, directly writing this average offset value (i.e., setting the voltage offset) into the register, and using this average offset value for the first read of the remaining WLs, will greatly improve the success rate of the first read. Since the basic unit of each read is a page, and three pages make up a TLC WL, if the first storage page P1 and the second storage page P2 can be read using the default offset, but the third storage page P3 needs to be read again, then only the offset of the third storage page P3 and the register need to be recorded and changed. The first storage page P1 and the second storage page P2 are still read using the default offset of 0. If all three storage pages need to be read again, then as mentioned before, record 10 sets of threshold voltage offsets and the offsets of the seven decision lines, calculate the average value, and then directly put it into these three registers.

[0064] The first register has two decision lines, the second register has three decision lines, and the third register has two decision lines. Furthermore, the seven decision lines are decision lines L1, L2, L3, L4, L5, L6, and L7. Decision lines L1 and L5 are located in the first register M1, L2, L4, and L6 are located in the second register M2, and L3 and L7 are located in the third register M3.

[0065] Since each register corresponds to a memory page, and each register has a corresponding decision line, the register and decision line corresponding to that memory page can be quickly identified regardless of which memory page the data is read from first, making it convenient to select the decision line.

[0066] Through the above optimization methods, the embodiments of this application significantly shorten the read latency and command processing time, improve the success rate of the first read, and thus comprehensively improve the overall performance of data reading after the flash drive data is retained.

[0067] like Figure 3 As shown, the storage data recovery device 10 provided in this application embodiment includes a reading unit 11, a calculation unit 12, a verification unit 13, and a storage unit 14. The reading unit 11 is used to read the current threshold voltage in the flash memory and analyze the current decision line corresponding to the current threshold voltage. The calculation unit 12 is used to calculate the decision line offset based on the default decision line and the current decision line, and to obtain the threshold voltage offset based on the decision line offset. The verification unit 13 is used to verify whether the data read based on the threshold voltage offset is correct. The storage unit 14 is used to record the successfully verified threshold voltage offset into the register of the flash memory.

[0068] like Figure 4 As shown, as a flash memory device provided in this application embodiment, the flash memory device 100 includes a processor 200 and a memory 300. The memory 300 stores a computer program, and the processor 200 is used to execute the computer program to implement the storage data recovery method as described above.

[0069] like Figure 5 As shown, as a computer-readable storage medium provided in this application embodiment, the computer-readable storage medium 500 stores a computer program 400. When the computer program 400 is executed by a processor, it implements the storage data recovery method described above.

[0070] It should be noted that the limitations on each step involved in this solution are not considered as limiting the order of steps, provided that they do not affect the implementation of the specific solution. The steps listed first can be executed first, later, or even simultaneously. As long as this solution can be implemented, it should be considered to fall within the scope of protection of this application.

[0071] The above description, in conjunction with specific optional embodiments, provides a further detailed explanation of this application and should not be construed as limiting the specific implementation of this application to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of this application, and all such modifications or substitutions should be considered within the scope of protection of this application.

Claims

1. A method for recovering stored data, characterized in that, Including the following steps: Read the current threshold voltage from the flash memory; Analyze the current decision line corresponding to the current threshold voltage; Calculate the decision line offset based on the default decision line and the current decision line; The threshold voltage offset is derived based on the decision line offset. Write data to the flash memory and verify whether the data read based on the threshold voltage offset is correct; If the verification passes, the threshold voltage offset is recorded in the register of the flash memory; If the verification fails, the current threshold voltage is readjusted according to the threshold voltage offset, and the new threshold voltage offset is obtained again by going through the above steps. Obtain multiple successfully verified threshold voltage offsets, take the average of the multiple successfully verified threshold voltage offsets as the set voltage offset of the flash memory, and read data according to the set voltage offset; Before reading the current threshold voltage in the flash memory, the page data of a storage page in the flash memory is read first. If the page data reading fails, the current threshold voltage in the flash memory is read. In the step of obtaining multiple successfully verified threshold voltage offsets, taking the average of the multiple successfully verified threshold voltage offsets as the set voltage offset of the flash memory, and reading data according to the set voltage offset, page data of other storage pages in the flash memory are read according to the set voltage offset. The flash memory includes a first storage page, a second storage page, a third storage page, a first register, a second register, and a third register. The first register corresponds to the first storage page, the second register corresponds to the second storage page, and the third register corresponds to the third storage page. A total of seven different decision lines are provided in the first register, the second register, and the third register. If the read page data is stored in the first storage page, the current decision line is analyzed in the decision line of the first register based on the current threshold voltage; if the read page data is stored in the second storage page, the current decision line is analyzed in the decision line of the second register based on the current threshold voltage; if the read page data is stored in the third storage page, the current decision line is analyzed in the decision line of the third register based on the current threshold voltage.

2. The data recovery method as described in claim 1, characterized in that, In the step of writing data to the flash memory and verifying whether the data read based on the threshold voltage offset is correct, the correctness of the read data is verified by the ECC correction mechanism.

3. The data recovery method as described in claim 1, characterized in that, The register contains a temporary threshold voltage record table, and the threshold voltage offset that passes verification is recorded in the temporary threshold voltage record table.

4. The data recovery method as described in claim 1, characterized in that, The first register has two decision lines, the second register has three decision lines, and the third register has two decision lines.

5. The data recovery method as described in claim 1, characterized in that, The average of at least ten successfully verified threshold voltage offsets is taken as the set voltage offset of the flash memory.

6. A flash memory device, characterized in that, The flash memory device includes a processor and a memory, the memory storing a computer program, and the processor executing the computer program to implement the data recovery method as described in any one of claims 1 to 5.

7. A computer-readable storage medium storing a computer program therein, characterized in that, When the computer program is executed by the processor, it implements the data recovery method as described in any one of claims 1 to 5.

Images