Method for preparing son structure and MEMS device

Abstract

Embodiments of the present application relate to a preparation method of a SON structure and a MEMS device, and the method comprises the following steps: providing a substrate; forming a plurality of holes extending from the surface to the interior on the substrate; performing a first heat treatment, during which migration of the substrate material occurs to form a top membrane layer, the top membrane layer closes the upper openings of the plurality of holes so that the corresponding strain of the plurality of holes becomes a plurality of sub-cavities; performing epitaxial growth to form an epitaxial layer on the top membrane layer; performing a second heat treatment, during which migration of the substrate material occurs again so that the plurality of sub-cavities are connected to become a cavity; in this way, the problem of collapse is effectively solved, the reliability of the device is improved, and the preparation of a large-area SON structure can be realized.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a method for fabricating a SON structure and a MEMS device. Background Technology

[0002] SON (Silicon On Nothing) structures utilize specialized processing techniques to create a thin film on top of a substrate, with a sealed cavity beneath the film. This structure, combined with Micro-Electro-Mechanical Systems (MEMS) technology, can be used to manufacture pressure sensors. Most existing pressure sensors employ Cavity-SOI (Cavity-on-Semiconductor-on-Ion) technology. Specifically, a cavity is created on the front side of a first substrate, and the side containing the cavity opening is then bonded to a second substrate (an SOI substrate wafer) via silicon-to-silicon bonding to form a sealed cavity. The second substrate is then used to form a piezoresistive film above the cavity. However, the Cavity-SOI process uses traditional SOI wafers, resulting in high manufacturing costs. Furthermore, it requires silicon-to-silicon bonding and thinning processes to form the piezoresistive film, making the manufacturing process complex and demanding on bonding techniques, while also making it difficult to guarantee the quality of the piezoresistive film.

[0003] While the SON structure avoids many problems inherent in the Cavity-SOI process, the thin film in the SON structure is prone to collapse, especially when the suspended area of ​​the film (i.e., the area suspended above the cavity, which is also the effective usable area of ​​the film) is large. This not only affects the reliability of the device but also makes it difficult to fabricate a larger effective usable area of ​​the film. Summary of the Invention

[0004] In view of this, the present application provides a method for fabricating a SON structure and a MEMS device to solve at least one problem existing in the background art.

[0005] In a first aspect, embodiments of this application provide a method for preparing a SON structure, the method comprising:

[0006] Provide substrate;

[0007] Multiple holes extending from the surface to the interior are formed on the substrate;

[0008] A first heat treatment is performed, during which substrate material migration occurs to form a top film layer, the top film layer sealing the upper openings of the plurality of holes so that the plurality of holes are correspondingly transformed into a plurality of sub-cavities;

[0009] Perform epitaxial growth to form an epitaxial layer on the top film layer;

[0010] A second heat treatment is performed, during which substrate material migration occurs again to connect the multiple sub-cavities into a cavity.

[0011] In conjunction with the first aspect of this application, in an alternative embodiment, the substrate is a silicon substrate.

[0012] In conjunction with the first aspect of this application, in an optional embodiment, the duration of the first heat treatment accounts for 40% to 60% of the sum of the durations of the first heat treatment and the second heat treatment.

[0013] In conjunction with the first aspect of this application, in an optional embodiment, the temperature of the first heat treatment and the temperature of the second heat treatment are the same.

[0014] In conjunction with the first aspect of this application, in an alternative embodiment, the plurality of said holes are arranged in an array.

[0015] In conjunction with the first aspect of this application, in an alternative embodiment, a plurality of holes extending from the surface to the interior are formed on the substrate, including:

[0016] A hard mask layer is formed on the surface of the substrate;

[0017] A patterned photoresist layer is formed on the hard mask layer;

[0018] Using the patterned photoresist layer as a mask, the hard mask layer is etched to expose multiple areas on the substrate where the holes are to be formed;

[0019] Using the hard mask layer as a mask, the substrate is etched to form a plurality of holes.

[0020] In conjunction with the first aspect of this application, in an optional embodiment, a plurality of the holes are distributed within a cavity to be formed area; the cavity to be formed area also includes a support column to be formed area;

[0021] After forming a plurality of holes extending from the surface to the interior on the substrate, no holes are formed in the area where the support pillar is to be formed, and the distance between two opposing boundary points of the area where the support pillar is to be formed is greater than the distance between two adjacent holes;

[0022] After the second heat treatment is performed, the substrate material in the area where the support pillar is to be formed is at least not completely migrated, thereby forming the support pillar, and the cavity surrounds the support pillar.

[0023] In conjunction with the first aspect of this application, in an alternative embodiment,

[0024] The number of support columns is one, and the support column is located at the geometric center of the cavity to be formed area; or...

[0025] The number of support columns is multiple, and the support columns are evenly distributed within the cavity to be formed area.

[0026] In conjunction with the first aspect of this application, in an alternative embodiment, the area of ​​the support column to be formed is greater than the sum of the areas of the four holes.

[0027] Secondly, embodiments of this application provide a MEMS device, which is fabricated using a MEMS device fabrication method, wherein the MEMS device fabrication method includes the steps of the SON structure fabrication method as described in any one of the first aspects.

[0028] The SON structure fabrication method and MEMS device provided in this application embodiment divide the cavity-forming heat treatment process into at least two steps: a first heat treatment and a second heat treatment. The state formed after the first heat treatment can be called an intermediate transition state. At this time, the substrate material has migrated, initially forming a top film layer that closes the upper openings of multiple holes, but the holes are not yet connected. In this way, on the one hand, the spacing between adjacent holes can provide support for the top film layer, preventing it from collapsing; on the other hand, the upper openings of multiple holes have been sealed by the top film layer, providing a growth basis for subsequent epitaxial growth. Next, epitaxial growth is performed to release the stress of the top film layer, and the bonding force between the epitaxial layer and the top film layer improves the structural stability. Then, the second heat treatment is performed, causing the substrate material to continue migrating, ultimately connecting the multiple sub-cavities into a single cavity. During this process, due to the bonding force between the epitaxial layer and the top film layer, even if the cavity area is large, film collapse is not easy to occur. Thus, the collapse problem is effectively solved, the reliability of the device is improved, and large-area SON structure fabrication can be achieved.

[0029] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0030] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0031] Figures 1 to 3 This is a cross-sectional schematic diagram of the SON structure during the fabrication process in related technologies;

[0032] Figure 4 A schematic flowchart illustrating the preparation method of the SON structure provided in this application embodiment;

[0033] Figures 5 to 11A cross-sectional schematic diagram of the SON structure provided in the embodiments of this application during the fabrication process;

[0034] Figure 12 This is a plan view showing the distribution of holes in one embodiment of this application;

[0035] Figure 13 This is a plan view showing the distribution of holes in another embodiment of this application;

[0036] Figure 14 To and Figure 13 A cross-sectional schematic diagram of the SON structure prepared according to another embodiment of this application. Detailed Implementation

[0037] Exemplary embodiments of the present application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present application and to fully convey the scope of the disclosure of the present application to those skilled in the art.

[0038] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, to avoid confusion with this application, some technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0039] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.

[0040] When an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. Although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this application.

[0041] Spatial relation terms such as “below,” “under,” “below,” “below,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. In addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below,” “below,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0042] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0043] To fully understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solution of this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.

[0044] Figures 1 to 3 A cross-sectional structural diagram of the SON structure during its fabrication process in related technologies is shown. First, as... Figure 1 As shown, deep hole etching is performed on substrate 100 to form multiple holes 1001 extending from the surface to the interior. This step can be referred to as forming porous silicon, with the multiple holes 1001 arranged in an array in the cavity to be formed area. Next, as... Figure 2 As shown, high-temperature annealing is performed to cause the substrate material spaced between the holes 1001 to migrate, forming a cavity 1003 and a thin film 1010' serving as the top wall of the cavity. Then, referring to... Figure 3 Epitaxial growth is performed on thin film 1010' to form epitaxial layer 110.

[0045] exist Figure 2 In the steps shown, the formed thin film 1010' is typically thin and has low mechanical strength. Furthermore, the thin film 1010' is formed through material migration, and the residual stress generated during the formation process is not effectively released. Since there is a cavity 1003 beneath the thin film 1010', the film 1010' is highly susceptible to collapse, especially when the suspended area is large. This not only affects the reliability of the device but also makes it difficult to fabricate a larger effective area for the thin film 1010', thus hindering the acquisition of large-area SON structures.

[0046] Based on this, this application provides a method for preparing a SON structure. Please refer to [link / reference]. Figure 4 The method includes:

[0047] S01, Provide a substrate;

[0048] S02, Forming multiple holes on the substrate that extend from the surface to the interior;

[0049] S03. Perform the first heat treatment, during which substrate material migration occurs to form a top film layer. The top film layer seals the upper openings of multiple holes so that the multiple holes become multiple sub-cavities.

[0050] S04. Perform epitaxial growth to form an epitaxial layer on the top film layer;

[0051] S05. Perform a second heat treatment. During the second heat treatment, substrate material migration occurs again to connect multiple sub-cavities into a cavity.

[0052] Understandably, the embodiments of this application divide the heat treatment process for forming the cavity into at least two steps: a first heat treatment and a second heat treatment. The state formed after the first heat treatment can be called an intermediate transition state. At this time, the substrate material has migrated, and a top film layer with multiple openings closed has been initially formed, but the openings of the openings are not yet connected. In this way, on the one hand, the spacing between adjacent openings can provide support for the top film layer, preventing it from collapsing; on the other hand, the openings of the multiple openings have been sealed by the top film layer, providing a growth basis for subsequent epitaxial growth. Next, epitaxial growth is performed to release the stress of the top film layer, and the bonding force between the epitaxial layer and the top film layer improves the structural stability. Then, the second heat treatment is performed, causing the substrate material to continue migrating, ultimately connecting the multiple sub-cavities into a cavity. During this process, due to the bonding force between the epitaxial layer and the top film layer, even if the cavity area is large, film collapse is not likely to occur. Thus, the collapse problem is effectively solved, the reliability of the device is improved, and the fabrication of large-area SON structures can be realized.

[0053] The fabricated SON structure can be further used to fabricate various MEMS devices. This application mainly uses a pressure sensor as an example for illustration; however, it should be understood that the SON structure can obviously also be used in other MEMS devices that include cavities and thin-film structures, such as microphones and speakers. In the pressure sensor, the thin film above the cavity is used as a piezoresistive film, and the quality of the piezoresistive film has a significant impact on the reliability of the device structure.

[0054] Next, combined Figures 5 to 11 The schematic diagram of the cross-sectional structure of the SON structure during the preparation process further illustrates the preparation method and beneficial effects of the SON structure provided in the embodiments of this application.

[0055] First, please refer to Figure 5 Substrate 100 is provided.

[0056] The substrate 100 can be a substrate composed of a single material layer, such as a silicon (Si) substrate or a germanium (Ge) substrate; or it can be a substrate composed of a stack of material layers, such as a silicon-on-insulator (SOI) substrate or a germanium-on-insulator (GeOI) substrate.

[0057] In one specific example, substrate 100 is a silicon substrate. This allows for the use of a bulk silicon substrate instead of a traditional SOI wafer, significantly reducing manufacturing costs.

[0058] Accordingly, substrate material migration occurs in subsequent steps, specifically silicon migration.

[0059] Furthermore, the silicon substrate is a single-crystal silicon substrate, so the top film layer formed by substrate material migration in subsequent steps is also a single-crystal film layer, and correspondingly, the epitaxial layer formed by epitaxial growth is also a single-crystal material layer. Of course, this application does not exclude the possibility that the substrate 100 is a single-crystal germanium substrate, etc. The embodiments of this application can not only realize the fabrication of large-area SON structures, but more importantly, can realize large-area single-crystal film layers, and then epitaxially grow large-area single-crystal material layers.

[0060] The substrate 100 includes an upper surface and a lower surface that are opposite each other in the thickness direction. The plane containing the upper and lower surfaces, or more precisely, the center plane in the thickness direction of the substrate, is defined as the substrate plane; the direction parallel to the substrate plane is the direction along the substrate plane. The thickness direction of the substrate is also the stacking direction of the subsequent material layers deposited on the substrate 100, or the height direction of the device.

[0061] According to design requirements, at least one cavity to be formed region 1100 is defined on substrate 100. Next, several holes will be formed in the cavity to be formed region 1100, and then the holes will be connected to form a cavity.

[0062] like Figures 5 to 8 As shown, forming a plurality of holes 1001 extending from the surface to the interior on a substrate 100 may include: forming a hard mask (HM) layer 200 on the substrate 100; forming a patterned photoresist layer (not shown) on the hard mask layer 200; etching the hard mask layer 200 using the patterned photoresist layer as a mask to expose a plurality of regions on the substrate 100 for which holes are to be formed; and etching the substrate 100 using the hard mask layer 200 as a mask to form a plurality of holes.

[0063] Specifically, the hard mask layer 200 is, for example, a silicon dioxide (SiO2) layer.

[0064] The hard mask layer 200 can be formed on the surface of the substrate 100 (specifically on the upper surface, or "front side") by a deposition process. Of course, it is also possible to form the hard mask layer 200 through processes such as thermal oxidation.

[0065] Based on the hard mask layer 200, it can better meet the needs of deep hole etching (specifically, deep silicon trench etching) and has better shape preservation effect.

[0066] like Figure 6As shown, the hard mask layer 200 is patterned to define the locations for forming the holes. In actual fabrication, photolithography can be used. Specifically, a photoresist layer is first coated on the hard mask layer 200; then, the photoresist layer is patterned through exposure and development; finally, using the patterned photoresist layer as a mask, the hard mask layer 200 is etched, thereby patterning the hard mask layer 200 and exposing multiple areas on the substrate 100 where holes are to be formed.

[0067] Next, as Figure 7 As shown, in the step of etching the substrate 100 using the patterned hard mask layer 200 as a mask, specific processes such as electrochemical etching and deep reactive ion etching can be used, and this application does not make specific limitations on this.

[0068] Multiple holes 1001 can be arranged in an array. The arrangement of the holes 1001 is periodic and regular; the distance between two adjacent holes can be equal; the shape of each hole 1001 can be the same, and the cross-sectional area can be equal. This helps to ensure that the reaction occurs synchronously and uniformly at each location during the process of substrate material migration to form cavities.

[0069] Please refer to Figure 12 and Figure 13 The cross-sectional shape of the hole 1001 can be circular; where cross-section refers to a section parallel to the plane of the substrate. In addition, the cross-sectional shape of the hole 1001 can also be other shapes such as square, rhombus, pentagon, hexagon, octagon, etc.

[0070] After forming multiple holes 1001, the process may further include a step of removing the remaining hard mask layer 200 from the surface of the substrate 100 (e.g., Figure 8 (As shown).

[0071] Next, please refer to Figure 9 The first heat treatment is performed, during which substrate material migration occurs to form a top film layer 1010. The top film layer 1010 closes the upper openings of the plurality of holes 1001 so that the plurality of holes 1001 are correspondingly transformed into a plurality of sub-cavities 1002.

[0072] The first heat treatment is specifically high-temperature annealing.

[0073] Understandably, compared to the direct formation of cavity 1003 through high-temperature annealing in related technologies, the embodiments of this application involve a "pause" in this process. The first heat treatment is a short-duration annealing with a duration less than the total time required for high-temperature annealing. After the first heat treatment, the upper opening of hole 1001 is initially sealed, but the gap between adjacent holes has not yet been completely migrated; the state formed after the first heat treatment is an intermediate transitional state in the substrate material migration process.

[0074] As an optional specific implementation, the duration of the first heat treatment accounts for 40% to 60% of the sum of the durations of the first heat treatment and the second heat treatment.

[0075] In the following text, the sum of the durations of the first heat treatment and the second heat treatment is referred to as the total heat treatment time. On the one hand, if the duration of the first heat treatment is less than 40% of the total heat treatment time, the top film layer 1010 may not have formed well, and the upper openings of the multiple pores 1001 may not be completely closed. If epitaxial growth is carried out in this state, it will be difficult to obtain an epitaxial layer of good quality. On the other hand, if the duration of the first heat treatment exceeds 60% of the total heat treatment time, the spacing between adjacent pores may have migrated completely, failing to provide sufficient support for the top film layer 1010, and there is still a risk of collapse.

[0076] The specific duration of the first and second heat treatments is related to factors such as the opening size of the hole 1001, the depth of the hole 1001, and the distance between adjacent holes. In actual preparation, the appropriate duration can be determined according to the actual situation.

[0077] As an optional specific implementation, the temperature of the first heat treatment is the same as the temperature of the second heat treatment. The temperature of the first heat treatment can be between 1000°C and 1200°C, which is beneficial to the occurrence and progress of substrate material migration.

[0078] As an optional embodiment, the reaction atmospheres for the first and second heat treatments are the same. As an optional embodiment, the pressures for the first and second heat treatments are also the same. Furthermore, the reaction conditions, including reaction temperature, reaction atmosphere, and pressure, are identical for both the first and second heat treatments. The first and second heat treatments essentially divide the heat treatment process in related technologies into at least two steps.

[0079] Next, please refer to Figure 10 Epitaxial growth is performed to form an epitaxial layer 110 on the top film layer 1010.

[0080] In one embodiment, the substrate 100 is a single-crystal substrate, the top film layer 1010 is a single-crystal film layer, and the epitaxial layer 110 is also a single-crystal epitaxial layer. Specifically, for example, the substrate 100 is a single-crystal silicon substrate, the top film layer 1010 is a single-crystal silicon film layer, and the epitaxial layer 110 is a single-crystal silicon layer. The epitaxial layer 110 can be directly used for subsequent device manufacturing, resulting in a high degree of simplification in the process flow integration.

[0081] The bonding force between the epitaxial layer 110 and the top film layer 1010 effectively prevents the collapse of large-area films, releases stress, and improves the stability and reliability of the structure. The pressure sensor fabricated based on this method can achieve a significant increase in effective sensing area, enhancing the device's response to micro-pressure changes. Therefore, the method provided in this application embodiment can be used to manufacture devices with higher sensitivity.

[0082] Next, please refer to Figure 11 A second heat treatment is performed, during which substrate material migration occurs again, so that the multiple sub-cavities 1002 are connected to form a cavity 1003.

[0083] The second heat treatment is also a high-temperature annealing process.

[0084] Cavity 1003 is specifically a vacuum cavity.

[0085] Understandably, by continuing annealing, the top film layer 1010 is formed into a continuous thin film, and a complete cavity structure is formed below the top film layer 1010, thus ultimately forming a completely cavity SON structure.

[0086] This application utilizes the intermediate transition state of substrate material migration to perform epitaxial growth first, followed by annealing, thereby releasing the stress of the large-area thin film and improving structural reliability. The cavity can be formed without bonding technology, simplifying the process flow. By using substrate material migration technology and epitaxial growth technology, a continuous thin film with controllable thickness and a high-performance cavity are formed. When further fabricating devices, the electrical performance is good and the self-heating effect can be effectively eliminated. Specifically, for pressure sensors, the film thickness is thinner and more uniform, making it suitable for manufacturing devices with small range and high precision.

[0087] Please refer to Figure 12 In one embodiment of this application, holes 1001 can be arranged throughout the entire cavity to be formed area 1100. In addition, this application provides another embodiment, please refer to... Figure 13 and Figure 14 Multiple holes 1001 are distributed within the cavity to be formed region 1100; the cavity to be formed region 1100 also includes a support pillar to be formed region 1101; after multiple holes 1001 extending from the surface to the interior are formed on the substrate 100, no holes are formed in the support pillar to be formed region 1101, and the distance between two opposing boundary points of the support pillar to be formed region 1101 is greater than the distance between two adjacent holes; after performing the second heat treatment, the substrate material at the support pillar to be formed region 1101 is at least not completely migrated, thereby forming a support pillar 1004, and the cavity 1003 surrounds the support pillar 1004.

[0088] Understandably, by retaining a portion of the area within the cavity to be formed region 1100 where substrate material migration cannot be completed, a support pillar 1004 is formed, which can provide support below the top film layer 1010, further preventing collapse and facilitating the fabrication of larger area SON structures.

[0089] Specifically, the projection of the support pillar to be formed area 1101 on the substrate plane falls within the range of the projection of the cavity to be formed area 1100 on the substrate plane, thereby ensuring that the subsequently formed support pillar 1004 is located within the cavity 1003.

[0090] The distance between two opposing boundary points of the support pillar to be formed area 1101 is greater than the distance between two adjacent holes. Specifically, "opposite" means relative to the geometric center of the support pillar to be formed area 1101. Taking a rectangular support pillar to be formed area 1101 as an example, the two opposing boundary points are points on opposite sides of the rectangle; the distance between the two closest opposing boundary points is the distance between opposite sides of the rectangle. If the support pillar to be formed area 1101 is circular, the distance between two opposing boundary points is the diameter of the circle. This distance is greater than the distance between two adjacent holes, thus ensuring that some substrate material is retained within the support pillar to be formed area 1101 even when the gap between adjacent holes has been completely migrated.

[0091] As one optional implementation, the number of support columns 1004 is one, and the support column 1004 is located at the geometric center of the cavity to be formed area 1100. As another optional implementation, the number of support columns 1004 is multiple, and the support columns 1004 are evenly distributed within the cavity to be formed area 1100. In this way, a uniform support effect can be achieved within the cavity 1003.

[0092] Please continue to refer to this. Figure 13 In one specific implementation, the area of ​​the support column to be formed region 1101 is greater than the sum of the areas of the four holes 1001. Understandably, due to material migration, the cross-sectional area of ​​the final formed support column 1004 will be smaller than the area of ​​the initially designed support column to be formed region 1101. Setting the area of ​​the support column to be formed region 1101 to be greater than the sum of the areas of the four holes 1001 helps to ensure that a support column 1004 with sufficient support can be formed in the end.

[0093] Based on this, the present application also provides a method for fabricating a MEMS device, which includes the steps of the SON structure fabrication method described in any of the foregoing embodiments.

[0094] Taking a MEMS device as a pressure sensor as an example, after performing step S05, the process may further include ion doping to form a piezoresistive film. Furthermore, conductive lead-out structures may be formed further until the fabrication of the pressure sensor is complete.

[0095] Based on this, the present application also provides a MEMS device, which is fabricated using a MEMS device fabrication method, including the steps in the SON structure fabrication method described in any of the foregoing embodiments.

[0096] In this way, MEMS devices can have higher reliability; the thin film located on the cavity can have a larger effective utilization area, thereby meeting higher performance requirements of MEMS devices.

[0097] It should be understood that the above embodiments are exemplary and not intended to encompass all possible implementations. Various modifications and changes can be made to the above embodiments without departing from the scope of this disclosure. Similarly, the various technical features of the above embodiments can be arbitrarily combined to form other embodiments of this application that may not be explicitly described. Therefore, the above embodiments only illustrate several implementations of this application and do not limit the scope of protection of this patent application.

Claims

1. A method for preparing a SON structure, characterized in that, The method includes: A substrate is provided, wherein the substrate is a single-crystal substrate; Multiple holes extending from the surface to the interior are formed on the substrate; A first heat treatment is performed, during which substrate material migration occurs to form a top film layer. The top film layer closes the upper openings of the plurality of holes so that the plurality of holes are correspondingly transformed into a plurality of sub-cavities. The top film layer is a single crystal film layer. Epitaxial growth is performed to form an epitaxial layer on the top film layer, the epitaxial layer being a single-crystal epitaxial layer; A second heat treatment is performed, during which substrate material migration occurs again to connect the multiple sub-cavities into a cavity.

2. The method for preparing the SON structure according to claim 1, characterized in that, The substrate is a silicon substrate.

3. The method for preparing the SON structure according to claim 1, characterized in that, The duration of the first heat treatment accounts for 40% to 60% of the sum of the durations of the first heat treatment and the second heat treatment.

4. The method for preparing the SON structure according to claim 1, characterized in that, The temperature of the first heat treatment is the same as the temperature of the second heat treatment.

5. The method for preparing the SON structure according to claim 1, characterized in that, The multiple holes are arranged in an array.

6. The method for preparing the SON structure according to claim 1, characterized in that, A plurality of holes extending from the surface to the interior are formed on the substrate, including: A hard mask layer is formed on the surface of the substrate; A patterned photoresist layer is formed on the hard mask layer; Using the patterned photoresist layer as a mask, the hard mask layer is etched to expose multiple areas on the substrate where the holes are to be formed; Using the hard mask layer as a mask, the substrate is etched to form a plurality of holes.

7. The method for preparing the SON structure according to claim 1, characterized in that, Multiple holes are distributed within the cavity to be formed area; the cavity to be formed area also includes a support column to be formed area; After forming a plurality of holes extending from the surface to the interior on the substrate, no holes are formed in the area where the support pillar is to be formed, and the distance between two opposing boundary points of the area where the support pillar is to be formed is greater than the distance between two adjacent holes; After the second heat treatment is performed, the substrate material in the area where the support pillar is to be formed is at least not completely migrated, thereby forming the support pillar, and the cavity surrounds the support pillar.

8. The method for preparing the SON structure according to claim 7, characterized in that, The number of support columns is one, and the support column is located at the geometric center of the cavity to be formed area; or... The number of support columns is multiple, and the support columns are evenly distributed within the cavity to be formed area.

9. The method for preparing the SON structure according to claim 7, characterized in that, The area of ​​the support column to be formed is greater than the sum of the areas of the four holes.

10. A MEMS device, characterized in that, The device is fabricated using a MEMS device fabrication method, which includes the steps of the SON structure fabrication method as described in any one of claims 1 to 9.

Images