Package substrate and manufacturing method thereof

Abstract

A package substrate and a manufacturing method thereof are provided, the package substrate including a core board body having a through hole penetrating through two surfaces; the insulating layers are formed on the two opposite surfaces of the core board body and in the through holes, and are provided with through holes formed corresponding to the through holes; the hollow conductive column is formed in the through hole; the hole plugging material is formed in the hollow conductive column; the circuit layers are formed on the insulating layers on the two opposite surfaces of the core board body and are electrically connected with the hollow conductive columns; and the wiring structure is arranged on the insulating layer and the circuit layer on the two opposite surfaces of the core board body and is electrically connected with the circuit layer. By using the high-rigidity core board body covered with the insulating layer, the packaging substrate which is low in warping degree, high in dimensional stability and good in adhesive force of the circuit layer can be manufactured.

Description

Technical Field

[0001] This invention relates to a semiconductor packaging technology, and more particularly to a packaging substrate with low warpage and high dimensional stability and its manufacturing method. Background Technology

[0002] With the booming development of the electronics industry, electronic products are becoming thinner and smaller in form, and are moving towards high performance, high functionality, and high speed in terms of function. Therefore, in order to meet the requirements of high integration and miniaturization of semiconductor devices, packaging substrates with designs such as thinness, low warpage, and high-density wiring are often used in packaging processes.

[0003] Due to differences in the coefficient of thermal expansion (CTE) and residual thermal stress, existing organic substrates are prone to warping, bending, or other deformations during processing. To improve the warping problem, a high-rigidity material with excellent heat resistance and bending resistance can be selected as the core board to enhance the mechanical strength of the core substrate and reduce the degree of warping and expansion / contraction deformation.

[0004] However, these materials are brittle and prone to cracking after through-holes are formed, affecting structural stability. Furthermore, hard materials such as glass and ceramics have high surface smoothness, which leads to poor metal adhesion when patterning the substrate surface, making the circuit layer processing difficult and requiring high-precision production technology and equipment. Current technology is still not conducive to reducing manufacturing costs.

[0005] Therefore, overcoming the various problems of the existing technologies has become an urgent issue to be addressed. Summary of the Invention

[0006] The purpose of this invention is to provide a packaging substrate and its manufacturing method to solve at least one of the above-mentioned problems.

[0007] In view of the deficiencies of the prior art, this disclosure provides a packaging substrate, comprising: a core plate having opposing first and second surfaces and a plurality of through holes penetrating the first and second surfaces; an insulating layer formed on the first and second surfaces of the core plate and in the plurality of through holes, wherein the insulating layer has a plurality of through holes corresponding to each of the through holes; a plurality of hollow conductive pillars respectively formed in each of the through holes; a via plug formed in the plurality of hollow conductive pillars; a circuit layer formed on the insulating layer of the first and second surfaces of the core plate and electrically connected to the plurality of hollow conductive pillars; and a wiring structure disposed on the insulating layer and the circuit layer of the first and second surfaces of the core plate and electrically connected to the circuit layer.

[0008] This disclosure also provides a method for manufacturing a packaging substrate, comprising: providing a core plate having opposing first and second surfaces, and forming a plurality of through holes penetrating the first and second surfaces of the core plate; forming an insulating layer on the first and second surfaces of the core plate and in the plurality of through holes, and forming a plurality of through holes in the insulating layer corresponding to each of the through holes; forming hollow conductive pillars in the plurality of through holes; forming via plugs in the hollow conductive pillars; forming a circuit layer on the insulating layer on the first and second surfaces of the core plate, and electrically connecting the circuit layer to the hollow conductive pillars; and forming a wiring structure on the insulating layer and the circuit layer on the first and second surfaces of the core plate, and electrically connecting the wiring structure to the circuit layer.

[0009] In a specific embodiment of the aforementioned method for manufacturing the packaging substrate, the method for forming the insulating layer includes: providing two single-sided copper-clad laminates, wherein each single-sided copper-clad laminate includes a semi-cured insulating material and a copper foil formed on one side of the insulating material; pressing the two single-sided copper-clad laminates to the first and second surfaces of the core board with their semi-cured insulating material sides, and causing the semi-cured insulating material to fill the plurality of through holes; curing the semi-cured insulating material to form the insulating layer; and etching to remove the copper foil of the single-sided copper-clad laminate.

[0010] In a specific embodiment of the aforementioned method for manufacturing the packaging substrate, the method for forming the insulating layer includes: forming a semi-cured insulating material on a first surface and a second surface of the core plate; pressing two copper foils on both sides of the semi-cured insulating material so that the semi-cured insulating material fills the plurality of through holes; curing the semi-cured insulating material to form the insulating layer; and etching to remove the copper foils.

[0011] In a specific embodiment of the aforementioned packaging substrate and its manufacturing method, the material forming the core plate is glass, ceramic, silicon carbide (SiC), AlO2, bismaleimide triazine (BT), or a composite material with a Young's modulus of 50 to 100 GPa.

[0012] In one specific embodiment of the aforementioned packaging substrate and its manufacturing method, the insulating layer comprises a glass fiber prepreg (PP).

[0013] In a specific embodiment of the aforementioned packaging substrate and its manufacturing method, the glass fiber prepreg (PP) contains epoxy groups and has a coefficient of thermal expansion (CTE) of ≥2ppm / ℃.

[0014] In a specific embodiment of the aforementioned packaging substrate and its manufacturing method, the thickness of the insulating layer formed on the first surface, the second surface, and the multiple perforation walls of the core board is ≥50μm.

[0015] In one specific embodiment of the aforementioned packaging substrate and its manufacturing method, the via material comprises an ink material.

[0016] In a specific embodiment of the aforementioned packaging substrate and its manufacturing method, the ink material has a viscosity of 25 to 55 Pa·s, a glass transition temperature (Tg) of 145 to 180°C, and a Young's modulus of ≥3 GPa.

[0017] In one specific embodiment of the aforementioned packaging substrate and its manufacturing method, a solder resist layer formed on the wiring structure is also included.

[0018] As can be seen from the above, this disclosure uses materials such as glass as the core plate, which has stable rigidity (high toughness), low coefficient of thermal expansion, high mechanical strength and stable dimensional change, thus reducing the risk of warping or deformation of the core plate during processing.

[0019] Furthermore, to address the potential for cracks to appear in high-hardness substrates during the through-hole process, this disclosure uses an insulating material such as glass fiber prepreg (PP) formed on the surface of the core board and within multiple through-holes as a surface cover layer, which can prevent cracks from continuing to propagate and thus damaging the substrate. Therefore, the insulating layer of this disclosure can protect the substrate structure and prevent the substrate from cracking.

[0020] Furthermore, unlike existing methods that directly plate metal onto a rigid substrate and may cause delamination issues, this disclosure utilizes a patterning process on an insulating layer covering the core board surface. Because the insulating layer exhibits excellent adhesion to the core board, the risk of delamination is reduced, and the structural stability of the circuit layers is improved. Moreover, since multiple through-hole walls are also covered by the insulating layer, hollow conductive pillars can be fabricated on the insulating layer surface using conventional electroplating through-hole processes, eliminating the need for additional metallization of the core board's hole sidewalls. Attached Figure Description

[0021] Figures 1A to 1F This is a cross-sectional schematic diagram of the manufacturing method of the packaging substrate disclosed herein.

[0022] The attached figures are labeled as follows:

[0023] 1 Packaging substrate

[0024] 10 Core Plate

[0025] 10a First Surface

[0026] 10b Second Surface

[0027] 100 perforations

[0028] 11 insulation layers

[0029] 11a Insulation Material

[0030] 110 Through Hole

[0031] 12 Copper Foil

[0032] 13 Hollow conductive pillars

[0033] 14. Hole-plugging material

[0034] 15. Line layer

[0035] 16. Wiring Structure

[0036] 161 Dielectric layer

[0037] 162 Wiring Layer

[0038] 163 Conductive blind via

[0039] 17. Solder resist layer

[0040] 170mm opening. Detailed Implementation

[0041] The following specific embodiments illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification.

[0042] It should be understood that the structures, proportions, sizes, etc., shown in the accompanying drawings are only for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the implementation conditions of this disclosure. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to the size, without affecting the effectiveness and purpose of this disclosure, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of this disclosure. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this disclosure's implementation.

[0043] Figures 1A to 1F This is a cross-sectional schematic diagram of the manufacturing method of the packaging substrate 1 disclosed herein.

[0044] like Figure 1A As shown, a core plate 10 is provided, having a first surface 10a and a second surface 10b opposite to each other. A plurality of through holes 100 are formed in the core plate 10, penetrating the first surface 10a and the second surface 10b.

[0045] In this embodiment, the core plate 10 is made of a high-hardness dielectric material, such as glass, ceramic, silicon carbide (SiC), AlO2, bismaleimide triazine (BT), or a high-rigidity composite material with a Young's modulus of 50 to 100 GPa. Furthermore, multiple through-holes 100 can be formed by penetrating the first surface 10a and the second surface 10b of the core plate 10 through methods such as laser ablation, hydrofluoric acid (HF) etching, plasma etching, or mechanical drilling.

[0046] like Figure 1B As shown, an insulating material 11a with copper foil 12 on both sides is formed on the first surface 10a and the second surface 10b of the core plate 10, and the insulating material 11a is filled into the plurality of perforations 100.

[0047] In one specific embodiment, two single-sided copper-clad laminates are first provided. Each single-sided copper-clad laminate includes a semi-cured insulating material 11a and a copper foil 12 formed on one side of the semi-cured insulating material 11a. The two single-sided copper-clad laminates are respectively pressed onto the first surface 10a and the second surface 10b of the core plate 10 with their semi-cured insulating material 11a sides, and the semi-cured insulating material 11a fills the plurality of perforations 100 by laminating the copper foil 12.

[0048] In another specific embodiment, a semi-cured insulating material 11a is first formed on the first surface 10a and the second surface 10b of the core plate 10, and then two copper foils 12 are pressed onto both sides of the semi-cured insulating material 11a. The semi-cured insulating material 11a fills the plurality of perforations 100 by laminating the copper foils 12.

[0049] Furthermore, the material of the insulating material 11a forming the semi-cured state can be a glass fiber prepreg (PP), which may contain epoxy groups and has a coefficient of thermal expansion (CTE) in the range of 2 ppm / ℃.

[0050] like Figure 1C As shown, the semi-cured insulating material 11a is cured to form an insulating layer 11, and the copper foil 12 is etched away. Then, a plurality of through holes 110 are formed corresponding to each of the perforations 100 in the insulating layer 11.

[0051] In this embodiment, the copper foil 12 provides good structural support during the formation of the insulating layer 11, ensuring that the semi-cured insulating material 11a forms a tightly pressed insulating layer 11 after curing. Furthermore, the lamination of the copper foil 12 ensures that the insulating layer 11 has a smooth surface after curing, which is beneficial for the formation of subsequent circuits.

[0052] Furthermore, the resin in the semi-cured insulating material 11a can be cured by baking, heating, or photocuring to form an insulating layer 11 that covers the first surface 10a and the second surface 10b of the core plate 10 and fills the plurality of perforations 100. After the insulating layer 11 has cured, the copper foil 12 can be etched away to expose the surface of the insulating layer 11, which facilitates the second hole formation operation.

[0053] In this embodiment, a plurality of through holes 110 corresponding to each of the perforations 100 can be formed in the insulating layer 11 by means such as laser or mechanical drilling. The hole shapes of the plurality of through holes 110 and the plurality of perforations 100 can be the same or different.

[0054] In addition, the thickness of the insulation layer 11 can be adjusted according to the type of prepreg material. However, in order to facilitate the formation of subsequent circuits and to avoid cracking of the walls of the multiple perforations 100, the thickness of the insulation layer 11 formed on the first and second surfaces of the core plate 10 and the walls of the perforations 100 must be ≥50μm to protect the core plate 10 and provide a flat surface with high stability.

[0055] like Figure 1D As shown, hollow conductive pillars 13 are formed in each of the through holes 110, and plugging materials 14 are formed in each of the hollow conductive pillars. Next, a patterning process is performed to form a circuit layer 15 on the insulating layer 11 of the first and second surfaces of the core board 10 by copper plating or other methods.

[0056] In this embodiment, a metal layer, such as copper, can be formed in the plurality of through holes 110 and on the surface of the core plate 10 by sputtering, electroless plating, or other methods. The metal layer in the plurality of through holes 110 serves as a hollow conductive pillar 13, and the metal layer on the surface of the core plate 10 serves as a seed layer (not shown). The seed layer located on the first surface 10a and the second surface 10b of the core plate 10 is patterned and thickened by electroplating a metal material (e.g., copper) as needed to form a circuit layer 15, and the circuit layer 15 is electrically connected to the plurality of hollow conductive pillars 13 in the plurality of through holes 110.

[0057] Furthermore, the plugging material 14 can be formed using ink materials formed by filling methods such as injection, plugging, or coating. This ink material is mainly composed of epoxy ink composites and has physical properties such as a viscosity of 25 to 55 Pa·s, a glass transition temperature (Tg) of 145 to 180°C, and / or a Young's modulus ≥ 3 GPa. Further, this ink material can be cured by heating at 180°C for 2 hours to form the plugging material 14.

[0058] like Figure 1EAs shown, an additive layering operation is performed to form a wiring structure 16 electrically connected to the wiring layer 15 on the insulating layer 11 and the wiring layer 15 on the first surface 10a and the second surface 10b of the core board 10.

[0059] In this embodiment, the wiring structure 16 includes at least one dielectric layer 161 formed on the insulating layer 11, at least one wiring layer 162 formed on the dielectric layer 161, and at least one conductive blind via 163 formed in the dielectric layer 161. The wiring layer 162 is electrically connected to the circuit layer 15 through the conductive blind via 163. For example, the wiring structure 16 is fabricated using a redistribution layer (RDL) specification by means of electroplating metal (such as copper) through a build-up process.

[0060] It should be understood that, using the layer-addition method, the number of layers in this wiring structure 16 can be designed according to requirements, and is not limited to... Figure 1E The dielectric layer 161 shown is shown.

[0061] Furthermore, the dielectric layer 161 may be made of the same material as the insulating layer 11, such as a glass fiber prepreg (PP), but is not limited to this.

[0062] like Figure 1F As shown, a solder resist layer 17 is formed on the outermost side of the wiring structure 16 to form the packaging substrate 1.

[0063] In this embodiment, a portion of the surface of the wiring layer 162 exposes the solder resist layer 17 to serve as an electrical contact pad. For example, a plurality of openings 170 are formed on the solder resist layer 17 to expose the wiring layer 162 on the conductive blind via 163.

[0064] Therefore, this disclosure uses a hard material such as glass as the core plate 10, which has the characteristics of high rigidity (toughness), low coefficient of thermal expansion, high mechanical strength and stable dimensional change, thus reducing the risk of warping or deformation of the core plate during processing.

[0065] Furthermore, this disclosure uses an insulating material 11a, such as a glass fiber prepreg (PP), formed on the surface of the core plate 10 and in the multiple perforations 100 as a surface cover layer. This prevents cracks generated when the multiple perforations 100 are formed in the core plate 10 from continuing to expand and thus damaging the encapsulation substrate 1. Therefore, the insulating layer 11 of this disclosure can protect the substrate structure and prevent the encapsulation substrate 1 from cracking due to cracks.

[0066] Furthermore, the patterned circuit layer 15 of this disclosure is formed on the insulating layer 11 covering the surface of the core board 10. Because the insulating layer 11 has excellent adhesion to the core board 10, the risk of delamination can be reduced, and the structural stability of the circuit layer 15 can be improved. Moreover, since the walls of the multiple through holes 100 are also covered by the insulating layer 11, hollow conductive pillars 13 can be fabricated on the surface of the insulating layer 11 using conventional electroplating through-hole processes, without the need for additional metallization of the hole sidewalls of the core board 10.

[0067] This disclosure also provides a packaging substrate 1, including: a core board 10, an insulating layer 11, a plurality of hollow conductive pillars 13, a via material 14, a circuit layer 15, and a wiring structure 16.

[0068] The core plate 10 has a first surface 10a and a second surface 10b opposite to each other and a plurality of through holes 100 penetrating the first surface 10a and the second surface 10b.

[0069] The insulating layer 11 is formed on the first and second surfaces of the core plate 10 and in a plurality of perforations 100, and the insulating layer 11 has a plurality of through holes 110 corresponding to each of the perforations 100.

[0070] The plurality of hollow conductive pillars 13 are respectively formed in each of the through holes 110.

[0071] The plugging material 14 is formed in the hollow conductive post 13.

[0072] The circuit layer 15 is formed on the insulating layer 11 of the first and second surfaces of the core plate 10 and is electrically connected to the plurality of hollow conductive pillars 13.

[0073] The wiring structure 16 is disposed on the insulating layer 11 and the circuit layer 15 on the first and second surfaces of the core board 10 and is electrically connected to the circuit layer 15.

[0074] In one embodiment, the core plate 10 is formed of glass, ceramic, silicon carbide (SiC), AlO2, bismaleimide triazine (BT), or a composite material with a Young's modulus of 50 to 100 GPa.

[0075] In one embodiment, the insulating layer 11 comprises a glass fiber prepreg (PP).

[0076] In one embodiment, the glass fiber prepreg (PP) contains epoxy groups and has a coefficient of thermal expansion (CTE) of ≥2ppm / ℃.

[0077] In one embodiment, the insulation layer 11 formed on the first and second surfaces of the core plate 10 and the wall of the perforation 100 has a thickness of ≥50μm.

[0078] In one embodiment, the plugging material 14 comprises an ink material.

[0079] In one embodiment, the ink material has a viscosity of 25 to 55 Pa·s, a glass transition temperature (Tg) of 145 to 180°C, and a Young's modulus of ≥3 GPa.

[0080] In one embodiment, a solder resist layer 17 formed on the wiring structure 16 is also included.

[0081] In summary, this disclosure achieves low warpage and high dimensional stability by using a high-rigidity core board combined with an insulating layer, while also preventing the packaging substrate from cracking and ensuring excellent adhesion of the circuit layers, thus solving common problems in rigid substrate processing.

[0082] The above embodiments are illustrative of the principles and effects of this disclosure and are not intended to limit this disclosure. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this disclosure. Therefore, the scope of protection of this disclosure should be as set forth in the claims.

Claims

1. A packaging substrate, characterized in that, include: The core plate has a first surface and a second surface opposite each other and a plurality of perforations passing through the first surface and the second surface; An insulating layer is formed on the opposing first and second surfaces of the core plate and in a plurality of perforations, and the insulating layer has a plurality of through holes corresponding to each of the perforations; Multiple hollow conductive pillars are formed in each of the through holes; The plugging material is formed in the plurality of hollow conductive pillars; A circuit layer is formed on the insulating layers of the opposing first and second surfaces of the core plate and electrically connects the plurality of hollow conductive pillars. as well as The wiring structure is disposed on the insulation layer and the circuit layer on the first and second surfaces of the core board and is electrically connected to the circuit layer.

2. The packaging substrate as described in claim 1, characterized in that, The core plate is made of glass, ceramic, silicon carbide, AlO2, bismaleimide triazine, or a composite material with a Young's modulus of 50 to 100 GPa. The insulation layer includes a glass fiber prepreg and the insulation layer thickness formed on the opposite first and second surfaces of the core plate and on the multiple perforated walls is ≥50 μm.

3. The packaging substrate as described in claim 2, characterized in that, The fiberglass prepreg contains epoxy groups and has a coefficient of thermal expansion of ≥2ppm / ℃.

4. The packaging substrate as described in claim 1, characterized in that, The via plug material includes an ink material with a viscosity of 25 to 55 Pa·s, a glass transition temperature of 145 to 180°C and a Young's modulus of ≥3 GPa, and the packaging substrate also includes a solder resist layer formed on the wiring structure.

5. A method for manufacturing a packaging substrate, characterized in that, include: A core plate having opposing first and second surfaces is provided, and a plurality of perforations are formed through the first and second surfaces of the core plate. An insulating layer is formed on the opposing first and second surfaces of the core plate and in a plurality of perforations, and a plurality of through holes are formed in the insulating layer corresponding to each of the perforations; Hollow conductive pillars are formed in each of the through holes; A plugging material is formed in the hollow conductive pillar; A circuit layer is formed on the insulating layer of the opposite first and second surfaces of the core board, and the circuit layer is electrically connected to the hollow conductive pillar. as well as A wiring structure is formed on the insulating layer and circuit layer of the opposite first and second surfaces of the core board, and the wiring structure is electrically connected to the circuit layer.

6. The method for manufacturing the packaging substrate as described in claim 5, characterized in that, The method for forming the insulating layer includes: Two single-sided copper-clad laminates are provided, wherein each single-sided copper-clad laminate includes a semi-cured insulating material and a copper foil formed on one side of the semi-cured insulating material; Two single-sided copper-clad laminates are pressed together with their semi-cured insulating material sides onto the opposing first and second surfaces of the core board, and the semi-cured insulating material is filled into the plurality of perforations. Curing the semi-cured insulating material to form the insulating layer; and The copper foil on the single-sided copper-clad laminate is removed by etching.

7. The method for manufacturing the packaging substrate as described in claim 5, characterized in that, The method for forming the insulating layer includes: A semi-cured insulating material is formed on the opposing first and second surfaces of the core plate. Two copper foils are pressed onto both sides of the semi-cured insulating material so that the semi-cured insulating material fills the multiple perforations; Curing the semi-cured insulating material to form the insulating layer; and The copper foil was removed by etching.

8. The method for manufacturing the packaging substrate as described in claim 5, characterized in that, The core plate is made of glass, ceramic, silicon carbide, AlO2, bismaleimide triazine, or a composite material with a Young's modulus of 50 to 100 GPa. The insulation layer includes a glass fiber prepreg and the insulation layer thickness formed on the opposite first and second surfaces of the core plate and on the multiple perforated walls is ≥50 μm.

9. The method for manufacturing the packaging substrate as described in claim 8, characterized in that, The fiberglass-coated prepreg contains epoxy groups and has a coefficient of thermal expansion of 2 ppm / ℃.

10. The method for manufacturing the packaging substrate as described in claim 5, characterized in that, The plugging material includes an ink material with a viscosity of 25 to 55 Pa·s, a glass transition temperature of 145 to 180°C, and a Young's modulus of ≥3 GPa. The manufacturing method also includes forming a solder resist layer on the wiring structure.

Images