Voltage regulating circuit, voltage regulating method and display panel

Abstract

The application belongs to the technical field of display driving, and particularly relates to a voltage adjusting circuit, a voltage adjusting method and a display panel. The voltage adjusting circuit comprises a data detection module, which is used for acquiring previous frame gray scale data and current frame gray scale data corresponding to two adjacent frames of display pictures; a data comparison module, which is used for comparing the previous frame gray scale data and the current frame gray scale data to determine whether there is a highlight dynamic area; and when it is determined that there is a highlight dynamic area, a first trigger signal is output through a first output end of the data comparison module; and a first adjusting module, which is used for generating a target gamma voltage according to an output voltage of an adjusting voltage end under the action of the first trigger signal, so that a source driving chip generates an overdrive voltage according to the target gamma voltage. Therefore, the application solves the problem of slow gray scale response time from an arbitrary gray scale to a highest brightness gray scale.

Description

Technical Field

[0001] This disclosure belongs to the field of display driving technology, specifically relating to a voltage regulation circuit, a voltage regulation method, and a display panel. Background Technology

[0002] The gray-to-gray (GTG) response time of an LCD monitor refers to the time required for a pixel to switch from one color to another. It includes rise time (dark to bright) and fall time (bright to dark) and is a key indicator for measuring the smoothness of dynamic images, directly affecting the degree of ghosting and operation lag. Although the current mainstream IPS (In-Plane Switching) products have advantages in color and contrast, their gray-to-gray response time is still difficult to meet the needs of high-end gaming monitors.

[0003] Currently, grayscale response time is improved by applying an overshoot voltage higher than the target grayscale (i.e., overdrive technology) to accelerate the deflection of liquid crystal molecules. However, due to the limitation of the maximum driving voltage, the response time cannot be improved by existing overdrive technology when switching any grayscale to the highest grayscale (i.e., grayscale 255).

[0004] Therefore, improving the grayscale response time from any grayscale level to the highest grayscale level is an urgent problem to be solved. Summary of the Invention

[0005] This application provides a voltage regulation circuit, a voltage regulation method, and a display panel, which solves the problem of slow grayscale response time from any grayscale to the highest brightness grayscale.

[0006] In a first aspect, this application provides a voltage regulation circuit, comprising: a data detection module, the input terminal of which is connected to a graphics processor, for acquiring grayscale data of the previous frame and the current frame corresponding to two adjacent display frames; and a data comparison module, the input terminal of which is connected to the output terminal of the data detection module, for comparing the grayscale data of the previous frame and the grayscale data of the current frame to determine whether a bright dynamic region exists; and, upon determining that the bright dynamic region exists, outputting a first trigger signal through the first output terminal of the data comparison module; wherein, the... The high-brightness dynamic region refers to the set of pixels where more than a preset number of pixels switch from any gray level to the highest brightness gray level; the first adjustment module, the control terminal of the first adjustment module is connected to the first output terminal of the data comparison module, the power supply terminal of the first adjustment module is connected to the adjustment voltage terminal, and the output terminal of the first adjustment module is connected to the input terminal of the source driver chip, used to generate a target gamma voltage according to the output voltage of the adjustment voltage terminal under the action of the first trigger signal, so that the source driver chip generates an overdrive voltage according to the target gamma voltage; wherein, the target gamma voltage is greater than the maximum drive voltage in the gamma chip.

[0007] Optionally, the data comparison module is further configured to output the first trigger signal through the second output terminal of the data comparison module when it is determined that the high-brightness dynamic region does not exist; the voltage adjustment circuit further includes: a second adjustment module, the control terminal of the second adjustment module is connected to the second output terminal of the data comparison module, the power supply terminal of the second adjustment module is connected to the gamma chip, and the output terminal of the second adjustment module is connected to the input terminal of the source driver chip, configured to output the maximum driving voltage to the source driver chip under the action of the first trigger signal.

[0008] Optionally, the data detection module includes: a data input interface for electrical connection with the graphics processor; a data conversion unit, the input of which is connected to the data input interface, for converting serial data of two adjacent frames of display output by the graphics processor into parallel pixel data streams of the previous frame and the current frame; a grayscale extraction unit, the input of which is connected to the output of the data conversion unit, for performing grayscale extraction on the pixel data streams of the previous frame and the current frame to obtain grayscale data of the previous frame and the current frame; and a data buffer, the data buffer being connected to the output of the grayscale extraction unit, for storing the grayscale data of the previous frame and the grayscale data of the current frame.

[0009] Optionally, the data comparison module includes: a digital subtractor, the input of which is connected to the output of the data detection module, for calculating the grayscale difference of pixels at the same position based on the grayscale data of the previous frame and the grayscale data of the current frame; a first threshold comparator, the input of which is connected to the output of the digital subtractor, for determining whether the grayscale difference is greater than or equal to a first threshold; a second threshold comparator, the input of which is connected to the output of the data detection module, for determining whether the grayscale value of each pixel in the grayscale data of the current frame is greater than or equal to a second threshold; and a logic controller, the first input of which is connected to the output of the first threshold comparator, and the second input of which is connected to the output of the second threshold comparator, for determining whether the grayscale difference is greater than or equal to the first threshold and the grayscale value of the same pixel is greater than a second threshold. When the total value is greater than or equal to the second threshold, the output logic control level is calculated; a digital adder, the input of which is connected to the output of the logic controller, is used to calculate the total value of the logic control level output by the logic controller during the comparison of the current frame display; a third threshold comparator, the input of which is connected to the output of the data adder, is used as the first output of the data comparison module, and is used to output a first trigger signal when the total value is greater than or equal to the third threshold, and to output a second trigger signal when the total value is less than the third threshold; wherein the first trigger signal and the second trigger signal have opposite potentials; an inverter, the input of which is connected to the output of the third threshold comparator, is used as the second output of the data comparison module, and is used to invert the output signal of the third threshold comparator.

[0010] Optionally, the second threshold is the highest brightness grayscale value, and the third threshold is one-third of the total number of pixels in a frame of display.

[0011] Optionally, the first adjustment module includes: a first resistor, the first end of which is connected to the adjustment voltage terminal; a second resistor, the first end of which is connected to the second end of the first resistor, and the second end of the second resistor is grounded; a third resistor, the first end of which is connected to the first end of the second resistor; a first switch, the control terminal of which is connected to the second end of the third resistor, the first end of which is connected to the first end of the third resistor, and the second end of the first switch serves as the output terminal of the first adjustment module; a fourth resistor, the first end of which is connected to the control terminal of the first switch; a second switch, the control terminal of which serves as the control terminal of the first adjustment module, the first end of which is connected to the second end of the fourth resistor, and the second end of the second switch is grounded; wherein the turn-on voltages of the first switch and the second switch are opposite.

[0012] Optionally, the second adjustment module includes: a fifth resistor, the first end of which serves as the power supply terminal of the second adjustment module; a third switch, the control terminal of which is connected to the second terminal of the fifth resistor, the first terminal of which is connected to the first terminal of the fifth resistor, and the second terminal of which serves as the output terminal of the second adjustment module; a sixth resistor, the first terminal of which is connected to the control terminal of the third switch; and a fourth switch, the control terminal of which serves as the control terminal of the second adjustment module, the first terminal of which is connected to the second terminal of the sixth resistor, and the second terminal of which is grounded.

[0013] Optionally, the first adjustment module includes: a variable potentiometer, the control terminal of which is connected as the control terminal of the first adjustment module, the first terminal of which is connected as the power supply terminal of the first adjustment module, and the second terminal of which is connected as the output terminal of the first adjustment module; and a voltage divider resistor, the first terminal of which is connected to the second terminal of the variable potentiometer, and the second terminal of which is grounded.

[0014] Secondly, this application provides a voltage adjustment method, the voltage adjustment method comprising: acquiring grayscale data of the previous frame and grayscale data of the current frame corresponding to two adjacent display frames; determining, based on the grayscale data of the previous frame and the grayscale data of the current frame, that a high-brightness dynamic region exists, generating a target gamma voltage based on the output voltage of the voltage adjustment terminal, and causing the source driver chip to generate an overdrive voltage based on the target gamma voltage; wherein, the high-brightness dynamic region represents a set of pixels exceeding a preset number that switch from any grayscale to the highest brightness grayscale, and the target gamma voltage is greater than the maximum drive voltage in the gamma chip.

[0015] Thirdly, this application provides a display panel, the display panel including a graphics processor, a power chip and a source driver chip, the display panel including the voltage regulation circuit, the voltage regulation circuit being connected to the graphics processor, the regulation voltage terminal of the power chip and the source driver chip respectively.

[0016] The technical solution provided in this application has at least the following beneficial effects:

[0017] This application uses a data detection module to obtain two frames of grayscale data corresponding to adjacent display screens from the graphics processor. A data comparison module determines whether a high-brightness dynamic area exists based on the two frames of grayscale data. When the existence of the high-brightness dynamic area is determined, a trigger signal is output. Under the action of the trigger signal, the first adjustment module generates a target gamma voltage that is higher than the maximum driving voltage. This allows the source driver chip to generate an overdrive voltage based on the target gamma voltage, overcoming the problem of the maximum driving voltage limitation of the gamma chip. This enables overdrive technology from any grayscale to the highest brightness grayscale, improving the grayscale response time from any grayscale to the highest brightness grayscale. Attached Figure Description

[0018] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0019] Figure 1 The diagram shown is a structural schematic of a voltage regulation circuit provided in an embodiment of this application.

[0020] Figure 2 The diagram shown is a structural schematic of a data detection module provided in an embodiment of this application.

[0021] Figure 3 The diagram shown is a structural schematic of a data comparison module provided in an embodiment of this application.

[0022] Figure 4 The diagram shown is a circuit diagram of a first adjustment module and a second adjustment module provided in an embodiment of this application.

[0023] Figure 5 The figure shown is a schematic diagram of grayscale response provided in an embodiment of this application.

[0024] Figure 6 The diagram shown is a circuit diagram of another first adjustment module provided in an embodiment of this application.

[0025] Figure 7The diagram shown is a schematic flowchart of a voltage regulation method provided in an embodiment of this application.

[0026] Explanation of reference numerals in the attached figures:

[0027] 100. Voltage regulation circuit; 200. Graphics processor; 300. Voltage regulation terminal; 400. Gamma chip; 500. Source driver chip;

[0028] 110. Data detection module; 111. Data input interface; 112. Data conversion unit; 113. Grayscale extraction unit; 114. Data buffer; 120. Data comparison module; 121. Digital subtractor; 122. First threshold comparator; 123. Second threshold comparator; 124. Logic controller; 125. Digital adder; 126. Third threshold comparator; 127. Inverter; 130. First adjustment module; 140. Second adjustment module;

[0029] VR, variable potentiometer; R0, voltage divider resistor; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; R6, sixth resistor; T1, first switching transistor; T2, second switching transistor; T3, third switching transistor; T4, fourth switching transistor. Detailed Implementation

[0030] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0031] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0032] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.

[0033] It should be noted that the current GTG response time of IPS monitors is generally between 3-5ms, exhibiting noticeable motion blur, which is insufficient to meet the e-sports-grade requirements of high-end customers (such as Samsung, which requires GTG <1.9ms). Currently, due to the upper limit of gamma voltage, overdrive technology still cannot improve the response time when switching from any gray level to 255 gray level. The specific reason is that, taking a typical 14-level gamma voltage system as an example, Gamma1 corresponds to 0 gray level (i.e., the lowest brightness), and Gamma14 corresponds to 255 gray level (i.e., the highest brightness). However, the Gamma14 voltage corresponding to 255 gray level is already the system's maximum drive voltage (Vmax). When a pixel needs to switch to 255 gray level, OD (OverDrive) technology needs to accelerate the response by applying an overshoot voltage higher than the target gray level, but Vmax is already the voltage limit, which cannot generate an effective overshoot. In other words, existing overdrive technology cannot improve the gray level response time from any gray level to the highest gray level.

[0034] To address the aforementioned problems, this application provides a voltage regulation circuit, specifically including the following embodiments:

[0035] Figure 1 The diagram shown is a structural schematic of a voltage regulation circuit provided in an embodiment of this application; as follows: Figure 1 As shown, the voltage regulation circuit 100 provided in this application is applied to a display panel, which includes multiple scan lines, multiple data lines, arrayed first pixel units, second pixel units and third pixel units, a graphics processor 200, a gamma chip 400, a source driver chip 500 and a power chip; wherein, the voltage regulation circuit 100 includes at least a data detection module 110, a data comparison module 120 and a first adjustment module 130.

[0036] In this embodiment, the input terminal of the data detection module 110 is connected to the graphics processor 200 and is used to acquire the grayscale data of the previous frame and the grayscale data of the current frame corresponding to two adjacent display frames. Specifically, the graphics processor 200 stores the image data that the display panel needs to display. The data detection module 110 can acquire the grayscale data corresponding to two adjacent display frames from the graphics processor 200, that is, the current frame display corresponds to the current frame grayscale data, and the previous frame display corresponds to the previous frame grayscale data. In addition, the data detection module 110 can also store the grayscale data of the previous frame and the grayscale data of the current frame.

[0037] In this embodiment, the input end of the data comparison module 120 is connected to the output end of the data detection module 110, and is used to compare the grayscale data of the previous frame and the grayscale data of the current frame to determine whether there is a bright dynamic area.

[0038] It should be noted that the Highlight Dynamic Area (HDA) refers to the set of pixels that, exceeding a preset number, switch from any gray level (excluding gray level 255) to the highest brightness gray level (i.e., gray level 255). Therefore, the Highlight Dynamic Area must simultaneously meet three conditions:

[0039] (1) Highlight attribute: The current frame is at the highest brightness gray level (255 gray level);

[0040] (2) Dynamic attributes: Compared with the previous frame, the pixels in this area have changed from non-255 gray level to 255 gray level (i.e. there is a switching behavior of gray level rising to the top).

[0041] (3) Quantity attribute: The number of pixels exceeding the preset number can be one-third of the total number of pixels in a frame of display.

[0042] In other words, the data comparison module 120 compares the grayscale data at each corresponding position in the previous frame's grayscale data and the current frame's grayscale data to determine whether there is a difference. The above pixels are switched from non-255 grayscale to 255 grayscale; if they exist, a first trigger signal is output through the first output terminal. The first trigger signal can be high level or low level, depending on the triggering nature of the first adjustment module 130. Next, this embodiment takes the first adjustment module 130 as a high level trigger as an example, so the first trigger signal in this embodiment is high level.

[0043] In this embodiment, the control terminal of the first adjustment module 130 is connected to the first output terminal GPIO1 of the data comparison module 120, the power supply terminal of the first adjustment module 130 is connected to the adjustment voltage terminal 300, and the output terminal of the first adjustment module 130 is connected to the input terminal of the source driver chip 500. It is used to generate a target gamma voltage according to the output voltage of the adjustment voltage terminal 300 under the action of the first trigger signal, so that the source driver chip 500 generates an overdrive voltage according to the target gamma voltage.

[0044] It should be noted that the adjustment voltage terminal 300 in this embodiment can be an output terminal of the power chip. The output voltage of this port is greater than the maximum driving voltage in the gamma chip 400, thereby making the target gamma voltage output by the first adjustment module 130 greater than the maximum driving voltage. When the first output terminal of the data comparison module 120 outputs the first trigger signal, it indicates that there is a bright dynamic area in the current frame. Then, the first adjustment module 130 generates a target gamma voltage that is higher than the maximum driving voltage based on the output voltage of the adjustment voltage terminal 300. The source driver chip 500 can generate an overdrive voltage based on the target gamma voltage, thereby overcoming the maximum driving voltage limitation of the gamma chip 400, and thus implementing the overdrive technology from any gray level to the highest brightness gray level, improving the gray level response time from any gray level to the highest brightness gray level.

[0045] Therefore, this application uses the data detection module 110 to detect two frames of grayscale data corresponding to adjacent display screens in the graphics processor 200. The data comparison module 120 determines whether there is a bright dynamic area based on the two frames of grayscale data. When a bright dynamic area is determined to exist, a trigger signal is output. Under the action of the trigger signal, the first adjustment module 130 generates a target gamma voltage that is higher than the highest driving voltage. This allows the source driver chip 500 to generate an overdrive voltage based on the target gamma voltage, overcoming the problem of the maximum driving voltage limitation of the gamma chip 400. This enables the implementation of overdrive technology from any grayscale to the highest brightness grayscale, thereby improving the grayscale response time from any grayscale to the highest brightness grayscale.

[0046] In one embodiment, the data comparison module 120 is further configured to output a first trigger signal through the second output terminal GPIO2 of the data comparison module 120 when it is determined that there is no highlight dynamic area; that is, the data comparison module 120 will always output the first trigger signal, but the port for outputting the first trigger signal is different under different circumstances, namely: when it is determined that there is a highlight dynamic area, the first trigger signal is output through the first output terminal GPIO1, and conversely, when it is determined that there is no highlight dynamic area, the first trigger signal is output through the second output terminal GPIO2.

[0047] like Figure 1As shown, the voltage regulation circuit 100 in this embodiment further includes: a second regulation module 140, the control terminal of the second regulation module 140 is connected to the second output terminal of the data comparison module 120, the power supply terminal of the second regulation module 140 is connected to the gamma chip 400, and the output terminal of the second regulation module 140 is connected to the input terminal of the source driver chip 500, for outputting the maximum driving voltage to the source driver chip 500 under the action of the first trigger signal; specifically, when it is determined that there is no bright dynamic area, the first trigger signal is output through the second output terminal of the data comparison module 120. At this time, after receiving the first trigger signal, the second regulation module 140 directly outputs the maximum driving voltage output by the gamma chip 400 to the source driver chip 500.

[0048] This embodiment will The above pixel switching from non-255 grayscale to 255 grayscale as the criterion for determining the highlight dynamic area is the result of a comprehensive optimization based on the characteristics of human visual perception, hardware computing efficiency, and power consumption balance. The specific analysis is as follows:

[0049] ① Human visual sensitivity threshold

[0050] When the proportion of the bright dynamic area (0 grayscale → 255 grayscale transition) in the image is greater than 30%, the human eye's sensitivity to motion blur is significantly increased. The experimental data is shown in Table 1.

[0051] Table 1

[0052]

[0053]

[0054] As shown in Table 1, if the threshold is too low (e.g., 10%), even small changes will trigger a boost, unnecessarily increasing power consumption and easily introducing overshoot and ghosting; if it is too high (e.g., 50%), it cannot cover most dynamic scenarios; therefore, the ratio should be set to... While meeting the sensitivity requirements of the human eye, it can also reduce power consumption.

[0055] ② Hardware computing efficiency optimization

[0056] Simplified integer division: 1 / 3 ≈ 33.3%, which can be efficiently achieved in binary through shifting and addition (without a complex divider): T3 = Total Pixels / 3 ≈ (Total Pixels >> 2) + (Total Pixels >> 4) + ...; For example: a 4K panel (3840 × 2160 = 8,294,400 pixels), T3 = 8,294,400 ÷ 3 ≈ 2,764,800, requiring only one 23-bit adder.

[0057] However, compared to other ratios: 1 / 2 requires 50% pixel change, resulting in a high false negative rate in latency-sensitive scenes; 1 / 4 requires 25% pixel change, wasting computational resources.

[0058] ③Balance between power consumption and image quality

[0059] Statistics show that only 12% of the frames in the game have a highlighted dynamic area ratio greater than 33% (such as explosion / gunfire effects), while the remaining 88% of scenes maintain the default voltage. The statistics are shown in Table 2.

[0060] Table 2

[0061] FPS shooting game 25％ 65％ Open World Exploration 42％ 8％ Film and Television Dark Field 33％ ＜1％

[0062] As shown in Table 2, the dynamic power consumption of the Gamma1 (maximum gamma voltage) circuit can be reduced by 76% when the high voltage is triggered only 12% of the time.

[0063] ④ Maximize response time benefits

[0064] Table 3 shows the improvement data of grayscale response time from 0 to 255 at different thresholds in IPS panel testing:

[0065] Table 3

[0066] No trigger 8.2 - 0％ 1 / 4 6.1 25.6 12％ 1 / 3 5.6 31.7 3％ 1 / 2 5.3 35.4 28％

[0067] Therefore, at 1 / 3 of the time, the response time is improved by more than 30%, while the overshoot and afterimage are less than 5%, achieving the optimal efficiency-loss ratio.

[0068] In this embodiment, considering the current liquid crystal response characteristics of IPS panels, increasing the Gamma1 voltage must be done while avoiding overshoot and image retention. The following are recommended increases in the Gamma1 voltage based on measured data for the response characteristics of different panels:

[0069] 1. The response characteristics of a standard IPS panel (cell thickness d = 3.5 μm, elastic constant K = 12 pN, viscosity y = 0.18 Pa·s) are shown in Table 4:

[0070] Table 4

[0071]

[0072] As shown in Table 4, the grayscale response time of a standard IPS panel can be reduced by 35% when the base Gamma1 voltage is 13.5V and the voltage is boosted to 16.8V (target gamma voltage).

[0073] 2. The response characteristics of the Fast-IPS panel (d = 3.0 μm, K = 15 pN, y = 0.15 Pa·s) are shown in Table 5:

[0074] Table 5

[0075]

[0076] As shown in Table 5, the grayscale response time of the Fast-IPS panel can be reduced by 33% when the base Gamma1 voltage is 13.0V and the voltage is boosted to 16.0V (target gamma voltage).

[0077] 3. The response characteristics of the low-viscosity liquid crystal formulation (d = 2.8 μm, K = 18 pN, y = 0.12 Pa·s) are shown in Table 6:

[0078] Table 6

[0079]

[0080] As shown in Table 6, the grayscale response time of the low-viscosity liquid crystal formulation panel can be reduced by 35% when the base Gamma1 voltage is 12.5V and the voltage is boosted to 15.5V (target gamma voltage).

[0081] In summary, the method of improving grayscale response time using the voltage adjustment circuit 100 in this embodiment can significantly improve the response time of IPS LCD without significantly increasing chip area and power consumption.

[0082] Figure 2 The diagram shown is a structural schematic of a data detection module provided in an embodiment of this application; as follows: Figure 2 As shown, the data detection module 110 in this embodiment includes a data input interface 111, a data conversion unit 112, a grayscale extraction unit 113, and a data buffer 114.

[0083] Specifically, the data input interface 111 is used for electrical connection with the graphics processor 200; wherein, the type of the data input interface 111 includes, but is not limited to: (1) eDP (Embedded DisplayPort), suitable for mobile devices such as laptops / tablets; (2) LVDS (Low-Voltage Differential Signaling), mostly used in industrial displays; (3) MIPI-DSI (Mobile Industry Processor Interface Display Serial Interface), the mainstream mobile phone screen standard interface. The transmitted data content includes, but is not limited to, pixel RGB / YUV values, synchronization signals (H-Sync / V-Sync), and clock signals.

[0084] The input terminal of the data conversion unit 112 in this embodiment is connected to the data input interface 111, and is used to convert the serial data of two adjacent display frames output by the graphics processor 200 into parallel pixel data streams of the previous frame and the current frame. Specifically, the data conversion unit 112 decodes the received serial data, converts the serial bit stream into parallel words and reassembles them into a pixel matrix format (such as 3840×2160 resolution arranged in rows), so as to obtain the pixel data streams of the previous frame and the current frame.

[0085] In this embodiment, the input of the grayscale extraction unit 113 is connected to the output of the data conversion unit 112. It is used to extract grayscale from the pixel data stream of the previous frame and the pixel data stream of the current frame to obtain grayscale data of the previous frame and grayscale data of the current frame. Specifically, grayscale extraction is equivalent to color space conversion. According to the ITU-R BT.709 standard, RGB is converted into single-channel grayscale values. The specific formula is: Y = 0.299R + 0.587G + 0.114B.

[0086] In this embodiment, the data buffer 114 is connected to the output of the grayscale extraction unit 113 and is used to store the grayscale data of the previous frame and the grayscale data of the current frame. The data buffer 114 includes at least two independent buffers A and B, which allow simultaneous reading and writing. The grayscale data of the current frame is written to buffer A, and the grayscale data of the previous frame is read from buffer B. In addition, the two buffers are exchanged at the end of each frame to avoid data read and write conflicts.

[0087] Therefore, the data detection module 110 in this embodiment detects and stores grayscale data of two consecutive frames of images in real time, providing a data foundation for subsequent comparative analysis. This embodiment improves the real-time performance of data detection through a pipelined processing method of serial-to-parallel conversion, grayscale extraction, and storage; by storing only two frames of data, memory bandwidth can be saved; optionally, the data input interface 111 can support mainstream interface standards, adapt to different display platforms, and improve compatibility.

[0088] Figure 3 The diagram shown is a structural schematic of a data comparison module provided in an embodiment of this application; as follows: Figure 3 As shown, the data comparison module 120 in this embodiment includes a digital subtractor 121, a first threshold comparator 122, a second threshold comparator 123, a logic controller 124, a digital adder 125, a third threshold comparator 126, and an inverter 127.

[0089] In this embodiment, the input of the digital subtractor 121 is connected to the output of the data detection module 110, and is used to calculate the grayscale difference between pixels at the same position based on the grayscale data of the previous frame and the grayscale data of the current frame. It should be noted that, assuming G... N-1(x,y) represents the grayscale value at coordinates (x,y) in the previous frame of grayscale data, G N (x,y) represents the grayscale value at coordinates (x,y) in the current frame's grayscale data; detect the pixel grayscale value GN(x,y) of the current frame (Frame N), input the grayscale values ​​of the two frames into the digital subtractor 121, and use the digital subtractor 121 to calculate the grayscale difference Δ = G between the current frame and the previous frame for pixels at the same position. N (x,y)-G N-1 (x,y); where only the transition from low grayscale to high grayscale is calculated, so Δ>0.

[0090] In this embodiment, the input of the first threshold comparator 122 is connected to the output of the digital subtractor 121, and is used to determine whether the grayscale difference Δ is greater than or equal to the first threshold T1; specifically, it determines whether the grayscale difference Δ is large enough, that is, whether the positive change amplitude of the grayscale is large enough; wherein the first threshold T1 can be customized, and generally T1≥10. In addition, when the grayscale difference Δ is greater than or equal to the first threshold T1, the first threshold comparator 122 outputs a high level; otherwise, the first threshold comparator 122 outputs a low level.

[0091] The input of the second threshold comparator 123 in this embodiment is connected to the output of the data detection module 110. It is used to determine whether the grayscale value of each pixel in the current frame grayscale data is greater than the second threshold. Specifically, the second threshold is the highest brightness grayscale value, i.e., 255. It determines whether GN(x,y) is greater than or equal to the second threshold T2, i.e., whether the grayscale value of the current pixel is the maximum grayscale value. If it is determined that GN(x,y) = 255, the second threshold comparator 123 outputs a high level, otherwise the second threshold comparator 123 outputs a low level.

[0092] In this embodiment, the first input terminal of the logic controller 124 is connected to the output terminal of the first threshold comparator 122, and the second input terminal of the logic controller 124 is connected to the output terminal of the second threshold comparator 123. This allows the logic controller to output a logic control level when the grayscale difference is greater than or equal to the first threshold and the grayscale value of the same pixel is greater than or equal to the second threshold. In other words, the logic controller 124 performs a logical AND operation on the outputs of the two threshold comparators. If both the grayscale difference Δ ≥ T1 (significant positive change) and GN(x,y) = T2 are simultaneously satisfied, then the logic controller 124 outputs a high-level logic control level; otherwise, the logic controller 124 outputs a low-level logic control level.

[0093] In this embodiment, the input terminal of the digital adder 125 is connected to the output terminal of the logic controller 124. It is used to calculate the total value of the logic control level output by the logic controller 124 during the comparison process of the displayed image in the current frame. That is, the data adder sums the output of the logic controller 124 at all coordinate points of the entire image, defines the high level of the logic controller 124 as 1, and the low level of the logic controller 124 as 0. Therefore, the total value counted here is the total number of pixels in the current frame that simultaneously satisfy "significant positive change" and "maximum pixel brightness".

[0094] In this embodiment, the input of the third threshold comparator 126 is connected to the output of the data adder. The output of the third threshold comparator 126 is used as the first output of the data comparison module 120. It is used to output a first trigger signal when the total value is greater than or equal to the third threshold, and to output a second trigger signal when the total value is less than the third threshold. The potentials of the first trigger signal and the second trigger signal are opposite.

[0095] It should be noted that the third threshold is one-third of the total number of pixels in a frame of display, which is the preset number in the highlight dynamic area; the first threshold comparator 122 compares the total value θ calculated by the digital adder 125 with the third threshold T3 (T3 = number of display pixels / 3): if θ ≥ T3, the third threshold comparator 126 outputs a first trigger signal (such as a high level) that has a triggering effect; otherwise, the third threshold comparator 126 outputs a second trigger signal (such as a low level) that does not have a triggering effect.

[0096] In this embodiment, the input terminal of the inverter 127 is connected to the output terminal of the third threshold comparator 126. The output terminal of the inverter 127 is used as the second output terminal of the data comparison module 120 to invert the output signal of the third threshold comparator 126. That is, when the output terminal of the third threshold comparator 126 (i.e., the first output terminal of the data comparison module 120) outputs the first trigger signal (high level), the output terminal of the inverter 127 (i.e., the second output terminal of the data comparison module 120) outputs the second trigger signal (low level); conversely, when the output terminal of the third threshold comparator 126 (i.e., the first output terminal of the data comparison module 120) outputs the second trigger signal (low level), the output terminal of the inverter 127 (i.e., the second output terminal of the data comparison module 120) outputs the first trigger signal (high level).

[0097] It is worth noting that, Figure 3 The data subtractor, first threshold comparator 122, second threshold comparator 123, and logic controller 124 in the code process the grayscale value of each pixel coordinate, but the digital adder 125 performs statistical processing on the global (all pixel coordinates) coordinates.

[0098] Figure 4 The diagram shown is a circuit diagram of a first adjustment module and a second adjustment module provided in an embodiment of this application; as shown Figure 4 As shown, the first adjustment module 130 of this embodiment includes a first resistor R1, a second resistor R2, a third resistor R3, a first switch T1, a fourth resistor R4, and a second switch T2; the first end of the first resistor R1 is connected to the adjustment voltage terminal 300; the first end of the second resistor R2 is connected to the second end of the first resistor R1, and the second end of the second resistor R2 is grounded; the first end of the third resistor R3 is connected to the first end of the second resistor R2; the control terminal of the first switch T1 is connected to the second end of the third resistor R3, and the first end of the first switch T1 is connected to the first end of the third resistor R3, with the second end of the first switch T1 serving as the output terminal of the first adjustment module 130; the first end of the fourth resistor R4 is connected to the control terminal of the first switch T1; the control terminal of the second switch T2 serves as the control terminal of the first adjustment module 130, and the first end of the second switch T2 is connected to the second end of the fourth resistor R4, with the second end of the second switch T2 grounded; wherein, the turn-on voltages of the first switch T1 and the second switch T2 are opposite.

[0099] In this embodiment, the second adjustment module 140 includes a fifth resistor R5, a third switch T3, a sixth resistor R6, and a fourth switch T4; the first end of the fifth resistor R5 serves as the power supply terminal of the second adjustment module 140; the control terminal of the third switch T3 is connected to the second end of the fifth resistor R5, the first end of the third switch T3 is connected to the first end of the fifth resistor R5, and the second end of the third switch T3 serves as the output terminal of the second adjustment module 140; the first end of the sixth resistor R6 is connected to the control terminal of the third switch T3; the control terminal of the fourth switch T4 serves as the control terminal of the second adjustment module 140, the first end of the fourth switch T4 is connected to the second end of the sixth resistor R6, and the second end of the fourth switch T4 is grounded.

[0100] It should be noted that if more than 1 / 3 of the grayscale data in the previous frame switches from any grayscale to grayscale 255, the first trigger signal output by the first output terminal of the data comparison module 120 is a logic high level (e.g., 3.3V), and the second trigger signal output by the second output terminal of the data comparison module 120 is a logic low level (e.g., 0V). Therefore, the second switch T2 (NMOS transistor) is in the conducting state when the control terminal is high, causing the control terminal of the first switch T1 (PMOS transistor) to be low and also in the conducting state. At this time, the VGH output by the regulating voltage terminal 300 generates the target gamma voltage after being divided by the first resistor R1 and the second resistor R2. At the same time, the fourth switch T4 (NMOS transistor) is in the off state when the control terminal is low, causing the second regulating module 140 to not output any voltage. Thus, the source driver chip 500 only receives the target gamma voltage output by the first regulating module 130.

[0101] When grayscale data from the previous frame, where all grayscale data is less than 1 / 3 of a pixel, is detected switching from any grayscale level to grayscale 255, the second trigger signal output from the first output terminal of the data comparison module 120 is at a logic low level (e.g., 0V), and the first trigger signal output from the second output terminal of the data comparison module 120 is at a logic high level (e.g., 3.3V). Therefore, the fourth switch T4 (NMOS transistor) is in a conducting state when its control terminal is at a high level, causing the control terminal of the third switch T3 (PMOS transistor) to be at a low level and also in a conducting state. At this time, the second switching module outputs the maximum driving voltage from the gamma chip 400 to the source driver chip 500. Simultaneously, the second switch T2 (NMOS transistor) is in a disconnected state when its control terminal is at a low level, causing the first adjustment module 130 to not output any voltage. Thus, the source driver chip 500 only receives the maximum driving voltage output from the second adjustment module 140.

[0102] like Figure 5 As shown, increasing the gamma voltage can enhance the driving ability of liquid crystal molecules to orient themselves, making the grayscale switching speed faster (the waveform slope becomes larger), thereby improving the liquid crystal response time.

[0103] It should also be noted that the data detection module 110 and the data comparison module 120 in this application can be functional modules other than independent timing controllers, or their functions can be integrated into the timing controller, that is, the functions of the data detection module 110 and the data comparison module 120 can be completed through the timing controller.

[0104] Figure 6 The diagram shown is a circuit diagram of another first adjustment module provided in an embodiment of this application; as follows: Figure 6As shown, the first adjustment module 130 includes a variable potentiometer VR and a voltage divider resistor R0. The control terminal of the variable potentiometer VR is connected as the control terminal of the first adjustment module 130. The first terminal of the variable potentiometer VR is used as the power supply terminal of the first adjustment module 130, and the second terminal of the variable potentiometer VR is used as the output terminal of the first adjustment module 130. The first terminal of the voltage divider resistor R0 is connected to the second terminal of the variable potentiometer VR, and the second terminal of the voltage divider resistor R0 is grounded.

[0105] It should be noted that in this embodiment, the variable potentiometer VR changes its resistance under the action of the first trigger signal, thereby increasing the Gamma1 voltage (maximum driving voltage); if the variable potentiometer VR does not receive the first trigger signal, it does not change its resistance and outputs the normal Gamma1 voltage to the source driver chip 500.

[0106] Figure 7 The diagram shown is a schematic flowchart of a voltage regulation method provided in an embodiment of this application; as follows: Figure 7 As shown, the voltage regulation method provided in this embodiment specifically includes the following steps:

[0107] Step S100: Obtain the grayscale data of the previous frame and the grayscale data of the current frame corresponding to the two adjacent display frames.

[0108] Step S200: When it is determined that there is a bright dynamic area based on the grayscale data of the previous frame and the grayscale data of the current frame, a target gamma voltage is generated based on the output voltage of the voltage adjustment terminal, so that the source driver chip generates an overdrive voltage based on the target gamma voltage.

[0109] Optionally, the high-brightness dynamic region represents a set of pixels that switch from any gray level to the highest brightness gray level, exceeding a preset number of pixels, and the target gamma voltage is greater than the maximum driving voltage in the gamma chip.

[0110] It should be noted that the working principle of the voltage regulation method in this embodiment is the same as that of the voltage regulation circuit in the above embodiment, and will not be repeated here.

[0111] In one embodiment, this application provides a display panel, which includes a graphics processor, a power supply chip, and a source driver chip. The display panel includes the voltage regulation circuit shown in the above embodiment, which is connected to the regulation voltage terminal of the graphics processor, the power supply chip, and the source driver chip, respectively.

[0112] Furthermore, the terms "first," "second," and "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0113] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0114] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this patent application.

Claims

1. A voltage regulation circuit, characterized in that, The voltage regulation circuit includes: The data detection module, whose input end is connected to the graphics processor, is used to acquire the grayscale data of the previous frame and the grayscale data of the current frame corresponding to two adjacent display frames. A data comparison module, whose input is connected to the output of the data detection module, is used to compare the grayscale data of the previous frame and the grayscale data of the current frame to determine whether a bright dynamic region exists; and when the bright dynamic region is determined to exist, a first trigger signal is output through the first output of the data comparison module; wherein, the bright dynamic region represents a set of pixels that exceed a preset number of pixels and switch from any grayscale to the highest brightness grayscale. A first adjustment module, wherein the control terminal of the first adjustment module is connected to the first output terminal of the data comparison module, the power supply terminal of the first adjustment module is connected to the adjustment voltage terminal, and the output terminal of the first adjustment module is connected to the input terminal of the source driver chip, is used to generate a target gamma voltage according to the output voltage of the adjustment voltage terminal under the action of the first trigger signal, so that the source driver chip generates an overdrive voltage according to the target gamma voltage; wherein the target gamma voltage is greater than the maximum drive voltage in the gamma chip; The data comparison module includes: A digital subtractor, the input of which is connected to the output of the data detection module, is used to calculate the gray level difference of pixels at the same position based on the gray level data of the previous frame and the gray level data of the current frame. A first threshold comparator, the input of which is connected to the output of the digital subtractor, is used to determine whether the grayscale difference is greater than or equal to a first threshold. The second threshold comparator has its input connected to the output of the data detection module and is used to determine whether the grayscale value of each pixel in the current frame grayscale data is greater than or equal to the second threshold. A logic controller, wherein a first input terminal of the logic controller is connected to the output terminal of the first threshold comparator, and a second input terminal of the logic controller is connected to the output terminal of the second threshold comparator, for outputting a logic control level when the grayscale difference is greater than or equal to the first threshold and the grayscale value of the same pixel is greater than or equal to the second threshold; A digital adder, the input of which is connected to the output of the logic controller, is used to calculate the total value of the logic control level output by the logic controller during the comparison of the displayed images in the current frame. A third threshold comparator, the input of which is connected to the output of the digital adder, serves as the first output of the data comparison module. It outputs a first trigger signal when the total value is greater than or equal to the third threshold, and outputs a second trigger signal when the total value is less than the third threshold. The first and second trigger signals have opposite potentials. An inverter is provided, the input of which is connected to the output of the third threshold comparator. The output of the inverter is used as the second output of the data comparison module to invert the output signal of the third threshold comparator. The second threshold is the highest brightness grayscale value, and the third threshold is one-third of the total number of pixels in a frame of display.

2. The voltage regulation circuit according to claim 1, characterized in that, The data comparison module is also used to output the first trigger signal through the second output terminal of the data comparison module when it is determined that the highlighted dynamic area does not exist. The voltage regulation circuit further includes: a second regulation module, the control terminal of the second regulation module being connected to the second output terminal of the data comparison module, the power supply terminal of the second regulation module being connected to the gamma chip, and the output terminal of the second regulation module being connected to the input terminal of the source driver chip, for outputting the maximum driving voltage to the source driver chip under the action of the first trigger signal.

3. The voltage regulation circuit according to claim 2, characterized in that, The data detection module includes: A data input interface is provided for electrical connection with the graphics processor. A data conversion unit, the input end of which is connected to the data input interface, is used to convert the serial data of two adjacent frames of display output by the graphics processor into parallel pixel data streams of the previous frame and the current frame. A grayscale extraction unit, the input of which is connected to the output of the data conversion unit, is used to extract grayscale data from the previous frame pixel data stream and the current frame pixel data stream to obtain grayscale data from the previous frame and grayscale data from the current frame. A data buffer, which is connected to the output of the grayscale extraction unit, is used to store the grayscale data of the previous frame and the grayscale data of the current frame.

4. The voltage regulation circuit according to claim 2, characterized in that, The first adjustment module includes: A first resistor, the first end of which is connected to the regulating voltage terminal; The second resistor has its first end connected to the second end of the first resistor, and its second end grounded. A third resistor, wherein the first end of the third resistor is connected to the first end of the second resistor; The first switching transistor has its control terminal connected to the second terminal of the third resistor, and its first terminal connected to the first terminal of the third resistor. The second terminal of the first switching transistor serves as the output terminal of the first adjustment module. The fourth resistor, the first end of which is connected to the control terminal of the first switching transistor; The second switch transistor has its control terminal serving as the control terminal of the first adjustment module. The first terminal of the second switch transistor is connected to the second terminal of the fourth resistor, and the second terminal of the second switch transistor is grounded. The turn-on voltages of the first and second switching transistors are opposite.

5. The voltage regulation circuit according to claim 2, characterized in that, The second adjustment module includes: The fifth resistor, the first end of which serves as the power supply terminal of the second adjustment module; The third switch is connected to the control terminal of the fifth resistor and the first terminal of the third switch is connected to the first terminal of the fifth resistor. The second terminal of the third switch serves as the output terminal of the second adjustment module. The sixth resistor, the first end of which is connected to the control terminal of the third switching transistor; The fourth switch is used as the control terminal of the second adjustment module. The first terminal of the fourth switch is connected to the second terminal of the sixth resistor, and the second terminal of the fourth switch is grounded.

6. The voltage regulation circuit according to claim 1, characterized in that, The first adjustment module includes: A variable potentiometer, wherein the control terminal of the variable potentiometer is connected to the control terminal of the first adjustment module, the first terminal of the variable potentiometer is connected to the power supply terminal of the first adjustment module, and the second terminal of the variable potentiometer is connected to the output terminal of the first adjustment module. A voltage divider resistor, wherein the first end of the voltage divider resistor is connected to the second end of the variable potentiometer, and the second end of the voltage divider resistor is grounded.

7. A voltage regulation method, characterized in that, The voltage regulation method, applied to the voltage regulation circuit according to any one of claims 1-6, comprises: Obtain the grayscale data of the previous frame and the grayscale data of the current frame corresponding to two adjacent display frames; When a high-brightness dynamic region is determined based on the grayscale data of the previous frame and the grayscale data of the current frame, a target gamma voltage is generated based on the output voltage of the voltage adjustment terminal, so that the source driver chip generates an overdrive voltage based on the target gamma voltage. The high-brightness dynamic region refers to a set of pixels where more than a preset number of pixels switch from any gray level to the highest brightness gray level, and the target gamma voltage is greater than the maximum driving voltage in the gamma chip.

8. A display panel, the display panel comprising a graphics processor, a power supply chip, and a source driver chip, characterized in that, The display panel includes a voltage regulation circuit as described in any one of claims 1-6, wherein the voltage regulation circuit is connected to the graphics processor, the voltage regulation terminal of the power chip, and the source driver chip, respectively.

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