Circuit board and method for manufacturing the same

Abstract

The application relates to the technical field of circuit board manufacturing, and discloses a circuit board and a manufacturing method thereof. The circuit board comprises two first sub-boards and a middle layer arranged between the two first sub-boards. The first sub-board comprises two first circuit layers and a first dielectric layer arranged between the two first circuit layers. A ceramic piece is arranged in the first sub-board, and part of the first circuit layer covers the ceramic piece. The circuit board is provided with a through hole which penetrates through the ceramic piece in one of the first sub-boards, the middle layer and the ceramic piece in the other first sub-board. A conductive part is arranged in the through hole, and the conductive part is connected with the first circuit layer covering the ceramic piece. The circuit board and the manufacturing method thereof provided by the application can solve the problem that the thermal expansion coefficients of the two sides of the circuit board are inconsistent after the ceramic piece is embedded on the circuit board in the prior art, and the circuit board is easily deformed or the electronic device connection is invalid.

Description

Technical Field

[0001] This application relates to the field of circuit board manufacturing technology, and in particular to a circuit board and its manufacturing method. Background Technology

[0002] The coefficient of thermal expansion (CTE) is a key parameter for the dimensional changes of materials when temperatures change. In high-temperature or thermal cycling environments, CTE mismatch can lead to thermal stress at material interfaces, resulting in problems such as cracking, delamination, or structural failure. This issue is particularly prominent in electronic packaging. For example, the difference in CTE between chips and circuit boards in electronic devices can cause fatigue fracture of solder joints, shortening device lifespan. Therefore, embedding ceramic components in the densely soldered BGA (Ball Grid Array) area on the circuit board is considered to reduce CTE.

[0003] In related technologies, after embedding ceramic components on a circuit board, the thermal expansion coefficients on both sides of the circuit board are inconsistent, which can easily lead to circuit board deformation or failure of electronic component connections. Summary of the Invention

[0004] This application provides a circuit board and its manufacturing method to solve the problem in the prior art that after embedding ceramic parts on the circuit board, the thermal expansion coefficients on both sides of the circuit board are inconsistent, which can easily lead to circuit board deformation or failure of electronic device connections.

[0005] In a first aspect, embodiments of this application provide a circuit board including two first sub-boards and an intermediate layer disposed between the two first sub-boards. Each first sub-board includes two first circuit layers and a first dielectric layer disposed between the two first circuit layers. A ceramic component is disposed within the first sub-board, and a portion of the first circuit layers covers the ceramic component. The ceramic components in the two first sub-boards are disposed opposite each other. The circuit board has a through-hole that penetrates the ceramic component in one of the first sub-boards, the intermediate layer, and the ceramic component in the other first sub-board. A conductive portion is disposed within the through-hole, and the conductive portion is connected to the first circuit layer covering the ceramic component.

[0006] In some embodiments, the ceramic component is provided with a pre-drilled hole, the interior of which is provided with a first filling portion, the through hole penetrates through the first filling portion, and a portion of the conductive portion is connected to the first filling portion.

[0007] In some embodiments, the conductive portion is configured as an annular shape, and a second filling portion is provided inside the conductive portion.

[0008] In some embodiments, the middle layer includes at least two interconnect layers, with an intermediate dielectric layer disposed between two adjacent interconnect layers, and the via penetrating the interconnect layers and the intermediate dielectric layer.

[0009] In some embodiments, the circuit board further includes a second sub-board located on the side of the first sub-board away from the middle layer. The second sub-board includes a second circuit layer, and a connection medium layer is disposed between the second circuit layer and the first circuit layer.

[0010] Secondly, embodiments of this application provide a method for manufacturing a circuit board, comprising:

[0011] The middle layer and two first sub-boards are stacked together and pressed together. The middle layer is located between the two first sub-boards. The first sub-board includes two first circuit layers and a first dielectric layer disposed between the two first circuit layers. A ceramic component is provided in the first sub-board. Part of the first circuit layer covers the ceramic component. The ceramic components in the two first sub-boards are arranged facing each other.

[0012] Through holes are machined to penetrate the middle layer and the two first sub-boards, the through holes penetrating the ceramic components within the two first sub-boards and the first circuit layer covering the ceramic components;

[0013] A conductive part is provided inside the through hole, and the conductive part is connected to the first circuit layer covering the ceramic part.

[0014] In some embodiments, the method of fabricating the circuit board further includes, prior to stacking and laminating the middle layer and the two first sub-boards together:

[0015] The first dielectric layer and two core boards are stacked together to form a laminate. The first dielectric layer is located between the two core boards. A first conductive layer is provided on the side of the core board away from the first dielectric layer. The laminate is provided with a receiving groove that penetrates the first conductive layer of one core board and the first conductive layer of the other core board.

[0016] The ceramic component is placed inside the receiving groove;

[0017] The laminated plates are pressed together, and part of the first dielectric layer fills the gap between the ceramic part and the inner wall of the receiving groove;

[0018] A second conductive layer is disposed on the first conductive layer, such that a portion of the second conductive layer covers the ceramic component, to obtain the first sub-board. The first conductive layer and the second conductive layer constitute the first circuit layer.

[0019] In some embodiments, before placing the ceramic component inside the receiving groove, the method of manufacturing the circuit board further includes: providing a ceramic component having pre-drilled holes;

[0020] After providing the ceramic component and before setting the second conductive layer on the first conductive layer, the method for manufacturing the circuit board further includes: setting a first filling portion in the pre-drilled hole;

[0021] When processing the through hole that penetrates the middle layer and the two first sub-plates, the through hole penetrates the first filling portion;

[0022] When a conductive part is provided inside the through hole, a portion of the conductive part is connected to the first filling part.

[0023] In some embodiments, a second conductive layer is disposed on the first conductive layer, such that a portion of the second conductive layer covers the ceramic component. After obtaining the first sub-board, the method for manufacturing the circuit board further includes:

[0024] Using the pre-drilled holes as a reference, a line alignment target is fabricated on the first sub-board;

[0025] Using the alignment target as the first alignment reference, the circuit is fabricated on the first circuit layer.

[0026] In some embodiments, when fabricating a circuit on the first circuit layer using the circuit alignment target as the first alignment reference, a drilling alignment target is fabricated on the first circuit layer using the circuit alignment target as the first alignment reference; when machining a through hole penetrating the middle layer and the two first sub-boards, the drilling alignment target is used as the second alignment reference.

[0027] In some embodiments, the borehole alignment target is used as a second alignment reference, including:

[0028] A positioning target hole is machined through the drill alignment target of one of the first sub-boards, the middle layer, and the drill alignment target of the other first sub-board. The axis of the positioning target hole is parallel to the axis of the drill alignment target, and the axis of the positioning target hole is located at the midpoint of the plane defined by the axis of the drill alignment target of one of the first sub-boards and the axis of the drill alignment target of the other first sub-board. The positioning target hole serves as the second alignment reference.

[0029] In some embodiments, the receiving groove includes a first groove formed on the core board and a second groove formed on the first dielectric layer; before stacking the first dielectric layer and two core boards together to form a laminate, the method of manufacturing the circuit board further includes: machining the first groove on the core board and machining the second groove on the first dielectric layer.

[0030] In some embodiments, machining the first groove on the core board includes:

[0031] An initial groove is machined into the core board. The size of the initial groove is smaller than that of the first groove. The cross-section of the initial groove is rectangular. The initial groove has two opposing first sidewalls and two opposing second sidewalls. The arrangement direction of the two first sidewalls is parallel to the width direction of the initial groove, and the arrangement direction of the two second sidewalls is parallel to the length direction of the initial groove.

[0032] The first groove is obtained by machining the two first sidewalls with a first milling cutter and the second sidewalls with a second milling cutter.

[0033] In some embodiments, the first groove has a theoretical position; before machining the initial groove on the core board, the expansion and contraction value of the core board is obtained; when machining the two first sidewalls with a first milling cutter and the two second sidewalls with a second milling cutter to obtain the first groove, the actual position of the first groove is translated relative to the theoretical position by a distance determined by the expansion and contraction value along a path away from the center of the core board.

[0034] In some embodiments, after the conductive part is disposed inside the through hole and the first circuit layer covering the ceramic part is connected to the conductive part, the method of manufacturing the circuit board further includes: stacking a connecting dielectric layer and a second sub-board sequentially on the side of the first sub-board away from the middle layer and performing a pressing process.

[0035] The circuit board provided in this application has the following advantages: Since the circuit board includes two first sub-boards and an intermediate layer disposed between the two first sub-boards, the first sub-board includes two first circuit layers and a first dielectric layer disposed between the two first circuit layers. A ceramic component is disposed in the first sub-board, and part of the first circuit layer covers the ceramic component. The ceramic components in the two first sub-boards are arranged facing each other, and the circuit board is provided with a through hole. The through hole penetrates the ceramic component in one of the first sub-boards, the intermediate layer, and the ceramic component in the other first sub-board. A conductive part is disposed in the through hole, and the conductive part is connected to the first circuit layer covering the ceramic component. Therefore, the thermal expansion coefficients on both sides of the intermediate layer can be balanced by the ceramic component in one of the first sub-boards and the ceramic component in the other first sub-board, so that the thermal expansion coefficients on both sides of the circuit board are consistent, avoiding circuit board deformation or electronic device connection failure.

[0036] The advantages of this application compared to the prior art can be found in the description of the advantages of this application compared to the prior art, which will not be repeated here. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a flowchart of the circuit board manufacturing method in the first embodiment of this application;

[0039] Figure 2 This is a schematic diagram of the structure of the laminated plate in the first embodiment of this application;

[0040] Figure 3 yes Figure 2 The diagram shows the structure of the laminated plate and the first filling section.

[0041] Figure 4 yes Figure 3 The corresponding top view;

[0042] Figure 5 Is Figure 3 A schematic diagram of the structure of the first sub-board is shown, in which a second conductive layer is disposed on the first conductive layer of the laminated plate shown.

[0043] Figure 6 It is the middle layer and Figure 5 A schematic diagram of the stacked structure of the first sub-plate shown;

[0044] Figure 7 It is Figure 6 The diagram shows the middle layer and the first sub-board being laminated together.

[0045] Figure 8 It is to process through Figure 7 A schematic diagram showing the ceramic component, the middle layer, and the through-hole of the ceramic component in one of the first sub-plates;

[0046] Figure 9 yes Figure 8 The diagram shows the relative positions of the drill alignment targets for one sub-board and the drill alignment targets for the other sub-board.

[0047] Figure 10 yes Figure 8The diagram shows the relative positions of the ceramic components in one of the first sub-plates, the ceramic components in the other first sub-plate, and the through holes.

[0048] Figure 11 Is Figure 8 The diagram shows a structure in which a conductive part and a second filling part are arranged inside the through hole.

[0049] Figure 12 This is a schematic diagram of the structure of the laminated plate and ceramic component in the second embodiment of this application;

[0050] Figure 13 yes Figure 12 A schematic diagram of the core board in the laminated plate shown;

[0051] Figure 14 yes Figure 13 A schematic diagram showing the actual and theoretical positions of the first groove in the core board;

[0052] Figure 15 yes Figure 13 A top view of the first sub-plate consisting of the laminated plate and ceramic components with the middle layer shown;

[0053] Figure 16 This is a schematic diagram of the circuit board structure in the third embodiment of this application;

[0054] Figure 17 This is a schematic diagram of the structure of a panel composed of multiple stacked plates in the fourth embodiment of this application.

[0055] The markings in the diagram mean:

[0056] 100. Circuit board;

[0057] 10. First sub-board;

[0058] 101. Core board; 1010. First conductive layer; 1011. First groove; 102. Second conductive layer; 103. Receiving groove; 104. Circuit alignment target; 11. First dielectric layer; 12. First circuit layer; 121. Drilling alignment target; 122. Avoidance groove; 13. Ceramic component; 131. Pre-drilled hole; 14. First filling part;

[0059] 20. Middle level;

[0060] 21. Connecting circuit layer; 211. Clearance hole; 22. Intermediate dielectric layer; 23. Insulating dielectric layer;

[0061] 30. Positioning the target hole;

[0062] 40. Through hole;

[0063] 41. Conductive part;

[0064] 50. Second filling section;

[0065] 60. Second sub-board;

[0066] 61. Second line layer;

[0067] 200. Layout. Detailed Implementation

[0068] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0069] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0070] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0071] In this specification, references to "one embodiment," "some embodiments," or simply "embodiment" mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. Furthermore, in one or more embodiments, specific features, structures, or characteristics may be combined in any suitable manner.

[0072] To illustrate the technical solution of this application, the following description is provided in conjunction with specific accompanying drawings and embodiments.

[0073] The coefficient of thermal expansion (CTE) is a key parameter for the dimensional changes of materials when temperatures change. In high-temperature or temperature cycling environments, CTE mismatch can lead to thermal stress at the material interface, resulting in problems such as cracking, delamination, or structural failure. This issue is particularly prominent in electronic packaging. For example, the difference in CTE between the chip and the circuit board in electronic devices can cause fatigue fracture of the solder joints, shortening the device's lifespan. Therefore, embedding ceramic components in the densely soldered BGA (Ball Grid Array) area on the circuit board is considered to reduce CTE.

[0074] In related technologies, after embedding ceramic components on a circuit board, the ceramic components are only embedded on one side of the circuit board, which causes the thermal expansion coefficients on both sides of the circuit board to be inconsistent. This can easily lead to circuit board deformation or failure of electronic component connections. In addition, through-type ceramic components are generally used, which can improve the thermal expansion coefficient, but affect the wiring density.

[0075] In view of this, this application provides a circuit board and a method for manufacturing the same. The circuit board includes two first sub-boards and an intermediate layer disposed between the two first sub-boards. The first sub-board includes two first circuit layers and a first dielectric layer disposed between the two first circuit layers. A ceramic component is disposed in the first sub-board, and a portion of the first circuit layer covers the ceramic component. The ceramic components in the two first sub-boards are arranged opposite each other. The circuit board has through holes that penetrate the ceramic component in one of the first sub-boards, the intermediate layer, and the ceramic component in the other first sub-board. A conductive part is disposed in the through hole and is connected to the first circuit layer covering the ceramic component. Therefore, the thermal expansion coefficients on both sides of the intermediate layer can be balanced by the ceramic component in one of the first sub-boards and the ceramic component in the other first sub-board, so that the thermal expansion coefficients on both sides of the circuit board are consistent, thus avoiding circuit board deformation or electronic component connection failure.

[0076] Please refer to Figures 1 to 11 The first embodiment of this application provides a circuit board 100, including two first sub-boards 10 and an intermediate layer 20 disposed between the two first sub-boards 10. The first sub-board 10 includes two first circuit layers 12 and a first dielectric layer 11 disposed between the two first circuit layers 12. A ceramic component 13 is disposed in the first sub-board 10, and a portion of the first circuit layer 12 covers the ceramic component 13. The ceramic components 13 in the two first sub-boards 10 are disposed facing each other.

[0077] The middle layer 20 may include a circuit layer and a dielectric layer, the dielectric layer being a prepreg or resin-based prepreg, etc. For example, the middle layer 20 includes at least two connecting circuit layers 21, with an intermediate dielectric layer 22 between adjacent connecting circuit layers 21. An insulating dielectric layer 23 may be provided between the first circuit layer 12 and the connecting circuit layers 21. Both the intermediate dielectric layer 22 and the insulating dielectric layer 23 may be prepregs or resin-based prepregs, etc. The material of the first circuit layer 12 may be copper, aluminum, or silver, etc. The first dielectric layer 11 may be a prepreg or resin-based prepreg, etc. The ceramic component 13 may be a ceramic block, such as silicon nitride, aluminum nitride, alumina, etc. The two first sub-boards 10 may be symmetrically arranged about the middle layer 20.

[0078] Both portions of the first circuit layers 12 on both sides of the first dielectric layer 11 are covered with ceramic components 13, or only a portion of the first circuit layer 12 on one side of the first dielectric layer 11 is covered with ceramic components 13.

[0079] The circuit board 100 is provided with a through hole 40, which passes through the ceramic component 13 and the middle layer 20 in one of the first sub-boards 10 and the ceramic component 13 in the other first sub-board. A conductive part 41 is provided in the through hole 40, and the conductive part 41 is connected to the first circuit layer 12 covering the ceramic component 13.

[0080] The conductive part 41 can be made of copper, aluminum or silver, etc.

[0081] The method for manufacturing the circuit board 100 provided in the above embodiments includes:

[0082] S100: The middle layer 20 and two first sub-boards 10 are stacked together and pressed together. The middle layer 20 is located between the two first sub-boards 10. The first sub-board 10 includes two first circuit layers 12 and a first dielectric layer 11 disposed between the two first circuit layers 12. The first sub-board 10 is provided with a ceramic component 13, and part of the first circuit layer 12 covers the ceramic component 13.

[0083] S200: Process through holes 40 that penetrate the middle layer 20 and the two first sub-boards 10. The through holes 40 penetrate the ceramic parts 13 in the two first sub-boards 10 and the first circuit layer 12 covering the ceramic parts 13.

[0084] Specifically, through holes 40 can be machined by mechanical drilling, and one or more through holes 40 can be provided.

[0085] S300: A conductive part 41 is provided inside the through hole 40, and the conductive part 41 is connected to the first circuit layer 12 covering the ceramic part 13.

[0086] Specifically, a conductive portion 41 can be provided inside the through hole 40 by electroplating. The conductive portion 41 can be configured as a ring or the like. Since the conductive portion 41 is connected to the first circuit layer 12 covering the ceramic component 13, the first circuit layer 12 covering the ceramic component 13 can be electrically connected. This utilizes the first circuit layer 12 above the ceramic component 13, increases the wiring density of the circuit board 100, and ensures the interlayer circuit conductivity.

[0087] As can be seen from the above, the circuit board 100 and its manufacturing method provided in this application include two first sub-boards 10 and an intermediate layer 20 disposed between the two first sub-boards 10. Each first sub-board 10 includes two first circuit layers 12 and a first dielectric layer 11 disposed between the two first circuit layers 12. A ceramic component 13 is disposed within the first sub-board 10, and a portion of the first circuit layers 12 covers the ceramic component 13. The ceramic components 13 in the two first sub-boards 10 are arranged facing each other, and the circuit board 100 is provided with a through hole 40, through which the through hole 40 passes. The ceramic component 13 in one first sub-board 10, the middle layer 20, and the ceramic component 13 in another first sub-board 10 are provided with conductive parts 41 in the through holes 40. The conductive parts 41 are connected to the first circuit layer 12 covering the ceramic component 13. Therefore, the thermal expansion coefficients on both sides of the middle layer 20 can be balanced by the ceramic component 13 in one first sub-board 10 and the ceramic component 13 in the other first sub-board 10, so that the thermal expansion coefficients on both sides of the circuit board 100 are consistent, thus avoiding deformation of the circuit board 100 or failure of electronic component connections.

[0088] Since part of the first circuit layer 12 covers the ceramic component 13, circuits can be fabricated using this part of the first circuit layer 12 covering the ceramic component 13, and the conductive part 41 is used to achieve the conductivity of the ceramic component 13 area, thereby increasing the wiring density of the circuit board 100.

[0089] Please refer to Figure 1 and Figure 2 In the first embodiment, before stacking and laminating the middle layer 20 and the two first sub-boards 10 together, the method for manufacturing the circuit board 100 further includes:

[0090] First, the first dielectric layer 11 and two core boards 101 are stacked together to form a laminate. The first dielectric layer 11 is located between the two core boards 101. A first conductive layer 1010 is provided on the side of the core board 101 away from the first dielectric layer 11. The laminate is provided with a receiving groove 103, which penetrates the first conductive layer 1010 of one core board 101 and the first conductive layer 1010 of the other core board 101.

[0091] Specifically, the material of the first conductive layer 1010 can be copper, aluminum, or silver, etc. The surface of the core board 101 can be roughened by browning with a browning solution, and then the core board 101 and the first dielectric layer 11 are fused together by a hot melt machine, and the alignment holes are riveted together by rivets, further reducing the risk of the core board 101 sliding plate.

[0092] Next, the ceramic part 13 is placed inside the receiving groove 103.

[0093] Specifically, the ceramic part 13 can be placed inside the receiving groove 103 by machine placement or manual placement. The ceramic part 13 and the receiving groove 103 are fitted with a clearance fit.

[0094] Next, the laminated plates are pressed together, and part of the first dielectric layer 11 fills the gap between the ceramic part 13 and the inner wall of the receiving groove 103.

[0095] Specifically, under the high temperature and high pressure environment of the press, the ceramic part 13 is bonded to the two core plates 101 through the first medium layer 11.

[0096] Next, a second conductive layer 102 is disposed on the first conductive layer 1010, such that a portion of the second conductive layer 102 covers the ceramic component 13, thereby obtaining the first sub-board 10. The first conductive layer 1010 and the second conductive layer 102 constitute the first circuit layer 12.

[0097] Specifically, a second conductive layer 102 with a thickness of 13µm-20µm can be electroplated onto the first conductive layer 1010 by horizontal copper plating followed by electroplating to thicken it. The material of the first conductive layer 1010 can be copper, aluminum, or silver, etc. Simultaneously, this process connects the ceramic component 13 to the interface of the first circuit layer 12. The first conductive layer 1010 is connected to the conductive part 41 through the second conductive layer 102 and is electrically conductive.

[0098] By adopting the above scheme, the first sub-board 10 can be manufactured relatively easily.

[0099] It should be noted that the core board 101 can be manufactured by material feeding and image film exposure. First, the whole large copper-clad board is cut into the required working board according to the design requirements. Then, the core board 101 is made by LDI (Laser Direct Imaging) mechanism using the non-alignment point exposure method. The side of the core board close to the first dielectric layer 11 does not need to be fabricated with circuits. Only the process edge area contains alignment target points and fusion blocks. The other side of the core board is left with copper except for the target points and fusion blocks, which is the first conductive layer 1010.

[0100] The ceramic part 13 is provided with a pre-drilled hole 131, and a first filling part 14 is provided inside the pre-drilled hole 131. A through hole 40 passes through the first filling part 14, and a portion of the conductive part 41 is connected to the first filling part 14.

[0101] By adopting the above scheme, a pre-drilled hole 131 can be machined on the ceramic part 13 first, and a first filling part 14 can be set inside the pre-drilled hole 131 before machining the through hole 40, thereby facilitating the machining of the through hole 40.

[0102] In the first embodiment, before placing the ceramic component 13 inside the receiving groove 103, the method of manufacturing the circuit board 100 further includes: providing the ceramic component 13, on which a pre-drilled hole 131 is provided.

[0103] After providing the ceramic part 13 and before providing the second conductive layer 102 on the first conductive layer 1010, the method of manufacturing the circuit board 100 further includes providing a first filling portion 14 in the pre-drilled hole 131.

[0104] Specifically, the first filling part 14 can be provided in the pre-drilled hole 131 before or after the laminated plate is pressed. For example, the first filling part 14 can be provided directly in the pre-drilled hole 131 after the ceramic part 13 has completed the pre-drilled hole 131 processing before the laminated plate is pressed.

[0105] The first filling part 14 can be resin ink. The first filling part 14 can be set in the pre-drilled hole 131 by resin plugging, that is, the first filling part 14 can be set in the pre-drilled hole 131 by resin plugging, resin plugging baking plate and resin grinding in sequence.

[0106] For example, a vacuum resin plugging machine can be used, with aluminum sheets as stops to open windows, and resin plugging can be performed in the area of ​​the pre-drilled hole 131. In other positions, aluminum sheets are used as stops without resin plugging. After resin plugging, the plate is inserted into a rack and baked in a vertical oven at 150℃*2H to ensure that the resin plugging resin ink is cured. Then, the plate is ground by a resin grinding device with the ceramic grinding section closed and the non-woven fabric grinding section is used to grind the resin ink that protrudes above the plate surface.

[0107] When processing through holes 40 that penetrate the middle layer 20 and the two first sub-plates 10, the through holes 40 penetrate the first filling part 14.

[0108] When a conductive part 41 is provided inside the through hole 40, part of the conductive part 41 is connected to the first filling part 14.

[0109] By adopting the above scheme, it is relatively convenient to set the first filling part 14 in the pre-drilled hole 131, and ensure that the first filling part 14 in the pre-drilled hole 131 is relatively full and will not produce voids, thereby ensuring that when the conductive part 41 is set inside the through hole 40, part of the conductive part 41 can be tightly connected with the first filling part 14.

[0110] As one possible implementation method, the conductive part 41 is configured to be ring-shaped, and a second filling part 50 is provided inside the conductive part 41.

[0111] This design ensures that the inner wall of the through hole 40 is tightly connected to the conductive part 41, and the conductive part 41 will not collapse.

[0112] It should be noted that, provided there is sufficient space, the size of the conductive part 41 inside the through hole 40 should be adjusted appropriately to ensure the alignment of the through hole 40 with other pads.

[0113] It should also be noted that the second filling part 50 can be resin ink. After the conductive part 41 is provided inside the through hole 40, the second filling part 50 is provided inside the conductive part 41 by means of resin plugging, resin plugging baking plate and resin grinding.

[0114] After the second filling part 50 is provided in the conductive part 41, the following processes can be performed in sequence: image film exposure, image etching, AOI (Automated Optical Inspection), lamination, target drilling, laser drilling, blind hole filling, image film exposure, image etching, AOI, lamination, target drilling, laser drilling, blind hole filling, image film exposure, image etching, AOI, solder resist, OSP (Organic solderability preservative), router, electrical testing, FQC (Final Quality Control), FQA (Final Quality Assurance), and packaging.

[0115] Optionally, the middle layer 20 includes at least two connection line layers 21, with an intermediate dielectric layer 22 disposed between two adjacent connection line layers 21, and a via 40 penetrating the connection line layer 21 and the intermediate dielectric layer 22.

[0116] This configuration allows the circuit board 100 to have multiple circuit layers.

[0117] Please refer to Figures 2 to 7 In the first embodiment, a second conductive layer 102 is disposed on the first conductive layer 1010, such that a portion of the second conductive layer 102 covers the ceramic component 13. After obtaining the first sub-board 10, the method for manufacturing the circuit board 100 further includes:

[0118] First, a line alignment target 104 is fabricated on the first daughterboard 10, using the pre-drilled hole 131 as a reference.

[0119] Optionally, a laser drilling method can be used to pre-align four pre-drilled holes 131 at the corners of the ceramic part 13, and to drill four line alignment targets 104 at the corners of the first sub-board 10 for line fabrication.

[0120] Secondly, the line is fabricated on the first line layer 12 using the line alignment target 104 as the first alignment reference.

[0121] Alternatively, the circuit can be fabricated on the first circuit layer 12 by means of film application, exposure, development, and etching.

[0122] By adopting the above scheme, the alignment accuracy between the lines on the first line layer 12 and the ceramic component 13 can be guaranteed.

[0123] It should be noted that a vacuum laminating machine can be used to cover the surface of the first sub-board 10 with a layer of dry film to avoid the dry film not adhering tightly due to the height difference between the ceramic component 13 and the first circuit layer 12, which may cause corrosion problems.

[0124] The first circuit layer 12 without dry film protection can be etched away using an etching solution, while the first circuit layer 12 with dry film protection is retained. The first daughterboard 10 with the circuitry is then subjected to AOI optical inspection to confirm quality. After identifying the OPE (Optical Precision Punching) alignment points, OPE punching and fixed-distance punching are used to create the necessary alignment holes for fusion and riveting. The positioning holes required for the fusion and riveting of the first dielectric layer 11 are consistent with those of the core board 101 and are directly drilled using a drilling method.

[0125] Because there are alignment deviations between the ceramic component 13 and the core board 101, and between the ceramic component 13 in one of the first sub-boards 10 and the ceramic component 13 in the other first sub-board 10, mechanical drilling may be performed on the ceramic area of ​​the ceramic component 13, resulting in the breakage of the drilling tool and the inability to complete the mechanical drilling. Therefore, the conductivity of the conductive part 41 in the through hole 40 cannot be satisfied.

[0126] To solve the above problems, when fabricating circuits on the first circuit layer 12 with the circuit alignment target 104 as the first alignment reference, a drilling alignment target 121 is fabricated on the first circuit layer 12 with the circuit alignment target 104 as the first alignment reference; when machining through holes 40 that penetrate the middle layer 20 and the two first sub-boards 10, the drilling alignment target 121 is used as the second alignment reference.

[0127] By adopting the above scheme, the alignment accuracy between the drilling alignment target 121 and the ceramic part 13 can be guaranteed, thereby ensuring that when machining the through hole 40, the through hole 40 can penetrate the first filling part 14, the middle layer 20 of the ceramic part 13 in one of the first sub-plates 10 and the first filling part 14 of the ceramic part 13 in the other first sub-plate, thus avoiding the milling cutter from drilling into the ceramic area of ​​the ceramic part 13 and causing the cutter to break.

[0128] It is understandable that the drill alignment target 121 may be located on the first circuit layer 12 on the side of the first sub-board 10 away from the middle layer 20 or on the side of the first circuit layer 12 on the side of the first sub-board 10 close to the middle layer 20.

[0129] It should be noted that when machining through holes 40 that penetrate the ceramic part 13, the middle layer 20 and the ceramic part 13 in one of the first sub-plates 10, the drilling alignment target 121 of one of the first sub-plates 10 and the drilling alignment target 121 of the other first sub-plate 10 are used as the second alignment reference.

[0130] It is understandable that if only one of the drilling alignment targets 121 of the first sub-plate 10 is used to punch out the through hole 40, it is only aligned with the drilling alignment target 121 on one side. This cannot ensure the alignment of the through hole 40 with the ceramic parts 13 of the two first sub-plates 10. This can easily cause the milling cutter to drill into the ceramic area of ​​the ceramic part 13 when machining the through hole 40, resulting in tool breakage and failure to achieve its conductivity.

[0131] Please refer to this as well. Figures 9 to 11 As one possible approach, using borehole alignment target 121 as a second alignment reference, includes:

[0132] A positioning target hole 30 is machined through the drill alignment target 121 of one of the first sub-boards 10, the middle layer 20, and the drill alignment target 121 of the other first sub-board 10. The axis of the positioning target hole 30 is parallel to the axis of the drill alignment target 121, and the axis of the positioning target hole 30 is located at the middle part of the plane defined by the axis of the drill alignment target 121 of one of the first sub-boards 10 and the axis of the drill alignment target 121 of the other first sub-board 10. The positioning target hole 30 serves as the second alignment reference.

[0133] By adopting the above scheme, the positioning target hole 30 can take into account the alignment of the ceramic part 13 in one first sub-plate 10 with the ceramic part 13 in the other first sub-plate 10, ensuring that when processing the through hole 40, the first filling part 14 area in the pre-drilled hole 131 is drilled, and avoiding drilling to the ceramic area of ​​the ceramic part 13.

[0134] It is understandable that the positioning target hole 30 can be machined by mechanical drilling.

[0135] For example, by adjusting the parameters of the X-RAY device, the positioning target hole 30 can be fitted to the center of the plane defined by the axis of the line alignment target 104 of one of the first sub-boards 10 and the axis of the line alignment target 104 of the other first sub-board 10, and the positioning target hole 30 can balance the offset of the two first sub-boards 10.

[0136] For example, please refer to the following: Figure 9 If the axis of the drill hole alignment target 121 of one of the first sub-plates 10 is C1, and the axis of the drill hole alignment target 121 of the other first sub-plate 10 is C2, then the axis of the positioning target hole 30 is C0.

[0137] It is understandable that multiple drilling alignment targets 121 of one of the first sub-boards 10 and multiple drilling alignment targets 121 of the other first sub-board 10 can be set and set one-to-one, and the positioning target hole 30 is set one-to-one with the drilling alignment target 121 of one of the first sub-boards 10.

[0138] The middle layer 20 includes at least two connecting line layers 21, and an intermediate dielectric layer 22 is provided between two adjacent connecting line layers 21. The connecting line layers 21 are provided with clearance holes 211 at the positions corresponding to the drill alignment target 121. When a positioning target hole 30 is machined to penetrate the drill alignment target 121 of one of the first sub-boards 10, the middle layer 20, and the drill alignment target 121 of the other first sub-board 10, the positioning target hole 30 penetrates the connecting line layer 21 and the intermediate dielectric layer 22.

[0139] By adopting the above solution, the positioning target hole 30 can be avoided by using the avoidance hole 211 during machining, thus preventing the connection line layer 21 from affecting the drilling accuracy of the positioning target hole 30.

[0140] Optionally, the first circuit layer 12 on the side of the first sub-board 10 near the middle layer 20 is provided with a clearance groove 122, which is correspondingly set with the drilling alignment target 121.

[0141] This configuration allows for avoidance of the first circuit layer 12 on the side of the first sub-board 10 closest to the middle layer 20 during the machining of the positioning target hole 30, thus preventing the first circuit layer 12 from affecting the drilling accuracy of the positioning target hole 30.

[0142] It is understandable that the areas corresponding to the clearance hole 211 and the clearance groove 122 can be hollowed out.

[0143] The circuit board 100 provided in this application reduces CTE without increasing wiring difficulty. It also adopts a scheme of two ceramic components 13. By pre-drilling holes 131 in the ceramic components 13 and then filling the holes with resin, and by adding through holes 40 in the internal area of ​​the pre-drilled holes 131 through mechanical drilling, the problem of alignment between the mechanical drilling and the first filling part 14 in the pre-drilled holes 131 of different ceramic components 13 is solved.

[0144] Please refer to Figures 12 to 15 In the second embodiment, the receiving groove 103 includes a first groove 1011 formed on the core plate 101 and a second groove formed on the first dielectric layer 11.

[0145] Before stacking the first dielectric layer 11 and two core boards 101 together to form a laminate, the method of manufacturing the circuit board 100 further includes: processing a first groove 1011 on the core board 101 and processing a second groove on the first dielectric layer 11.

[0146] By adopting the above scheme, the receiving groove 103 can be manufactured relatively easily.

[0147] The first groove 1011 is machined on the core board 101, including:

[0148] First, an initial groove is machined on the core board 101. The size of the initial groove is smaller than that of the first groove 1011. The cross-section of the initial groove is rectangular. The initial groove has two opposing first sidewalls and two opposing second sidewalls. The arrangement direction of the two first sidewalls is parallel to the width direction of the initial groove, and the arrangement direction of the two second sidewalls is parallel to the length direction of the initial groove.

[0149] Next, the first sidewalls are machined using a first milling cutter, and the two second sidewalls are machined using a second milling cutter to obtain the first groove 1011.

[0150] By adopting the above scheme, the first sidewall and the second sidewall can be pre-compensated when processing the first groove 1011, thereby avoiding the difference in processing amount between the first sidewall and the second sidewall, which would cause the ceramic part 13 to shift to the area with larger gaps after being placed inside the receiving groove 103.

[0151] It is understandable that the two first sidewalls can be arranged along the X-axis direction (the width direction of the core plate 101), and the two second sidewalls can be arranged along the Y-axis direction (the length direction of the core plate 101). When machining the first groove 1011 on the core plate 101, the first and second milling cutters are used to separate the milling cutters. After the milling cutters are separated, the compensation is adjusted according to the first piece to ensure that the dimensions of the first groove 1011 are within the specification after machining the two first sidewalls with the first milling cutter and machining the two second sidewalls with the second milling cutter, so as to avoid the ceramic part 13 from shifting to the area with large gaps after being placed in the receiving groove 103.

[0152] It should be noted that since the core board 101 will shrink to varying degrees after being pressed, pre-compensation will be performed when manufacturing the circuit of the core board 101 to ensure that the expansion and contraction values ​​of the core board 101 layer match those of other layers after pressing. At the same time, the expansion and contraction of the core board 101 also needs to be considered when machining the first groove 1011 on the core board 101.

[0153] As one possible approach, the first slot 1011 has a theoretical position A, which is the position of the first slot 1011 without considering the expansion and contraction of the core board 101.

[0154] Before machining the initial groove on the core board 101, obtain the expansion and contraction value of the core board 101.

[0155] Specifically, the expansion and contraction value can be measured after the core board 101 is pressed together by making the first piece.

[0156] When machining the two first sidewalls with the first milling cutter and the two second sidewalls with the second milling cutter to obtain the first groove 1011, the actual position of the first groove 1011 is translated relative to the theoretical position A by a distance determined by the expansion and contraction value along the center away from the core plate 101.

[0157] Specifically, when the actual position of the first groove 1011 is translated away from the center of the core plate 101 relative to the theoretical position A, it can be translated along the long side and / or short side of the core plate 101.

[0158] By adopting the above scheme, the first sidewall and the second sidewall can be pre-compensated according to the expansion and contraction value of the core plate 101 when processing the first groove 1011, thereby avoiding the difference in processing amount between the first sidewall and the second sidewall, which would cause the ceramic part 13 to shift to the area with larger gaps after being placed inside the receiving groove 103.

[0159] It should be noted that if the same milling cutter is used when machining the first groove 1011 based on the expansion and contraction value of the core board 101, it will cause the dimensions of the first groove 1011 to exceed the tolerance, and the pre-compensation in the X-axis and Y-axis directions will be inconsistent. The dimensional deviations in the X-axis and Y-axis directions will be inconsistent, and the dimensions of the first groove 1011 cannot be adjusted by conventionally modifying the pre-compensation of the milling cutter. Assuming that the size of the embedded ceramic part 13 is 80mm*85mm, in order to facilitate the embedding of the ceramic part 13, it is necessary to ensure that the first groove 1011 of the core board 101 is larger than the ceramic part 13 by L1 on one side. L1 can be selected from 0.05mm to 0.075mm. If it is 0.05mm, the dimensions of the core board 101 after milling will also correspond when the core board 101 has pre-compensation. Assuming the pre-compensation coefficient in the X-axis direction is 10% and the pre-compensation coefficient in the Y-axis direction is 4%, the width of the first groove 1011 corresponding to the expansion and contraction of the milling tape in the X-axis direction is 80.18 (80.1*1.001) mm, and the length of the first groove 1011 corresponding to the expansion and contraction of the milling tape in the Y-axis direction is 85.13 (85.1*1.0004) mm. Under the same milling cutter pre-compensation, the dimensional difference of the first groove 1011 in the X-axis direction and the Y-axis direction is 0.05 mm. It is impossible to ensure the consistency of the width and length of the first groove 1011, which will cause the ceramic part 13 to shift to the area with larger gaps after embedding (such as the X-axis direction in this case).

[0160] In this embodiment, the first groove 1011 is translated along the expansion and contraction direction according to a preset size, but its size is not adjusted according to the expansion and contraction value. The specific embodiment is as follows:

[0161] The first milling cutter is used to machine the two first sidewalls, and the second milling cutter is used to machine the two second sidewalls. The milling tape in the X-axis and Y-axis directions is divided into cuts, and different compensations are applied after the cuts. The first milling cutter in the X-axis direction compensates 0.04mm on one side to ensure that the width of the first groove 1011 after milling is the standard value of 80.1mm. The second milling cutter in the Y-axis direction compensates 0.015mm on one side to ensure that the length of the first groove 1011 after milling is the standard value of 85.1mm, so as to prevent the ceramic part 13 from shifting to the area with large gaps after it is embedded.

[0162] It is understandable that the method of machining the second groove on the first dielectric layer 11 is similar to the method of machining the first groove 1011 on the core board 101.

[0163] Please refer to Figure 16 In the third embodiment, the circuit board 100 further includes a second sub-board 60, which is located on the side of the first sub-board 10 away from the middle layer 20. The second sub-board 60 includes a second circuit layer 61, and a connection medium layer is disposed between the second circuit layer 61 and the first circuit layer 12.

[0164] Compared to the first embodiment, in the third embodiment, a conductive part 41 is provided inside the through hole 40. After the first circuit layer 12 of one first sub-board 10 and the first circuit layer 12 of the other first sub-board 10 are both connected to the conductive part 41 and electrically conductive, the manufacturing method of the circuit board 100 further includes: stacking the connecting dielectric layer and the second sub-board 60 sequentially on the side of the first sub-board 10 away from the middle layer 20 and performing a pressing process.

[0165] By adopting the above scheme, multi-layer circuit boards 100 can be manufactured.

[0166] It should be noted that the material of the second circuit layer 61 can be copper, aluminum, or silver, etc. The connecting dielectric layer can be a prepreg or resin-based prepreg, etc.

[0167] The second sub-board 60 may include one or more core boards. For example, the circuit board 100 includes 14 layers of circuitry, and the second sub-board 60 includes a plurality of second circuit layers 61. Adjacent second circuit layers 61 are connected by blind vias, and through-holes 40 can penetrate a portion of the second circuit layers 61. The first circuit layer 12 and the second circuit layer 61 are electrically connected by conductive portions 41 within the through-holes 40.

[0168] Please refer to Figure 17 In the fourth embodiment, when the first dielectric layer 11 and two core plates 101 are stacked together to form a laminate, the laminate can be a panel 200 composed of multiple units, each of which is embedded with a ceramic component 13.

[0169] Understandably, a via 40 can be fabricated on each cell using a CCD (Charge Coupled Device) partitioning and alignment method.

[0170] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for manufacturing a circuit board, characterized in that, include: The middle layer and two first sub-boards are stacked together and pressed together. The middle layer is located between the two first sub-boards. The first sub-board includes two first circuit layers and a first dielectric layer disposed between the two first circuit layers. A ceramic component is provided in the first sub-board. Part of the first circuit layer covers the ceramic component. The ceramic components in the two first sub-boards are arranged facing each other. A drilling alignment target is provided on the first circuit layer. A positioning target hole is machined through the drill alignment target of one of the first sub-boards, the middle layer, and the drill alignment target of the other first sub-board. The axis of the positioning target hole is parallel to the axis of the drill alignment target, and the axis of the positioning target hole is located at the midpoint of the plane defined by the axis of the drill alignment target of one of the first sub-boards and the axis of the drill alignment target of the other first sub-board. Using the positioning target hole as the second alignment reference, a through hole is machined to penetrate the middle layer and the two first sub-boards. The through hole penetrates the ceramic component in the two first sub-boards and the first circuit layer covering the ceramic component. A conductive part is provided inside the through hole, and the conductive part is connected to the first circuit layer covering the ceramic part.

2. The method for manufacturing a circuit board according to claim 1, characterized in that, Before stacking and laminating the middle layer and the two first sub-boards together, the method for manufacturing the circuit board further includes: The first dielectric layer and two core boards are stacked together to form a laminate. The first dielectric layer is located between the two core boards. A first conductive layer is provided on the side of the core board away from the first dielectric layer. The laminate is provided with a receiving groove that penetrates the first conductive layer of one core board and the first conductive layer of the other core board. The ceramic component is placed inside the receiving groove; The laminated plates are pressed together, and part of the first dielectric layer fills the gap between the ceramic part and the inner wall of the receiving groove; A second conductive layer is disposed on the first conductive layer, such that a portion of the second conductive layer covers the ceramic component, to obtain the first sub-board. The first conductive layer and the second conductive layer constitute the first circuit layer.

3. The method for manufacturing a circuit board according to claim 2, characterized in that, Before placing the ceramic component inside the receiving groove, the method for manufacturing the circuit board further includes: providing a ceramic component with pre-drilled holes; After providing the ceramic component and before setting the second conductive layer on the first conductive layer, the method for manufacturing the circuit board further includes: setting a first filling portion in the pre-drilled hole; When processing the through hole that penetrates the middle layer and the two first sub-plates, the through hole penetrates the first filling portion; When a conductive part is provided inside the through hole, a portion of the conductive part is connected to the first filling part.

4. The method for manufacturing a circuit board according to claim 3, characterized in that, After forming the first conductive layer by depositing a second conductive layer such that a portion of the second conductive layer covers the ceramic component, thus obtaining the first sub-board, the method for manufacturing the circuit board further includes: Using the pre-drilled holes as a reference, a line alignment target is fabricated on the first sub-board; Using the alignment target as the first alignment reference, the circuit is fabricated on the first circuit layer.

5. The method for manufacturing a circuit board according to claim 4, characterized in that, When fabricating a circuit on the first circuit layer using the circuit alignment target as the first alignment reference, the drilling alignment target is fabricated on the first circuit layer using the circuit alignment target as the first alignment reference.

6. The method for manufacturing a circuit board according to claim 2, characterized in that, The receiving groove includes a first groove formed on the core board and a second groove formed on the first dielectric layer; before stacking the first dielectric layer and two core boards together to form a laminate, the method of manufacturing the circuit board further includes: processing the first groove on the core board and processing the second groove on the first dielectric layer.

7. The method for manufacturing a circuit board according to claim 6, characterized in that, The process of machining the first groove on the core board includes: An initial groove is machined into the core board. The size of the initial groove is smaller than that of the first groove. The cross-section of the initial groove is rectangular. The initial groove has two opposing first sidewalls and two opposing second sidewalls. The arrangement direction of the two first sidewalls is parallel to the width direction of the initial groove, and the arrangement direction of the two second sidewalls is parallel to the length direction of the initial groove. The first groove is obtained by machining the two first sidewalls with a first milling cutter and the second sidewalls with a second milling cutter.

8. The method for manufacturing a circuit board according to claim 7, characterized in that, The first groove has a theoretical position; before machining the initial groove on the core plate, the expansion and contraction value of the core plate is obtained; when machining the two first sidewalls with a first milling cutter and machining the two second sidewalls with a second milling cutter to obtain the first groove, the actual position of the first groove is translated relative to the theoretical position by a distance determined by the expansion and contraction value along a path away from the center of the core plate.

9. The method for manufacturing a circuit board according to any one of claims 1 to 8, characterized in that, The method for manufacturing the circuit board further includes: after a conductive part is provided inside the through hole and the conductive part is connected to the first circuit layer covering the ceramic part, the method further includes: stacking a connecting dielectric layer and a second sub-board sequentially on the side of the first sub-board away from the middle layer and performing a pressing process.

10. A circuit board, characterized in that, The circuit board is manufactured by the method of any one of claims 1 to 9. The circuit board includes two first sub-boards and an intermediate layer disposed between the two first sub-boards. The first sub-board includes two first circuit layers and a first dielectric layer disposed between the two first circuit layers. A ceramic component is disposed in the first sub-board, and a portion of the first circuit layer covers the ceramic component. The ceramic components in the two first sub-boards are arranged facing each other. The circuit board has a through hole that penetrates the ceramic component in one of the first sub-boards, the intermediate layer, and the ceramic component in the other first sub-board. A conductive part is disposed in the through hole and is connected to the first circuit layer covering the ceramic component.

11. The circuit board according to claim 10, characterized in that, The ceramic component is provided with a pre-drilled hole, and a first filling part is provided inside the pre-drilled hole. The through hole penetrates the first filling part, and part of the conductive part is connected to the first filling part.

12. The circuit board according to claim 11, characterized in that, The conductive part is configured as a ring, and a second filling part is provided inside the conductive part.

13. The circuit board according to any one of claims 10 to 12, characterized in that, The middle layer includes at least two connection line layers, and an intermediate dielectric layer is disposed between two adjacent connection line layers. The via penetrates the connection line layer and the intermediate dielectric layer.

14. The circuit board according to any one of claims 10 to 12, characterized in that, The circuit board further includes a second sub-board, which is located on the side of the first sub-board away from the middle layer. The second sub-board includes a second circuit layer, and a connection medium layer is disposed between the second circuit layer and the first circuit layer.

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