A WPT system switch circuit fault analysis method, storage medium and program product

By acquiring DC-side voltage and drive signals in real time and combining the polarity of the switching function changes, the open-circuit fault detection and accurate location of the switching circuit in the wireless power transmission system are realized. This solves the problems of inaccurate location and increased hardware costs in existing technologies, and improves the safety and reliability of the system.

CN120993179BActive Publication Date: 2026-07-03NAVAL UNIV OF ENG PLA

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NAVAL UNIV OF ENG PLA
Filing Date
2025-08-19
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Existing fault diagnosis methods for wireless power transmission systems cannot accurately locate open-circuit faults and require additional hardware support, increasing system complexity and cost.

Method used

By acquiring the DC-side voltage signal and drive signal of the switching circuit in real time, extracting the change in the switching function, setting the voltage judgment threshold and delay verification time, and combining the polarity of the change in the switching function to locate the faulty device, the diagnosis and location of open circuit faults can be realized.

Benefits of technology

It enables rapid detection and precise location of open-circuit faults without the need for additional hardware, reducing the hardware cost and complexity of the system and improving the accuracy and real-time performance of diagnosis.

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Abstract

This invention discloses a fault analysis method for a WPT system switching circuit, comprising: real-time acquisition of the DC-side voltage signal u of the switching circuit. dc (t) and the drive signal S of the switching device x (t), and extract the change in the switching function ΔS. x The time point t = ±1 f Set voltage threshold U th At time t f The diagnostic threshold time t after th Internally satisfy u dc (t f )≤U th And during the delayed verification period t dv Internally continuously satisfy u dc (t f +T)≤U th and u dc (t f +2T)≤U th If an open circuit fault is detected, it is determined that an open circuit fault exists; based on the triggering event t f The corresponding ΔS x Polarity-based fault location device, if ΔS x =-1, then position to the upper switch transistor; if ΔS x =1, then the location is the lower switching transistor. This invention does not require additional hardware equipment, reducing system cost and complexity. It is applicable to fault diagnosis of switching circuits in wireless power transmission systems using different types of switching devices, and also applicable to fault diagnosis of switching circuits in wireless power transmission systems using different resonant compensation network topologies.
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Description

Technical Field

[0001] This invention relates to the field of wireless power transfer technology, and in particular to a fault diagnosis and location method, storage medium, and program product for a wireless power transfer system switching circuit based on voltage characteristics. Background Technology

[0002] Wireless power transfer (WPT) technology has been widely used in electric vehicles, drones, and power supply in extreme environments (such as high-voltage inspection and deep-sea exploration). However, WPT systems consist of a large number of power electronic devices, and their high-frequency operating characteristics coupled with harsh operating conditions can easily lead to reliability issues such as aging of switching devices and insulation failure, ultimately causing system failure. Therefore, ensuring reliable system operation is crucial. Existing WPT fault diagnosis methods are mainly divided into three categories: fault-tolerant control methods, which maintain operation after a fault through topology reconstruction or control optimization, but are essentially "operating with defects" and cannot locate or eradicate the fault source. Data-driven methods, although not requiring precise models, are highly dependent on large-scale training data for specific topologies, resulting in poor real-time performance and weak generalization ability. Signal processing methods can reduce data dependence, but existing solutions usually require the introduction of additional hardware, increasing system complexity and cost, and limiting applicable scenarios.

[0003] Based on the above analysis, and considering that short-circuit faults in switching devices typically transform into open-circuit faults via fast-acting fuses, while open-circuit faults do not cause immediate system failure in the short term, they can lead to higher electrical stress on other devices, thereby inducing secondary faults. Therefore, this invention aims to provide a method for diagnosing and locating open-circuit faults in switching circuits of wireless power transfer systems based on voltage characteristics, without requiring additional hardware support, to improve accuracy and comprehensiveness and solve existing problems. Summary of the Invention

[0004] In view of the technical defects and drawbacks existing in the prior art, embodiments of the present invention provide a WPT system switching circuit fault analysis method, storage medium, and program product that overcomes or at least partially solves the above problems. The specific solution is as follows:

[0005] As a first aspect of the present invention, a method for fault analysis of a WPT system switching circuit is provided, the method comprising:

[0006] Signal measurement: Real-time acquisition of the DC-side voltage signal u of the switching circuit. dc (t) and the drive signals S of all switching devices x (t), and extract the change in the switching function ΔS. x The time point t = ±1 f ;

[0007] Fault diagnosis: Setting the voltage judgment threshold U th At time tf The diagnostic threshold time t after th Internally satisfy u dc (t f )≤ U th And during the delayed verification period t dv Internally continuously satisfy u dc (t f +T)≤U th and u dc (t f +2T)≤U th If the system switches, then an open circuit fault is determined to exist, where T is the system switching cycle;

[0008] Fault location: Based on the triggering event t f The change in the switching function ΔS corresponding to the moment of switching state transition x The polarity of the faulty device, if ΔS x =-1, then locate the upper switch S of the corresponding bridge arm. upper If ΔS x =1, then locate the lower switch S of the corresponding bridge arm. lower .

[0009] Furthermore, the driving signal S x The definition logic of (t) includes:

[0010] x is the bridge arm identifier variable, and its value set is {leading bridge arm, lagging bridge arm};

[0011] Each bridge arm contains an upper switching transistor S. upper and the lower switch S lower Two physical devices;

[0012] Mapping the drive state of the switching device to discrete function values:

[0013]

[0014] Change in switching function ΔS x The calculation method is as follows:

[0015] ;

[0016] in Indicates t f The last sampling point before time step, and ΔS x ∈{-1,0,+1}, only if |ΔS x The fault diagnosis process is triggered when |=1.

[0017] Furthermore, the voltage determination threshold Uth is set to satisfy the following:

[0018] When ΔSx When =0, u dc The upper limit of the steady-state fluctuation range of (t) is less than U. th ;

[0019] When ΔS x When =±1, u under normal operating conditions dc (t f The oscillation peak value is greater than U. th ;

[0020] Furthermore, the DC-side voltage signal u dc The physical model of (t) is:

[0021] ;

[0022] in L is the DC support capacitor voltage of the WPT system. S For the equivalent stray inductance of the WPT system, di s / dt represents the rate of change of current when the switching device is switching.

[0023] Furthermore, the mapping rule for locating the faulty device is as follows:

[0024] Location logic trigger condition: Executed only when the fault diagnosis step determines that an open circuit fault exists;

[0025] Mapping relationship between fault type and feature disappearance:

[0026] When the change in switch state ΔS x When =-1, the position is set to the upper switch S. upper The fault, the condition for the voltage characteristic to disappear is: ΔS x The feature disappears when the value is -1;

[0027] When the change in switch state ΔS x When =+1, the position is set to the lower switching transistor S. lower The fault, the condition for the voltage characteristic to disappear is: ΔS x The feature disappears when the value is increased by 1.

[0028] Furthermore, the diagnostic threshold time t th The calculation formula is:

[0029]

[0030] Among them, t delay t is the delay time of the switching device. max The maximum time required for the switching device to turn on and off.

[0031] Furthermore, the method is applicable to various types of switching devices, including MOSFET modules or IGBT modules; when using an IGBT module, the current path is forced to flow through the lower bridge arm anti-parallel diode during bridge arm switching.

[0032] Furthermore, the method is applicable to WPT systems with arbitrary resonant compensation topologies, including SS, LCL, LCC, or CLC topologies; when the system is in zero-voltage switching (ZVS) mode, the output side of the switching circuit is equivalent to a resistor R. in With inductor L in Series circuit.

[0033] As a second aspect of the present invention, a computer-readable storage medium is provided, wherein a computer program is stored therein, and when executed by a computer, the computer program causes the computer to perform the WPT system switching circuit fault analysis method as described in any of the foregoing embodiments.

[0034] As a third aspect of the present invention, a computer program product is provided, comprising computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is executed in a processor of an electronic device, the processor in the electronic device executes the WPT system switching circuit fault analysis method as described in any of the foregoing embodiments.

[0035] The present invention has the following beneficial effects:

[0036] This method enables open-circuit fault diagnosis and location in WPT system switching circuits without requiring additional hardware support, thereby reducing system hardware costs and complexity. The method is applicable to various WPT systems, including but not limited to charging systems for electric vehicles, smartphones, and electronic devices, and can automatically detect faults, improving system safety and reliability. Attached Figure Description

[0037] Figure 1 A flowchart illustrating a fault analysis method for a WPT system switching circuit provided in an embodiment of the present invention;

[0038] Figure 2 This is a circuit topology diagram of a WPT system in one embodiment of the present invention;

[0039] Figure 3 This is a diagram showing the main current path of a system in one embodiment of the present invention;

[0040] Figure 4 This is a comparison diagram of the current paths of the MOSFET and IGBT WPT system switching circuits in one embodiment of the present invention;

[0041] Figure 5This is an equivalent circuit diagram of the WPT system in one embodiment of the present invention;

[0042] Figure 6 This is a current path diagram considering the switching commutation process in one embodiment of the present invention;

[0043] Figure 7 This is a current path diagram in one embodiment of the present invention when an open-circuit fault occurs in a switching device;

[0044] Figure 8 This is an LTspice simulation model diagram of a MOSFET-type WPT system in one embodiment of the present invention;

[0045] Figure 9 This is an LTspice simulation model diagram of an IGBT-type WPT system according to one embodiment of the present invention;

[0046] Figure 10 The figure shows the simulation results of the voltage characteristics of the MOSFET type WPT system in one embodiment of the present invention when the switching device at different locations experiences an open circuit fault.

[0047] Figure 11 This is a simulation result of the voltage characteristics of an IGBT-type WPT system in one embodiment of the present invention when an open-circuit fault occurs in the switching device at different locations. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0049] To enable those skilled in the art to better understand the technical solutions of the present invention, exemplary embodiments of the present invention are described below in conjunction with the accompanying drawings, including various details of the embodiments of the present invention to aid understanding. These should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0050] Where there is no conflict, the various embodiments of the present invention and the features thereof may be combined with each other.

[0051] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.

[0052] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded. Terms such as “connected” or “linked” are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect.

[0053] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having the meaning consistent with their meaning in the context of the relevant art and the invention, and will not be interpreted as having an idealized or overly formal meaning unless expressly so defined herein.

[0054] In the technical solution of this invention, the collection, storage, use, processing, transmission, provision, and disclosure of user personal information all comply with relevant laws and regulations and do not violate public order and good morals. The use of user data in this technical solution follows relevant national laws and regulations (e.g., the "Information Security Technology - Personal Information Security Specification"). For example: appropriate measures are taken for personal information access control; restrictions are imposed on the display of personal information; the purpose of using personal information does not exceed the scope of direct or reasonable association; and explicit identity targeting is eliminated when using personal information to avoid precisely locating a specific individual.

[0055] To address at least one of the technical problems existing in the aforementioned related technologies, the present invention provides a method for fault analysis of WPT system switching circuits. Figure 1 This is a flowchart illustrating a fault analysis method for a WPT system switching circuit according to an embodiment of the present invention. The method includes:

[0056] Signal measurement: Real-time acquisition of the DC-side voltage signal u of the switching circuit. dc (t) and the drive signals S of all switching devices x (t), and extract the change in the switching function ΔS. x The time point t = ±1 f ;

[0057] Fault diagnosis: Based on the voltage characteristic signals when the switch state changes and when it does not change, set a reasonable characteristic voltage threshold U. th If u dc (t fU th If the switching circuit in the system is operating normally at this time, then it is directly assumed that the system is operating normally. Otherwise, if the system fails to operate normally during the subsequent delayed verification period t... dv Inside u dc (t f +T) and u dc (t f +2T)≤U th All are not greater than U th If the system is found to have an open circuit fault, proceed to the next step of fault location; otherwise, the system is considered to be operating normally and returns to the signal measurement stage. Here, T is the system switching cycle.

[0058] Fault location: based on u dc (t f The corresponding S x (t f It can directly pinpoint the fault in the leading or lagging axle arm. If ΔS x = -1 indicates that the upper switch S of this bridge arm is... upper If an open circuit fault occurs, if ΔS x = 1 indicates that the lower switch S of this bridge arm is 1. lower In the event of an open circuit fault, the fault can be accurately located.

[0059] Compared to existing technologies, this method acquires DC-side voltage and drive signals in real time, and combines this with the change in the switching function (ΔS). x This method achieves rapid fault detection and precise location by triggering diagnostics at time points of ±1 (U0.01). Existing technologies often require complex signal processing or additional hardware, while this method simplifies the process and improves real-time performance (reducing diagnostic latency). Furthermore, by setting a voltage judgment threshold (U0.01), it achieves this. th ) and multiple time conditions (such as t) th and t dv This significantly reduces the false alarm rate (e.g., avoiding misdiagnosis during voltage fluctuations) and ensures the accuracy of open-circuit fault diagnosis. Fault location rules (based on ΔS) x The polarity is directly mapped to the upper / lower switching transistor, making the positioning more intuitive and reliable, and solving the problem of ambiguous positioning in the existing technology.

[0060] In some embodiments, the present invention also provides a system circuit topology.

[0061] This embodiment uses a common resonant WPT system, which consists of a switching circuit, a resonant compensation network, and a rectifier circuit, such as... Figure 2The diagram shows a typical SS-type WPT system circuit topology. It is worth noting that the system input is not necessarily an ideal DC power supply. In practical applications, the power supply may be rectified by the grid before being connected to the system. Therefore, in order to filter out the ripple in the rectified voltage, a DC-side filter circuit is introduced in the topology studied in this paper.

[0062] In WPT systems, by designing the topology of the resonant compensation network (e.g., LCL, LCC, and CLC types) and combining it with dynamic parameter adjustment strategies, the system can achieve constant current, constant voltage, or constant power output under offset conditions. Furthermore, to improve transmission efficiency, phase-shift control is typically used to operate the system in zero-voltage switching (ZVS) mode. Although the resonant compensation topologies vary, when the ZVS condition is met, the output side of their switching circuits can all be equivalent to a resistor R. in and inductor L in In order to simplify the subsequent theoretical analysis, this invention focuses on the typical SS-type structure.

[0063] exist Figure 2 Middle,U o This is a DC voltage source, L1 is a filter inductor, C5 is a DC support capacitor, and L... S C6 is a stray inductor and C7 is a filter capacitor. S1~S4 are MOSFET modules, which can be replaced with IGBT modules under high voltage and low frequency conditions to form a single-phase full-bridge inverter circuit. T (R) R L T (L) R C T (C) R ), i T (i R D5, D6, D7, D8 represent the equivalent series resistance, resonant inductance, resonant capacitance, and current of the resonant compensation network on the transmitting (receiving) side, respectively. M represents the mutual inductance between the coils. D5 to D8 are diodes, which together form a single-phase full-bridge uncontrolled rectifier circuit. R L This is the load resistance.

[0064] The input voltage of the switching circuit is defined as the DC-side voltage U of the WPT system. dc It is supported by DC capacitor voltage U C5 and stray inductance voltage U LS composition:

[0065]

[0066] Among them, the stray inductance is composed of the line inductance L S 'and the equivalent series inductance L of the DC support capacitor S "Combined into:"

[0067]

[0068] When phase-shift control is used, the dead time t is ignored. d Under ideal conditions and considering various losses, based on fundamental frequency analysis, the effective value of the output voltage of the switching circuit is:

[0069]

[0070] In the formula, δ is the phase shift angle, which ranges from 0° to 180°.

[0071] From equation (3) The system model can be expressed in the following form based on Kirchhoff's voltage law:

[0072]

[0073] In the formula, ω is the operating angular frequency.

[0074] The equivalent impedance Zin on the output side of the switching circuit can be calculated from equation (4):

[0075]

[0076] In some embodiments, the present invention also provides a current path analysis of ZVS mode under system phase-shift control.

[0077] To simplify the analysis, the diodes connected in anti-parallel are denoted as D1 to D4, and the parasitic capacitances are denoted as C1 to C4. The system can be divided into ten operating modes within one switching cycle; however, due to the circuit's symmetry, this paper only analyzes half a cycle.

[0078] Mode 1: In a MOSFET-type WPT system, switches S1 and S4 are turned on, and the current conduction path is as follows: Figure 3 As shown in (a).

[0079] Mode 2: S1 is off at zero voltage, S4 remains on. dc S4 charges C1 while C2 discharges, creating conditions for S2 to conduct at zero voltage. The current path in this mode is as follows: Figure 3 As shown in (b).

[0080] Mode 3: After C1 is fully charged and C2 is fully discharged, the current path switches to D2 for freewheeling. Subsequently, S2 conducts with zero voltage. The current path in this mode is as follows: Figure 3 (c1) and Figure 3As shown in (c2).

[0081] Mode 4: S4 is off at zero voltage, S2 remains on. C4 charges, while C3 charges U through S2. dc Discharge creates conditions for S3 to turn on at zero voltage. The current path in this mode is as follows: Figure 3 As shown in (d).

[0082] Mode 5: After C3 has finished discharging and C4 has finished charging, the current path switches to D3 to achieve freewheeling. Subsequently, S3 turns on with zero voltage. The current path in this mode is as follows: Figure 3 (e1) and Figure 3 As shown in (e2).

[0083] When using an IGBT-type switching circuit, the system's ZVS operating mode is similar to that of a MOSFET-type circuit. The biggest difference lies in the device's conduction characteristics: MOSFET modules have bidirectional conductivity, while IGBT modules can only conduct unidirectionally. Therefore, when the switching device switches from the upper bridge arm to the lower bridge arm, the current can only freewheel through the anti-parallel diode in the lower bridge arm, such as... Figure 4 As shown.

[0084] In some embodiments, the present invention also provides a DC-side voltage model for a WPT system.

[0085] Figure 5 The equivalent circuit diagram of the WPT system including switching circuits is shown below, where the bridge arm consisting of S1 and S2 is defined as the leading bridge arm, and the bridge arm consisting of S3 and S4 is defined as the lagging bridge arm. The switching function of the system is defined as:

[0086]

[0087] In the formula, S upper (S) lower ) represents the upper (lower) switch tube of the bridge arm.

[0088] Input current i of the switching circuit dc S is available x express:

[0089]

[0090] In the formula, i x This refers to the output current of the leading or lagging bridge arm.

[0091] When the switching device does not switch and when it switches, i dc The rates of change are respectively:

[0092]

[0093]

[0094] In the formula, di s / dt is the rate of change of current when the switching device is turned on or off. This value is affected by factors such as device parameters and system operating conditions.

[0095] According to Kirchhoff's current law, di dc / dt and di dcs Each of / dt satisfies the following equation:

[0096]

[0097]

[0098] In the formula, di L1 / dt and diC5 / dt represent the currents i flowing through L1 and C5 when the switching devices are not switching. L1 and i C5 The rate of change of , while di L1s / dt and di C5s / dt represents the i when the switching device switches. L1 and i C5 The rate of change. The change in current will occur at L1 and L... S Induced voltage is generated on:

[0099]

[0100]

[0101] Assume U o and U C5 It remains unchanged, and when the switching device is not switched, di L1 / dt and di C5 / dt is approximately zero. According to Kirchhoff's voltage law, we have:

[0102]

[0103] From equation (14), we can obtain:

[0104]

[0105] Since the filter inductance is usually much larger than the stray inductance, substituting equations (10)~(12) and (15) into (13) yields:

[0106]

[0107] Regardless of whether the switch state changes, di dc / dt can be ignored. Substituting equations (9) and (16) into equation (1), we get:

[0108]

[0109] According to equation (17), it can be analyzed that when the switch state is not switched, i.e., ΔS x When = 0, di dcs / dt is zero, at which point u dc It remains relatively stable. However, when the switch state changes, i.e., ΔS x When = ±1, di dcs The mutation of / dt will occur in L S A significant induced voltage pulse is generated. This voltage characteristic provides crucial information for subsequent fault diagnosis.

[0110] Compared to existing technologies, this claim provides u dc The analytical model of (t) directly correlates voltage behavior with system parameters such as stray inductance Ls and current rate of change. Existing technologies lack such models, rely on black-box algorithms, and have poor interpretability. This method enhances the theoretical foundation, facilitates parameter optimization and fault analysis (e.g., rapid verification of diagnostic rules in simulation), and improves the scalability and debugging efficiency of the method.

[0111] In some embodiments, the present invention also provides a DC-side voltage characteristic analysis.

[0112] Since the charging and discharging time of parasitic capacitance is much shorter than the duration of other operating modes, it can be reasonably ignored in the fault diagnosis model. Because the switching process of the switching device is not instantaneous, considering the influence of the switching transition phase, the current path can be divided as follows: Figure 6 The six operating modes are shown. Due to the symmetry of the circuit, this paper only discusses i. x We will analyze the three modes of >0.

[0113] Mode 1: S before the switch state changes x = 1, i x By S upper Conductive, such as Figure 6 As shown in (a).

[0114] Mode 2: During the switching process, S x From 0 to 1, Supper Gradually shut down, D lower Gradually, it becomes conductive. At this point, i x It can be broken down into two parts: S upper The turn-off current i xa from i x Gradually decrease to zero, D lower The conduction current i xb Gradually increase from zero to i x ,like Figure 6 As shown in (b). This process includes:

[0115]

[0116]

[0117] When the switching device does not experience an open-circuit fault, combining equations (17) and (19) leads to the conclusion that when the switching state changes, i.e., ΔS x When = ±1, u dc This will generate a corresponding positive voltage pulse. In the equivalent circuit of the WPT system, the transfer function of the RLC circuit is:

[0118]

[0119] In the formula, R1 and R dc These represent the equivalent series resistances of the branches containing L1 and C5, respectively. According to the characteristic equation in the denominator of equation (29), the undamped natural frequency ω of this circuit is... n The damping ratio ζ is:

[0120]

[0121] Because R1 and R dc The value of ζ is very small, while the value of C5 / L1 is typically between 0 and 1. Therefore, ζ is between 0 and 1, and the circuit is in underdamped mode. When the switching state changes, u dc It exhibits a voltage characteristic with obvious oscillation decay.

[0122] Mode 3: When the switch state changes, S x = 0, i x By D lower Conductive, such as Figure 6 As shown in (c).

[0123] And when S upper When an open circuit fault occurs, in i x When i > 0, regardless of whether the switch state changes, ix Always by S lower Or D lower Conductive, such as Figure 7 As shown in (a). This makes i dcs Maintain relative stability, u dc The voltage characteristics disappear. And in i x When u < 0, the current path is consistent with the previous analysis. dc It has corresponding voltage characteristics. Similarly, when S lower When an open circuit fault occurs, u dc There are also cases where the characteristics disappear. Table 1 shows a comparison of the voltage characteristics under normal operating conditions and open-circuit faults.

[0124] Table 1 Comparison of DC-side voltage characteristics of WPT system switching circuits under normal and fault conditions

[0125]

[0126] Compared to existing technologies, this invention refines the positioning rules (ΔS). x = -1 Locate the upper switching transistor, ΔS x = +1 to locate the lower switching transistor), and introduce a feature vanishing condition (such as ΔS). x = -1 (feature disappears). Existing technologies often stop at the bridge arm level and cannot distinguish specific devices; this method achieves device-level positioning with higher accuracy, and through feature disappearance verification, it avoids mispositioning caused by temporary interference and improves the reliability of diagnosis.

[0127] In some embodiments, the diagnostic threshold time t in the diagnostic strategy th Defined as:

[0128]

[0129] In the formula, t delay t is the delay time of the switching device. max The maximum time required for the switching device to turn on and off.

[0130] Compared to existing technologies, this invention provides a formula for calculating tth (tth = t_delay + t_max), based on the actual delay and maximum switching time of the switching device. Existing technologies have a fixed time window, which is unsuitable for device variations and prone to missed detections; this method dynamically adjusts t... th This ensures that the diagnostic window covers all possible fault scenarios (such as IGBT turn-off delay), improving the adaptability and accuracy of the method, especially performing better in high-speed switching systems.

[0131] In some embodiments, the present invention also provides a simulation verification method.

[0132] To verify the effectiveness of the proposed fault diagnosis method, simulation models of MOSFET and IGBT WPT systems were built based on the LTspice platform, such as... Figure 8 and Figure 9 As shown in Table 2, the specific parameter configurations for the MOSFET-type WPT system are similar to those for the IGBT-type system, and will not be repeated here.

[0133] Table 2 Simulation Parameters of MOSFET-type WPT System

[0134]

[0135] Figure 10 (a) shows the u value when an open-circuit fault occurs in S1 at t = 3.2 ms in the WPT system. dc Simulation waveform. When the system has no switching state transition, u dc The fluctuations are very small, and a clear voltage characteristic can be observed at the instant the switching state changes. After a fault occurs, the corresponding characteristic waveform disappears. By analyzing the timing information of the switch drive signal, the fault can be located in the leading arm. Combined with ΔS... x The criterion of -1 further identifies the fault as the upper switching transistor of that bridge arm, namely S1. Similarly, other figures illustrate u under open-circuit faults of the MOSFET module at different locations. dc The waveform simulation results, diagnostic and localization results are consistent with the theoretical analysis, verifying the effectiveness of the proposed diagnostic method. Figure 11 This demonstrates the operation of switching devices at different locations in an IGBT-type WPT system under open-circuit fault conditions. dc The waveform simulation results, diagnostic and location results are consistent with the theoretical analysis, verifying the applicability of the proposed diagnostic method when the system uses different types of switching devices.

[0136] In some embodiments, the present invention also provides an applicability analysis of the diagnostic method under different resonance compensation topologies.

[0137] Although numerous resonant compensation network topologies exist in WPT systems, the input impedance of the system remains a resistive-inductive load when the ZVS condition is met. Under phase-shift control, the current path of the switching circuit remains consistent with that of the SS-type system analyzed in this paper. Therefore, the switching circuit fault diagnosis method proposed in this paper, applicable to WPT systems, is not only suitable for SS-type WPT systems but also has universal application value for WPT systems with different resonant compensation topologies.

[0138] This invention also provides a computer-readable medium. The computer-readable medium stores a computer program, which, when executed by a processor, implements the steps in any of the WPT system switching circuit fault analysis methods described in the above embodiments. The computer-readable storage medium can be volatile or non-volatile.

[0139] This invention also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code. When the computer-readable code is run in the processor of an electronic device, the processor in the electronic device executes the above-described WPT system switching circuit fault analysis method.

[0140] Those skilled in the art will understand that all or some of the steps, systems, and apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software can be distributed on a computer-readable storage medium, which may include computer storage media (or non-transitory media) and communication media (or transient media).

[0141] As is known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, such as computer-readable program instructions, data structures, program modules, or other data. Computer storage media includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technologies, portable compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, it is known to those skilled in the art that communication media typically contain computer-readable program instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0142] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.

[0143] The computer program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing state information from the computer-readable program instructions. This electronic circuitry can execute the computer-readable program instructions to implement various aspects of the invention.

[0144] The computer program product described herein can be implemented specifically through hardware, software, or a combination thereof. In one alternative embodiment, the computer program product is specifically embodied in a computer storage medium; in another alternative embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.

[0145] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0146] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0147] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0148] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0149] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.

[0150] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for analyzing a fault of a switching circuit of a WPT system, characterized in that, The method is applicable to any resonant compensation topology WPT system operating in zero-voltage switching (ZVS) mode, and the entire diagnostic process only acquires the DC-side voltage signal u of the switching circuit. dc (t) and the drive signals S of all switching devices x (t), without the need for any current sensor; the method includes: Signal measurement: Real-time acquisition of the DC-side voltage signal u of the switching circuit. dc (t) and the drive signals S of all switching devices x (t), and extract the change in the switching function ΔS. x The time point t = ±1 f ; wherein, the DC-side voltage signal u dc The switching characteristics of (t) are determined by the equivalent stray inductance L of the WPT system. S The induced voltage generated during switch switching dominates; wherein the drive signal S x The definition logic of (t) comprises: x is the bridge arm identifier variable, and its value set is {leading bridge arm, lagging bridge arm}; Each bridge arm comprises an upper switch S upper and a lower switch S lower two physical devices; Mapping the drive state of the switching device to discrete function values: ; Switching function variation ΔS x The calculation is as follows: ; wherein denotes t f the last sample point before the instant of time, and AS x ∈{-1,0,+1}, the failure diagnosis procedure is triggered only when |AS x |=1. Fault diagnosis: Set voltage threshold U th The voltage determination threshold U th Satisfy: When ΔS x When =0, u dc The upper limit of the steady-state fluctuation range of (t) is less than U. th When ΔS x When =±1, u under normal operating conditions dc The oscillation peak of (tf) is greater than U th ; Set diagnostic threshold time t th The diagnostic threshold time t th The formula for calculating t is: th =t delay +t max , where t delay t is the delay time of the switching device. max The maximum time required for the switching device to turn on and off; At time t f The diagnostic threshold time t after th Internally satisfy u dc (t f )≤Uth, and during the delayed verification period t dv Internally continuously satisfy u dc (t f +T)≤U th and u dc (t f +2T)≤U th If the system switches, then an open circuit fault is determined to exist, where T is the system switching cycle; Fault location: No need to determine the current direction, directly based on the trigger event t f The corresponding ΔS x Polarity-based fault location device, if ΔS x =-1, then locate the upper switch S of the corresponding bridge arm. upper If ΔS x =1, then locate the lower switch S of the corresponding bridge arm. lower .

2. The WPT system switching circuit fault analysis method according to claim 1, characterized in that, The direct voltage signal u dc The physical model of (t) is: ; wherein is the DC support capacitor voltage of the WPT system, L S is the equivalent stray inductance of the WPT system, di s is the current slew rate when the switching device is switched.

3. The WPT system switch circuit fault analysis method of claim 1, wherein, The mapping rule for locating the faulty device is as follows: Location logic trigger condition: Executed only when the fault diagnosis step determines that an open circuit fault exists; The mapping relationship between fault type and feature disappearance is as follows: When the switching state variation ΔS x = -1, the upper switch S upper is positioned to the fault, and the voltage characteristic disappears under the condition that ΔS x = -1. When the change in switch state ΔS x When =+1, the position is set to the lower switching transistor S. lower The fault, the condition for the voltage characteristic to disappear is: ΔS x The feature disappears when the value is increased by 1.

4. The WPT system switch circuit fault analysis method of claim 1, wherein, The method is applicable to various types of switching devices, including MOSFET modules or IGBT modules; when using an IGBT module, the current path is forced to flow through the anti-parallel diode of the lower bridge arm during bridge arm switching.

5. The WPT system switch circuit fault analysis method of claim 1, wherein , when the system is in zero voltage switching ZVS mode, the output side of the switching circuit is equivalent to a resistor R in in series with the inductor L in circuit.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a computer, causes the computer to perform the WPT system switching circuit fault analysis method as described in any one of claims 1-5.

7. A computer program product, characterised in that, It includes computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in the processor of an electronic device, the processor in the electronic device executes the WPT system switching circuit fault analysis method as described in any one of claims 1-5.