A solar cell, a cell assembly, and a photovoltaic system
Patent Information
- Application Number
- CN202511362771.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-22
- Publication Date
- 2026-10-13
- Estimated Expiration
- 2045-09-22
AI Technical Summary
[0004]本发明提供一种太阳能电池,旨在解决现有技术的太阳能电池存在太阳光易从太阳能电池背面逃逸,使得太阳光利用率低,从而导致电池转换效率欠佳的问题
[0032]本发明提供的一种太阳能电池通过在硅片的背面设置反射绝缘层,反射绝缘层对波长为800nm~1200nm范围的光的平均反射率为50%~95%,反射绝缘层至少覆盖第一钝化层的部分区域,利用反射绝缘层将透过硅片的至少部分太阳光反射回硅片,增加太阳光的光程,从而减少长波段的太阳光从太阳能电池背面逃逸损失,提高电池转换效率;而且,控制反射绝缘层的厚度大于第一钝化层的厚度,可以实现反射绝缘层对波长为800nm~1200nm范围的光的良好反射率,而且也确保了反射绝缘层的良好绝缘效果,避免出现漏电现象。
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Figure CN121001464B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of photovoltaic technology, and in particular to a solar cell, a battery module, and a photovoltaic system. Background Technology
[0002] A solar cell is a semiconductor device that converts solar energy into electrical energy. Under sunlight, a photocurrent is generated inside the solar cell, and electrical energy is output through electrodes. In recent years, solar cell manufacturing technology has continuously improved, production costs have been decreasing, and conversion efficiency has been continuously improving. The application of solar cell power generation has become increasingly widespread, making it an important energy source for electricity supply.
[0003] In related technologies, because the silicon wafer of a solar cell has different absorption probabilities for different wavelengths of light, and the photons in the long wavelength band have low energy, when the long wavelength light reaches the back of the solar cell, it cannot be completely absorbed by the silicon wafer. As a result, sunlight can easily pass through the solar cell and escape from the back, resulting in low solar energy utilization and poor cell conversion efficiency. Summary of the Invention
[0004] This invention provides a solar cell designed to address the problem of poor solar cell conversion efficiency caused by sunlight easily escaping from the back of the solar cell, resulting in low sunlight utilization.
[0005] This invention is implemented by providing a solar cell, comprising:
[0006] A silicon wafer, the silicon wafer including a first region and a second region, the first region and the second region being located on the back side of the silicon wafer, or the first region being located on the back side of the silicon wafer and the second region being located on the front side of the silicon wafer;
[0007] A first doped layer is disposed in the first region;
[0008] A second doped layer is disposed in the second region;
[0009] A first passivation layer is disposed on the first doped layer;
[0010] A second passivation layer is disposed on the second doped layer;
[0011] A first electrode located in the first region, the first electrode passing through the first passivation layer and contacting the first doped layer;
[0012] The second electrode is located in the second region, the second electrode passes through the second passivation layer and contacts the second doped layer; and
[0013] A reflective insulating layer is disposed on the back side of the silicon wafer, the reflective insulating layer at least covers a portion of the first passivation layer, the reflective insulating layer has an average reflectivity of 50% to 95% for light in the wavelength range of 800nm to 1200nm, and the thickness of the reflective insulating layer is greater than the thickness of the first passivation layer.
[0014] Preferably, both the first region and the second region are located on the back side of the silicon wafer, and the first region and the second region are alternately disposed on the back side of the silicon wafer. The reflective insulating layer covers at least a portion of the first passivation layer, and the reflective insulating layer covers at least a portion of the second passivation layer.
[0015] Preferably, the reflective insulating layer covers the first passivation layer but does not cover the first electrode, and the reflective insulating layer covers the second passivation layer but does not cover the second electrode.
[0016] Preferably, the back side of the silicon wafer further includes an isolation region disposed between the first region and the second region, and the solar cell further includes a third passivation layer disposed on the isolation region, and the reflective insulating layer covers the third passivation layer.
[0017] Preferably, the thickness of the reflective insulating layer in the isolation zone is greater than the thickness of the reflective insulating layer in the first region or the second region.
[0018] Preferably, the thickness of the reflective insulating layer in the isolation area is D1, 6um < D1 < 71um; the thickness of the reflective insulating layer in the first region or the second region is D2, 5um < D2 < 70um.
[0019] Preferably, the reflective insulating layer covers a portion of at least one of the first electrode and the second electrode.
[0020] Preferably, the reflective insulating layer covers part or all of the area on the back side where the first and second electrodes are not disposed.
[0021] Preferably, the first region is located on the back side of the silicon wafer, the second region is located on the front side of the silicon wafer, and the reflective insulating layer covers part or all of the first passivation layer.
[0022] Preferably, the reflective insulating layer covers a portion of the first electrode.
[0023] Preferably, the reflective insulating layer covers part or all of the area on the back side that is not where the first electrode is disposed.
[0024] Preferably, the thickness of the reflective insulating layer is greater than the height of the first electrode.
[0025] Preferably, the thickness of the reflective insulating layer is less than the height of the first electrode.
[0026] Preferably, the thickness of the reflective insulating layer is 10 to 100 micrometers, and the thickness of the first passivation layer is 100 to 200 nanometers.
[0027] Preferably, the thickness of the first passivation layer is 150–170 nanometers.
[0028] Preferably, the thickness of the reflective insulating layer is 35 to 45 micrometers.
[0029] Preferably, the area of the reflective insulating layer is 20% to 95% of the area of the back side of the silicon wafer.
[0030] The present invention provides a battery assembly including the solar cell described above.
[0031] The present invention provides a photovoltaic system including the above-described battery module.
[0032] The present invention provides a solar cell by setting a reflective insulating layer on the back of a silicon wafer. The reflective insulating layer has an average reflectivity of 50% to 95% for light in the wavelength range of 800nm to 1200nm. The reflective insulating layer covers at least a portion of the first passivation layer. By using the reflective insulating layer to reflect at least a portion of the sunlight transmitted through the silicon wafer back to the silicon wafer, the optical path of the sunlight is increased, thereby reducing the loss of long-wavelength sunlight escaping from the back of the solar cell and improving the cell conversion efficiency. Moreover, by controlling the thickness of the reflective insulating layer to be greater than the thickness of the first passivation layer, a good reflectivity of the reflective insulating layer for light in the wavelength range of 800nm to 1200nm can be achieved, and a good insulation effect of the reflective insulating layer is also ensured to avoid leakage. Attached Figure Description
[0033] Figure 1 This is a cross-sectional schematic diagram of a solar cell provided in Embodiment 1 of the present invention;
[0034] Figure 2 This is a cross-sectional schematic diagram of another solar cell provided in Embodiment 1 of the present invention;
[0035] Figure 3 This is a cross-sectional schematic diagram of another type of solar cell provided in Embodiment 1 of the present invention;
[0036] Figure 4 This is a cross-sectional schematic diagram of a solar cell provided in Embodiment 2 of the present invention. Detailed Implementation
[0037] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. Examples of embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the invention, and should not be construed as limiting the invention. Furthermore, it should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
[0038] In the description of this invention, it should be understood that the terms "upper", "lower", "backlight", "front", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.
[0039] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0040] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.
[0041] Example 1
[0042] Please refer to Figures 1-3 This invention provides a solar cell, comprising:
[0043] Silicon wafer 1 includes a first region 111 and a second region 112, both of which are located on the back side 11 of silicon wafer 1.
[0044] A first doped layer 2 is provided in the first region 111;
[0045] A second doped layer 3 is disposed in the second region 112;
[0046] A first passivation layer 4 is disposed on the first doped layer 2;
[0047] A second passivation layer 5 is disposed on the second doped layer 3;
[0048] The first electrode 6 is located in the first region 111. The first electrode 6 passes through the first passivation layer 4 and is in contact with the first doped layer 2.
[0049] The second electrode 7 is located in the second region 112, and the second electrode 7 passes through the second passivation layer 5 and contacts the second doped layer 3; and
[0050] A reflective insulating layer 8 is disposed on the back side 11 of the silicon wafer 1. The reflective insulating layer 8 covers at least a portion of the first passivation layer 4. The reflective insulating layer 8 has an average reflectivity of 50% to 95% for light with a wavelength range of 800nm to 1200nm, and the thickness D of the reflective insulating layer 8 is greater than the thickness d of the first passivation layer 4.
[0051] In this embodiment of the invention, the solar cell is specifically a back-contact solar cell, meaning that all electrodes of the solar cell are disposed on the back side 11 of the solar cell, specifically the first electrode 6 and the second electrode 7, while the front side 12 of the solar cell has no electrodes. The back side 11 of the silicon wafer 1 is specifically the back-light side of the solar cell, i.e., the side of the solar cell that faces away from sunlight when it is working, and the front side 12 of the silicon wafer 1 is specifically the light-facing side of the solar cell, i.e., the side of the solar cell that faces sunlight when it is working. There are multiple first regions 111 and multiple second regions 112, and these multiple first regions 111 and multiple second regions 112 are alternately arranged along one direction.
[0052] In this embodiment of the invention, the first doped layer 2 and the second doped layer 3 are, respectively, a P-type doped layer and an N-type doped layer. When the first doped layer 2 is a P-type doped layer, the first region 111 is a P-type doped region; when the second doped layer 3 is an N-type doped layer, the second region 112 is an N-type doped region. Alternatively, when the first doped layer 2 is an N-type doped layer, the first region 111 is an N-type doped region; the second doped layer 3 is a P-type doped layer, and the second region 112 is a P-type doped region. That is, one of the first region 111 and the second region 112 is a P-type doped region, and the other is an N-type doped region. The P-type doped layer contains a P-type element, and the N-type doped layer contains an N-type element, for example, boron for the P-type element and phosphorus for the N-type element.
[0053] The thickness of the reflective insulating layer 8 is the spacing between its two opposing surfaces along the thickness direction of the silicon wafer 1, and the thickness of the first passivation layer 4 refers to the spacing between its two opposing surfaces along the thickness direction of the silicon wafer 1. The thicknesses of the reflective insulating layer 8 and the first passivation layer 4 can be uniform or non-uniform. A greater thickness for the reflective insulating layer 8 than for the first passivation layer 4 can be understood as an average thickness greater than the average thickness of the first passivation layer 4. When the thicknesses of the reflective insulating layer 8 and the first passivation layer 4 are uniform, the thickness of the reflective insulating layer 8 at any position is greater than the thickness of the first passivation layer 4 at any position. When at least one of the thicknesses of the reflective insulating layer 8 and the first passivation layer 4 is non-uniform, the minimum thickness of the reflective insulating layer 8 is greater than the maximum thickness of the first passivation layer 4, which also allows the average thickness of the reflective insulating layer 8 to be greater than the average thickness of the first passivation layer 4.
[0054] In this embodiment of the invention, the reflective insulating layer 8 covers at least a portion of the first passivation layer 4. This can be understood as the reflective insulating layer 8 covering either the entire first passivation layer 4 or only a portion of it. In other words, the reflective insulating layer 8 covers at least a portion or all of the area on the back surface 11 where the first electrode 6 is not located.
[0055] The solar cell provided in this embodiment of the invention provides a reflective insulating layer 8 on the back side 11 of a silicon wafer 1. The reflective insulating layer 8 has an average reflectivity of 50% to 95% for light in the wavelength range of 800nm to 1200nm. The reflective insulating layer 8 covers at least a portion of the first passivation layer 4. The reflective insulating layer 8 can reflect at least a portion of the sunlight emitted from the back side 11 back to the silicon wafer 1, increasing the optical path of the sunlight, thereby reducing the escape loss of long-wavelength (wavelength range of 800nm to 1200nm) sunlight from the back side 11 of the solar cell and improving the cell conversion efficiency. Moreover, by controlling the thickness D of the reflective insulating layer 8 to be greater than the thickness d of the first passivation layer 4, a good reflectivity of the reflective insulating layer 8 for light in the wavelength range of 800nm to 1200nm can be achieved, and a good insulation effect of the reflective insulating layer 8 can also be ensured to avoid leakage.
[0056] In this embodiment of the invention, the first passivation layer 4 passesivates the surface of the first doped layer 2, and the second passivation layer 5 passesivates the surface of the second doped layer 3, which helps to improve battery efficiency.
[0057] In one embodiment of the present invention, the reflective insulating layer 8 comprises an organic resin and titanium dioxide, wherein the weight of the titanium dioxide in the reflective insulating layer 8 accounts for 20% to 60% of the total weight of the reflective insulating layer 8. Specifically, the organic resin may be epoxy resin, and the titanium dioxide may be titanium dioxide. By controlling the weight of the titanium dioxide in the reflective insulating layer 8 to be 20% to 60% of the total weight of the reflective insulating layer 8, the reflective insulating layer 8 is white, and the average reflectivity of the reflective insulating layer 8 for light with wavelengths in the range of 800 nm to 1200 nm is 50% to 95%. For example, the average reflectivity of the reflective insulating layer 8 for light with wavelengths in the range of 800 nm to 1200 nm can be any value among 50%, 52%, 55%, 60%, 65%, 70%, 76%, 80%, 87%, 90%, 93%, and 95%.
[0058] As an embodiment of the present invention, the first region 111 and the second region 112 are both located on the back side 11 of the silicon wafer 1. The first region 111 and the second region 112 are alternately disposed on the back side 11 of the silicon wafer 1. The reflective insulating layer 8 covers at least a portion of the first passivation layer 4 and covers at least a portion of the second passivation layer 5.
[0059] In this embodiment of the invention, the reflective insulating layer 8 can cover either the first region 111 or the second region 112. Specifically, the reflective insulating layer 8 can cover a portion or all of the first passivation layer 4; the reflective insulating layer 8 can also cover a portion or all of the second passivation layer 5. Since the reflective insulating layer 8 covers at least a portion of the first passivation layer 4 and at least a portion of the second passivation layer 5, both the first region 111 and the second region 112 can reflect sunlight escaping from both regions through the reflective insulating layer 8, further reducing the escape loss of long-wavelength light from the back surface 11 and improving battery conversion efficiency.
[0060] In one embodiment of the present invention, the reflective insulating layer 8 covers the first passivation layer 4 but does not cover the first electrode 6, and the reflective insulating layer 8 covers the second passivation layer 5 but does not cover the second electrode 7.
[0061] In this embodiment, the reflective insulating layer 8 covers the first passivation layer 4 but does not cover the first electrode 6, and the reflective insulating layer 8 covers the second passivation layer 5 but does not cover the second electrode 7, which facilitates electrode welding.
[0062] As another embodiment of the present invention, the reflective insulating layer 8 covers a portion of at least one of the first electrode 6 and the second electrode 7.
[0063] The reflective insulating layer 8 can also cover a portion of the first electrode 6 and the second electrode 7. Specifically, the reflective insulating layer 8 can cover both the first passivation layer 4 and a portion of the first electrode 6, or it can cover both the second passivation layer 5 and a portion of the second electrode 7. The reflective insulating layer 8 provides some protection for the first electrode 6 and the second electrode 7, improving their corrosion resistance. The first electrode 6 and the second electrode 7 can be either the main grid of the solar cell or a fine grid; the specific electrode type depends on the grid line arrangement on the solar cell.
[0064] As an embodiment of the present invention, the back side 11 of the silicon wafer 1 further includes an isolation region 113 disposed between the first region 111 and the second region 112, and the solar cell further includes a third passivation layer 9 disposed on the isolation region 113, and the reflective insulating layer 8 covers the third passivation layer 9.
[0065] In this embodiment, the isolation region 113 can specifically be a trench. The isolation region 113 can physically isolate the first doped layer 2 and the second doped layer 3, improving the insulation effect between the first doped layer 2 and the second doped layer 3. By providing a third passivation layer 9 on the isolation region 113 and covering the third passivation layer 9 with a reflective insulating layer 8, the third passivation layer 9 passesivates the isolation region 113. The reflective insulating layer 8 at the location of the isolation region 113 reflects the sunlight transmitted from the isolation region 113 back into the silicon wafer 1, which can further reduce the escape loss of sunlight on the back side 11 and further improve the cell conversion efficiency.
[0066] The first passivation layer 4, the second passivation layer 5, and the third passivation layer 9 are integrally formed structures, deposited in a single step. The thickness and material of the first passivation layer 4, the second passivation layer 5, and the third passivation layer 9 can be the same or different. Preferably, the thickness and material of the first passivation layer 4, the second passivation layer 5, and the third passivation layer 9 are all the same, facilitating their single-step deposition. Optionally, the first passivation layer 4, the second passivation layer 5, and the third passivation layer 9 are all stacks of one or more of the following: silicon nitride, silicon oxynitride, and silicon oxide.
[0067] As an embodiment of the present invention, the thickness D1 of the reflective insulating layer 8 in the isolation region 113 is greater than the thickness D2 of the reflective insulating layer 8 in the first region 111 or the second region 112.
[0068] In this embodiment, since the isolation region 113 does not have a doped layer and is typically textured, sunlight transmits through the isolation region 113 with minimal reflection, making it easier for long-wavelength sunlight to escape. Therefore, the thickness D1 of the reflective insulating layer 8 in the isolation region 113 is controlled to be greater than the thickness D2 of the reflective insulating layer 8 in the first region 111 or the second region 112. In other words, by increasing the thickness of the reflective insulating layer 8 in the isolation region 113, the reflection effect of the reflective insulating layer 8 on the transmitted light in the isolation region 113 is further improved, further reducing the loss of sunlight escaping from the back side 11 and further improving the battery conversion efficiency. Of course, in some other embodiments, the thickness of the reflective insulating layer 8 in the isolation region 113 can also be equal to or less than the thickness of the reflective insulating layer 8 in the first region 111 or the second region 112.
[0069] As an embodiment of the present invention, the thickness of the reflective insulating layer 8 in the isolation region 113 is D1, 6um < D1 < 71um; the thickness of the reflective insulating layer 8 in the first region 111 or the second region 112 is D2, 5um < D2 < 70um.
[0070] In this embodiment, 6um < D1 < 71um and 5um < D2 < 70um are controlled to make the thickness range of the reflective insulating layer 8 in the isolation region 113 and the thickness range of the reflective insulating layer 8 in the first region 111 or the second region 112 more reasonable. This can not only improve the reflection effect of the reflective insulating layer 8 on the transmitted light in the isolation region 113, reduce the loss of sunlight from the back side 11, and improve the battery conversion efficiency, but also facilitate the printing and preparation of the reflective insulating layer 8.
[0071] like Figure 1 As shown, in one embodiment of the present invention, the reflective insulating layer 8 covers the entire area of the back surface 11 where the first electrode 6 and the second electrode 7 are not disposed.
[0072] In this embodiment, the reflective insulating layer 8 covers all areas of the back surface 11 except where the first electrode 6 and the second electrode 7 are located. That is, the back surface 11, except for the areas where the first electrode 6 and the second electrode 7 are located, is covered by the reflective insulating layer 8. At this time, the reflective insulating layer 8 completely covers the first region 111, the second region 112, and the isolation region 113 of the back surface 11, but does not cover the first electrode 6 and the second electrode 7. Because the reflective insulating layer 8 covers all areas of the back surface 11 except where the first electrode 6 and the second electrode 7 are located, sunlight transmitted from these areas can be reflected back into the silicon wafer 1 by the reflective insulating layer 8, greatly reducing the loss of sunlight escaping from the back surface 11 and further improving the battery conversion efficiency.
[0073] like Figure 2As shown, in one embodiment of the present invention, the reflective insulating layer 8 covers a portion of the back surface 11 where the first electrode 6 and the second electrode 7 are not disposed.
[0074] In this embodiment, the reflective insulating layer 8 covers a portion of the back surface 11 where the first electrode 6 and the second electrode 7 are not located. That is, the reflective insulating layer 8 does not completely cover the area of the back surface 11 other than the first electrode 6 and the second electrode 7. For example, there may be a blank area between the electrode and the reflective insulating layer 8 that is not covered by the reflective insulating layer 8; or, the reflective insulating layer 8 may only cover a portion of the first region 111, the second region 112, or the isolation region 113. Because the reflective insulating layer 8 covers the portion of the back surface 11 where the first electrode 6 and the second electrode 7 are not located, a portion of the back surface 11 is not covered by the reflective insulating layer 8, which can improve the bifaciality of the solar cell and facilitate applications of the solar cell in scenarios where both sides receive light.
[0075] As an embodiment of the present invention, the thickness D of the reflective insulating layer 8 is greater than the height H of the first electrode 6.
[0076] In this embodiment, the thickness D of the reflective insulating layer 8 is greater than the height H of the first electrode 6. This can be understood as controlling the thickness D of the reflective insulating layer 8 to be greater than the height of the first electrode 6. Therefore, increasing the thickness D of the reflective insulating layer 8 compared to the first electrode 6 improves its reflectivity to sunlight, further reducing sunlight escape loss from the back side 11 and improving battery conversion efficiency. The height H of the first electrode 6 and the height of the second electrode 7 can be the same or different. Optionally, the thickness D of the reflective insulating layer 8 is greater than both the height H of the first electrode 6 and the height of the second electrode 7.
[0077] In another embodiment of the present invention, the thickness D of the reflective insulating layer 8 is less than the height H of the first electrode 6.
[0078] In this embodiment, the thickness D of the reflective insulating layer 8 is less than the height H of the first electrode 6. This can be understood as designing the thickness D of the reflective insulating layer 8 to be less than the height of the first electrode 6. Since a large thickness D of the reflective insulating layer 8 may cause battery warping during the curing process, a smaller thickness D reduces the degree of battery warping. Therefore, controlling the thickness D of the reflective insulating layer 8 to be less than the height of the first electrode 6 is beneficial for reducing battery warping. Optionally, the thickness D of the reflective insulating layer 8 can be less than both the height H of the first electrode 6 and the height of the second electrode 7.
[0079] As an embodiment of the present invention, the thickness D of the reflective insulating layer 8 is 10 to 100 micrometers, and the thickness d of the first passivation layer 4 is 100 to 200 nanometers.
[0080] In this embodiment, the thickness D of the reflective insulating layer 8 is 10–100 micrometers, which means that the thickness of the reflective insulating layer 8 at any location is within the range of 10–100 micrometers. The thickness d of the first passivation layer 4 is 100–200 nanometers, which means that the thickness of the first passivation layer 4 at any location is within the range of 100–200 nanometers. By controlling the thickness D of the reflective insulating layer 8 to be 10–100 micrometers and the thickness d of the first passivation layer 4 to be 100–200 nanometers, good reflectivity of the reflective insulating layer 8 for light with wavelengths in the range of 800 nm–1200 nm can be ensured, and good passivation effect of the first passivation layer 4 can also be guaranteed.
[0081] For example, the thickness D of the reflective insulating layer 8 can be any value among 10 micrometers, 15 micrometers, 18 micrometers, 20 micrometers, 22 micrometers, 28 micrometers, 30 micrometers, 33 micrometers, 37 micrometers, 40 micrometers, 42 micrometers, 46 micrometers, 50 micrometers, 55 micrometers, 60 micrometers, 65 micrometers, 70 micrometers, 72 micrometers, 78 micrometers, 80 micrometers, 81 micrometers, 84 micrometers, 88 micrometers, 90 micrometers, 92 micrometers, 96 micrometers, and 100 micrometers.
[0082] For example, the thickness d of the first passivation layer 4 can be any value among 100 nm, 105 nm, 108 nm, 110 nm, 115 nm, 120 nm, 125 nm, 130 nm, 132 nm, 138 nm, 140 nm, 145 nm, 150 nm, 155 nm, 160 nm, 165 nm, 170 nm, 172 nm, 178 nm, 180 nm, 185 nm, 188 nm, 190 nm, 193 nm, 195 nm, and 200 nm.
[0083] As an embodiment of the present invention, the thickness D of the reflective insulating layer 8 is 35 to 45 micrometers.
[0084] In this embodiment, the thickness D of the reflective insulating layer 8 is further controlled to be 35-45 micrometers to further ensure the good reflectivity of the reflective insulating layer 8 for light in the wavelength range of 800nm-1200nm.
[0085] As an embodiment of the present invention, the thickness d of the first passivation layer 4 is 150-170 nanometers.
[0086] In this embodiment, the thickness d of the first passivation layer 4 is further controlled to be 150-170 nanometers, which further ensures the good passivation effect of the first passivation layer 4.
[0087] As an embodiment of the present invention, the ratio of the area of the reflective insulating layer 8 to the area of the back surface 11 of the silicon wafer 1 is 20% to 95%.
[0088] In this embodiment, the ratio of the area of the reflective insulating layer 8 to the area of the back surface 11 of the silicon wafer 1 is 20% to 95%. This can be understood as the ratio of the sum of the areas of all reflective insulating layers 8 to the total area of the back surface 11 of the silicon wafer 1 being 20% to 95%. Controlling the ratio of the area of the reflective insulating layer 8 to the area of the back surface 11 of the silicon wafer 1 to 20% to 95% ensures that the area ratio of the reflective insulating layer 8 on the back surface 11 of the silicon wafer 1 is appropriate. The reflective insulating layer 8 can effectively reflect sunlight transmitted through the silicon wafer 1 back to the silicon wafer 1, and avoids the reflective insulating layer 8 completely covering the first electrode 6 or the second electrode 7, facilitating the welding of the first electrode 6 or the second electrode 7 to the solder ribbon. For example, the ratio of the area of the reflective insulating layer 8 to the area of the back surface 11 of the silicon wafer 1 can be 40% to 50%; or, the ratio can be 30% to 40%.
[0089] Example 2
[0090] Please refer to Figure 4 This invention provides a solar cell, comprising:
[0091] Silicon wafer 1 includes a first region 111 and a second region 112. The first region 111 is located on the back side 11 of the silicon wafer 1, and the second region 112 is located on the front side 12 of the silicon wafer 1.
[0092] A first doped layer 2 is provided in the first region 111;
[0093] A second doped layer 3 is disposed in the second region 112;
[0094] A first passivation layer 4 is disposed on the first doped layer 2;
[0095] A second passivation layer 5 is disposed on the second doped layer 3;
[0096] The first electrode 6 is located in the first region 111. The first electrode 6 passes through the first passivation layer 4 and is in contact with the first doped layer 2.
[0097] The second electrode 7 is located in the second region 112, and the second electrode 7 passes through the second passivation layer 5 and contacts the second doped layer 3; and
[0098] A reflective insulating layer 8 is disposed on the back side 11 of the silicon wafer 1. The reflective insulating layer 8 covers part or all of the first passivation layer 4. The reflective insulating layer 8 has an average reflectivity of 50% to 95% for light with a wavelength range of 800nm to 1200nm, and the thickness D of the reflective insulating layer 8 is greater than the thickness d of the first passivation layer 4.
[0099] The difference between this embodiment and Embodiment 1 is that the solar cell is specifically a double-sided contact solar cell, meaning the positive and negative electrodes of the solar cell are respectively disposed on the front side 12 and the back side 11 of the solar cell. Specifically, the first electrode 6 is disposed on the back side 11, and the second electrode 7 is disposed on the front side 12. The back side 11 of the silicon wafer 1 is specifically the back-light side of the solar cell, i.e., the side of the solar cell that faces away from sunlight when operating, and the front side 12 of the silicon wafer 1 is specifically the light-facing side of the solar cell, i.e., the side of the solar cell that faces sunlight when operating. The first region 111, the first doped layer 2, and the first passivation layer 4 are disposed on the back side 11 of the solar cell, and the second region 112, the second doped layer 3, and the second passivation layer 5 are disposed on the front side 12 of the solar cell. In this embodiment, the entire back side 11 of the solar cell can be the first region 111, or only a portion of the back side 11 can be the first region 111; the entire front side 12 of the solar cell can be the second region 112, or only a portion of the front side 12 can be the second region 112.
[0100] In this embodiment of the invention, the first doped layer 2 and the second doped layer 3 are, respectively, a P-type doped layer and an N-type doped layer. When the first doped layer 2 is a P-type doped layer, the first region 111 is a P-type doped region; when the second doped layer 3 is an N-type doped layer, the second region 112 is an N-type doped region. Alternatively, when the first doped layer 2 is an N-type doped layer, the first region 111 is an N-type doped region; the second doped layer 3 is a P-type doped layer, and the second region 112 is a P-type doped region. That is, one of the first region 111 and the second region 112 is a P-type doped region, and the other is an N-type doped region. The P-type doped layer contains a P-type element, and the N-type doped layer contains an N-type element, for example, boron for the P-type element and phosphorus for the N-type element.
[0101] The thickness D of the reflective insulating layer 8 and the thickness d of the first passivation layer 4 can be uniformly or non-uniformly set. The thickness D of the reflective insulating layer 8 is greater than the thickness d of the first passivation layer 4, which can be understood as the average thickness of the reflective insulating layer 8 being greater than the average thickness of the first passivation layer 4. When the thickness D of the reflective insulating layer 8 and the thickness d of the first passivation layer 4 are uniformly set, the thickness of the reflective insulating layer 8 at any position is greater than the thickness of the first passivation layer 4 at any position. When at least one of the thickness D of the reflective insulating layer 8 and the thickness of the first passivation layer 4 is non-uniformly set, the minimum thickness of the reflective insulating layer 8 is greater than the maximum thickness of the first passivation layer 4, which also allows the average thickness of the reflective insulating layer 8 to be greater than the average thickness of the first passivation layer 4.
[0102] In this embodiment of the invention, the reflective insulating layer 8 may cover the entire area of the first passivation layer 4, or it may only cover a portion of the first passivation layer 4. That is, the reflective insulating layer 8 covers at least a portion or the entire area of the first region 111 where the first electrode 6 is not disposed.
[0103] The solar cell provided in this embodiment of the invention provides a reflective insulating layer 8 on the back side 11 of a silicon wafer 1. The reflective insulating layer 8 has an average reflectivity of 50% to 95% for light with wavelengths in the range of 800nm to 1200nm. The reflective insulating layer 8 covers at least a portion of the first passivation layer 4. The reflective insulating layer 8 can reflect at least a portion of the sunlight escaping from the back side 11 back to the silicon wafer 1, increasing the optical path of the sunlight, thereby reducing the loss of long-wavelength sunlight escaping from the back side 11 and improving the cell conversion efficiency. Moreover, by controlling the thickness D of the reflective insulating layer 8 to be greater than the thickness d of the first passivation layer 4, a good reflectivity of the reflective insulating layer 8 for light with wavelengths in the range of 800nm to 1200nm can be achieved, and a good insulation effect of the reflective insulating layer 8 can also be ensured, avoiding the risk of leakage.
[0104] In one embodiment of the present invention, the reflective insulating layer 8 comprises an organic resin material and titanium dioxide, wherein the weight of the titanium dioxide in the reflective insulating layer 8 accounts for 20% to 60% of the total weight of the reflective insulating layer 8. Specifically, the organic resin material can be epoxy resin, and the titanium dioxide is specifically titanium dioxide. By controlling the weight of the titanium dioxide in the reflective insulating layer 8 to be 20% to 60% of the total weight of the reflective insulating layer 8, the reflective insulating layer 8 is white, and the average reflectivity of the reflective insulating layer 8 for light in the wavelength range of 800 nm to 1200 nm is 50% to 95%.
[0105] As an embodiment of the present invention, the first region 111 is located on the back side 11 of the silicon wafer 1, the second region 112 is located on the front side 12 of the silicon wafer 1, and the reflective insulating layer 8 covers part or all of the first passivation layer 4 where the first electrode 6 is not disposed.
[0106] In this embodiment, the reflective insulating layer 8 covers the first passivation layer 4 but does not cover the first electrode 6, which facilitates the welding of the first electrode 6.
[0107] In another embodiment of the present invention, the reflective insulating layer 8 covers a portion of the first electrode 6.
[0108] In this embodiment, while the reflective insulating layer 8 covers the first passivation layer 4, it also covers a portion of the first electrode 6. The reflective insulating layer 8 can also cover a portion of the first electrode 6, thus providing some protection for the first electrode 6 and improving its corrosion resistance.
[0109] As an embodiment of the present invention, the reflective insulating layer 8 covers the entire area of the back surface 11 where the first electrode 6 is not disposed.
[0110] In this embodiment, the reflective insulating layer 8 covers the entire area of the back surface 11 where the first electrode 6 is not located. That is, the entire area of the back surface 11 except for the first electrode 6 is covered by the reflective insulating layer 8. Since the reflective insulating layer 8 covers the entire area of the back surface 11 where the first electrode 6 is not located, sunlight transmitted from this area can be reflected back into the silicon wafer 1 by the reflective insulating layer 8, greatly reducing sunlight escape loss from the back surface 11 and further improving the battery conversion efficiency.
[0111] As an embodiment of the present invention, the reflective insulating layer 8 covers a portion of the back surface 11 that is not where the first electrode 6 is disposed.
[0112] In this embodiment, the reflective insulating layer 8 covers a portion of the back surface 11 where the first electrode 6 is not located. That is, the reflective insulating layer 8 does not completely cover the area of the back surface 11 where the first electrode 6 is not located; for example, a blank area may remain between the first electrode 6 and the reflective insulating layer 8, which is not covered by the reflective insulating layer 8. Because the reflective insulating layer 8 covers the portion of the back surface 11 where the first electrode 6 is not located, a portion of the back surface 11 is not covered by the reflective insulating layer 8, which can improve the bifaciality of the solar cell and facilitate applications of the solar cell in scenarios where both sides receive light.
[0113] As an embodiment of the present invention, the thickness D of the reflective insulating layer 8 is greater than the height H of the first electrode 6.
[0114] In this embodiment, the thickness D of the reflective insulating layer 8 is greater than the height H of the first electrode 6. This can be understood as controlling the thickness D of the reflective insulating layer 8 to be greater than the height of the first electrode 6. By increasing the thickness D of the reflective insulating layer 8 compared to the first electrode 6, the reflective insulating layer 8 can improve its reflective effect on sunlight, which is beneficial to further reduce the escape loss of sunlight from the back side 11 and improve the battery conversion efficiency.
[0115] In another embodiment of the present invention, the thickness D of the reflective insulating layer 8 is less than the height H of the first electrode 6.
[0116] In this embodiment, the thickness D of the reflective insulating layer 8 is less than the height H of the first electrode 6. This can be understood as designing the reflective insulating layer 8 with a reduced thickness D, making the thickness D less than the height of the first electrode 6. Since an excessively large thickness D of the reflective insulating layer 8 may cause battery warping during the curing process, a smaller thickness D reduces the degree of battery warping. Therefore, controlling the thickness D of the reflective insulating layer 8 to be less than the height of the first electrode 6 is beneficial for reducing the degree of battery warping.
[0117] As an embodiment of the present invention, the thickness D of the reflective insulating layer 8 is 10 to 100 micrometers, and the thickness d of the first passivation layer 4 is 100 to 200 nanometers.
[0118] In this embodiment, the thickness D of the reflective insulating layer 8 is 10–100 micrometers, which means that the thickness of the reflective insulating layer 8 at any location is within the range of 10–100 micrometers. The thickness d of the first passivation layer 4 is 100–200 nanometers, which means that the thickness of the first passivation layer 4 at any location is within the range of 100–200 nanometers. By controlling the thickness D of the reflective insulating layer 8 to be 10–100 micrometers and the thickness d of the first passivation layer 4 to be 100–200 nanometers, good reflectivity of the reflective insulating layer 8 for light with wavelengths in the range of 800 nm–1200 nm can be ensured, and good passivation effect of the first passivation layer 4 can also be guaranteed.
[0119] For example, the thickness D of the reflective insulating layer 8 can be any value among 10 micrometers, 15 micrometers, 18 micrometers, 20 micrometers, 22 micrometers, 28 micrometers, 30 micrometers, 33 micrometers, 37 micrometers, 40 micrometers, 42 micrometers, 46 micrometers, 50 micrometers, 55 micrometers, 60 micrometers, 65 micrometers, 70 micrometers, 72 micrometers, 78 micrometers, 80 micrometers, 81 micrometers, 84 micrometers, 88 micrometers, 90 micrometers, 92 micrometers, 96 micrometers, and 100 micrometers.
[0120] For example, the thickness d of the first passivation layer 4 can be any value among 100 nm, 105 nm, 108 nm, 110 nm, 115 nm, 120 nm, 125 nm, 130 nm, 132 nm, 138 nm, 140 nm, 145 nm, 150 nm, 155 nm, 160 nm, 165 nm, 170 nm, 172 nm, 178 nm, 180 nm, 185 nm, 188 nm, 190 nm, 193 nm, 195 nm, and 200 nm.
[0121] As an embodiment of the present invention, the thickness D of the reflective insulating layer 8 is 35 to 45 micrometers.
[0122] In this embodiment, the thickness D of the reflective insulating layer 8 is further controlled to be 35-45 micrometers to further ensure the good reflectivity of the reflective insulating layer 8 for light in the wavelength range of 800nm-1200nm.
[0123] As an embodiment of the present invention, the thickness d of the first passivation layer 4 is 150-170 nanometers.
[0124] In this embodiment, the thickness d of the first passivation layer 4 is further controlled to be 150-170 nanometers, which further ensures the good passivation effect of the first passivation layer 4.
[0125] As an embodiment of the present invention, the ratio of the area of the reflective insulating layer 8 to the area of the back surface 11 of the silicon wafer 1 is 20% to 95%.
[0126] In this embodiment, the ratio of the area of the reflective insulating layer 8 to the area of the back surface 11 of the silicon wafer 1 is 20% to 95%. This can be understood as the ratio of the sum of the areas of all reflective insulating layers 8 to the total area of the back surface 11 of the silicon wafer 1 being 20% to 95%. Controlling the ratio of the area of the reflective insulating layer 8 to the area of the back surface 11 of the silicon wafer 1 to 20% to 95% ensures that the area ratio of the reflective insulating layer 8 on the back surface 11 of the silicon wafer 1 is appropriate. The reflective insulating layer 8 can effectively reflect sunlight transmitted through the silicon wafer 1 back to the silicon wafer 1, and avoids the reflective insulating layer 8 completely covering the first electrode 6 or the second electrode 7, facilitating the welding of the first electrode 6 or the second electrode 7 to the solder ribbon. For example, the ratio of the area of the reflective insulating layer 8 to the area of the back surface 11 of the silicon wafer 1 can be 40% to 50%; or, the ratio can be 30% to 40%.
[0127] Example 3
[0128] This invention also provides a battery assembly including the solar cell described in the above embodiments. It should be noted that this battery assembly has the same or similar beneficial effects as the solar cell described above, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.
[0129] In this embodiment, multiple solar cells in the battery module can be connected in series to form a battery string, thereby achieving series current output. For example, the battery cells can be connected in series by setting solder strips (busbars, interconnecting strips), conductive backplates, etc.
[0130] It is understood that in such embodiments, the battery assembly may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film can be filled between the front and back surfaces of the solar cells, the photovoltaic glass, adjacent cells, etc. As a filler, it can be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film can be an EVA film or a POE film, and the specific choice can be made according to the actual situation, without limitation.
[0131] Photovoltaic glass can be applied to the encapsulating film on the front of solar cells. This photovoltaic glass can be ultra-clear glass, possessing high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can achieve a light transmittance of over 92%, protecting the solar cells while minimizing impact on their efficiency. Simultaneously, the encapsulating film bonds the photovoltaic glass and the solar cells together, providing sealing, insulation, and waterproofing / moisture protection for the solar cells.
[0132] The backsheet can be attached to the encapsulating film on the back side of the solar cell. The backsheet protects and supports the solar cell, providing reliable insulation, water resistance, and aging resistance. Multiple backsheet options are available, typically including tempered glass, acrylic glass, aluminum alloy TPT composite encapsulating film, etc., and the specific choice depends on the specific circumstances and is not limited here. The backsheet, solar cell, encapsulating film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire solar cell module, providing stable support and installation. For example, the solar cell module can be installed at the desired location using the metal frame.
[0133] Example 4
[0134] This invention also provides a photovoltaic system, which includes the battery module described in the above embodiments. It should be noted that this photovoltaic system has the same or similar beneficial effects as the solar cell described above, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.
[0135] In this embodiment, the photovoltaic system can be applied in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants. It can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple solar cell modules; for example, multiple solar cell modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to achieve solar power supply.
[0136] In the description of this specification, references to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0137] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A solar cell, characterized in that, include: A silicon wafer, the silicon wafer including a first region and a second region, the first region and the second region being located on the back side of the silicon wafer, or the first region being located on the back side of the silicon wafer and the second region being located on the front side of the silicon wafer; A first doped layer is disposed in the first region; A second doped layer is disposed in the second region; A first passivation layer is disposed on the first doped layer; A second passivation layer is disposed on the second doped layer; A first electrode located in the first region, the first electrode passing through the first passivation layer and contacting the first doped layer; A second electrode located in the second region, the second electrode passing through the second passivation layer and contacting the second doped layer; and A reflective insulating layer is disposed on the back side of the silicon wafer, the reflective insulating layer at least covering a portion of the first passivation layer, the reflective insulating layer has an average reflectivity of 50% to 95% for light in the wavelength range of 800nm to 1200nm, and the thickness of the reflective insulating layer is greater than the thickness of the first passivation layer; the reflective insulating layer comprises organic resin and titanium dioxide, and the weight of the titanium dioxide in the reflective insulating layer accounts for 20% to 60% of the total weight of the reflective insulating layer.
2. The solar cell according to claim 1, characterized in that, Both the first region and the second region are located on the back side of the silicon wafer, and the first region and the second region are alternately disposed on the back side of the silicon wafer. The reflective insulating layer covers at least a portion of the first passivation layer, and the reflective insulating layer covers at least a portion of the second passivation layer.
3. The solar cell according to claim 2, characterized in that, The reflective insulating layer covers the first passivation layer but does not cover the first electrode, and the reflective insulating layer covers the second passivation layer but does not cover the second electrode.
4. The solar cell according to claim 2 or 3, characterized in that, The back side of the silicon wafer also includes an isolation region disposed between the first region and the second region, and the solar cell also includes a third passivation layer disposed on the isolation region, and the reflective insulating layer covers the third passivation layer.
5. The solar cell according to claim 4, characterized in that, The thickness of the reflective insulating layer in the isolation zone is greater than the thickness of the reflective insulating layer in the first region or the second region.
6. The solar cell according to claim 5, characterized in that, The thickness of the reflective insulating layer in the isolation zone is D1, 6um < D1 < 71um; the thickness of the reflective insulating layer in the first region or the second region is D2, 5um < D2 < 70um.
7. The solar cell according to claim 2, characterized in that, The reflective insulating layer covers a portion of at least one of the first electrode and the second electrode.
8. The solar cell according to claim 2, characterized in that, The reflective insulating layer covers part or all of the area on the back side where the first and second electrodes are not located.
9. The solar cell according to claim 1, characterized in that, The first region is located on the back side of the silicon wafer, the second region is located on the front side of the silicon wafer, and the reflective insulating layer covers part or all of the first passivation layer.
10. The solar cell according to claim 9, characterized in that, The reflective insulating layer covers a portion of the first electrode.
11. The solar cell according to claim 9, characterized in that, The reflective insulating layer covers part or all of the area on the back side that is not where the first electrode is located.
12. The solar cell according to claim 2 or 9, characterized in that, The thickness of the reflective insulating layer is greater than the height of the first electrode.
13. The solar cell according to claim 2 or 9, characterized in that, The thickness of the reflective insulating layer is less than the height of the first electrode.
14. The solar cell according to claim 1, characterized in that, The thickness of the reflective insulating layer is 10-100 micrometers, and the thickness of the first passivation layer is 100-200 nanometers.
15. The solar cell according to claim 14, characterized in that, The thickness of the first passivation layer is 150~170 nanometers.
16. The solar cell according to claim 1, characterized in that, The thickness of the reflective insulating layer is 35-45 micrometers.
17. The solar cell according to claim 1, characterized in that, The ratio of the area of the reflective insulating layer to the area of the back side of the silicon wafer is 20% to 95%.
18. A battery assembly, characterized in that, Including the solar cell as described in any one of claims 1 to 17.
19. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 18.
Citation Information
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