Timing method and apparatus, electronic device, and storage medium

Abstract

The present application relates to the technical field of timer, and discloses a timing method and device, electronic equipment and storage medium, comprising configuring timing parameters, wherein the timing parameters at least include timing type, timing scaling multiple, timing range, user quantity and storage type; based on the timing parameters, running a pulse cycle timer and multiple scaling timers; reading the local timing information of a target user, which is stored in the corresponding target storage space; determining the timing state of the target user based on the local timing information; and executing the timing operation corresponding to the timing state based on the timing state of the target user. In this method, each user has a corresponding storage space, and the corresponding timing state is then analyzed and obtained, ensuring that the timing data is accurately corresponding and the state after decoding is clear. According to the timing state, the corresponding operation is executed, the resource allocation can be targeted, and the resource consumption is reduced under the condition of ensuring the timing accuracy.

Description

Technical Field

[0001] This invention relates to the field of timer technology, and more specifically to timer methods, devices, electronic devices, and storage media. Background Technology

[0002] In modern digital circuits and chip systems, timers are critical components ensuring accurate system operation. They generate stable, periodic trigger events, providing a precise time reference for digital circuits. Furthermore, timers can define timing durations, providing a reference standard for resource management and anomaly detection. As chip integration continues to evolve towards advanced process technologies, the scale and complexity of on-chip timers are increasing exponentially. Timing methods in related technologies typically involve individual user timing or cyclic timing based on user groups, which consumes significant resources while maintaining high accuracy. Therefore, reducing resource consumption while ensuring accuracy is a pressing technical challenge. Summary of the Invention

[0003] In view of this, the present invention provides a timing method, apparatus, electronic device and storage medium to solve the problem of excessive resource consumption caused by timing.

[0004] In a first aspect, the present invention provides a timing method, the method comprising:

[0005] Configure timing parameters, which include at least timing type, timing scaling factor, timing range, number of users, and storage type;

[0006] Run a pulse cycle timer and multiple scaling timers based on the timing parameters;

[0007] Read the target user's local timing information, which is stored in the corresponding target storage space;

[0008] The timing status of the target user is determined based on the local timing information;

[0009] Based on the target user's timing state, execute the timing operation corresponding to the timing state.

[0010] The timing method provided in this embodiment includes configuring timing parameters, which at least include timing type, timing scaling factor, timing range, number of users, and storage type; running a pulse period timer and multiple scaling timers based on the timing parameters; reading the local timing information of the target user, which is stored in the corresponding target storage space; determining the timing state of the target user based on the local timing information; and executing the timing operation corresponding to the timing state based on the timing state of the target user. In this method, each user has a corresponding storage space, thereby selectively parsing the corresponding timing state, ensuring accurate timing data correspondence and that the state can be clearly identified after decoding. Executing the corresponding operation based on the timing state allows for targeted resource allocation, reducing resource consumption while ensuring timing accuracy.

[0011] In one alternative implementation, the target user's local timing information includes a target timing range, and the scaling timer counts based on a scaling factor determined based on the target timing range.

[0012] In one optional implementation, determining the target user's timing status based on the local timing information includes:

[0013] Parse the target user's local timing information to determine the target user's status identifier;

[0014] Based on the status identifier, the timing status of the target user is determined.

[0015] In one optional implementation, the step of performing a timing operation corresponding to the timing state based on the target user's timing state includes:

[0016] If the timing status indicates that timing is not enabled, no timing operation will be performed.

[0017] In one optional implementation, the step of performing a timing operation corresponding to the timing state based on the target user's timing state further includes:

[0018] If the timing status indicates that timing is enabled, the timing value is less than the preset upper limit, and the scaling timer corresponding to the target user is greater than or equal to the preset timing upper limit, then timing is performed based on the scaling timer.

[0019] In one optional implementation, the step of performing a timing operation corresponding to the timing state based on the target user's timing state further includes:

[0020] If the timing status indicates that timing is enabled and the timing value is greater than or equal to the preset upper limit, a prompt is triggered and it is determined whether to set a cyclic timing.

[0021] If a cyclic timing is set, then the timing value will be cleared to zero;

[0022] If no loop timer is set, then disable it.

[0023] In a second aspect, the present invention provides a timing device, the device comprising:

[0024] The parameter configuration module is used to configure timing parameters, which include at least timing type, timing scaling factor, timing range, number of users, and storage type.

[0025] A timer operation module is used to run a pulse cycle timer and multiple scaling timers based on the timing parameters;

[0026] The information reading module is used to read the local timing information of the target user, which is stored in the corresponding target storage space.

[0027] The status determination module is used to determine the timing status of the target user based on the local timing information;

[0028] The operation determination module is used to execute a timing operation corresponding to the timing state of the target user.

[0029] Thirdly, the present invention provides an electronic device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to perform the timing method of the first aspect or any corresponding embodiment described above.

[0030] Fourthly, the present invention provides a computer-readable storage medium storing computer instructions for causing a computer to execute the timing method of the first aspect or any corresponding embodiment thereof. Attached Figure Description

[0031] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0032] Figure 1 This is a flowchart illustrating a timing method according to an embodiment of the present invention;

[0033] Figure 2 This is a schematic diagram of the global timing control structure according to an embodiment of the present invention;

[0034] Figure 3 This is a schematic diagram of a timing memory according to an embodiment of the present invention;

[0035] Figure 4 This is a schematic diagram of a timing device according to an embodiment of the present invention;

[0036] Figure 5 This is a structural block diagram of a timing device according to an embodiment of the present invention;

[0037] Figure 6 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0039] Timers play a vital role in modern circuits, generating stable periodic trigger signals to provide precise time references for digital systems, such as 10ms timing pulses for 4G / 5G communication air interface synchronization. They can also be used to set timing durations, providing a basis for resource scheduling and anomaly monitoring, such as watchdog timers for hardware heartbeat detection.

[0040] As chip integration continues to increase along advanced manufacturing processes, the scale and complexity of on-chip timers are growing exponentially. Taking the PCIe (Peripheral Component Interconnect Express) protocol as an example, the maximum number of concurrent incomplete MRd (Memory Read) transactions it supports has increased significantly from 256 in version 2.0 to 16,383 in version 6.0, an increase of 64 times. In differentiated timing application scenarios, the PCIe protocol requires that the completion timeout range for different MRd transactions be independently and precisely set within an extremely wide range of 50μs to 64s. This places stringent requirements on the multi-precision timing capabilities, resource allocation efficiency, and power consumption control of the timer system. Based on this, this invention provides a timing method.

[0041] According to an embodiment of the present invention, a timing method embodiment is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0042] This embodiment provides a timing method. Figure 1 This is a flowchart of a timing method according to an embodiment of the present invention, such as... Figure 1 As shown, the process includes the following steps:

[0043] Step S101: Configure timing parameters.

[0044] The timing parameters include at least the timing type, timing scaling factor, timing range, number of users, and storage type.

[0045] Step S102: Run a pulse cycle timer and multiple scaling timers based on timing parameters.

[0046] Before starting the timing process, this method configures the timer's timing parameters via a mode configuration interface. The timing type indicates the timing mode, such as single-time timing or periodic timing, which can be selected based on the business scenario. When a new timing event occurs, the timing parameters are decoded, a timing status code and an initial timing value are generated, and written to the timing memory.

[0047] like Figure 2 The schematic diagram of the global timing control shown consists of a pulse period timer and multiple (M) scaling timers. The timing period of the pulse period timer is the maximum number of currently supported users, and the number of scaling timers represents the number of currently supported timing ranges. The pulse period timer is triggered by the clock pulse of the timing device and counts cyclically between 0 and the maximum number of users, generating one pulse per cycle. Step S103: Read the local timing information of the target user.

[0048] The target user's local timing information is stored in the corresponding target storage space. Each user occupies an independent memory address space, and the memory address serves as the user's index. The target storage space to be accessed is determined by the target user's index (i.e., the corresponding memory address). Local timing information, which may include timing range and timing value, is read from the target storage space. When a user creates a new timing event, the user's timing state can be set by encoding the timing range. By reading and decoding the user's timing range, the subsequent timing operations of the timing device can be determined.

[0049] Specifically, the timing range can be a multi-bit value that includes time length information and encodes the user's work mode and status flags. The timing value represents the current progress of the user's timing event. For example... Figure 3 The timing memory shown stores local timing information for different users in their respective storage spaces.

[0050] Step S104: Determine the timing status of the target user based on local timing information.

[0051] The local timing information stored in the target storage space is the raw data. The local timing information is decoded and analyzed to obtain the timing status of the target user. The timing status includes whether timing is enabled, whether timing is in progress, and whether the upper limit has been reached. Specifically, the encoded bits can be parsed through logic gate circuits. For example, a comparator determines whether the timing value is less than the upper limit, and an AND gate is used to determine whether the values ​​of the enable flag and the timing flag indicate that timing is enabled (for example, the value of the enable flag = 1, and the value of the timing flag = 1).

[0052] Step S105: Based on the target user's timing state, execute the timing operation corresponding to the timing state.

[0053] The timing status includes not enabling timing, enabling timing but not started, timing in progress, and timing completed. Preset timing operations are provided for different timing statuses, and the corresponding timing operation is performed based on the determined timing status. Specifically, if timing is enabled, the timing operation is further performed based on the pulse period timer and the corresponding scaling timer.

[0054] The timing method provided in this embodiment includes configuring timing parameters, which at least include timing type, timing scaling factor, timing range, number of users, and storage type; running a pulse period timer and multiple scaling timers based on the timing parameters; reading the local timing information of the target user, which is stored in the corresponding target storage space; determining the timing state of the target user based on the local timing information; and executing the timing operation corresponding to the timing state based on the timing state of the target user. In this method, each user has a corresponding storage space, thereby selectively parsing the corresponding timing state, ensuring accurate timing data correspondence and that the state can be clearly identified after decoding. Executing the corresponding operation based on the timing state allows for targeted resource allocation, reducing resource consumption while ensuring timing accuracy.

[0055] In some alternative implementations, the target user's local timing information includes a target timing range, and the scaling timer counts based on a scaling factor determined based on the target timing range.

[0056] The target timing range is the user's timing requirement parameter, stored in the target storage space. The target timing range integrates the upper limit of the value and the timing granularity requirement through encoding. For example, if the upper limit of the value is 0 to 100, it means that the timing needs to increment from 0 to 100. The timing granularity requirement is implicit in the value range. If 1-second timing is required, then the upper limit of 100 corresponds to 100 seconds; if 100-millisecond timing is required, then the upper limit of 100 corresponds to 10 seconds.

[0057] The scaling factor is used to adjust the global reference clock (e.g., 100MHz, period 10ns) to the desired timing granularity. For example, if the scaling factor is 1000, the scaling timer counts once every 1000 reference clock cycles (i.e., 1000 × 10ns = 10μs).

[0058] This embodiment provides a timing method, which includes the following steps:

[0059] Step S201: Read the target user's local timing information. For details, please refer to [link to relevant documentation]. Figure 1 Step S101 of the illustrated embodiment will not be described again here.

[0060] Step S202: Determine the timing status of the target user based on local timing information.

[0061] Specifically, step S202 includes:

[0062] Step S2021: Parse the target user's local timing information to determine the target user's status identifier.

[0063] Step S2022: Determine the timing status of the target user based on the status identifier.

[0064] By parsing the local timing information corresponding to the target user, a status identifier representing the user's working mode is obtained. The local timing information includes a timing range and a timing value. The timing range is in coded form and serves as the carrier of the status identifier, with different bits having predefined functions. The status identifier is obtained by parsing specific fields of the timing range.

[0065] Different status indicators represent different timing states, including timing not enabled, timing enabled but not started, timing in progress, and timing completed.

[0066] Step S203: Based on the target user's timing state, execute the timing operation corresponding to the timing state.

[0067] In some optional implementations, step S203 includes: if the timing status indicator does not enable timing, then no timing operation is performed.

[0068] If the timing status indicates that timing is not enabled (including two states: timing is enabled but not enabled, and timing is not enabled), it means that no timing operation needs to be performed at this time.

[0069] In some optional implementations, step S203 further includes: if the timing status indicates that timing is enabled, the timing value is less than a preset upper limit, and the scaling timer corresponding to the target user is greater than or equal to the preset timing upper limit, then timing is performed based on the scaling timer.

[0070] The scaling timer can increment by 1 upon receiving a periodic counting pulse, based on the scaling factor corresponding to the timer's configured timing range, and perform cyclic counting within the range of 0 to the scaling factor.

[0071] If the timing function is enabled, and it is determined that a valid timing range has been set and the timing value is less than the preset upper limit, then it is checked whether the scaling timer is less than the preset upper limit. If the scaling timer is less than the preset upper limit, no timing operation is performed. If the scaling timer is greater than or equal to the preset upper limit, the timing value is incremented by 1 and rewritten to the timing memory.

[0072] In some optional implementations, step S203 further includes: if the timing status indicates that timing is enabled and the timing value is greater than or equal to the upper limit, trigger a prompt and determine whether to set a cyclic timing; if a cyclic timing is set, then clear the timing value to zero; if a cyclic timing is not set, then disable it.

[0073] If the timer function is enabled, and a valid timer range is set and the timer value is greater than or equal to the preset upper limit, it determines whether to set a loop timer. If a loop timer is set, the timer value is cleared and rewritten to the real-time memory; otherwise, the timer range is disabled and rewritten to memory. This state will trigger a timer event output. Additionally, if the timer value is greater than or equal to the upper limit, a prompt is issued to inform the user that the current timer value has reached the upper limit, allowing the user to handle the situation appropriately.

[0074] The timing method provided by this invention is used in a timing device, such as... Figure 4As shown, when a new timing event input signal is received, it is transmitted to the timing type decoding module, providing the initial trigger for subsequent parsing and processing of different timing operations. The output of the timing type decoding module is connected to the configuration write control module, and the decoded timing type information guides the configuration write control module to perform the corresponding configuration write operation. The timing mode module is connected to the timing type decoding, global timing, and timing status processing modules respectively, providing mode basis for timing type decoding, mode parameters for global timing, and mode-related information for timing status processing. The status query input signal is sent to the query read control module, triggering the reading query operation of relevant timing information. The outputs of the configuration write control, timing read control, and query read control modules are all connected to the conflict management module, which coordinates these read and write operations to avoid simultaneous access conflicts to resources such as timing memory. The conflict management module interacts with the timing memory and timing write control module, reasonably allocating access permissions to the timing memory, and simultaneously transmitting the processed information to the timing write control module to control the writing of timing data. Different timing memories can be used for different storage types. The output of the timing memory is connected to the timing status decoding module, providing the stored timing data for status decoding. The output of the timing status decoding module is passed to the timing status processing module, where the decoded timing status information is further processed. The timing status processing module is connected to the global timing module, and the processed status information can affect the operation of the global timing. Simultaneously, the timing status processing module outputs timing events for external responses. The global timing module is connected to the timing write control module, and information such as the global timing progress is used to control the writing operation of timing data.

[0075] This embodiment also provides a timing device for implementing the above embodiments and implementation methods; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, hardware implementations, or a combination of software and hardware, are also possible and contemplated.

[0076] This embodiment provides a timing device, such as Figure 5 As shown, it includes:

[0077] The parameter configuration module is used to configure timing parameters, which include at least timing type, timing scaling factor, timing range, number of users, and storage type.

[0078] A timer operation module is used to run a pulse cycle timer and multiple scaling timers based on the timing parameters;

[0079] The information reading module is used to read the local timing information of the target user, which is stored in the corresponding target storage space.

[0080] The status determination module is used to determine the timing status of the target user based on the local timing information;

[0081] The operation determination module is used to execute a timing operation corresponding to the timing state of the target user.

[0082] Before starting the timer, configure the timer parameters via the mode configuration interface. The timer type indicates the timer mode, such as single-time timing or periodic timing, which can be selected based on the business scenario. When a new timing event occurs, the timer parameters are decoded, a timing status code and an initial timing value are generated, and written to the timer memory. For example... Figure 2 The schematic diagram of the global timing control shown consists of a pulse period timer and multiple (M) scaling timers. The timing period of the pulse period timer is the maximum number of currently supported users, and the number of scaling timers represents the number of currently supported timing ranges. The pulse period timer is triggered by the clock pulse of the timing device and counts cyclically between 0 and the maximum number of users, generating one pulse per cycle.

[0083] The target user's local timing information is stored in the corresponding target storage space. Each user occupies an independent memory address space, and the memory address serves as the user's index. The target storage space to be accessed is determined by the target user's index (i.e., the corresponding memory address). Local timing information, which may include timing range, timing value, etc., is read from the target storage space. When a user creates a new timing event, the user's timing state can be set by encoding the timing range. By reading and decoding the user's timing range, the subsequent timing operations of the timing device can be determined.

[0084] Specifically, the timing range can be a multi-bit value that includes time length information and encodes the user's work mode and status flags. The timing value represents the current progress of the user's timing event. For example... Figure 3 The timing memory shown stores local timing information for different users in their respective storage spaces.

[0085] The local timing information stored in the target storage space is the raw data. The local timing information is decoded and analyzed to obtain the timing status of the target user. The timing status includes whether timing is enabled, whether timing is in progress, and whether the upper limit has been reached. Specifically, the encoded bits can be parsed through logic gate circuits. For example, a comparator determines whether the timing value is less than the upper limit, and an AND gate is used to determine whether the values ​​of the enable flag and the timing flag indicate that timing is enabled (for example, the value of the enable flag = 1, and the value of the timing flag = 1).

[0086] The timing status includes not enabling timing, enabling timing but not started, timing in progress, and timing completed. Preset timing operations are provided for different timing statuses, and the corresponding timing operation is performed based on the determined timing status. Specifically, if timing is enabled, the timing operation is further performed based on the pulse period timer and the corresponding scaling timer.

[0087] In some alternative implementations, the target user's local timing information includes a target timing range, and the scaling timer counts based on a scaling factor determined based on the target timing range.

[0088] In some optional implementations, the state determination module includes:

[0089] A status identification unit is used to parse the local timing information of the target user and determine the status identification of the target user.

[0090] A status determination unit is used to determine the timing status of the target user based on the status identifier.

[0091] In some optional implementations, the operation determination module includes:

[0092] The first execution unit is configured to not perform a timing operation if the timing state characterization indicates that timing is not enabled.

[0093] In some optional implementations, the operation determination module further includes:

[0094] The second execution unit is configured to perform timing based on the scaling timer if the timing state indicates that timing is enabled, the timing value is less than a preset upper limit, and the scaling timer corresponding to the target user is greater than or equal to the preset timing upper limit.

[0095] In some optional implementations, the operation determination module further includes:

[0096] The third execution unit is used to determine whether to set a cyclic timing if the timing state indicates that timing is enabled and the timing value is greater than or equal to a preset upper limit; if a cyclic timing is set, the timing value is cleared to zero; if a cyclic timing is not set, it is disabled.

[0097] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0098] In this embodiment, the timing device is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0099] This invention also provides an electronic device having the above-described features. Figure 5 The timing device shown.

[0100] Please see Figure 6 , Figure 6 This is a schematic diagram of the structure of an electronic device provided in an optional embodiment of the present invention, such as... Figure 6 As shown, the electronic device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise as required. The processors can process instructions executed within the electronic device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple electronic devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 6 Take a processor 10 as an example.

[0101] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GPA), or any combination thereof.

[0102] The memory 20 stores instructions executable by at least one processor 10 to cause the at least one processor 10 to perform the method shown in the above embodiments.

[0103] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the electronic device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, and these remote memories may be connected to the electronic device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0104] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0105] The electronic device also includes a communication interface 30 for communicating with other devices or communication networks.

[0106] This invention also provides a computer-readable storage medium. The methods described above according to embodiments of the invention can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded via a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0107] A portion of this invention can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to the invention through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0108] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and all such modifications and variations fall within the scope defined by the invention.

Claims

1. A timing method, characterized in that, The method includes: Configure timing parameters, which include at least timing type, timing scaling factor, timing range, number of users, and storage type; Run a pulse cycle timer and multiple scaling timers based on the timing parameters; Read the target user's local timing information, which is stored in the corresponding target storage space; The timing status of the target user is determined based on the local timing information; Based on the target user's timing state, execute the timing operation corresponding to the timing state.

2. The method according to claim 1, characterized in that, The target user's local timing information includes a target timing range, and the scaling timer counts based on a scaling factor, which is determined based on the target timing range.

3. The method according to claim 1, characterized in that, Determining the timing status of the target user based on the local timing information includes: Parse the target user's local timing information to determine the target user's status identifier; Based on the status identifier, the timing status of the target user is determined.

4. The method according to claim 1, characterized in that, The step of performing a timing operation corresponding to the timing state based on the target user's timing state includes: If the timing status indicates that timing is not enabled, no timing operation will be performed.

5. The method according to claim 1, characterized in that, The step of performing a timing operation corresponding to the timing state based on the target user's timing state further includes: If the timing status indicates that timing is enabled, the timing value is less than the preset upper limit, and the scaling timer corresponding to the target user is greater than or equal to the preset timing upper limit, then timing is performed based on the scaling timer.

6. The method according to claim 1, characterized in that, The step of performing a timing operation corresponding to the timing state based on the target user's timing state further includes: If the timing status indicates that timing is enabled and the timing value is greater than or equal to the preset upper limit, a prompt is triggered and it is determined whether to set a cyclic timing. If a cyclic timing is set, then the timing value will be cleared to zero; If no loop timer is set, then disable it.

7. A timing device, characterized in that, The device includes: The parameter configuration module is used to configure timing parameters, which include at least timing type, timing scaling factor, timing range, number of users, and storage type. A timer operation module is used to run a pulse cycle timer and multiple scaling timers based on the timing parameters; The information reading module is used to read the local timing information of the target user, which is stored in the corresponding target storage space. The status determination module is used to determine the timing status of the target user based on the local timing information; The operation determination module is used to execute a timing operation corresponding to the timing state of the target user.

8. The apparatus according to claim 7, characterized in that, The status determination module includes: A status identification unit is used to parse the local timing information of the target user and determine the status identification of the target user. A status determination unit is used to determine the timing status of the target user based on the status identifier.

9. An electronic device, characterized in that, include: A memory and a processor are communicatively connected, the memory storing computer instructions, and the processor executing the computer instructions to perform the timing method of any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing the computer to perform the timing method according to any one of claims 1 to 6.

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