Silicon carbide surface treatment method

CN121075910BActive Publication Date: 2026-08-07湖南德智新材料股份有限公司
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
湖南德智新材料股份有限公司
Filing Date
2025-08-22
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

[0003]然而传统的碳化硅材料表面处理效果不佳

Benefits of technology

[0015]通过上述技术方案,先利用气溶胶去除化学活性高的损伤层,然后利用等离子体轰击选择性去除弱键合区域,可以避免过度损伤碳化硅表面的晶体结构,处理后的碳化硅衬底的表面损伤较小,表面粗糙度较低且具有较好的台阶结构;经双层钝化处理后,碳化硅衬底的电学性能较佳,例如,界面态密度较低。当处理后的碳化硅衬底用于制备SiC MOSFET器件时,具有良好的电学性能;当处理后的碳化硅衬底用于进行外延生长时,可保证外延层生长质量。

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Abstract

The application provides a silicon carbide surface treatment method, comprising the following steps: surface activation of a silicon carbide substrate; etching treatment of the surface-activated silicon carbide substrate by using an aerosol; plasma treatment of the etched silicon carbide substrate; and surface passivation of the plasma-treated silicon carbide substrate. The surface damage of the silicon carbide substrate after the surface treatment is small, the surface roughness is low, and the silicon carbide substrate has good electrical properties when used for preparing a SiC MOSFET device; and the quality of the epitaxial layer growth can be ensured when used for epitaxial growth.
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Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to a silicon carbide surface treatment method. Background Technology

[0002] Silicon carbide (SiC), as a third-generation wide-bandgap semiconductor material, is irreplaceable in high-temperature, high-frequency, and high-power electronic devices (such as new energy vehicles, 5G communications, and aerospace) and optical devices. Its surface quality directly affects device performance (such as interface state density and carrier mobility). SiC materials require grinding and polishing during machining. The high hardness (Mohs hardness 9.5) and chemical inertness of SiC result in low efficiency of traditional mechanical polishing and easily introduce a subsurface damage layer. Therefore, surface treatment is necessary to remove this damage layer.

[0003] However, traditional silicon carbide surface treatments are ineffective. Summary of the Invention

[0004] To address the aforementioned problems, this application provides a silicon carbide surface treatment method.

[0005] In a first aspect, embodiments of this application provide a silicon carbide surface treatment method, comprising: surface activation of a silicon carbide substrate; etching of the surface-activated silicon carbide substrate using aerosol; plasma treatment of the etched silicon carbide substrate; and surface passivation of the plasma-treated silicon carbide substrate.

[0006] In conjunction with the first aspect, the etching process of the surface-activated silicon carbide substrate using aerosol includes: introducing aerosol into a reaction chamber through a porous distribution plate to etch the silicon carbide substrate within the reaction chamber; wherein the pore size of the porous distribution plate ranges from 0.3 to 0.7 mm, and the porosity of the porous distribution plate is 25 to 40; preferably, the pore size of the porous distribution plate decreases from the central region to the edge region; preferably, the aerosol is carried into the reaction chamber by a carrier gas; wherein the carrier gas includes nitrogen, and / or the flow rate of the carrier gas ranges from 3 to 10 SLM; and / or the pressure of the reaction chamber is 15 to 30 Pa.

[0007] In conjunction with the first aspect, the aerosol includes hydrogen fluoride / ammonium fluoride mixed aerosols; and / or, the particle size range of the aerosol is 0.1–0.3 μm; and / or, the concentration range of the aerosol is 10. 5 particles / cm 3 ~10 7 particles / cm 3 .

[0008] In conjunction with the first aspect, the aerosol is obtained by atomizing a mixed solution of hydrofluoric acid solution and ammonium fluoride solution using an ultrasonic atomizer, and then classifying it by an inertial impact particle size filter; preferably, the mass percentage of hydrogen fluoride in the hydrofluoric acid solution is 40%, the mass percentage of ammonium fluoride in the ammonium fluoride solution is 5%, and the volume ratio of hydrofluoric acid solution to ammonium fluoride solution is (1:1) to (6:1); preferably, the frequency of the ultrasonic atomizer is 1.5 to 2 MHz; and / or, the classification efficiency of the particle size filter is greater than 90%.

[0009] In conjunction with the first aspect, plasma treatment is performed on the etched silicon carbide substrate, including: pulse-modulated plasma treatment of the etched silicon carbide substrate in a hydrogen / helium mixed gas environment; preferably, the volume ratio of hydrogen to helium in the hydrogen / helium mixed gas ranges from (5:5) to (9:1).

[0010] In conjunction with the first aspect, the pulse frequency range of the pulse-modulated plasma treatment is 500 Hz to 2 kHz; and / or, the duty cycle range of the pulse-modulated plasma treatment is 30% to 80%; and / or, the peak power density range of the pulse-modulated plasma treatment is 0.3 to 1.2 W / cm². 2 ; and / or, the temperature range of the silicon carbide substrate is 800–1000 °C.

[0011] In conjunction with the first aspect, pulse-modulated plasma processing employs dual-frequency radio frequency bias, with the high frequency being 27MHz and the low frequency being 2MHz, and the power ratio between the high and low frequencies ranging from (2:1) to (6:1).

[0012] In conjunction with the first aspect, surface activation of the silicon carbide substrate includes: irradiating the silicon carbide substrate with ultraviolet light in an ozone environment to activate the surface; preferably, the light source for ultraviolet irradiation is a dual-wavelength light source of 185nm and 254nm; preferably, the ozone concentration range is 200-300ppm; and / or, the processing temperature range is 25-40℃; and / or, the processing time is 10-30min; and / or, the irradiation angle of the light source ranges from 40° to 50°.

[0013] In conjunction with the first aspect, surface passivation of the plasma-treated silicon carbide substrate includes: sequentially forming a first passivation layer and a second passivation layer on the plasma-treated silicon carbide substrate; preferably, the thickness of the first passivation layer is in the range of 1 nm to 3 nm; and / or, the thickness of the second passivation layer is in the range of 4 nm to 6 nm; preferably, the first passivation layer includes a lanthanum oxide passivation layer, and the second passivation layer includes an aluminum nitride passivation layer.

[0014] In conjunction with the first aspect, the first passivation layer and the second passivation layer are prepared by atomic layer deposition; preferably, the number of cycles for preparing the first passivation layer is 100 to 300; and / or, the number of cycles for preparing the second passivation layer is 200 to 500.

[0015] The above technical solution first utilizes aerosols to remove the chemically highly reactive damaged layer, and then uses plasma bombardment to selectively remove weakly bonded regions. This avoids excessive damage to the crystal structure of the silicon carbide surface, resulting in a silicon carbide substrate with less surface damage, lower surface roughness, and a better step structure. After double-layer passivation, the silicon carbide substrate exhibits superior electrical properties, such as a lower interface state density. When the treated silicon carbide substrate is used to fabricate SiC MOSFET devices, it demonstrates excellent electrical performance; and when used for epitaxial growth, it ensures the quality of the epitaxial layer growth. Attached Figure Description

[0016] Figure 1 This is a flowchart of the process steps of a silicon carbide surface treatment method provided in an embodiment of this application. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0018] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and should be understood to include values ​​close to those ranges or values. For numerical ranges, endpoint values ​​of various ranges, endpoint values ​​of various ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein. In this document, unless otherwise specified, data ranges include endpoints.

[0019] Traditional surface treatment methods for silicon carbide materials suffer from various problems. For example, the RCA standard cleaning process (a semiconductor wafer surface cleaning technology developed by RCA) suffers from an imbalance in the silicon / oxygen atom ratio, easily generating micropits, and has a low removal rate of the graphitized carbon layer (e.g., only 68%). Mixed acid (e.g., a mixture of hydrofluoric acid and nitric acid) etching processes lead to an increase in surface silicon vacancy density and disrupt the step structure. Traditional plasma cleaning processes introduce deep-level defects. Thermal oxidation passivation technology suffers from excessively high interface state density and a thick transition layer.

[0020] To address the aforementioned technical problems, this application provides a silicon carbide surface treatment method. In this method, an aerosol is first used to etch the silicon carbide substrate, followed by plasma treatment. Specifically, the highly chemically active damage layer is first removed using aerosol, and then weakly bonded regions are selectively removed using plasma bombardment. This avoids excessive damage to the crystal structure of the silicon carbide surface, resulting in a substrate with less surface damage, lower surface roughness, and a better step structure. After double-layer passivation, the silicon carbide substrate exhibits superior electrical properties, such as a lower interface state density. When the treated silicon carbide substrate is used to fabricate SiC MOSFET devices, it demonstrates excellent electrical performance. Furthermore, when used for epitaxial growth, the quality of the epitaxial layer growth is guaranteed.

[0021] Figure 1 This is a flowchart of the process steps of a silicon carbide surface treatment method provided in an embodiment of this application. Figure 1 As shown, the method includes the following steps.

[0022] Step S110: Surface activation of silicon carbide substrate.

[0023] Optionally, the silicon carbide substrate in this embodiment has a surface damage layer. For example, the silicon carbide substrate is a 4H-SiC or 6H-SiC substrate that has a certain surface damage layer after mechanical polishing. In this embodiment, the silicon carbide substrate is subjected to surface treatment to remove the surface damage layer.

[0024] In this embodiment, the silicon carbide substrate is surface activated by ultraviolet irradiation in an ozone environment. For example, the silicon carbide substrate is placed in a reaction chamber containing an ozone environment. Through the synergistic effect of ultraviolet light and ozone, surface contaminants can be removed and active functional groups can be introduced. Optionally, after surface activation of silicon carbide, the content of carbon-carbon single bonds (CC) on the surface can be reduced (e.g., the CC content detected by X-ray photoelectron spectroscopy (XPS) can be reduced by more than 60%), the polar groups on the surface of the silicon carbide substrate increase, the surface energy increases, and the surface contact angle (i.e., the contact angle between a liquid and a solid surface) decreases, which is beneficial for subsequent etching of the silicon carbide substrate surface using aerosols.

[0025] In this embodiment, the ultraviolet irradiation light source uses a dual-wavelength light source of 185nm and 254nm. The power density of the 185nm light source is 15mW / cm². 2 It is mainly used for surface activation treatment of silicon carbide substrates. The power density of the 254nm light source is 8mW / cm². 2It is mainly used for ozone decomposition. Optionally, an ozone concentration sensor and a reflective light intensity monitor are installed in the reaction chamber. The ozone concentration sensor is used to detect the ozone concentration in the reaction chamber with a detection accuracy of ±5ppm; the reflective light intensity monitor is used to monitor the processing quality of the surface activation treatment.

[0026] Optionally, the ozone concentration in the reaction chamber ranges from 200 to 300 ppm, for example, 200 ppm, 220 ppm, 250 ppm, 270 ppm, 300 ppm, etc.; the processing temperature ranges from 25 to 40°C, for example, 25°C, 30°C, 35°C, 40°C, etc.; the processing time ranges from 10 to 30 minutes, for example, 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, etc. The irradiation angle of the light source (i.e., the angle between the light emitted by the light source and the silicon carbide substrate) ranges from 40° to 50°, for example, 40°, 43°, 45°, 47°, 50°, etc.

[0027] For example, when surface activation treatment of a silicon carbide substrate is performed with an ozone concentration of 250 ppm, a treatment temperature of 30°C, a treatment time of 20 min, and an irradiation angle of 45°, the content of carbon-carbon single bonds (CC) on the surface of the silicon carbide substrate can be reduced by 82% (e.g., from 35 at% before activation treatment to 6.3 at%), and the surface energy is 72 mJ / m². 2 The surface contact angle decreased from 85° to less than 3°. The content of carbon-carbon single bonds can be detected using an XPS instrument, and the surface contact angle can be determined using conventional contact angle detection methods; this application does not impose any limitations. The above-described test methods are all conventional in the art, and the test details will not be described in detail here.

[0028] Step S120: Etching is performed on the surface-activated silicon carbide substrate using aerosol.

[0029] Optionally, this step includes: introducing aerosol into the reaction chamber through a porous distribution plate to etch the silicon carbide substrate in the reaction chamber.

[0030] Since aerosols are small particles suspended in a gas, in this embodiment, the aerosols are carried into the reaction chamber by a carrier gas. Optionally, the carrier gas includes nitrogen, for example, high-purity nitrogen (purity ≥99.999%, impurities ≤0.001%, moisture ≤3ppmv). The flow rate of the carrier gas is in the range of 3–10 SLM, for example, 3 SLM, 5 SLM, 7 SLM, 10 SLM, etc. In this embodiment, the pressure of the reaction chamber is 15–30 Pa, for example, 15 Pa, 17 Pa, 20 Pa, 22 Pa, 25 Pa, 28 Pa, 30 Pa, etc.

[0031] In the embodiments of this application, the pore size of the porous distribution plate ranges from 0.3 to 0.7 mm, for example, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, etc. Optionally, the porosity of the porous distribution plate is...

[0032] The porosity can be set to 25%–40%, for example, 25%, 30%, 35%, 40%, etc. By setting the above pore size and porosity, it can be ensured that the aerosol can pass smoothly through the porous distribution plate. Optionally, due to the influence of airflow, the gas flow velocity in the edge region of the porous distribution plate is faster and the gas flow velocity in the central region is slower. In order to ensure that the flow velocity of the aerosol entering the reaction chamber is uniform, the pore size of the porous distribution plate can be set to decrease from the central region to the edge region, that is, the pore size in the central region is larger than the pore size in the edge region, so as to ensure that the aerosol enters the reaction chamber uniformly and improves the etching uniformity.

[0033] In some embodiments, the aerosol comprises a hydrogen fluoride (HF) / ammonium fluoride (NH4F) mixed aerosol. The aerosol can undergo the following reaction on the surface of a silicon carbide substrate:

[0034] SiC + 6HF → H2SiF6 + CH4↑

[0035] 4NH4F + SiO2 → (NH4)2SiF6 + 2H2O

[0036] The above chemical reaction can remove the chemically active damage layer on the surface of the silicon carbide substrate.

[0037] In some embodiments, the particle size range of the aerosol is 0.1–0.3 μm, for example, 0.1–0.15 μm, 0.13–0.18 μm, 0.15–0.2 μm, 0.18–0.22 μm, 0.2–0.25 μm, 0.22–0.27 μm, 0.25–0.3 μm, etc. Optionally, the concentration range of the aerosol (i.e., the concentration of the aerosol in the reaction chamber) is 10. 5 particles / cm 3 ~10 7 particles / cm 3 For example, 10 5 particles / cm 3 5×10 5 particles / cm 3 10 6 particles / cm 3 5×10 6 particles / cm 3 10 7 particles / cm 3 wait.

[0038] In some embodiments, the aerosol is obtained by atomizing a mixture of hydrofluoric acid solution and ammonium fluoride solution using an ultrasonic atomizer, followed by classification by an inertial impact particle size filter. Optionally, the hydrofluoric acid solution contains 40% hydrogen fluoride by mass, the ammonium fluoride solution contains 5% ammonium fluoride by mass, and the volume ratio of the hydrofluoric acid solution to the ammonium fluoride solution is (1:1) to (6:1), for example, 1:1, 2:1, 3:1, 4:1, 5:1, 6:1, etc. Within this volume ratio range, the silicon oxide on the silicon carbide surface can be gently and controllably etched, while reducing damage to the substrate. In the embodiments of this application, the frequency of the ultrasonic atomizer is 1.5 to 2 MHz, for example, 1.5 MHz, 1.7 MHz, 2 MHz, etc. The classification efficiency of the particle size filter is greater than 90%.

[0039] Table 1 shows the performance parameters of the mixed acid wet etching process and the aerosol etching process. The mixed acid wet etching process uses a 1:3 mixture of HF (49%) and HNO3 (68%) (i.e., the mass percentage of hydrogen fluoride in the hydrofluoric acid solution is 49%, the mass percentage of nitric acid in the nitric acid solution is 68%, and the volume ratio of hydrofluoric acid solution to nitric acid solution is 1:3), with a processing time of 8 minutes. The aerosol etching process also has a processing time of 8 minutes. The particle size, concentration, and volume ratio of hydrofluoric acid solution to ammonium fluoride solution used to prepare the aerosol can be found in Table 1. As shown in Table 1, compared to the mixed acid wet etching process, using aerosol etching can achieve low-damage, high-selectivity surface planarization, avoiding deep damage; and it does not generate process wastewater, making it more environmentally friendly. Furthermore, when the aerosol particle size range is 0.1–0.3 μm and the concentration range (i.e., the concentration of aerosol in the reaction chamber) is 10... 5 particles / cm 3 ~10 7 particles / cm 3 When the volume ratio of hydrofluoric acid solution to ammonium fluoride solution is (1:1) to (6:1), the aerosol etching effect is better. Optionally, the surface roughness Ra after aerosol etching is 0.1 nm to 0.4 nm, and the silicon vacancy density is less than 5 × 10⁻⁶. 14 cm -3 The surface oxygen content is less than 1 at%. The surface roughness Ra can be measured using an atomic force microscope (AFM), the silicon vacancy density can be measured using an electron paramagnetic resonance (EPR) instrument, and the surface oxygen content can be detected using an XPS instrument. The above test methods are all conventional test methods in this field, and the test details will not be described in detail here.

[0040] Table 1

[0041]

[0042]

[0043] Step S130: Perform plasma treatment on the etched silicon carbide substrate.

[0044] Optionally, the etched silicon carbide substrate can be subjected to pulsed-modulated plasma treatment in a hydrogen / helium mixed gas environment. Pulsed-modulated plasma treatment technology uses a pulsed power supply or energy control device to control the generation, parameters, and process of plasma in a pulsed cycle, achieving precise control over plasma activity, energy distribution, and treatment time. In this embodiment, by employing pulsed-modulated plasma treatment, the silicon carbide substrate can be intermittently bombarded with plasma, reducing the thermal load on the silicon carbide substrate surface and minimizing surface thermal damage. Furthermore, the interaction between the plasma and the silicon carbide substrate surface can be precisely controlled, selectively removing weakly bonded regions and avoiding excessive damage to the silicon carbide substrate surface.

[0045] Optionally, the volume ratio of hydrogen to helium in the hydrogen / helium mixture ranges from (5:5) to...

[0046] (9:1), for example, 5:5, 6:4, 7:3, 8:2, 9:1, etc.

[0047] In some embodiments, the modulation parameters of the pulse-modulated plasma treatment can affect the surface treatment result. Optionally, the pulse frequency range of the pulse-modulated plasma treatment is 500 Hz to 2 kHz, for example, 500 Hz, 1 kHz, 1.5 kHz, 2 kHz, etc. The duty cycle range of the pulse-modulated plasma treatment is 30% to 80%, for example, 30%, 40%, 50%, 60%, 70%, 80%, etc. The peak power density range of the pulse-modulated plasma treatment is 0.3 to 1.2 W / cm². 2 For example, 0.3 W / cm 2 0.5W / cm 2 0.8W / cm 2 1W / cm 2 1.2W / cm 2 In the embodiments of this application, the temperature range of the silicon carbide substrate during pulsed plasma treatment is 800 to 1000°C, for example, 800°C, 850°C, 900°C, 1000°C, etc. Within this temperature range, surface thermal damage can be reduced.

[0048] In this embodiment, the pulse-modulated plasma processing uses an electron cyclotron resonance (ECR) device to generate plasma. The plasma source frequency is 2.45 GHz, employs dual-frequency radio frequency bias, and includes an axial magnetic field coil (magnetic field strength of 0.5 T). In this embodiment, the pulse-modulated plasma processing uses dual-frequency radio frequency bias, with a high frequency of 27 MHz and a low frequency of 2 MHz. The power ratio between the high and low frequencies ranges from (2:1) to (6:1), for example, 2:1, 3:1, 4:1, 5:1, 6:1, etc.

[0049] Table 2 shows the performance parameters of plasma treatment under different modulation parameters. In this embodiment, a silicon carbide substrate processed according to the aerosol etching conditions in Example G2 of Table 1 was subjected to plasma treatment. As shown in Table 2, the pulse frequency range of the pulse-modulated plasma treatment is 500 Hz to 2 kHz; the duty cycle range is 30% to 80%; and the peak power density range is 0.3 to 1.2 W / cm². 2 Plasma treatment yields superior results with minimal surface damage to the silicon carbide substrate. Specifically, the surface roughness Ra after plasma treatment ranges from 0.1 nm to 0.4 nm, the single-atom step width is 200 nm to 300 nm, the surface Fermi level shift is less than 0.2 eV, and the mobility retention rate is greater than 95%. The step width characterizes the lateral extension of the surface step structure; a larger step width indicates better surface uniformity. The surface Fermi level shift refers to the change in the position of the Fermi level on the silicon carbide surface after plasma treatment relative to its position before treatment; a smaller value indicates less surface damage. The mobility retention rate is the ratio of the carrier mobility in the plasma-treated silicon carbide to the carrier mobility before treatment; a higher mobility retention rate indicates less surface damage to the silicon carbide substrate. The step width was observed using a low-energy electron microscope (LEEM), the surface roughness Ra was measured using an aluminosimeter (AFM), the surface Fermi level shift was detected using an ultraviolet photoelectron spectroscopy (UPS), and the mobility retention rate was measured using a Hall effect meter.

[0050] Table 2

[0051]

[0052]

[0053] Step S140: Surface passivation is performed on the plasma-treated silicon carbide substrate.

[0054] Optionally, a first passivation layer and a second passivation layer are sequentially formed on a plasma-treated silicon carbide substrate. Exemplarily, the first passivation layer comprises a lanthanum oxide (La₂O₃) passivation layer, and the second passivation layer comprises an aluminum nitride (AlN) passivation layer. By providing two passivation layers, the surface of the silicon carbide substrate can be further optimized. The first passivation layer (i.e., the lanthanum oxide passivation layer) can fill dangling bonds on the silicon carbide surface, reducing interfacial fixed charges; the second passivation layer (i.e., the aluminum nitride passivation layer) can enhance the chemical stability of the surface, for example, improving resistance to water and oxygen corrosion by approximately 10 times.

[0055] Optionally, the thickness of the first passivation layer ranges from 1 nm to 3 nm, for example, 1 nm, 2 nm, 3 nm, etc. The thickness of the second passivation layer ranges from 4 nm to 6 nm, for example, 4 nm, 5 nm, 6 nm, etc. Within this thickness range, better electrical performance can be achieved.

[0056] In some embodiments, the first passivation layer and the second passivation layer are prepared by atomic layer deposition. Optionally, the number of cycles for preparing the first passivation layer is 100 to 300, for example, 100, 150, 200, 250, 300, etc. The number of cycles for preparing the second passivation layer is 200 to 500, for example, 200, 250, 300, 350, 400, 450, 500, etc. Optionally, the growth rate for preparing the first passivation layer is 0.01 nm / cycle to 0.02 nm / cycle, for example, 0.01 nm / cycle, 0.013 nm / cycle, 0.015 nm / cycle, 0.02 nm / cycle, etc. The growth rate for preparing the second passivation layer is 0.01 nm / cycle to 0.022 nm / cycle, for example, 0.01 nm / cycle, 0.015 nm / cycle, 0.017 nm / cycle, 0.02 nm / cycle, 0.022 nm / cycle, etc. In the embodiments of this application, the precursors for preparing the lanthanum oxide passivation layer are tris(2,2,6,6-tetramethyl-3,5-heptadecyl)lanthanum (La(thd)3) ​​and ozone (O3), and the growth temperature is 250℃~350℃, for example, 250℃, 300℃, 350℃, etc. The precursors for preparing the aluminum nitride passivation layer are trimethylaluminum (TMA) and ammonia plasma, and the growth temperature is 200℃~300℃, for example, 200℃, 250℃, 300℃, etc.

[0057] Table 3 shows the electrical performance parameters of silicon carbide-oxide-semiconductor field-effect transistors (SiC MOSFETs) fabricated after passivating the silicon carbide surface with alumina and, in this application, lanthanum oxide and aluminum nitride, respectively. Here, the passivation film is deposited on the silicon carbide surface after plasma treatment, as shown in Example P2 of Table 2. The thickness of the alumina passivation layer is 7 nm, and the thicknesses of the lanthanum oxide and aluminum nitride passivation layers are 2 nm and 5 nm, respectively. As shown in Table 3, the passivated silicon carbide substrate surface in this application exhibits superior electrical performance, namely, lower interface state density, smaller flat-band drift voltage, and larger gate oxide breakdown field. The interface state density refers to the energy state density existing at the interface between the silicon carbide semiconductor layer and other film layers, reflecting the number of interface defect states per unit area and unit energy range; a smaller value indicates fewer interface defects. Flatband voltage shift refers to the deviation between the actual measured flatband voltage and the ideal flatband voltage. A smaller value indicates better electrical stability of the silicon carbide interface. Gate oxide breakdown field strength refers to the critical electric field strength required for the gate oxide layer of a SiC MOSFET device to undergo electrical breakdown. A larger value indicates fewer surface defects in the silicon carbide.

[0058] Table 3

[0059] Electrical performance parameters Alumina passivation layer Lanthanum oxide passivation layer / aluminum nitride passivation layer <![CDATA[Interface state density D it (cm -2 ·eV-1)]]> <![CDATA[1.2×10 11 ]]> <![CDATA[3.8×10 10 ]]> Flat-band voltage drift (V) 0.45 0.08 Gate oxide breakdown field strength (MV / cm) 8 12

[0060] In the embodiments of this application, the chemically active damage layer is first removed by aerosol, and then the weakly bonded region is selectively removed by plasma bombardment. This can avoid excessive damage to the crystal structure of the silicon carbide surface. The treated silicon carbide substrate has less surface damage, lower surface roughness, and a better step structure. After double-layer passivation treatment, the silicon carbide substrate has better electrical properties, for example, a lower interface state density.

[0061] Silicon carbide substrates have applications in various fields, such as SiC MOSFET devices (e.g., high-voltage SiC MOSFET devices of 1200V and above), epitaxial growth (e.g., epitaxial growth of automotive-grade silicon carbide modules), and radio frequency devices. Since the type of silicon carbide substrate and surface treatment process conditions differ depending on the application, this section will further explain the applications using SiC MOSFET devices and epitaxial growth as examples.

[0062] Example 1

[0063] The first step is to provide a silicon carbide substrate, which is a 4-inch n-type 4H-SiC doped semiconductor (wherein the doping concentration is 1×10⁻⁶). 18 cm -3 The surface roughness Ra after mechanical polishing is 0.35 nm;

[0064] The second step involves surface activation of the silicon carbide substrate by ultraviolet irradiation in an ozone environment. The process conditions are as follows: a dual-wavelength light source of 185nm and 254nm is used, with a power density of 15mW / cm² for the 185nm light source. 2 The power density of the 254nm light source is 8mW / cm². 2 The ozone concentration in the reaction chamber was 250 ppm ± 5%, the processing temperature was 30℃, the processing time was 20 min, and the irradiation angle of the light source was 45°. After this step, the silicon carbide substrate had a surface contact angle of 2.8° and a surface energy of 72 mJ / m². 2 .

[0065] The third step involves etching the surface-activated silicon carbide substrate using aerosols. The process conditions are as follows: the volume ratio of hydrofluoric acid solution to ammonium fluoride solution in the aerosol preparation solution is 3:1; the aerosol particle size range is 0.18–0.22 μm; and the aerosol concentration is 5 × 10⁻⁶. 6 particles / cm 3 The processing time is 8 minutes. After this step, the surface oxygen content of the silicon carbide substrate is less than 0.5 at%.

[0066] The fourth step involves plasma treatment of the etched silicon carbide substrate. The process conditions are as follows: a hydrogen / helium volume ratio of 7:3 in the hydrogen / helium gas mixture, a pulse frequency of 1 kHz, a duty cycle of 50%, and a peak power density of 0.8 W / cm³. 2 The silicon carbide substrate treated in this step has a surface roughness Ra of 0.18 nm, a single-atom step width of 250 nm, and a step height difference of 0.12 nm.

[0067] The fifth step involves surface passivation of the plasma-treated silicon carbide substrate. The process conditions are as follows: lanthanum oxide passivation layer thickness of 2 nm, cycle count of 150, growth rate of 0.013 nm / cycle; aluminum nitride passivation layer thickness of 5 nm, cycle count of 300, growth rate of 0.017 nm / cycle. The interface state density D of the silicon carbide substrate after this step is... it 3.2×10 10 cm -2 ·eV-1.

[0068] Comparative Example 1

[0069] The difference between Comparative Example 1 and Example 1 is that the order of the third and fourth steps is reversed. That is, the silicon carbide substrate is first subjected to plasma treatment, and then the silicon carbide substrate is subjected to aerosol etching. The rest is the same as Example 1.

[0070] Comparative Example 2

[0071] The difference between Comparative Example 2 and Example 1 is that the fourth step, namely the plasma treatment of the silicon carbide substrate, is omitted; otherwise, it is the same as Example 1.

[0072] Comparative Example 3

[0073] The difference between Comparative Example 3 and Example 1 is that the third step, namely the aerosol etching of the silicon carbide substrate, is omitted; otherwise, it is the same as Example 1.

[0074] Comparative Example 4

[0075] Comparative Example 4 uses the RCA standard cleaning process to treat the silicon carbide substrate. Specifically, the silicon carbide substrate is treated with SC1 (NH4OH:H2O2:H2O=1:1:5) solution at 75℃ for 10 min.

[0076] Examples 1 and Comparative Examples 1 to 4 were assembled into SiC MOSFET devices, and their electrical performance was tested, as shown in Table 4. Table 4 shows that the best electrical performance was achieved by performing aerosol etching followed by plasma treatment. For example, comparing Example 1 with Comparative Example 4, the on-resistance performance was improved by 27%, the threshold voltage drift performance by 81%, and the gate oxide lifetime performance by 500%. On-resistance refers to the equivalent resistance between the source and drain when the MOSFET device is fully turned on; the smaller this value, the lower the power loss during conduction and the higher the device efficiency. Threshold voltage drift refers to the phenomenon where the threshold voltage deviates from its initial value due to changes in time, temperature, gate voltage stress, or environment; the smaller this value, the better the device stability. Gate oxide lifetime refers to the effective time during which the gate oxide layer of the MOSFET device does not break down; the larger this value, the better the device reliability.

[0077] In this embodiment, aerosol etching is first performed to remove the chemically reactive damage layer, followed by plasma selective removal of weakly bonded regions. This avoids excessive damage to the crystal structure of the silicon carbide surface, resulting in less surface damage to the treated silicon carbide substrate and superior electrical performance after fabrication into a MOSFET device. In Comparative Example 1, plasma treatment is performed before aerosol etching. Since the initial plasma treatment introduces new damage and weakly bonded regions onto the surface, the subsequent aerosol etching, while removing some damage, cannot effectively repair the deep lattice disturbances caused by the plasma. This results in poor final surface roughness (Ra ~ 0.7 nm), high interface state density, and significantly degraded electrical performance. In Comparative Example 2, only aerosol etching is performed. Due to the lack of a plasma treatment step for selective removal of weakly bonded regions, the surface after aerosol etching still contains a certain number of defects and dangling bonds, leading to unclear surface step structures, poor electrical performance, and a high interface state density. In Comparative Example 3, only plasma treatment was performed. Due to the lack of an aerosol etching step to remove the chemically active damage layer, direct plasma treatment would bombard both the damage layer and the intact crystal simultaneously, resulting in excessive damage, increased surface roughness (Ra ~ 0.9 nm), and possible introduction of deep-level defects. The mobility retention rate was significantly reduced (< 85%), the interface state density increased, and the electrical performance was poor.

[0078] Table 4

[0079]

[0080] Note: 50 years @ 3MV / cm means the gate oxide lifetime of the device is 50 years when an electric field strength of 3MV / cm is applied. 15 years @ 2.5MV / cm means the gate oxide lifetime of the device is 15 years when an electric field strength of 2.5MV / cm is applied. 20 years @ 2.8MV / cm means the gate oxide lifetime of the device is 20 years when an electric field strength of 2.8MV / cm is applied. 5 years @ 2MV / cm means the gate oxide lifetime of the device is 5 years when an electric field strength of 2MV / cm is applied. 10 years @ 2MV / cm means the gate oxide lifetime of the device is 10 years when an electric field strength of 2MV / cm is applied.

[0081] Example 2

[0082] The difference from Example 1 is that the silicon carbide substrate is a semi-insulating 6H-SiC with a resistivity > 1 × 10⁻⁶. 8 Ω·cm; aerosol etching time was 6 min; silicon carbide substrate temperature during plasma treatment was 900 °C, and other conditions were the same as in Example 1.

[0083] Comparative Example 5

[0084] The difference from Example 2 is that the silicon carbide substrate was surface treated using the RCA standard cleaning process. Specifically, the silicon carbide substrate was treated with an SCI (NH4OH:H2O2:H2O=1:1:5) solution at 75°C for 10 min.

[0085] Epitaxial growth was performed on the silicon carbide substrates treated in Example 2 and Comparative Example 5, and the quality of the grown epitaxial layers was tested, as shown in Table 5. Table 5 shows that the epitaxial layers of the silicon carbide substrates surface-treated using the technical solution of this application have higher quality, specifically, lower defect density, lower doping uniformity, and longer carrier lifetime. Defect density refers to the number of crystal structure defects per unit area of ​​the epitaxial layer; the smaller this value, the better the epitaxial layer quality. Doping uniformity refers to the consistency of the concentration of dopant atoms (e.g., phosphorus, arsenic, boron, aluminum, etc.) in the epitaxial layer in both the lateral and longitudinal directions; the smaller this value, the more uniform the dopant atom distribution, and the better the epitaxial layer quality. Carrier lifetime refers to the average time from the generation of excess carriers (e.g., electrons or holes) in the epitaxial layer to carrier recombination; the larger this value, the fewer defects in the epitaxial layer.

[0086] Table 5

[0087] <![CDATA[Defect density (cm -2 )]]> Doping uniformity (3σ) Carrier lifetime (μs) Example 2 65 ±3.5% 2.3 Comparative Example 5 450 ±12% 0.8

[0088] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0089] The block diagrams of devices, apparatuses, devices, and systems involved in this application are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0090] It should also be noted that in the apparatus, equipment, and methods of this application, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this application.

[0091] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this application. Therefore, this application is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0092] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

[0093] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for treating silicon carbide surfaces, characterized in that, include: Surface activation of a silicon carbide substrate, the surface activation comprising irradiating the silicon carbide substrate with ultraviolet light in an ozone environment; The surface-activated silicon carbide substrate is etched using an aerosol; wherein the aerosol comprises a hydrogen fluoride / ammonium fluoride mixed aerosol; and / or, the particle size of the aerosol ranges from 0.1 to 0.3 μm; and / or, the concentration of the aerosol ranges from 10 μm. 5 particles / cm³~10 7 particles / cm³; The etched silicon carbide substrate is subjected to plasma treatment; The silicon carbide substrate after plasma treatment is then surface passivated.

2. The silicon carbide surface treatment method according to claim 1, characterized in that, The etching process of the surface-activated silicon carbide substrate using aerosol includes: Aerosol is introduced into the reaction chamber through a porous distribution plate to etch the silicon carbide substrate in the reaction chamber; wherein the pore size of the porous distribution plate is in the range of 0.3~0.7 mm and the porosity of the porous distribution plate is 25~40.

3. The silicon carbide surface treatment method according to claim 2, characterized in that, The aperture size of the porous distribution plate decreases from the central region to the edge region.

4. The silicon carbide surface treatment method according to claim 2, characterized in that, The aerosol is carried into the reaction chamber by a carrier gas; wherein the carrier gas includes nitrogen, and / or the flow rate of the carrier gas is in the range of 3~10 SLM; and / or the pressure of the reaction chamber is 15~30 Pa.

5. The silicon carbide surface treatment method according to claim 1, characterized in that, The aerosol is obtained by atomizing a mixed solution of hydrofluoric acid solution and ammonium fluoride solution using an ultrasonic atomizer, and then classifying it by an inertial impact particle size filter.

6. The silicon carbide surface treatment method according to claim 5, characterized in that, The hydrofluoric acid solution contains 40% hydrogen fluoride by mass, the ammonium fluoride solution contains 5% ammonium fluoride by mass, and the volume ratio of the hydrofluoric acid solution to the ammonium fluoride solution is (1:1) to (6:1).

7. The silicon carbide surface treatment method according to claim 5, characterized in that, The frequency of the ultrasonic atomizer is 1.5~2 MHz; and / or the grading efficiency of the particle size filter is greater than 90%.

8. The silicon carbide surface treatment method according to claim 1, characterized in that, The plasma treatment of the etched silicon carbide substrate includes: The etched silicon carbide substrate is subjected to pulsed plasma treatment in a hydrogen / helium mixed gas environment.

9. The silicon carbide surface treatment method according to claim 8, characterized in that, The volume ratio of hydrogen to helium in the hydrogen / helium mixture ranges from (5:5) to (9:1).

10. The silicon carbide surface treatment method according to claim 8, characterized in that, The pulse frequency range of the pulse-modulated plasma treatment is 500 Hz to 2 kHz; and / or, the duty cycle range of the pulse-modulated plasma treatment is 30% to 80%; and / or, the peak power density range of the pulse-modulated plasma treatment is 0.3 to 1.2 W / cm². 2 ; and / or, the temperature range of the silicon carbide substrate is 800~1000℃.

11. The silicon carbide surface treatment method according to claim 8, characterized in that, The pulse-modulated plasma processing employs a dual-frequency radio frequency bias, wherein the high frequency of the dual-frequency radio frequency bias is 27 MHz and the low frequency is 2 MHz, and the power ratio of the high frequency to the low frequency ranges from (2:1) to (6:1).

12. The silicon carbide surface treatment method according to claim 1, characterized in that, The ultraviolet irradiation uses a dual-wavelength light source of 185 nm and 254 nm.

13. The silicon carbide surface treatment method according to claim 1, characterized in that, The ozone concentration range is 200~300ppm; and / or, the treatment temperature range is 25~40℃; and / or, the treatment time is 10~30 min; and / or, the irradiation angle of the light source ranges from 40° to 50°.

14. The silicon carbide surface treatment method according to claim 1, characterized in that, The surface passivation of the plasma-treated silicon carbide substrate includes: A first passivation layer and a second passivation layer are sequentially formed on the plasma-treated silicon carbide substrate.

15. The silicon carbide surface treatment method according to claim 14, characterized in that, The thickness of the first passivation layer ranges from 1 nm to 3 nm; and / or the thickness of the second passivation layer ranges from 4 nm to 6 nm; The first passivation layer includes a lanthanum oxide passivation layer, and the second passivation layer includes an aluminum nitride passivation layer.

16. The silicon carbide surface treatment method according to claim 14, characterized in that, The first passivation layer and the second passivation layer are prepared by atomic layer deposition. The number of cycles for preparing the first passivation layer is 100-300; and / or the number of cycles for preparing the second passivation layer is 200-500.

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