A PCB surface treatment process based on local gold plating plus nickel gold plating

Abstract

This invention discloses a PCB surface treatment process based on localized gold plating followed by immersion nickel plating, belonging to the field of surface treatment technology. It is used to treat PCBs requiring localized hard gold plating and immersion nickel plating in other areas, comprising the following steps: S1, pre-processing: processing the PCB to the copper thickness before electroplating; S2, first layer patterning: applying a dry film to the CS side of the PCB and etching to form a pattern; S3, gold plating preparation; S4, localized gold plating; S5, film removal and second layer patterning; S6, conductor removal; S7, solder mask and protection; S8, immersion nickel plating. This surface treatment process precisely controls the micro-roughness of the substrate surface through multi-step pre-processing, combined with high-pressure water rinsing and plasma cleaning, ensuring both the mechanical interlocking force between the plating layer and the copper layer and avoiding uneven plating caused by excessive roughness. Simultaneously, pulsed current and magnetic masks are used to regulate the current distribution during the copper plating and electroplating stages, improving the plating density and thickness uniformity.

Description

Technical Field

[0001] This invention relates to the field of surface treatment technology, specifically to a PCB board surface treatment process based on local gold plating plus immersion nickel-gold plating. Background Technology

[0002] Against the backdrop of the rapid development of the electronics and information industry, PCB boards, as the core carriers of electronic components, have their surface treatment processes directly affecting the reliability, conductivity, and lifespan of products. As terminal devices evolve towards high precision, miniaturization, and multi-functionality, PCB boards often need to meet the dual requirements of localized high wear resistance and overall oxidation resistance. For example, high-frequency contact areas such as connectors and buttons require a hard gold plating layer with high hardness and strong wear resistance (Vickers hardness is typically ≥200HV), while other areas need to undergo immersion nickel-gold treatment to form a uniform nickel-gold alloy layer to improve oxidation resistance and solderability.

[0003] In traditional processes, substrate surface pretreatment often employs a single alkaline degreasing or acidic etching method, making it difficult to precisely control surface micro-roughness. Insufficient roughness weakens the mechanical interlocking force between the plating layer and the copper layer, leading to peeling and flaking; while excessive roughness results in uneven plating thickness distribution and exacerbates stress concentration. Furthermore, residual drill chips and organic impurities on the hole walls after drilling can cause voids in the plating layer, affecting conductivity reliability. Moreover, current processes often use single pattern transfer or simple masking when dividing gold plating and immersion nickel-gold areas, which can easily lead to plating solution seeping into non-target areas due to dry film adhesion bubbles and poor edge sealing. For example, during localized hard gold plating, if the SS surface (bottom layer) is not properly protected, gold ions may deposit in non-gold plating areas, resulting in a decrease in the purity of the subsequent immersion nickel-gold layer; conversely, during the immersion nickel-gold process, nickel ions may also contaminate the already plated hard gold surface, reducing its wear resistance. Summary of the Invention

[0004] To achieve the above objectives, the present invention provides the following technical solution: a PCB board surface treatment process based on localized gold plating and immersion nickel plating, used to treat PCB boards requiring localized hard gold plating and immersion nickel plating in other areas, comprising the following steps:

[0005] S1, Pre-processing: Process the PCB board to the copper thickness before electroplating;

[0006] S2, First layer patterning: Dry film is applied to the CS side (top layer) of the PCB board and etched to form a pattern, while the SS side (bottom layer) is not etched.

[0007] S3, Gold plating preparation: Apply dry film to the SS side, leaving the gold plating area exposed on the CS side.

[0008] S4, Localized gold plating: Hard gold plating is applied to the exposed areas of the CS surface;

[0009] S5, Film Removal and Second Layer Patterning: Remove the dry film from both sides of the PCB board, apply dry film to the CS side for overall protection, and etch the SS side to form the pattern.

[0010] S6, Conductor Removal: Remove conductors from the PCB board;

[0011] S7, Solder Mask and Protection: After the solder mask treatment is completed, the gold-plated areas are protected, exposing the areas that need to be plated with nickel gold.

[0012] S8, Immersion Nickel Gold Treatment: Immersion nickel gold treatment is performed on the exposed areas, followed by surface treatment in the subsequent process.

[0013] Preferably, the specific steps of step 1 are as follows:

[0014] S11, Substrate pretreatment: Immerse the substrate in a 5-8% sodium hydroxide solution at 50-60℃ for 3-5 minutes to remove oil and oxide layer from the substrate surface; treat the substrate in a 10-15% ammonium persulfate solution at 25-30℃ for 60-90 seconds to control the micro-roughness of the substrate surface to 0.1-0.2μm, thereby enhancing the adhesion between the subsequent plating layer and the substrate;

[0015] S12, Drilling and Hole Wall Treatment:

[0016] High-pressure water flushing: For drill cuttings remaining in the hole after drilling, when the hole diameter is >0.2mm, use deionized water with a pressure of 1.5-2MPa for flushing; when the hole diameter is ≤0.2mm, use deionized water with a pressure of 0.8-1.2MPa for flushing to avoid high pressure damage to the hole structure;

[0017] Plasma cleaning: In an oxygen atmosphere, plasma treatment is performed at a power of 380-450W for 60-90 seconds to remove residual organic matter and minute impurities from the pore walls, ensuring the cleanliness of the pore walls.

[0018] S13, Copper Plating and Electroplating: A conductive copper layer with a thickness of 0.5-1 μm is uniformly deposited on the substrate surface and hole walls to form a conductive substrate; the copper layer thickness is increased across the entire board using pulsed current, with a peak current density of 2-3 A / dm². 2 The forward pulse width is 0.5ms and the reverse pulse width is 0.2ms, which improves the density of the copper layer. An adjustable magnetic mask is set above the area to be hard gold plated. The current distribution is controlled by a shielding coefficient of 40±5%, so that the final copper thickness in this area is 5-10% higher than that in the non-gold plated area. After local thickening, the copper thickness deviation of the whole board is ≤8%, which provides a basis for the uniformity of the gold layer thickness of local hard gold plated.

[0019] S14, Water washing treatment: Rinse the substrate with deionized water until the pH value of the substrate surface reaches 6-7, completing the pre-processing treatment.

[0020] Preferably, step S2 specifically includes the following steps:

[0021] S21, Dry film pretreatment: Select a photosensitive dry film with a thickness of 35-50μm and a resolution of ≥25μm, and equilibrate it for 24 hours in an environment with a temperature of 25℃ and a relative humidity of ≤30% to eliminate the internal stress generated during the storage of the dry film and ensure dimensional stability during bonding.

[0022] S22, CS side dry film lamination: Roller lamination method is adopted, with lamination temperature set at 70-75℃, roller pressure at 0.3-0.4MPa, and lamination speed at 1.5-2m / min, so that the dry film is tightly bonded to the copper layer on the CS side, avoiding subsequent pattern distortion due to poor lamination;

[0023] S23, Exposure and Development: Exposure is performed using an exposure device with an alignment accuracy of ±5μm, and the exposure energy is controlled at 80-100mJ / cm2. After exposure, the film is baked at 110℃ for 2 minutes to enhance the photosensitive crosslinking effect of the dry film. A sodium carbonate solution with a mass concentration of 1.5-2.0% is used for spray development at 30-35℃ for 90-120 seconds to precisely remove the unexposed areas of the dry film and expose the pattern to be etched.

[0024] S24, CS surface etching: using an ammoniacal alkaline etching solution (containing Cu 2 +Concentration 120-150g / L, pH value 8.0-8.5), etching is carried out at 45-50℃; gradient spray control is adopted during the etching process, and the spray pressure in the edge area is 0.03-0.04MPa higher than that in the center area to ensure that the perpendicularity of the pattern edge is ≥88°, which meets the requirements of pattern accuracy for subsequent gold plating around the perimeter.

[0025] S25, SS surface protection: A fluororubber-based composite film (thermal expansion coefficient CTE=18±2ppm / ℃, thickness 15-20μm) is used to cover the SS surface. Its excellent etching resistance and dimensional stability protect the copper layer of the SS surface from the influence of the etching solution. The composite film is removed after the CS surface etching is completed.

[0026] Preferably, in step S3, the process of applying dry film to the SS surface employs multi-parameter coordinated control to eliminate air bubbles, specifically including the following steps:

[0027] S31 uses an acrylate-based photoresist dry film (Tg=65±5℃), which is preheated to 60-70℃ to soften it. After removing the protective film on the SS side, the dry film is laminated.

[0028] S32, in a vacuum environment of -0.08 to -0.1 MPa, apply a gradient pressure from the center to the edge: initial pressure at the center 0.1-0.15 MPa, final pressure at the edge 0.2-0.25 MPa, with a rate of increase of 0.05 MPa / 5 cm;

[0029] S33, the edge of the dry film is provided with a guide groove with a width of 0.1±0.02mm and a depth of 0.05±0.02mm to form a directional exhaust channel.

[0030] Preferably, the gradient pressure application process from the center to the edge adopts a partitioned dynamic control logic, specifically including: taking the center of the PCB board as the origin, dividing it into a central area (radius ≤ 1 / 3 board length), a transition area (1 / 3 board length < radius ≤ 2 / 3 board length), and an edge area (radius > 2 / 3 board length);

[0031] 1) The pressure in the central zone starts from 0.1-0.12 MPa and increases at a rate of 0.05 MPa / 5 cm.

[0032] 2) The initial pressure of the transition zone is the final pressure of the central zone, with an incremental increase rate of 0.06-0.07 MPa / 5cm; and when dense pads (spacing ≤ 0.2 mm) are detected in the area, the pressure is temporarily increased by 0.02 MPa;

[0033] 3) The initial pressure in the edge zone (including the area where the guide channel is located) is the final pressure in the transition zone. The final pressure is controlled between 0.23-0.25 MPa. The pressure increase rate is dynamically adjusted according to the distance from the guide channel: when the distance from the guide channel is ≤5 mm, the rate increases to 0.08 MPa / 5 cm to accelerate the convergence of bubbles into the guide channel; when the distance from the guide channel is >5 mm, the rate is maintained at 0.06 MPa / 5 cm; when the pressure in the edge zone reaches 0.2 MPa, the vacuum degree is simultaneously increased to -0.095 to -0.1 MPa.

[0034] Preferably, the partial hard gold plating in step S4 includes the following specific steps:

[0035] S41, Gold plating solution preparation: Prepare a hard gold plating solution with a gold ion concentration of 6-8 g / L, ammonium citrate of 80-100 g / L, and pH value controlled at 3.8-4.5; add 0.5-1 g / L cobalt salt to improve the hardness of the gold layer, and add 0.1 g / L polyvinylpyrrolidone as a dispersant to ensure uniform deposition of gold ions;

[0036] S42, Electroplating parameter control: Electroplating is performed on the exposed gold plating area on the CS surface, with the current density set to 2-3A / dm2, temperature to 45-50℃, and stirring rate to 300-400r / min; the current is conducted through the electroplating network connected in series on the non-gold plating surface of the SS surface, so that the current distribution uniformity deviation is ≤5%, ensuring the consistency of the gold plating layer thickness in the non-conductor area.

[0037] S43, Thickness Gradient Control: Regional current density control is adopted, with the current density at the gold-plated edge region being 8-10% higher than that at the center region, forming a thickness gradient: the gold thickness at the gold-plated edge reaches 0.8-1.0μm, the gold thickness at the center region is 0.5-0.7μm, and the total gold thickness at the gold-plated edge is ≤1.2μm, meeting the integrity requirements of the gold plating around the perimeter.

[0038] S44, Post-gold plating treatment: First, use deionized water for ultrasonic cleaning (power 200-300W, time 3-5min) to remove residual plating solution from the surface; then neutralize with 2-3% citric acid solution at 35-40℃ for 40-60s to eliminate alkaline residue on the surface.

[0039] Preferably, the decoction and second layer patterning process in step S5 includes the following specific steps:

[0040] S51, Double-sided film removal: Immerse the film in a 5-8% sodium hydroxide solution at 50-60℃ for 2-3 minutes, while simultaneously applying 150-200W ultrasonic vibration to remove the dry film from both the CS and SS sides. The residual adhesive area should be controlled to ≤0.1mm. 2 ;

[0041] S52, CS surface protection: A 40-50μm thick etch-resistant dry film is applied to the entire CS surface. A vacuum bonding process with a vacuum degree of -0.09 to -0.1MPa is used to ensure that the dry film is tightly bonded to the CS surface pattern and the edge sealing width is ≥1mm to prevent subsequent etching solution from seeping in.

[0042] S53, SS surface pattern etching: using alkaline copper chloride etching solution (containing Cu 2+ Etching was performed at a concentration of 160±10g / L and a pH value of 8.8±0.2 at 48-50℃, with the etching rate controlled at 18-22μm / min. The etching progress was monitored in real time using a CCD vision system, and the edge deviation of the pattern was controlled to be ≤0.02mm according to the IPC-TM-6502.2.22 standard.

[0043] S54, Damage Detection: The CS surface is scanned using a phase-locked infrared thermal imager (temperature resolution 0.1℃). When a temperature difference > 0.5℃ is detected in a region, it is determined to be potential etching damage to ensure the integrity of the local gold-plated area.

[0044] Preferably, the wire removal in step S6 includes the following specific steps:

[0045] S61, Conductor Identification and Positioning: The PCB board is scanned by an AOI automatic optical inspection system to identify conductors (including etched conductors and isolated conductors) to be removed with an accuracy of ±0.005mm, and the position and width information of the conductors are marked.

[0046] S62, Etching method for removing conductors: For etchable conductors, a local spraying process is used. The spraying solution is a 10-15% ammonium persulfate solution (with 0.05% sodium dodecyl sulfate added). The spraying pressure is controlled at 0.2-0.3 MPa. Etching is only performed on the conductor area to avoid damaging the surrounding pattern.

[0047] S63, Laser removal of isolated wires: For isolated wires that cannot be etched, laser cutting is used for removal. The laser power is set to 6-8W, the pulse frequency to 20kHz, and the spot diameter to 0.02-0.03mm. The cutting path is made 0.03-0.05mm away from the edge of the wire. At the same time, nitrogen gas is introduced at 5-8L / min to assist in cooling and prevent thermal damage.

[0048] S64, Removal effect acceptance: Inspect the wire removal area with a 50x microscope to ensure that there is no wire residue or carbonization damage, and that it meets the cleanliness requirements for subsequent surface treatment.

[0049] Preferably, the solder resist and protection in step S7 includes the following specific steps:

[0050] S71, Solder resist ink coating: 300-400 mesh screen printing photosensitive solder resist ink is used to form a 15-20μm thick ink layer on the PCB board surface, ensuring that there is no ink accumulation at the edges of local gold-plated areas and immersion nickel-gold areas, and ensuring the accuracy of subsequent protection.

[0051] S72, Stepped curing of solder resist layer: Pre-baking at 60℃ for 10 min, exposure (energy 150-200mJ / cm2), post-baking at 70℃ for 15 min, development with 1.5-2.0% sodium carbonate solution, final curing at 130℃ for 30 min, to form solder resist layer;

[0052] S73, Localized gold plating area protection: The localized gold plating area is covered with acid-resistant tape with a thickness of 80-100μm, and the edge of the tape extends ≥0.5mm beyond the gold plating area; the tape is sealed by hot pressing at 60-70℃ and 0.1-0.15MPa to prevent corrosion from the immersion nickel gold solution.

[0053] S74, Activation of Electroplated Nickel-Gold Area: For exposed electroplated nickel-gold areas, activate them with 0.5% citric acid solution at 25-30℃ for 30-60 seconds to remove the surface oxide layer and enhance the adhesion of subsequent electroplated nickel-gold layers.

[0054] Preferably, the nickel-gold plating process in step S8 includes:

[0055] S81, Gradient Nickel Layer Deposition: In the first stage, the current density is 0.5-0.8 A / dm², and deposition takes 10-15 min to form a soft nickel layer (thickness 2-3 μm, Vickers hardness 180-200 HV, measured according to ISO 6507-1 standard); in the second stage, the current density is 1.8-2.2 A / dm². 2 A hard nickel layer (1-2 μm thick, Vickers hardness 300-350 HV) is formed by deposition for 5-8 min; the thickness ratio of the soft nickel layer to the hard nickel layer is 1.5:1 to 2:1, and the current density difference is 1.3-1.5 A / dm2.

[0056] S82, Palladium layer micro-roughening: at palladium salt concentrations of 0.5-1 g / L and current densities of 0.1-0.3 A / dm² 2 Palladium layers were deposited under specific conditions, with a surface roughness of 0.1–0.3 μm.

[0057] S83, Pre-plated soft gold transition layer: A 0.1-0.2μm soft gold layer (purity ≥99.9%) is deposited on the surface of the palladium layer at a current density of 0.2A / dm2, and the pre-plated soft gold layer is not included in the total thickness of the local hard gold plating.

[0058] This invention discloses a PCB surface treatment process based on localized gold plating and immersion nickel-gold plating, which has the following beneficial effects:

[0059] (1) This invention precisely controls the micro-roughness (0.1-0.2μm) of the substrate surface through multi-step pretreatment, combined with high-pressure water rinsing (pressure controlled according to aperture) and plasma cleaning (oxygen atmosphere to remove impurities from the hole walls), which not only ensures the mechanical interlocking force between the plating layer and the copper layer, but also avoids the problem of uneven plating caused by excessive roughness. At the same time, the current distribution is controlled by pulse current and magnetic mask in the copper immersion and electroplating stages, which improves the density and thickness uniformity of the plating layer, effectively solving the problems of plating peeling, flaking and hole wall voids in traditional processes, and significantly enhancing the structural stability and conductivity reliability of the PCB board;

[0060] (2) This invention achieves precise isolation between the gold-plated area on the CS surface (top layer) and the non-gold-plated area on the SS surface (bottom layer) through layered pattern processing and multi-parameter coordinated dry film bonding process (gradient pressure bonding under vacuum environment and exhaust through edge guide grooves). The special protection of local gold-plated positions during the immersion nickel-gold stage (hot-press sealing with acid-resistant tape) further blocks the penetration path of the plating solution in different areas, effectively solving the problems of gold ion contamination of the immersion nickel-gold layer and nickel ion erosion of the hard gold surface caused by poor shielding in traditional processes, ensuring the wear resistance of the hard gold plating layer and the purity of the immersion nickel-gold layer. Attached Figure Description

[0061] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0062] Figure 1 This is a flowchart of the industrial process of the present invention; Detailed Implementation

[0063] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention are described clearly and completely. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0064] To better understand the above technical solutions, the following will provide a detailed explanation of the technical solutions in conjunction with the accompanying drawings and specific implementation methods.

[0065] This invention provides, for example Figure 1The illustrated PCB surface treatment process is based on partial gold plating followed by immersion nickel plating. It is used to treat PCBs requiring partial hard gold plating and immersion nickel plating in other areas. The process includes the following steps: S1, Pre-processing: processing the PCB to the copper thickness required before electroplating; S2, First layer patterning: applying a dry film to the CS side (top layer) of the PCB and etching to form a pattern, leaving the SS side (bottom layer) unetched; S3, Gold plating preparation: applying a dry film to the SS side, exposing the gold plating area on the CS side; S4, Partial gold plating: applying hard gold to the exposed areas on the CS side; S5, Film removal and second layer... Patterning: S6, Remove the dry film from both sides of the PCB board, apply dry film to the entire CS side for protection, and etch the SS side to form the pattern; S7, Conductor Removal: Remove the conductors on the PCB board; S8, Solder Mask and Protection: After completing the solder mask treatment, protect the local gold plating areas to expose the areas requiring immersion nickel gold; S9, Immersion Nickel Gold Treatment: Perform immersion nickel gold treatment on the exposed areas, followed by surface treatment in subsequent processes. In traditional processes, a single patterning process cannot simultaneously meet the area isolation requirements of local gold plating and overall immersion nickel gold, often resulting in blurred plating boundaries and cross-contamination. This process uses step S2 to etch the CS side separately to form the pattern (the SS side is not etched), step S3 to apply dry film to the SS side for protection to expose the gold plating areas on the CS side, ensuring that local hard gold plating is only performed in the target area on the CS side; the subsequent step S5 achieves independent forming of the two patterns by applying dry film to the entire CS side for protection and etching the SS side to form the pattern. This layered processing method ensures that the boundary accuracy between the gold-plated area and the immersion nickel-gold area is controlled within ±0.02mm, completely avoiding cross-contamination of the plating layers caused by unclear area division in traditional processes. This guarantees the purity of the local hard gold plating layer and the weldability of the immersion nickel-gold layer. In traditional processes, if immersion nickel-gold is performed first and then local gold plating, gold ions are prone to displacement reaction with the nickel layer, resulting in a decrease in the adhesion of the gold plating layer; if performed simultaneously, it is difficult to control the thickness difference between the two types of plating layers. This process first completes local hard gold plating in step S4, using dry film masking to ensure that the gold layer is deposited only in the target area, and the gold layer thickness deviation is ≤0.1μm through current distribution control; then, after special protection of the gold-plated area in step S7, the immersion nickel-gold treatment in step S8 is performed, so that the immersion nickel-gold layer (nickel layer thickness 3-5μm, gold layer thickness 0.05-0.1μm) uniformly covers the non-gold-plated area. This process design ensures both the high wear resistance of the hard gold plating and the oxidation resistance of the immersion nickel-gold layer, solving the problem of mutual interference between plating properties in traditional processes. In traditional processes, multiple etching and plating treatments can easily cause over-corrosion or mechanical damage to the substrate's copper layer and the formed patterns. This process protects the SS surface with a fluororubber-based composite film in step S2 to prevent damage during CS surface etching; in step S5, it protects the CS surface with a vacuum-laminated dry film to prevent corrosion during SS surface etching; and in step S7, it seals the gold plating area with acid-resistant tape to prevent erosion by the immersion nickel-gold solution.Testing revealed that PCBs treated with this process exhibit high edge perpendicularity, copper layer etching deviation ≤0.01mm, and reduced substrate damage rate. This process solves the substrate damage problem caused by insufficient protection in traditional processes, significantly improving the mechanical strength and electrical performance stability of the PCBs.

[0066] The specific steps of step 1 are as follows: S11, Substrate pretreatment: Immerse the substrate in a 5-8% sodium hydroxide solution at 50-60℃ for 3-5 minutes to remove oil and oxide layers from the substrate surface; treat with a 10-15% ammonium persulfate solution at 25-30℃ for 60-90 seconds to control the micro-roughness of the substrate surface to 0.1-0.2μm, enhancing the adhesion between the subsequent plating layer and the substrate; S12, Drilling and hole wall treatment: High-pressure water rinsing: For residual drill chips in the holes after drilling, when the hole diameter is >0.2mm, use 1.5... -2MPa deionized water rinsing; when the pore size is ≤0.2mm, use 0.8-1.2MPa deionized water rinsing to avoid high pressure damage to the pore structure; plasma cleaning: in an oxygen atmosphere, perform plasma treatment at 380-450W power for 60-90s to remove residual organic matter and micro-impurities on the pore walls, ensuring pore wall cleanliness; S13, copper plating and electroplating: uniformly deposit a conductive copper layer with a thickness of 0.5-1μm on the substrate surface and pore walls to form a conductive substrate; use pulsed current to thicken the copper layer across the entire board, with a peak current density of 2-3A / dm. 2The forward pulse width is 0.5ms and the reverse pulse width is 0.2ms to improve the copper layer density. An adjustable magnetic mask is set above the area to be hard gold plated. The current distribution is controlled by a shielding coefficient of 40±5%, so that the final copper thickness in this area is 5-10% higher than that in the non-gold plated area. After local thickening, the copper thickness deviation of the whole board is ≤8%, which provides a basis for the uniformity of the gold layer thickness in local hard gold plating. S14, water washing treatment: the substrate is rinsed with deionized water until the pH value of the substrate surface reaches 6-7, completing the pre-process treatment. This process ensures surface cleanliness through the graded treatment in step S11. The moderately rough microstructure enhances the mechanical interlocking force between the plating layer and the substrate, increasing the peel strength of the plating layer to ≥0.8 N / mm, thus solving the problem of easy peeling and detachment of the plating layer in traditional processes. In step S12, holes with a diameter >0.2 mm are rinsed with deionized water at a pressure of 1.5-2 MPa, and holes with a diameter ≤0.2 mm are rinsed with water at a pressure of 0.8-1.2 MPa to avoid damage to small holes by high pressure. At the same time, plasma treatment with a power of 380-450 W in an oxygen atmosphere for 60-90 seconds thoroughly removes residual organic matter and tiny impurities from the hole walls. There are no drill cuttings left in the holes, and the porosity of the plating layer on the hole walls is reduced, solving the problem of insufficient reliability of the hole wall plating layer in traditional processes and ensuring the conductivity of the PCB board. In step S13, a 0.5-1 μm conductive copper layer is first deposited to form a uniform substrate, and then a pulsed current is used to thicken the copper layer, improving the copper layer density (porosity ≤0.1 cells / mm). 2 Simultaneously, by adjusting the current distribution through an adjustable magnetic mask, the copper thickness in the area requiring hard gold plating is 5-10% higher than that in the non-gold-plated area, and the overall copper thickness deviation is ≤8%. This local thickening design provides a foundation for the uniformity of the gold layer thickness in subsequent local hard gold plating, controlling the gold layer thickness deviation to ≤0.1μm, thus solving the problem of gold layer thickness fluctuation caused by uneven copper layer in traditional processes.

[0067] Step S2 specifically includes the following steps: S21, Dry film pretreatment: Select a photosensitive dry film with a thickness of 35-50μm and a resolution of ≥25μm, and equilibrate it for 24 hours in an environment with a temperature of 25℃ and a relative humidity of ≤30% to eliminate the internal stress generated during the storage of the dry film and ensure dimensional stability during lamination; S22, CS side dry film lamination: Use a roller lamination method, setting the lamination temperature to 70-75℃, the roller pressure to 0.3-0.4MPa, and the lamination speed to 1.5-2m / min, so that the dry film is tightly bonded to the copper layer of the CS side. To avoid subsequent pattern distortion due to improper adhesion; S23, Exposure and Development: Exposure is performed using an exposure device with an alignment accuracy of ±5μm, and the exposure energy is controlled at 80-100mJ / cm2. After exposure, baking is carried out at 110℃ for 2 minutes to enhance the photosensitive crosslinking effect of the dry film; A 1.5-2.0% sodium carbonate solution is used for spray development at 30-35℃ for 90-120 seconds to precisely remove unexposed dry film areas and expose the pattern to be etched; S24, CS Surface Etching: An ammoniacal alkaline etching solution (containing Cu) is used. 2+Concentration 120-150g / L, pH 8.0-8.5), etching is performed at 45-50℃; gradient spray control is used during the etching process, with the spray pressure in the edge area being 0.03-0.04MPa higher than that in the center area, to ensure that the perpendicularity of the pattern edge is ≥88°, meeting the requirements of subsequent gold plating on all four sides for pattern accuracy; S25, SS surface protection: a fluororubber-based composite film (thermal expansion coefficient CTE=18±2ppm / ℃, thickness 15-20μm) is used to cover the SS surface, utilizing its excellent etching resistance and dimensional stability to protect the copper layer of the SS surface from the influence of the etching solution. The composite film is removed after the CS surface etching is completed. In traditional processes, the dry film is used directly without sufficient pretreatment, which is prone to dimensional changes after bonding due to internal stress, and improper control of bonding parameters will cause the dry film to not bond tightly with the copper layer, affecting the subsequent pattern accuracy. In step S21 of this process, the photosensitive dry film is equilibrated for 24 hours in a specific temperature and humidity environment to eliminate internal stress and ensure dimensional stability. Step S22, by setting appropriate bonding temperature, pressure, and speed, ensures a tight bond between the dry film and the copper layer on the CS side. This process avoids pattern distortion caused by poor dry film bonding, laying the foundation for the accuracy of subsequent pattern etching. In traditional exposure and development processes, unstable exposure energy and unsuitable development parameters can easily lead to poor photosensitive cross-linking of the dry film, incomplete removal of unexposed areas, and blurred pattern edges. In step S23 of this process, high-precision exposure equipment is used to control the exposure energy, and baking is performed after exposure to enhance the cross-linking effect. Subsequently, a sodium carbonate solution of a specific concentration is sprayed and developed at an appropriate temperature. This operation precisely removes unexposed dry film areas, making the exposed edges of the pattern to be etched clear and improving pattern accuracy. In step S24, this process uses an ammonia-based alkaline etching solution and employs gradient spray control, ensuring that the spray pressure in the edge areas is higher than that in the center area, thus guaranteeing that the perpendicularity of the pattern edges meets the requirements. Simultaneously, in step S25, a fluororubber-based composite film is used to cover the SS surface, utilizing its etching resistance and dimensional stability to protect the copper layer on the SS surface. This design satisfies the pattern precision requirements of subsequent perimeter gold plating while preventing damage to the SS surface during the CS surface etching process.

[0068] In step S3, the process of applying dry film to the SS side employs multi-parameter collaborative control to eliminate air bubbles. Specifically, it includes the following steps: S31, using an acrylate-based photoresist dry film (Tg = 65±5℃), preheating it to 60-70℃ to soften it, removing the protective film on the SS side, and then applying the dry film; S32, applying a gradient pressure from the center to the edge under a vacuum of -0.08 to -0.1MPa: initial pressure at the center 0.1-0.15MPa, final pressure at the edge 0.2-0.25MPa, with a rate of increase of 0.05MPa / 5cm; S33, the edge of the dry film has a guide groove with a width of 0.1±0.02mm and a depth of 0.05±0.02mm to form a directional exhaust channel. In traditional processes, when the dry film is directly applied, its own hardness may cause it to not adhere tightly to the substrate surface, especially when there are slight irregularities on the substrate, which can easily create gaps. In step S31 of this process, the acrylate-based photoresist dry film is preheated to 60-70℃ to soften it before the SS-side protective film is removed and the film is bonded. The softened dry film adapts better to the substrate surface, reducing bonding gaps caused by excessive dry film stiffness and laying the foundation for subsequent air bubble removal. In traditional bonding processes, improper pressure application can easily lead to insufficient local pressure, preventing air bubbles from escaping and leaving them between the dry film and the substrate, affecting the quality of subsequent coatings. In step S32 of this process, gradient pressure is applied from the center to the edge under a vacuum environment, with a lower initial pressure at the center and a higher, gradually increasing pressure at the edge. This pressure control method encourages air bubbles to move towards the edge and escape, avoiding air bubble residue under the dry film and ensuring a tight bond between the dry film and the SS-side. In step S33 of this process, guide grooves of specific sizes are set at the edge of the dry film to form directional venting channels. When bubbles are pushed towards the edge by gradient pressure, the guide channel guides them to escape quickly, preventing them from accumulating at the edges. This ensures the adhesion quality of the dry film edges and provides effective protection for the SS surface during subsequent localized gold plating.

[0069] The gradient pressure application process from the center to the edge employs a zoned dynamic control logic, specifically including: dividing the PCB board into a central zone (radius ≤ 1 / 3 board length), a transition zone (1 / 3 board length < radius ≤ 2 / 3 board length), and an edge zone (radius > 2 / 3 board length), with the center of the PCB as the origin; 1) The pressure in the central zone starts at 0.1-0.12 MPa and increases at a rate of 0.05 MPa / 5cm; 2) The initial pressure in the transition zone is the final pressure in the central zone, with an increasing rate of 0.06-0.07 MPa / 5cm; and when dense pads (spacing ≤ 0.2 mm) are detected in the area, the pressure is temporarily increased by 0.02 MPa; 3) The pressure in the edge zone (including the flow channels)... In this process, the initial pressure value in the transition zone is the final pressure, controlled between 0.23-0.25 MPa. The pressure increment rate is dynamically adjusted based on the distance from the guide channel: when the distance to the guide channel is ≤5 mm, the rate increases to 0.08 MPa / 5 cm to accelerate bubble convergence in the guide channel; when the distance to the guide channel is >5 mm, the rate remains at 0.06 MPa / 5 cm; when the pressure in the edge zone reaches 0.2 MPa, the vacuum level simultaneously increases to -0.095 to -0.1 MPa. In traditional processes, gradient pressure application often uses a uniform initial value and increment rate, which is difficult to adapt to the different bonding requirements of the PCB board center, transition zone, and edge zone, easily leading to excessively high or insufficient pressure in some areas. This process divides the PCB board into a center zone, transition zone, and edge zone, setting appropriate initial pressure values ​​and increment rates for each zone. The central region starts with a lower pressure and gradually increases it, while the transition region starts with the final pressure of the central region and appropriately increases the rate of increase. This zoning setting allows the pressure to better match the bonding characteristics of each region, avoiding loose bonding caused by mismatched pressure. When dense pads are detected in the transition region, the pressure is temporarily increased to enhance the bonding strength of the dense pad area, promote the expulsion of air bubbles, and ensure a tight bond between the dry film and the substrate in the dense pad area. In traditional processes, the pressure control in the edge region is relatively fixed and not coordinated with the vacuum level, making it difficult to quickly expel air bubbles in the edge region, especially near the flow channel. This process dynamically adjusts the pressure rate of increase based on the distance of the edge region from the flow channel. When the edge region is closer to the flow channel, the rate of increase is increased to accelerate air bubble aggregation. At the same time, when the pressure in the edge region reaches a certain value, the vacuum level is increased to enhance the air bubble expulsion effect, ensuring the bonding quality in the edge region and near the flow channel, and providing further protection for the dry film on the SS side.

[0070] Specifically, step S4, the localized hard gold plating, includes the following steps: S41, gold plating solution preparation: Prepare a hard gold electroplating solution with a gold ion concentration of 6-8 g / L, ammonium citrate of 80-100 g / L, and pH value controlled at 3.8-4.5; add 0.5-1 g / L cobalt salt to improve the hardness of the gold layer, and add 0.1 g / L polyvinylpyrrolidone as a dispersant to ensure uniform gold ion deposition; S42, electroplating parameter control: Perform electroplating on the exposed gold plating area on the CS surface, setting the current density to 2-3 A / dm³. 2 Temperature 45-50℃, stirring rate 300-400r / min; current is conducted through an electroplating network connected in series on the non-gold-plated surface of SS, ensuring that the current distribution uniformity deviation is ≤5%, guaranteeing the consistency of the gold plating layer thickness in the non-conductor area; S43, thickness gradient control: regional current density control is adopted, with the current density in the gold-plated edge area being 8-10% higher than that in the center area, forming a thickness gradient: the gold thickness at the gold-plated edge reaches 0.8-1.0μm, the gold thickness in the center area is 0.5-0.7μm, and the total gold thickness at the gold-plated edge is ≤1.2μm, meeting the integrity requirements of the gold plating around the perimeter; S44, post-plating treatment: first, ultrasonic cleaning is performed with deionized water (power 200-300W, time 3-5min) to remove residual plating solution from the surface; then, neutralization is performed with 2-3% citric acid solution at 35-40℃ for 40-60s to eliminate alkaline residue on the surface. Traditional gold plating solutions often have a single composition, resulting in uneven gold ion deposition and low gold layer hardness, making it difficult to meet the requirements of high wear resistance. In step S41 of this process, by rationally adjusting the gold ion concentration and ammonium citrate content in the gold plating solution, and adding cobalt salt and polyvinylpyrrolidone, not only is uniform dispersion of gold ions promoted, ensuring uniform gold layer deposition, but the hardness of the gold layer is also improved, enabling the hard gold plating layer to withstand high-frequency contact abrasion. In step S42, by setting appropriate current density, temperature, and stirring rate, and utilizing the electroplating network connected in series on the non-gold-plated surfaces of the SS side to conduct current, the current distribution is made more uniform, effectively controlling the thickness deviation of the gold plating layer in areas without conductors, ensuring the consistency of the gold layer thickness. In step S43, regional current density control is adopted, making the current density in the gold-plated edge area higher than that in the center area, forming a reasonable thickness gradient. This ensures the thickness of the gold-plated edge, meeting the integrity requirements of the surrounding gold plating, while avoiding material waste caused by excessively thick gold layers in the center area. If traditional gold plating is not properly treated, plating solution and alkaline substances can easily remain on the surface, affecting the performance of the gold layer and subsequent processing. In step S44 of this process, residual plating solution on the surface is first removed by ultrasonic cleaning, and then the alkaline residue on the surface is neutralized and eliminated by citric acid solution, which ensures the cleanliness of the gold layer surface and provides a good foundation for the smooth progress of subsequent processes.

[0071] The specific steps of step S5, namely the removal of the film and the second layer patterning, include: S51, double-sided film removal: using a 5-8% sodium hydroxide solution, soaking at 50-60℃ for 2-3 minutes, while simultaneously using 150-200W ultrasonic vibration, to remove the dry film from the CS and SS surfaces, with the residual adhesive area controlled to ≤0.1mm. 2 S52, CS Surface Protection: A 40-50μm thick etch-resistant dry film is applied to the entire CS surface using a vacuum bonding process with a vacuum degree of -0.09 to -0.1MPa, ensuring a tight bond between the dry film and the CS surface pattern, with an edge sealing width ≥1mm to prevent subsequent etching solution penetration; S53, SS Surface Pattern Etching: An alkaline copper chloride etching solution (containing Cu) is used. 2 Etching was performed at 48-50℃ with a concentration of 160±10g / L and pH of 8.8±0.2, and the etching rate was controlled at 18-22μm / min. The etching progress was monitored in real-time using a CCD vision system, and the edge deviation of the pattern was controlled to be ≤0.02mm according to the IPC-TM-6502.2.22 standard. In step S54, damage detection was performed: a lock-in infrared thermal imager was used to scan the CS surface (temperature resolution 0.1℃). When a temperature difference >0.5℃ was detected in a region, it was considered potential etching damage to ensure the integrity of the local gold-plated areas. Traditional stripping processes often result in residual dry film due to improper solution concentration or processing time, affecting subsequent processing. In step S51 of this process, a sodium hydroxide solution of a specific concentration is used for immersion at a suitable temperature, supplemented by ultrasonic vibration, which can quickly and thoroughly remove the dry film from the CS and SS surfaces, reducing residual adhesive and providing a clean substrate surface for subsequent pattern processing. In step S52, an etch-resistant dry film is applied to the entire CS surface using a vacuum bonding process. This ensures a tight bond between the dry film and the CS surface pattern, with excellent edge sealing, effectively preventing the etching solution from eroding the CS surface and protecting the localized gold-plated areas. In step S53, an etching solution with specific components is used, and appropriate temperature and etching rate are controlled. A vision system monitors the etching progress in real time, precisely controlling edge deviations to meet high-precision pattern requirements. In step S54, a phase-locked infrared thermal imager scans the CS surface, identifying potential etching damage by detecting temperature differences in the detection area. This allows for timely problem detection and handling, ensuring the integrity of the localized gold-plated areas and the substrate.

[0072] Specifically, step S6, conductor removal, includes the following steps: S61, Conductor identification and positioning: The PCB board is scanned using an AOI (Automated Optical Inspection) system to identify the conductors to be removed (including etched conductors and isolated conductors) with an accuracy of ±0.005mm, and the conductor positions and width information are marked; S62, Conductor removal by etching: For etchable conductors, a local spraying process is used. The spraying solution is a 10-15% ammonium persulfate solution (with 0.05% sodium dodecyl sulfate added), and the spraying pressure is controlled at 0.2-0.3MPa. Etching is only performed on the conductor area to avoid damaging the surrounding pattern; S63, Isolated conductor removal by laser method. Line: For isolated wires that cannot be etched, laser cutting is used for removal. The laser power is set to 6-8W, the pulse frequency to 20kHz, and the spot diameter to 0.02-0.03mm. The cutting path is made 0.03-0.05mm from the edge of the wire, while nitrogen gas is introduced at a rate of 5-8L / min for auxiliary cooling to prevent thermal damage. S64, Removal effect acceptance: The area where the wire was removed is inspected using a 50x microscope to ensure that there are no wire residues or carbonization damage, meeting the cleanliness requirements for subsequent surface treatment. In traditional processes, wire identification often relies on manual labor, which is not only inefficient but also prone to positioning errors due to human factors, affecting the subsequent removal effect. In step S61 of this process, an AOI (Automated Optical Inspection) system is used to scan the PCB board, which can identify the wires to be removed with high precision and mark their position and width information, providing accurate positioning basis for subsequent precise wire removal. In step S62 of this process, a local spraying process is used for etchable wires, precisely applying the spray liquid to the wire area, avoiding erosion of the surrounding pattern and protecting the integrity of non-wire areas. In step S63 of this process, laser cutting is used to remove isolated conductors that cannot be etched. By setting appropriate laser parameters and cutting paths, and using nitrogen-assisted cooling, isolated conductors can be precisely removed while avoiding thermal damage to the substrate and surrounding patterns. In step S64, the area where conductors have been removed is inspected under a microscope to ensure there are no conductor residues or carbonization damage, providing a clean substrate surface for subsequent surface treatment. The AOI (Automated Optical Inspection) system is a key device for achieving accurate conductor identification and positioning. Its core function is to perform a comprehensive scan of the PCB board surface using optical imaging and image analysis technology, thereby quickly and accurately identifying conductors that need to be removed, including etched conductors and isolated conductors. When the system is working, it first uses a high-resolution camera to image the PCB board surface, acquiring clear surface graphic information. Subsequently, the built-in image algorithm processes and analyzes the acquired image, comparing the conductor features in the image with preset conductor standard features to accurately determine which conductors need to be removed. At the same time, the system can also accurately locate the identified conductors, marking their specific positions and widths, with positioning accuracy meeting the precision requirements of the conductor removal process.The use of AOI (Automated Optical Inspection) systems replaces traditional manual identification methods, which not only improves the efficiency of wire identification but, more importantly, avoids errors that may occur during manual identification. This provides a reliable basis for the precise removal of wires using subsequent etching or laser methods, ensuring that the wire removal process can accurately target the target area, reduce the impact on surrounding patterns, and guarantee the quality of PCB surface treatment.

[0073] The solder resist and protection step S7 includes the following specific steps: S71, Solder resist ink coating: Using a 300-400 mesh screen to print photosensitive solder resist ink, a 15-20μm thick ink layer is formed on the PCB surface, ensuring no ink accumulation at the edges of the local gold-plated areas and the immersion nickel-gold areas, guaranteeing the accuracy of subsequent protection; S72, Solder resist layer stepped curing: Pre-baking at 60℃ for 10min, exposure (energy 150-200mJ / cm2), post-baking at 70℃ for 15min, development with 1.5-2.0% sodium carbonate solution, and final curing at 130℃ for 30min to form the solder resist layer; S73, Local gold-plated area protection. The process begins with S74, where the exposed areas of the gold plating are covered with acid-resistant tape of 80-100μm thickness, extending at least 0.5mm beyond the plating area. This tape is then sealed using a hot-pressing process at 60-70℃ and 0.1-0.15MPa to prevent corrosion from the immersion nickel-gold solution. S75 involves activation of the immersion nickel-gold areas: Exposed areas are activated with a 0.5% citric acid solution at 25-30℃ for 30-60 seconds to remove the surface oxide layer and enhance the adhesion of the subsequent immersion nickel-gold layer. In traditional processes, solder resist ink tends to accumulate at the edges of the gold-plated and immersion nickel-gold areas, affecting subsequent protection and plating quality. In step S71 of this process, a specific mesh size of photosensitive solder resist ink is used for screen printing to control the ink layer thickness, ensuring no ink accumulation at the edges of the gold-plated and immersion nickel-gold areas, providing a smooth foundation for subsequent protection and plating treatment. In step S72, this process employs a stepped curing process, involving multiple stages such as pre-baking, exposure, post-baking, development, and final curing. This ensures the solder resist layer is fully cured, improving its insulation and adhesion, and better fulfilling its solder resist function. In step S73, acid-resistant tape of a specific thickness is used to cover the localized gold-plated areas, and a hot-press bonding process is used for sealing. This ensures the tape edges extend sufficiently beyond the gold-plated area, effectively preventing the immersion nickel-gold solution from eroding the gold-plated area and protecting the performance of the localized gold-plated layer. In step S74, citric acid solution is used to activate the exposed immersion nickel-gold areas, removing the surface oxide layer and allowing the subsequent immersion nickel-gold layer to adhere more tightly to the substrate, enhancing the stability of the plating layer.

[0074] The nickel-gold plating process in step S8 includes: S81, gradient nickel layer deposition: In the first stage, the current density is 0.5-0.8 A / dm², and deposition lasts for 10-15 min to form a soft nickel layer (thickness 2-3 μm, Vickers hardness 180-200 HV, measured according to ISO 6507-1 standard); In the second stage, the current density is 1.8-2.2 A / dm². 2 A hard nickel layer (1-2 μm thick, Vickers hardness 300-350 HV) is formed by deposition for 5-8 min; the thickness ratio of the soft nickel layer to the hard nickel layer is 1.5:1 to 2:1, and the current density difference is 1.3-1.5 A / dm²; S82, palladium layer micro-roughening: palladium salt concentration 0.5-1 g / L, current density 0.1-0.3 A / dm² 2 Palladium layers were deposited under specific conditions with a surface roughness of 0.1-0.3 μm; S83, a pre-plated soft gold transition layer: a 0.2 A / dm² layer was deposited on the palladium layer surface. 2 A 0.1-0.2 μm soft gold layer (purity ≥99.9%) is deposited at a current density, and the pre-plated soft gold layer is not included in the total thickness of the localized hard gold plating. In traditional nickel plating processes, nickel layers with a single hardness are either too flexible and prone to brittleness, or too wear-resistant and prone to wear. In step S81 of this process, soft and hard nickel layers are deposited in stages using different current densities. By reasonably controlling the thickness ratio and current density difference between the two layers, the soft nickel layer provides good flexibility, while the hard nickel layer ensures sufficient wear resistance, allowing the nickel layer to have both good toughness and wear resistance. In step S82, the palladium layer deposition parameters are controlled to create a certain roughness on the palladium layer surface, increasing the contact area with subsequent plating layers, improving interlayer adhesion, and reducing the risk of plating peeling. In step S83, a soft gold transition layer is first deposited on the palladium layer surface. Utilizing the good compatibility between soft gold and the palladium and hard gold layers, it serves as a transition layer, making the overall plating structure more stable without affecting the total thickness control of the localized hard gold plating.

[0075] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of this invention is defined by the appended claims and their equivalents.

Claims

1. A PCB board surface treatment process based on partial gold plating plus nickel-gold plating, characterized in that, For processing PCBs that require localized hard gold plating and immersion nickel gold plating in other areas, the following steps are included: S1, Pre-processing: Process the PCB board to the copper thickness before electroplating; S2, First layer of pattern processing: Dry film is applied to the CS side of the PCB board and etched to form a pattern, while the SS side is not etched. S3, Gold plating preparation: Apply dry film to the SS side, leaving the gold plating area exposed on the CS side. S4, Localized gold plating: Hard gold plating is applied to the exposed areas of the CS surface; S5, Film Removal and Second Layer Patterning: Remove the dry film from both sides of the PCB board, apply dry film to the CS side for overall protection, and etch the SS side to form the pattern. S6, Conductor Removal: Remove conductors from the PCB board; S7, Solder Mask and Protection: After the solder mask treatment is completed, the gold-plated areas are protected, exposing the areas that need to be plated with nickel gold. S8, Immersion Nickel Gold Treatment: Immersion nickel gold treatment is performed on the exposed areas, followed by surface treatment in the subsequent process. Step S2 specifically includes the following steps: S21, Dry film pretreatment: Select a photosensitive dry film with a thickness of 35-50μm and a resolution of ≥25μm, and equilibrate it for 24 hours in an environment with a temperature of 25℃ and a relative humidity of ≤30%. S22, CS side dry film lamination: adopts roller lamination method, setting lamination temperature 70-75℃, roller pressure 0.3-0.4MPa, lamination speed 1.5-2m / min, so that the dry film is tightly bonded to the copper layer of CS side; S23, Exposure and Development: Exposure is performed using an exposure device with an alignment accuracy of ±5μm, and the exposure energy is controlled at 80-100mJ / cm². After exposure, the product is baked at 110℃ for 2 minutes. A sodium carbonate solution with a mass concentration of 1.5-2.0% is used for spray development at 30-35℃ for 90-120 seconds. S24, CS surface etching: use ammonia-based alkaline etching solution and etch at 45-50℃; during the etching process, gradient spray control is adopted, and the spray pressure in the edge area is 0.03-0.04MPa higher than that in the center area; S25, SS surface protection: The SS surface is covered with a fluororubber-based composite film, which is removed after the CS surface etching is completed; In step S3, the process of applying dry film to the SS surface employs multi-parameter coordinated control to eliminate air bubbles, specifically including the following steps: S31 uses an acrylate-based photoresist dry film, which is preheated to 60-70℃ to soften it. After removing the protective film on the SS side, the dry film is laminated. S32, in a vacuum environment of -0.08 to -0.1 MPa, apply a gradient pressure from the center to the edge: initial pressure at the center 0.1-0.15 MPa, final pressure at the edge 0.2-0.25 MPa, with a rate of increase of 0.05 MPa / 5 cm; S33, the edge of the dry film is provided with a guide groove with a width of 0.1±0.02mm and a depth of 0.05±0.02mm to form a directional exhaust channel.

2. The PCB surface treatment process based on partial gold plating plus nickel-gold plating according to claim 1, characterized in that, The specific steps of step 1 are as follows: S11, Substrate pretreatment: Immerse in a 5-8% sodium hydroxide solution at 50-60℃ for 3-5 minutes; treat with a 10-15% ammonium persulfate solution at 25-30℃ for 60-90 seconds, controlling the micro-roughness of the substrate surface to be 0.1-0.2 μm. S12, Drilling and Hole Wall Treatment: High-pressure water flushing: For drill cuttings remaining in the hole after drilling, use deionized water at a pressure of 1.5-2 MPa when the hole diameter is >0.2 mm; use deionized water at a pressure of 0.8-1.2 MPa when the hole diameter is ≤0.2 mm. Plasma cleaning: Plasma treatment is performed for 60-90 seconds in an oxygen atmosphere at a power of 380-450W. S13, Copper Plating and Electroplating: A conductive copper layer with a thickness of 0.5-1μm is uniformly deposited on the substrate surface and hole walls to form a conductive substrate; A pulsed current method was used to thicken the copper layer across the entire board, with a peak current density of 2-3 A / dm², a forward pulse width of 0.5 ms, and a reverse pulse width of 0.2 ms. An adjustable magnetic mask was placed above the area to be plated with hard gold, and the current distribution was controlled by a shielding coefficient of 40±5%, so that the final copper thickness in this area was 5-10% higher than that in the non-gold plated area, and the overall copper thickness deviation after local thickening was ≤8%. S14, Water washing treatment: Rinse the substrate with deionized water until the pH value of the substrate surface reaches 6-7, completing the pre-processing treatment.

3. The PCB surface treatment process based on partial gold plating plus nickel-gold plating of claim 1, wherein, The gradient pressure application process from the center to the edge adopts a partitioned dynamic control logic, which specifically includes: taking the center of the PCB board as the origin, dividing it into a central area, a transition area, and an edge area; 1) The pressure in the central zone starts from 0.1-0.12 MPa and increases at a rate of 0.05 MPa / 5 cm. 2) The initial pressure of the transition zone is the final pressure of the central zone, with an incremental increase rate of 0.06-0.07 MPa / 5cm; and when dense solder pads are detected in the area, the pressure is temporarily increased by 0.02 MPa. 3) The initial pressure in the edge zone is the final pressure in the transition zone. The final pressure is controlled between 0.23-0.25 MPa. The pressure increment rate is dynamically adjusted according to the distance from the guide channel: when the distance from the guide channel is ≤5 mm, the rate increases to 0.08 MPa / 5 cm; when the distance from the guide channel is >5 mm, the rate is maintained at 0.06 MPa / 5 cm; when the edge zone pressure reaches 0.2 MPa, the vacuum degree is simultaneously increased to -0.095 to -0.1 MPa.

4. The PCB surface treatment process based on partial gold plating plus nickel-gold plating of claim 1, wherein, The localized hard gold plating in step S4 includes the following specific steps: S41, Gold plating solution preparation: Prepare a hard gold plating solution with a gold ion concentration of 6-8 g / L, ammonium citrate of 80-100 g / L, and pH value controlled at 3.8-4.5; add 0.5-1 g / L cobalt salt to improve the hardness of the gold layer, and add 0.1 g / L polyvinylpyrrolidone as a dispersant. S42, Electroplating parameter control: Electroplating is performed on the exposed gold plating area on the CS surface, with the current density set to 2-3A / dm², temperature to 45-50℃, and stirring speed to 300-400r / min; the current is conducted through the electroplating network connected in series on the non-gold plating surface of the SS surface, ensuring that the current distribution uniformity deviation is ≤5%; S43, Thickness Gradient Control: Regional current density control is adopted, with the current density at the gold-plated edge region being 8-10% higher than that at the center region, forming a thickness gradient: the gold thickness at the gold-plated edge reaches 0.8-1.0μm, the gold thickness at the center region is 0.5-0.7μm, and the total gold thickness at the gold-plated edge is ≤1.2μm; S44, Post-gold plating treatment: First, use deionized water for ultrasonic cleaning to remove residual plating solution from the surface; then neutralize with 2-3% citric acid solution at 35-40℃ for 40-60 seconds to eliminate alkaline residue on the surface.

5. The PCB surface treatment process based on partial gold plating plus nickel-gold plating of claim 1, wherein, The decoction and second layer patterning process in step S5 includes the following specific steps: S51, double-sided film removal: use a 5-8% sodium hydroxide solution, soak at 50-60℃ for 2-3 minutes, and simultaneously use 150-200W ultrasonic vibration to remove the dry film on the CS and SS sides, with the residual adhesive area controlled to ≤0.1mm². S52, CS surface protection: A 40-50μm thick etch-resistant dry film is applied to the entire CS surface. A vacuum bonding process with a vacuum degree of -0.09~-0.1MPa is used to ensure that the dry film is tightly bonded to the CS surface pattern and the edge sealing width is ≥1mm. S53, SS surface pattern etching: Alkaline copper chloride etching solution is used for etching at 48-50℃, and the etching rate is controlled at 18-22μm / min; the etching progress is monitored in real time by a CCD vision system to control the edge deviation of the pattern to ≤0.02mm. S54, Damage Detection: The CS surface is scanned using a phase-locked infrared thermal imager. When a temperature difference > 0.5℃ is detected in a region, it is determined to be potential etching damage to ensure the integrity of the local gold-plated area.

6. The PCB surface treatment process based on partial gold plating plus nickel-gold plating of claim 1, wherein, The wire removal in step S6 includes the following specific steps: S61, Wire Identification and Positioning: The PCB board is scanned by an AOI automatic optical inspection system to identify the wires to be removed with an accuracy of ±0.005mm, and the position and width information of the wires are marked. S62, Etching method for removing wires: For etchable wires, a local spraying process is used. The spraying solution is a 10-15% ammonium persulfate solution, and the spraying pressure is controlled at 0.2-0.3 MPa. Etching is only performed on the wire area. S63, Laser removal of isolated wires: For isolated wires that cannot be etched, laser cutting is used for removal. The laser power is set to 6-8W, the pulse frequency to 20kHz, and the spot diameter to 0.02-0.03mm. The cutting path is made 0.03-0.05mm away from the edge of the wire, and nitrogen gas is introduced at 5-8L / min for auxiliary cooling. S64, Removal effect acceptance: Inspect the wire removal area with a 50x microscope to ensure that there is no wire residue or carbonization damage.

7. The PCB surface treatment process based on partial gold plating plus nickel-gold plating of claim 1, wherein, The solder resist and protection step S7 includes the following specific steps: S71, Solder resist ink coating: Photosensitive solder resist ink is screen printed using 300-400 mesh screen printing to form an ink layer 15-20μm thick on the PCB board surface; S72, Stepped curing of solder resist layer: Pre-baking at 60℃ for 10 min, exposure, post-baking at 70℃ for 15 min, development with 1.5-2.0% sodium carbonate solution, final curing at 130℃ for 30 min, to form solder resist layer; S73, Localized Gold-Plated Area Protection: Cover the localized gold-plated area with acid-resistant tape of 80-100μm thickness, with the tape edge extending ≥0.5mm beyond the gold-plated area; seal the tape using a hot-pressing process at 60-70℃ and 0.1-0.15MPa. S74, Activation of immersion nickel-gold areas: For exposed immersion nickel-gold areas, activate with 0.5% citric acid solution at 25-30℃ for 30-60s to remove the surface oxide layer.

8. The PCB surface treatment process based on partial gold plating plus nickel-gold plating of claim 1, wherein, The nickel-gold plating process in step S8 includes: S81, Gradient Nickel Layer Deposition: In the first stage, the current density is 0.5-0.8 A / dm², and the deposition time is 10-15 min to form a soft nickel layer; in the second stage, the current density is 1.8-2.2 A / dm², and the deposition time is 5-8 min to form a hard nickel layer; the thickness ratio of the soft nickel layer to the hard nickel layer is 1.5:1 to 2:1, and the current density difference is 1.3-1.5 A / dm². S82, Palladium layer micro-roughening: A palladium layer is deposited under conditions of palladium salt concentration of 0.5-1 g / L and current density of 0.1-0.3 A / dm², and the surface roughness is 0.1-0.3 μm; S83, Pre-plated soft gold transition layer: A 0.1-0.2μm soft gold layer is deposited on the surface of the palladium layer at a current density of 0.2A / dm², and the pre-plated soft gold layer is not included in the total thickness of the local hard gold plating.

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