Picosecond pulse generator and generating method based on amplitude and phase double compensation

Abstract

This invention relates to a picosecond-level pulse generator and its generation method based on dual amplitude and phase compensation, belonging to the technical field of pulse generators. The picosecond-level pulse generator includes: a first-order amplitude compensation module for generating multi-level pulse signals with compensated amplitudes upon triggering by a trigger signal, wherein each level of the pulse signal has a fixed phase difference; a phase compensation module for receiving the multi-level pulse signals and performing phase compensation and pulse compression on the multi-level pulse signals through a multi-dimensional nonlinear transmission network, aligning the phases of each level of the pulse signals, and compressing the pulse width to a set picosecond level width; and a second-order amplitude compensation module for receiving the phase-compensated and pulse-compressed multi-level pulse signals, performing phase alignment on the multi-level pulse signals again, and superimposing the amplitudes of the aligned levels of pulse signals to output a picosecond-level pulse signal with the expected amplitude. This invention can achieve the generation of high-amplitude picosecond-level pulses at a relatively low cost.

Description

Technical Field

[0001] This invention belongs to the field of pulse generator technology, and specifically relates to a picosecond-level pulse generator and generation method based on dual amplitude and phase compensation. Background Technology

[0002] In ultra-wideband wireless communication systems, semiconductor circuit testing, and security testing and analysis of cryptographic chips against fault attacks, the design of pulse generators with high amplitude and extremely short rise / fall times is a very important research topic.

[0003] Italian inventor Guglielmo Marchese Marconi pioneered the use of long / short pulses to form modulation envelopes in the late 19th century, forming the prototype of pulse technology. In the late 1940s, with the development of radio technology and semiconductor processes, pulse technology continued to evolve and was widely applied in communications, digital systems, radio frequency and microwave systems, semiconductor characterization, and other fields. Pulse technology also evolved from the initial fast-edge technology of discrete silicon radio frequency tubes to technology using special structure devices (step recovery diodes, tunnel diodes, avalanche diodes, etc.), and further to nonlinear transmission lines and microwave integration technology.

[0004] However, pulse generation technology based on special structure devices is limited by factors such as turn-off speed and device withstand voltage threshold. It is often difficult to simultaneously achieve pulse rise / fall time and pulse amplitude, which makes it impossible to widely apply picosecond-level pulse generators with high pulse amplitude (greater than 200V) in practical applications. Summary of the Invention

[0005] Based on the above analysis, the present invention aims to disclose a picosecond-level pulse generator based on dual amplitude and phase compensation, which solves the problems faced in designing picosecond-level pulse generators based on commercial devices in reality, such as the limited withstand voltage of a single device causing the pulse amplitude to fail to meet design requirements, and the limited turn-off speed of the device causing the pulse duration and rise / fall time to fail to meet design requirements.

[0006] This invention discloses a picosecond-level pulse generator based on dual amplitude and phase compensation, comprising:

[0007] A first-order amplitude compensation module is used to generate multi-level pulse signals with compensated amplitudes when triggered by a trigger signal, wherein each level of the pulse signal has a fixed phase difference.

[0008] The phase compensation module is used to receive the multi-level pulse signal and perform phase compensation and pulse compression on the multi-level pulse signal through a multi-dimensional nonlinear transmission network, align the phase of each level of pulse signal, and compress the pulse width to a set picosecond level width.

[0009] The second-order amplitude compensation module is used to receive multi-level pulse signals after phase compensation and pulse compression, perform phase alignment of the multi-level pulse signals again, and superimpose the amplitudes of the aligned pulse signals to output a picosecond-level pulse signal that meets the expected amplitude.

[0010] Furthermore, the first-order amplitude compensation module includes:

[0011] The energy storage capacitor section is composed of... It consists of several energy storage capacitors, each of which is connected between the high-voltage power supply and ground.

[0012] The delay path part is composed of The system consists of several delay paths, with the number of delay devices in each path following an arithmetic progression, ensuring that the delay difference between two adjacent delay paths is a fixed time difference. The delay path part performs delay processing on the input external trigger signal to generate a signal with a fixed phase difference. Level trigger signal;

[0013] The device cascade section consists of It consists of a series of parallel switching circuits, each stage of which includes... A series of field-effect transistors;

[0014] The connection relationship between each stage of the switching circuit, a time delay path, and an energy storage capacitor is as follows: the output terminal of the time delay path is connected to the switching circuit in... The gates of a series-connected field-effect transistor, A series circuit of field-effect transistors is connected between the positive and negative terminals of the energy storage capacitor.

[0015] The control relationship is as follows: after the energy storage capacitor is pre-charged, the switching circuit establishes a discharge path for the energy storage capacitor under the trigger signal output by the time delay path, the energy storage capacitor discharges, and a discharge pulse is output.

[0016] Each energy storage capacitor discharges sequentially, outputting a multi-stage pulse signal with a fixed phase difference.

[0017] Furthermore, the multidimensional nonlinear transmission network of the phase compensation module is composed of... It consists of several nonlinear transmission lines;

[0018] Each nonlinear transmission line corresponds to a single-stage pulse signal; a reverse-biased varactor diode is connected across the nonlinear transmission line, and the capacitance of the varactor diode changes linearly with the signal level to compress the pulse and compensate for its phase.

[0019] Each nonlinear transmission line compresses and compensates the phase of the input pulse, aligns the phase of each pulse signal, and compresses the pulse width to a set picosecond level.

[0020] Furthermore, the design process of the multidimensional nonlinear transmission network of the phase compensation module includes:

[0021] Step S1: Determine the high-end cutoff frequency of the pulse signal based on the expected rise time of the output pulse;

[0022] Step S2: Select a varactor diode that meets the cutoff frequency requirements;

[0023] Step S3: Calculate the capacitance and inductance per unit length of the lossless transmission line based on the dielectric constant of the PCB board.

[0024] Step S4: Set the varactor diode embedding spacing and calculate the capacitance and inductance of a single section of lossless transmission line;

[0025] Step S5: Calculate the rise time compression time of a single nonlinear transmission line;

[0026] Step S6: Determine the number of nonlinear transmission segments that satisfy phase compensation and pulse compression.

[0027] Furthermore, in step S1, the high-end cutoff frequency of the pulse signal ; The expected rise time of the output pulse;

[0028] In step S2, the cutoff frequency of the selected varactor diode is... Cutoff frequency of nonlinear transmission lines and the high-end cutoff frequency of the pulse signal satisfy:

[0029] ;

[0030] In step S3, the load is 50. At that time, the capacitance per unit length of lossless transmission line and inductor They are respectively:

[0031] ,

[0032] in, The dielectric constant of the selected PCB material;

[0033] In step S4, the capacitance of a single section of lossless transmission line and inductor They are respectively:

[0034] ,

[0035] in, The embedding spacing of the varactor diode on the PCB;

[0036] In step S5, the rise time compression time of a single-section nonlinear transmission line is:

[0037]

[0038] in, , These represent the voltage levels at the top and bottom of the compressed signal, respectively. A constant factor, This is the zero-bias junction capacitance of the varactor diode;

[0039] In step S6, the time difference between the current stage pulse signal and the previous stage pulse signal entering the nonlinear transmission line is added to the time difference between the rising edge of the current stage pulse signal entering the nonlinear transmission line and the rising edge compression time of the desired output pulse signal. This is then divided by the rising edge compression time of a single nonlinear transmission line and rounded down to determine the number of nonlinear transmission lines that satisfy phase compensation and pulse compression.

[0040] Furthermore, the second-order amplitude compensation module includes: a carrier delay module and a delay capacitor pairing module;

[0041] The carrier delay module includes Each carrier delay branch is connected to a nonlinear transmission line in the phase compensation module via a lossless transmission line.

[0042] The delay capacitor pairing module includes Each capacitor unit is connected to a corresponding carrier delay branch.

[0043] Furthermore, in the carrier delay module, each carrier delay branch has a corresponding inductance value, which is used to re-phase align the pulse signals at each stage;

[0044] In the delay capacitor pairing module, each capacitor unit has the same capacitance value, which is used to generate the final pulse output through pulse time-varying electric field induction and carrier superposition.

[0045] Furthermore, in the delay capacitor pairing module, the capacitance value of the capacitor unit is:

[0046]

[0047] in, The expected range; The rise time of the field-effect transistor in the first-order amplitude compensation module; This represents the number of stages in the switching circuit of the first-order amplitude compensation module. This refers to the number of field-effect transistors included in each stage of the switching circuit. This represents the breakdown threshold voltage of each cascaded field-effect transistor. The impedance is the load impedance.

[0048] Furthermore, in the carrier delay module, the first... and the Inductance value in the carrier delay branch and The following relationship must be satisfied:

[0049]

[0050] in, This represents the capacitance value of the capacitor unit. , They respectively represent connections to the first and the The inductance and capacitance values ​​corresponding to the length difference of the lossless transmission line in the carrier delay branch.

[0051] The present invention also discloses a pulse generation method using a picosecond-level pulse generator as described above, comprising the following steps:

[0052] Step 1: Under the action of the reference high voltage, the energy storage capacitor of the first-order amplitude compensation module begins to pre-charge.

[0053] Step 2: The external trigger signal flows through the time delay path of the first-order amplitude compensation module, and under the action of the delay devices in each time delay path, it reaches the base of each group of cascaded field-effect transistors in the device cascade section with a fixed phase difference.

[0054] Step 3: Under the action of the trigger signal, each group of cascaded field-effect transistors is turned on instantly. The pre-charged carriers in the energy storage capacitor section are introduced to the power supply ground plane through the collector-emitter path of the cascaded field-effect transistors, thereby generating multiple pulse signals with fixed phase differences.

[0055] Step 4: After receiving the pulse signal output by the first-order amplitude compensation module, the phase compensation module makes each level of pulse signal flow through the multi-dimensional nonlinear transmission network, and performs phase compensation and pulse compression on each level of pulse signal under the action of the nonlinear transmission network, aligns the phase of each level of pulse signal, and compresses the pulse width to the set picosecond level width.

[0056] Step 5: The multi-stage pulse signal after phase compensation arrives at the second-order amplitude compensation module and enters the carrier delay module of the second-order amplitude compensation module;

[0057] Step 6: The carrier delay module re-aligns the phases of the pulse signals flowing through each branch path by selecting the inductance parameters of each branch path;

[0058] Step 7: The pulse signals of each stage flowing through the carrier delay module simultaneously arrive at the delay capacitor matching module of the second-order amplitude compensation module, and under the induction of the pulse time-varying electric field and the superposition of carriers, a picosecond-level pulse signal with the expected amplitude is generated at the output of the second-order amplitude compensation module.

[0059] This invention can achieve at least one of the following beneficial effects:

[0060] This invention fully considers the challenges faced in designing picosecond-level pulse generators based on commercially available devices, such as the limited voltage withstand capability of individual devices leading to insufficient pulse amplitude, and the limited turn-off speed of devices resulting in insufficient pulse duration and rise / fall times. It establishes a picosecond-level pulse generation method combining amplitude and phase compensation, enabling the generation of high-amplitude picosecond-level pulses at a relatively low cost. This invention offers the following advantages compared to most existing picosecond-level pulse generation methods:

[0061] This invention constructs a dual compensation mechanism for amplitude and phase, which is compatible with various current low-amplitude, long-duration pulse generation systems, avoiding the financial and time pressure caused by redesign during the upgrading and transformation of current pulse generation systems.

[0062] By using two-stage pulse amplitude enhancement and pulse phase adjustment, it is possible to generate pulse signals with a duration of less than 600ps, a rise / fall time of less than 120ps, and an amplitude of greater than 200V, which greatly improves the pulse generation efficiency. Attached Figure Description

[0063] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0064] Figure 1 This is a schematic diagram showing the connection of the picosecond-level pulse generator in an embodiment of the present invention;

[0065] Figure 2 This is a schematic diagram showing the connection of the first-order amplitude compensation module in an embodiment of the present invention;

[0066] Figure 3 This is a schematic diagram of the multidimensional nonlinear transmission network composition and connection in an embodiment of the present invention;

[0067] Figure 4 This is a schematic diagram of pulse compression and phase compensation for two signals in an embodiment of the present invention;

[0068] Figure 5 This is a schematic diagram showing the connection of the second-order amplitude compensation module in an embodiment of the present invention;

[0069] Figure 6 This is a flowchart of the pulse generation method in an embodiment of the present invention. Detailed Implementation

[0070] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and, together with the embodiments of the present invention, serve to illustrate the principles of the present invention.

[0071] This invention discloses a picosecond-level pulse generator based on dual amplitude and phase compensation, such as... Figure 1 As shown, it includes:

[0072] A first-order amplitude compensation module is used to generate multi-level pulse signals with compensated amplitudes when triggered by a trigger signal, wherein each level of the pulse signal has a fixed phase difference.

[0073] The phase compensation module is used to receive the multi-level pulse signal and perform phase compensation and pulse compression on the multi-level pulse signal through a multi-dimensional nonlinear transmission network, align the phase of each level of pulse signal, and compress the pulse width to a set picosecond level width.

[0074] The second-order amplitude compensation module is used to receive multi-level pulse signals after phase compensation and pulse compression, perform phase alignment of the multi-level pulse signals again, and superimpose the amplitudes of the aligned pulse signals to output a picosecond-level pulse signal that meets the expected amplitude.

[0075] Specifically, the first-order amplitude compensation module includes:

[0076] The energy storage capacitor section is composed of... It consists of several energy storage capacitors, each of which is connected between the high-voltage power supply and ground.

[0077] The delay path part is composed of The system consists of several delay paths, with the number of delay devices in each path following an arithmetic progression, ensuring that the delay difference between two adjacent delay paths is a fixed time difference. The delay path part performs delay processing on the input external trigger signal to generate a signal with a fixed phase difference. Level trigger signal;

[0078] The device cascade section consists of It consists of a series of parallel switching circuits, each stage of which includes... A series of field-effect transistors;

[0079] like Figure 2 As shown, the corresponding connection relationship between each stage of the switching circuit, a time delay path, and an energy storage capacitor is as follows: the output terminal of the time delay path is connected to the switching circuit in... The gates of a series-connected field-effect transistor, A series circuit of field-effect transistors is connected between the positive and negative terminals of the energy storage capacitor.

[0080] The control relationship is as follows: after the energy storage capacitor is pre-charged, the switching circuit establishes a discharge path for the energy storage capacitor under the trigger signal output by the time delay path, the energy storage capacitor discharges, and a discharge pulse is output.

[0081] Each energy storage capacitor discharges sequentially, outputting a multi-stage pulse signal with a fixed phase difference.

[0082] In this embodiment, A series of field-effect transistors are connected to increase the breakdown threshold voltage of each stage, thereby increasing the pulse amplitude and achieving pulse amplitude compensation. The time-delay paths output fixed time differences sequentially. The trigger signal is used to switch the circuits at each stage, thereby generating a multi-stage pulse signal with a fixed phase difference.

[0083] Specifically, the multidimensional nonlinear transmission network of the phase compensation module consists of... It consists of several nonlinear transmission lines;

[0084] like Figure 3 As shown, each nonlinear transmission line corresponds to a single-stage pulse signal; a reverse-biased varactor diode is connected across the nonlinear transmission line, and the capacitance of the varactor diode changes linearly with the signal level to compress the pulse and compensate for its phase.

[0085] Each nonlinear transmission line compresses and compensates the phase of the input pulse, aligns the phase of each pulse signal, and compresses the pulse width to a set picosecond level.

[0086] In this embodiment, using The delay time characteristics of a nonlinear transmission line at each state point of the signal compress the input pulse to achieve a pulse width in the picosecond range. On the other hand, it aligns the phases of each stage of the pulse signal while compressing the pulse to facilitate second-order compensation of the pulse.

[0087] Regarding the first aspect: The reverse-biased varactor diode connected across the nonlinear transmission line is controlled by the signal level on the transmission line and inversely affects the transmission speed at different signal state points on the transmission line. Specifically, the capacitance of the reverse-biased varactor diode decreases with increasing input signal level v, and can be considered a linear change within a certain range. Therefore, the varactor diode capacitance... With signal level The relationship between them can be represented as:

[0088]

[0089] in, This is the zero-bias junction capacitance of the varactor diode. A constant factor, Indicates time The varying transient signal level; correspondingly, the capacitance per unit length of the nonlinear transmission line. ,inductance It can be represented as

[0090]

[0091] in, , These represent the inductance and capacitance of a uniform, lossless transmission line per unit length, respectively. Let represent the inductance of a lossless transmission line of length d. Then the time delay per unit length of the nonlinear transmission line at each state point is:

[0092]

[0093]

[0094] Regarding the second aspect: such as Figure 4 As shown,

[0095] In the picture, This represents the phase delay of the two input signals A and B. , and , Let A and B represent the propagation delay times at the bottom and top state points of waveforms A and B, respectively. To achieve both pulse compression and phase compensation simultaneously, the following conditions must be met:

[0096]

[0097] To satisfy the first two conditions mentioned above, it is necessary to specify the cutoff frequency of the varactor diode itself. Nonlinear transmission line cutoff frequency and the high-end cutoff frequency of the pulse signal The three are matched to satisfy the following conditions:

[0098]

[0099] The inherent phase difference generated by the delay devices in each path branch At the same time, align the phases of each pulse signal.

[0100] Specifically, the design process of the multidimensional nonlinear transmission network of the phase compensation module includes:

[0101] Step S1: Determine the high-end cutoff frequency of the pulse signal based on the expected rise time of the output pulse;

[0102] In one embodiment, the high-end cutoff frequency of the pulse signal is taken as... ; This is the expected rise time of the output pulse.

[0103] Step S2: Select a varactor diode that meets the cutoff frequency requirements;

[0104] Specifically, the cutoff frequency of the selected varactor diode. Cutoff frequency of nonlinear transmission lines and the high-end cutoff frequency of the pulse signal satisfy:

[0105] ;

[0106] In one embodiment, it is expected that... The cutoff frequency of the selected varactor diode is less than 1 nanosecond. It should be greater than 5 times. — That is, 2.25 GHz, and the nonlinear transmission line cutoff frequency. It should be greater than 450MHz.

[0107] Step S3: Calculate the capacitance and inductance per unit length of the lossless transmission line based on the dielectric constant of the PCB board.

[0108] In one embodiment, the load is 50. At that time, the capacitance per unit length of lossless transmission line and inductor They are respectively:

[0109] ,

[0110] in, The dielectric constant of the selected PCB material;

[0111] Step S4: Set the varactor diode embedding spacing and calculate the capacitance and inductance of a single section of lossless transmission line;

[0112] Specifically, the capacitance of a single-section lossless transmission line and inductor They are respectively:

[0113] ,

[0114] in, The embedding spacing of the varactor diode on the PCB;

[0115] Step S5: Calculate the rise time compression time of a single nonlinear transmission line;

[0116] Specifically, the rise time compression of a single-section nonlinear transmission line is:

[0117]

[0118] in, , These represent the voltage levels at the top and bottom of the compressed signal, respectively. A constant factor, This is the zero-bias junction capacitance of the varactor diode;

[0119] Step S6: Determine the number of nonlinear transmission segments that satisfy phase compensation and pulse compression.

[0120] Specifically, the time difference between the current stage pulse signal entering the nonlinear transmission line and the previous stage pulse signal, plus the time difference between the rising edge of the current stage pulse signal entering the nonlinear transmission line and the rising edge of the desired output pulse signal, is divided by the rising edge compression time of a single nonlinear transmission line and then rounded to determine the number of nonlinear transmission lines that satisfy phase compensation and pulse compression.

[0121] The multidimensional nonlinear transmission network designed through the above design process can achieve phase alignment of input pulse signals at all levels and compress the pulse width to a set picosecond level.

[0122] Specifically, such as Figure 5 As shown, the second-order amplitude compensation module includes: a carrier delay module and a delay capacitor pairing module;

[0123] The carrier delay module includes Each carrier delay branch is connected to a nonlinear transmission line in the phase compensation module via a lossless transmission line.

[0124] The delay capacitor pairing module includes Each capacitor unit is connected to a corresponding carrier delay branch.

[0125] In the carrier delay module, each carrier delay branch has a corresponding inductance value, which is used to re-phase align the pulse signals at each stage.

[0126] In the delay capacitor pairing module, each capacitor unit has the same capacitance value, which is used to generate the final pulse output through pulse time-varying electric field induction and carrier superposition.

[0127] In order to ensure that the final output pulse signal reaches the expected amplitude The capacitance value of the capacitor unit in the delay capacitor matching module should be matched with that of the cascaded components.

[0128] The capacitance value of the matched capacitor unit is:

[0129]

[0130] in, The expected range; The rise time of the field-effect transistor in the first-order amplitude compensation module; This represents the number of stages in the switching circuit of the first-order amplitude compensation module. This refers to the number of field-effect transistors included in each stage of the switching circuit. This represents the breakdown threshold voltage of each cascaded field-effect transistor. The impedance is the load impedance.

[0131] The re-phase alignment performed in the carrier delay module is mainly used to eliminate the time delay differences caused by the different lengths of the lossless transmission lines connected to each stage. Since the capacitance values ​​of each capacitor unit in the delay capacitor pairing module are the same, the time delay can be controlled by adjusting the inductance values ​​of each carrier delay branch in the carrier delay module, thus achieving re-phase alignment of the pulses at each stage.

[0132] In the carrier delay module, the first and the Inductance value in the carrier delay branch and The following relationship must be satisfied:

[0133]

[0134] in, This represents the capacitance value of the capacitor unit. , They respectively represent connections to the first and the The inductance and capacitance values ​​corresponding to the length difference of the lossless transmission line in the carrier delay branch.

[0135] This embodiment also discloses a method for generating high-amplitude picosecond pulses using the picosecond pulse generator described above, such as... Figure 6 As shown, it includes the following steps:

[0136] Step 1: Under the action of the reference high voltage, the energy storage capacitor of the first-order amplitude compensation module begins to pre-charge.

[0137] Step 2: The external trigger signal flows through the time delay path of the first-order amplitude compensation module, and under the action of the delay devices in each time delay path, it reaches the base of each group of cascaded field-effect transistors in the device cascade section with a fixed phase difference.

[0138] Step 3: Under the action of the trigger signal, each group of cascaded field-effect transistors is turned on instantly. The pre-charged carriers in the energy storage capacitor section are introduced to the power supply ground plane through the collector-emitter path of the cascaded field-effect transistors, thereby generating multiple pulse signals with fixed phase differences.

[0139] Step 4: After receiving the pulse signal output by the first-order amplitude compensation module, the phase compensation module makes each level of pulse signal flow through the multi-dimensional nonlinear transmission network, and performs phase compensation and pulse compression on each level of pulse signal under the action of the nonlinear transmission network, aligns the phase of each level of pulse signal, and compresses the pulse width to the set picosecond level width.

[0140] Step 5: The multi-stage pulse signal after phase compensation arrives at the second-order amplitude compensation module and enters the carrier delay module of the second-order amplitude compensation module;

[0141] Step 6: The carrier delay module re-aligns the phases of the pulse signals flowing through each branch path by selecting the inductance parameters of each branch path;

[0142] Step 7: The pulse signals of each stage flowing through the carrier delay module simultaneously arrive at the delay capacitor matching module of the second-order amplitude compensation module, and under the induction of the pulse time-varying electric field and the superposition of carriers, a picosecond-level pulse signal with the expected amplitude is generated at the output of the second-order amplitude compensation module.

[0143] In summary, the solution disclosed in this invention, by comprehensively utilizing device cascading, delay matching, pulse compression, carrier delay, and carrier superposition, establishes a design method for a picosecond-level pulse generator based on dual amplitude and phase compensation, while fully considering implementation cost and design difficulty. This avoids the limitations of relying on a single device in terms of turn-off speed and device withstand voltage threshold. It can significantly compress the pulse signal width while increasing the pulse amplitude, achieving the goal of generating high-amplitude picosecond-level pulse signals. Furthermore, it can adapt to the personalized needs of pulse signal generation in different scenarios, demonstrating excellent scenario adaptability.

[0144] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A picosecond-level pulse generator based on amplitude and phase double compensation, characterized in that, include: A first-order amplitude compensation module is used to generate multi-level pulse signals with compensated amplitudes when triggered by a trigger signal, wherein each level of the pulse signal has a fixed phase difference. The phase compensation module is used to receive the multi-level pulse signal and perform phase compensation and pulse compression on the multi-level pulse signal through a multi-dimensional nonlinear transmission network, align the phase of each level of pulse signal, and compress the pulse width to a set picosecond level width. The second-order amplitude compensation module is used to receive multi-level pulse signals after phase compensation and pulse compression, perform phase alignment of the multi-level pulse signals again, and superimpose the amplitudes of the aligned pulse signals to output a picosecond-level pulse signal that meets the expected amplitude. The multi-dimensional nonlinear transmission network of the phase compensation module is composed of a plurality of nonlinear transmission lines. Each nonlinear transmission line corresponds to a single-stage pulse signal; A reverse-biased varactor diode is connected across the nonlinear transmission line. The capacitance of the varactor diode changes linearly with the signal level, thus compressing the pulse and compensating for its phase. Each nonlinear transmission line compresses and compensates the phase of the input pulse, aligns the phase of each pulse signal, and compresses the pulse width to a set picosecond level. The design process of the multidimensional nonlinear transmission network of the phase compensation module includes: Step S1: Determine the high-end cutoff frequency of the pulse signal based on the expected rise time of the output pulse; Pulse signal high end cutoff frequency ; less than 1 nanosecond for the expected output pulse rise time; Step S2: Select a varactor diode that meets the cutoff frequency requirements; The cutoff frequency of a selected varactor diode The cutoff frequency of a nonlinear transmission line The high-end cutoff frequency of a pulse signal satisfies: ； Step S3: Calculate the capacitance and inductance per unit length of the lossless transmission line based on the dielectric constant of the PCB board. The load is 50 The capacitance and inductance of the lossless transmission line per unit length are respectively: and ​ ， wherein, is the dielectric constant of the selected PCB material; Step S4: Set the varactor diode embedding spacing and calculate the capacitance and inductance of a single section of lossless transmission line; Capacitance of single-section lossless transmission line and inductance respectively: ， in, The embedding spacing of the varactor diode on the PCB; Step S5: Calculate the rise time compression time of a single nonlinear transmission line; The rise time compression time of a single-section nonlinear transmission line is: wherein, , respectively represent the level values of the top and bottom of the compressed signal; is a constant factor, is the zero-bias junction capacitance of the varactor diode; Step S6: Determine the number of nonlinear transmission segments that satisfy phase compensation and pulse compression; The time difference between the current stage pulse signal entering the nonlinear transmission line and the previous stage pulse signal, plus the time difference between the rising edge of the current stage pulse signal entering the nonlinear transmission line and the rising edge of the desired output pulse signal, is divided by the rising edge compression time of a single nonlinear transmission line and then rounded to determine the number of nonlinear transmission lines that satisfy phase compensation and pulse compression.

2. The picosecond-level pulse generator with amplitude and phase double compensation according to claim 1, characterized in that, The first-order amplitude compensation module includes: The energy storage capacitor part is composed of Each energy storage capacitor is connected between the high-voltage power supply and the ground. The time delay path part is composed of The time delay path part is composed of The time delay path part is composed of The time delay path part is composed of a device cascade section, consisting of a switch circuit of each stage is composed of a field effect transistor in series The connection relationship between each stage of the switching circuit, a time delay path, and an energy storage capacitor is as follows: the output terminal of the time delay path is connected to the switching circuit in... The gates of a series-connected field-effect transistor, A series circuit of field-effect transistors is connected between the positive and negative terminals of the energy storage capacitor. The control relationship is as follows: after the energy storage capacitor is pre-charged, the switching circuit establishes a discharge path for the energy storage capacitor under the trigger signal output by the time delay path, the energy storage capacitor discharges, and a discharge pulse is output. The energy storage capacitors discharge in turn, outputting multi-stage pulse signals with fixed phase difference.

3. The picosecond-level pulse generator with dual amplitude and phase compensation according to claim 1, characterized in that, The second-order amplitude compensation module includes: a carrier delay module and a delay capacitor pairing module; The carrier delay module comprises A plurality of carrier delay branches, each of which is connected to a corresponding non-linear transmission line in the phase compensation module through a lossless transmission line. The delay capacitor pairing module comprises a plurality of capacitor units; each capacitor unit is connected with a carrier delay branch respectively.

4. The picosecond-level pulse generator with dual amplitude and phase compensation according to claim 3, characterized in that, In the carrier delay module, each carrier delay branch has a corresponding inductance value, which is used to re-phase align the pulse signals at each stage. In the delay capacitor pairing module, each capacitor unit has the same capacitance value, which is used to generate the final pulse output through pulse time-varying electric field induction and carrier superposition.

5. The picosecond-level pulse generator with dual amplitude and phase compensation according to claim 4, characterized in that, In the delay capacitor pairing module, the capacitance value of the capacitor unit is: in, The expected range; The rise time of the field-effect transistor in the first-order amplitude compensation module; This represents the number of stages in the switching circuit of the first-order amplitude compensation module. This refers to the number of field-effect transistors included in each stage of the switching circuit. This represents the breakdown threshold voltage of each cascaded field-effect transistor. The impedance is the load impedance.

6. The picosecond-level pulse generator with dual amplitude and phase compensation according to claim 5, characterized in that, In the carrier delay module, the first and the second inductance value in the carrier delay branch and satisfy the following relationship: wherein, is a capacitance value of the capacitance unit, , respectively represent the inductance and capacitance values corresponding to the length difference of the lossless transmission lines of the first and second carrier delay branches. and respectively represent the inductance and capacitance values corresponding to the length difference of the lossless transmission lines of the first and second carrier delay branches.

7. A pulse generating method using the picosecond pulse generator according to any one of claims 1 to 6, characterized by, Includes the following steps: Step 1: Under the action of the reference high voltage, the energy storage capacitor of the first-order amplitude compensation module begins to pre-charge. Step 2: The external trigger signal flows through the time delay path of the first-order amplitude compensation module, and under the action of the delay devices in each time delay path, it reaches the base of each group of cascaded field-effect transistors in the device cascade section with a fixed phase difference. Step 3: Under the action of the trigger signal, each group of cascaded field-effect transistors is turned on instantly. The pre-charged carriers in the energy storage capacitor section are introduced to the power supply ground plane through the collector-emitter path of the cascaded field-effect transistors, thereby generating multiple pulse signals with fixed phase differences. Step 4: After receiving the pulse signal output by the first-order amplitude compensation module, the phase compensation module makes each level of pulse signal flow through the multi-dimensional nonlinear transmission network, and performs phase compensation and pulse compression on each level of pulse signal under the action of the nonlinear transmission network, aligns the phase of each level of pulse signal, and compresses the pulse width to the set picosecond level width. Step 5: The multi-stage pulse signal after phase compensation arrives at the second-order amplitude compensation module and enters the carrier delay module of the second-order amplitude compensation module; Step 6: The carrier delay module re-aligns the phases of the pulse signals flowing through each branch path by selecting the inductance parameters of each branch path; Step 7: The pulse signals of each stage flowing through the carrier delay module simultaneously arrive at the delay capacitor matching module of the second-order amplitude compensation module, and under the induction of the pulse time-varying electric field and the superposition of carriers, a picosecond-level pulse signal with the expected amplitude is generated at the output of the second-order amplitude compensation module.

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