A TBC battery with partial back-side doping and its preparation method
Patent Information
- Application Number
- CN202511240850.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-01
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2045-09-01
AI Technical Summary
该方法存在诸多缺点:(1)工艺温度高、时间长、能耗大;(2)为整个面的均匀扩散,无法在金属电极接触区实现重掺杂(降低接触电阻),同时在非接触区实现轻掺杂(降低复合);(3)高温过程可能对硅片和已有膜层造成热损伤;(4)设备投资和运维成本较高,制约了TBC电池的成本控制与大规模产业化推广
[0027](1)本发明在现有TBC电池结构和设备基础上,采用浆料印刷替代传统的高温管式扩散,可以简化制备工艺,缩短工艺时间,降低生产成本,有利于TBC电池的大规模产业化推广;通过差异化浆料配方和激光扫描,在同一工艺步骤中一次性形成轻掺和重掺区域,金属接触区为重掺杂,有效降低了金属-半导体的接触电阻;非接触区为轻掺杂,显著降低了该区域的俄歇复合,提升了开路电压,工艺相对简单,控制难度低,生产成本增加较少,就可以有效提高电池片效率。
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Figure CN121099760B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of solar cell technology, and in particular to a TBC cell with partial back-side doping and its preparation method. Background Technology
[0002] Back-contact (BC) cells are considered an important development direction for high-efficiency crystalline silicon cells due to their advantages such as no grid lines obstructing the front side, high short-circuit current, and aesthetically pleasing appearance. TBC cells combine the structural advantages of IBC cells with the excellent passivation characteristics of TOPCon technology, demonstrating enormous efficiency potential.
[0003] Currently, the P-type and N-type regions of the back surface of traditional TBC batteries are usually prepared by high-temperature thermal diffusion, which involves introducing a boron or phosphorus-containing gas source into a diffusion furnace and diffusing impurity atoms into the silicon substrate at high temperatures (usually >800℃) to form a PN junction. This method has many disadvantages: (1) high process temperature, long process time, and high energy consumption; (2) uniform diffusion across the entire surface, making it impossible to achieve heavy doping (reducing contact resistance) in the metal electrode contact area and light doping (reducing recombination) in the non-contact area; (3) the high-temperature process may cause thermal damage to the silicon wafer and existing film layers; (4) high equipment investment and maintenance costs, which restrict the cost control and large-scale industrialization of TBC batteries.
[0004] Laser doping technologies, such as laser selective emitters (SE), have been applied to battery structures like PERC and TOPCon, enabling localized heavy doping by locally heating the silicon to induce the diffusion of dopant sources into the silicon mass. However, combining laser doping technology with the complex structure of TBC batteries to design a fabrication scheme that simplifies the process, reduces costs, and simultaneously improves battery efficiency remains a key technical challenge in this field. Summary of the Invention
[0005] This application addresses the aforementioned problems and overcomes the shortcomings of existing technologies by providing a TBC battery with partial back-side doping and its fabrication method. One objective of this application is to simplify the TBC battery fabrication process and reduce production costs; another objective is to effectively improve the battery's conversion efficiency by achieving localized selective doping on the battery's back side, thereby optimizing contact resistance and surface recombination.
[0006] To achieve the above-mentioned objectives, this application adopts the following technical solution:
[0007] This invention provides a method for preparing a TBC battery with partial back-side doping, comprising the following steps:
[0008] S1: Provide a silicon substrate and polish it;
[0009] S2: Tunneling silicon oxide and polycrystalline silicon layers are sequentially deposited on the back side of the silicon substrate;
[0010] S3: Print a paste with a high dopant content in a pre-designed heavily doped region on the polycrystalline silicon layer, and a paste with a low dopant content in a pre-designed lightly doped region, followed by drying; wherein, the dopant sources are boron source and phosphorus source, respectively, the heavily doped region is a pre-designed metal electrode region on the polycrystalline silicon layer, and the lightly doped region is a non-metallic electrode region on the polycrystalline silicon layer; specifically, using screen printing technology, a paste with a high boron source content or a paste with a high phosphorus source content is printed in the pre-designed metal electrode region (i.e., the screen grid region) on the back polycrystalline silicon layer to form a heavily doped region, and a paste with a low boron source content or a paste with a low phosphorus source content is printed in the non-metallic electrode region of the polycrystalline silicon layer to form a lightly doped region (the region where the paste with the dopant source is boron is a P-type doped region, and the region where the paste with the dopant source is phosphorus is an N-type doped region); after printing, dry and cure;
[0011] S4: Use a laser to scan the area where the paste was printed in step S3 to achieve selective laser doping; the laser energy activates the dopant source in the paste and diffuses downward into the polycrystalline silicon layer and silicon substrate, forming a P++ type heavily doped region in the paste area with high boron source content, an N++ type heavily doped region in the paste area with high phosphorus source content, a P+ type lightly doped region in the paste area with low boron source content, and an N+ type lightly doped region in the paste area with low phosphorus source content.
[0012] S5: The laser-doped silicon substrate is cleaned and locally etched to remove surface impurities and etch away the polysilicon layer between the P-type and N-type doped regions to form a gap region; specifically, an acidic cleaning solution is used to initially remove surface residues, followed by ultrasonic cleaning for deep cleaning.
[0013] S6: Annealing is performed on the etched silicon substrate to activate the doped regions and repair lattice damage. The annealing process promotes doping of the polycrystalline silicon layer, tunneling silicon oxide layer and silicon substrate while repairing laser damage and making the doping distribution more uniform.
[0014] S7: Texturing is performed on the gap areas on the front and back sides of the silicon substrate; a pyramid structure is formed on the surface of the silicon substrate to enhance the absorption of sunlight and reduce reflection;
[0015] S8: Passivation layer and antireflection layer are deposited sequentially on the front and back sides of the silicon substrate;
[0016] S9: Print and sinter metal electrodes in the heavily doped region on the back side of the silicon substrate to form a back contact structure; above the P++ type heavily doped region and N++ type heavily doped region on the back side, form the first electrode and the second electrode by screen printing silver paste or silver-aluminum paste. Then, sinter the first electrode and the second electrode to penetrate the back antireflection layer and the back passivation layer. The first electrode forms a good ohmic contact with the P++ type heavily doped region, and the second electrode forms a good ohmic contact with the N++ type heavily doped region.
[0017] Furthermore, in step S3, the mass concentration of the dopant source in the high-doped slurry is 15%~20%, and the mass concentration of the dopant source in the low-doped slurry is 5%~10%.
[0018] Furthermore, in step S4, the wavelength of the laser is 300nm~680nm and the power is 30W~50W. Preferably, the green laser with a wavelength of 532nm has a better doping effect.
[0019] Furthermore, in step S6, the annealing temperature is 800℃~1000℃ and the time is 20min~180min.
[0020] Furthermore, after the S6 annealing treatment, the ECV surface concentration of the P++ type heavily doped region is 5E19 cm⁻¹. -3 ~5E20 cm -3 The ECV surface concentration of the N++ type heavily doped region is 2E20 cm⁻¹. -3 ~5E20 cm -3 The ECV surface concentration of the lightly doped P+ region is 2E19 cm⁻¹. -3 ~8E19 cm -3 The junction depth is 0.1 μm to 0.5 μm, and the ECV surface concentration of the lightly doped N+ region is 0.3E20 cm⁻¹. -3 ~4E20 cm -3 Furthermore, the ECV surface concentration in the P++ type heavily doped region is higher than that in the P+ type lightly doped region, and the ECV surface concentration in the N++ type heavily doped region is higher than that in the N+ type lightly doped region.
[0021] Furthermore, in S2, the thickness of the polycrystalline silicon layer is 50nm~400nm, and the thickness of the tunneling silicon oxide layer is 0.5nm~10nm.
[0022] Furthermore, in step S8, the thickness of the passivation layer is 1 nm to 10 nm, and the thickness of the antireflection layer is 50 nm to 150 nm.
[0023] The present invention also provides a TBC battery with partial back-side doping prepared by the above preparation method.
[0024] Further, the TBC cell includes a silicon substrate. The front side of the silicon substrate, from the inside to the outside, includes a front passivation layer and a front antireflection layer. The back side of the silicon substrate, from the inside to the outside, includes a tunneling silicon oxide layer, a doped polycrystalline silicon layer, a back passivation layer, a back antireflection layer, and a metal electrode. The doped polycrystalline silicon layer includes N-type doped regions and P-type doped regions. The P-type doped regions include alternating lightly doped P+ and heavily doped P++ regions. The N-type doped regions include alternating lightly doped N+ and heavily doped N++ regions. A gap exists between the lightly doped P+ and lightly doped N+ regions. The metal electrode includes a first electrode and a second electrode. The first electrode penetrates the back passivation layer and the back antireflection layer to form an ohmic contact with the heavily doped P++ region. The second electrode penetrates the back passivation layer and the back antireflection layer to form an ohmic contact with the heavily doped N++ region.
[0025] Furthermore, the ECV surface concentration of the N++ type heavily doped region is greater than that of the N+ type lightly doped region, and the ECV surface concentration of the P++ type heavily doped region is greater than that of the P+ type lightly doped region, thereby forming a lateral high-low junction electric field on the back side of the TBC cell.
[0026] Compared with the prior art, the present invention has the following beneficial effects:
[0027] (1) Based on the existing TBC battery structure and equipment, this invention uses slurry printing to replace the traditional high-temperature tubular diffusion, which can simplify the preparation process, shorten the process time, reduce the production cost, and facilitate the large-scale industrialization of TBC batteries. Through differentiated slurry formulation and laser scanning, lightly doped and heavily doped regions are formed in one process step. The metal contact area is heavily doped, which effectively reduces the contact resistance between the metal and the semiconductor. The non-contact area is lightly doped, which significantly reduces Auger recombination in this area and improves the open circuit voltage. The process is relatively simple, the control difficulty is low, and the production cost increases only slightly, which can effectively improve the cell efficiency.
[0028] (2) The concentration gradient formed between the lightly doped and heavily doped regions of the present invention constitutes a lateral high-low junction. Its built-in electric field can effectively assist the lateral transport of photogenerated carriers, reduce the recombination of carriers before reaching the electrode, and improve the short-circuit current and fill factor. The process of the present invention has good compatibility with existing TOPCon and TBC production lines. The laser and annealing processes repair lattice defects and ensure the long-term reliability of the battery. Attached Figure Description
[0029] To more clearly illustrate the technical solutions of the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0030] Figure 1 This is a schematic diagram of the structure of a TBC battery with partial back-side doping provided in Embodiments 1-4 of the present invention;
[0031] Figure 2 This is a schematic diagram of the paste printing of a TBC battery with partial back-side doping provided in Embodiments 1-4 of the present invention.
[0032] Explanation of key figure labels:
[0033] 1. Silicon substrate; 2. Front passivation layer; 3. Front antireflection layer; 4. Tunneling silicon oxide layer; 5. P+ type lightly doped region; 6. P++ type heavily doped region; 7. Gap region; 8. N+ type lightly doped region; 9. N++ type heavily doped region; 10. Back passivation layer; 11. Back antireflection layer; 12. First electrode; 13. Second electrode; 14. Metal electrode region (heavily doped region); 15. Non-metal electrode region (lightly doped region); 16. Boron paste printing; 17. Phosphate paste printing. Detailed Implementation
[0034] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to practice the invention. In other embodiments, well-known materials or methods have not been specifically described in order to avoid obscuring the invention.
[0035] Throughout this specification, references to “an embodiment,” “an example,” or “an example” mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the invention. Therefore, the phrases “an embodiment,” “an example,” “an example,” or “an example” appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. Furthermore, specific features, structures, or characteristics can be combined in one or more embodiments or examples in any suitable combination and / or sub-combination. The term “and / or” as used herein includes any and all combinations of one or more of the associated listed items.
[0036] Terminology Explanation:
[0037] TBC: Tunneling Oxide Passivated Contact Back Contact.
[0038] PECVD: Plasma-enhanced chemical vapor deposition;
[0039] LPCVD: Low-pressure chemical vapor deposition;
[0040] ALD: Atomic Layer Deposition;
[0041] ECV: Electrochemical Capacitance-Voltage.
[0042] Gap region: The "isolation gap region" formed between the P-type doped region and the N-type doped region after the polysilicon layer is removed by etching.
[0043] The technical solution of the present invention will be clearly and completely described below with reference to specific embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.
[0044] Example 1
[0045] This embodiment provides a method for preparing a TBC battery with partial back-side doping, which consists of the following steps:
[0046] S1: Perform a tank alkaline polishing treatment on silicon substrate 1, then rinse it with deionized water and dry it.
[0047] S2: A 0.5 nm thick tunneling silicon oxide layer 4 is deposited on the back side of silicon substrate 1 using PECVD process, followed by a 50 nm thick polycrystalline silicon layer deposited using LPCVD process.
[0048] S3: Using screen printing technology, a paste with a high doping source content is printed on the pre-designed metal electrode areas (i.e., the screen grid area) of the polycrystalline silicon layer, while a paste with a low doping source content is printed on the non-metal electrode areas. The doping source is either boron or phosphorus. A schematic diagram of the paste printing process is shown below. Figure 2As shown. Specifically, a high-boron-source paste (boron paste) with a boron source concentration of 15% is printed in the preset P-type metal electrode region, and a low-boron-source paste (boron paste) with a boron source concentration of 5% is printed in the non-metallic electrode region of the P-type doped region; a high-phosphorus-source paste (phosphorus paste) with a phosphorus source concentration of 15% is printed in the preset N-type metal electrode region, and a low-phosphorus-source paste (phosphorus paste) with a phosphorus source concentration of 5% is printed in the non-metallic electrode region of the N-type doped region; after printing, drying and curing are performed.
[0049] S4: A 355nm wavelength violet laser with a power of 30W is used to scan and dopant the printing area to achieve selective laser doping. The laser energy activates the dopant sources in the paste and diffuses them downward into the polycrystalline silicon layer and silicon substrate 1. In the paste area with high boron source content, a P++ type heavily doped region 6 is formed; in the paste area with high phosphorus source content, an N++ type heavily doped region 9 is formed; in the paste area with low boron source content, a P+ type lightly doped region 5 is formed; and in the paste area with low phosphorus source content, an N+ type lightly doped region 8 is formed.
[0050] S5: Initial cleaning with acid solution, followed by cleaning in an ultrasonic cleaner for 5 minutes to remove impurities and residues on the surface of the P-type and N-type doped regions, while etching away the polysilicon layer between the P-type and N-type doped regions to form gap region 7.
[0051] S6: The etched silicon substrate 1 is annealed at 800℃ for 20 minutes to activate the doped regions and repair lattice damage. Annealing advances doping in the polycrystalline silicon layer, tunneling silicon oxide layer 4, and silicon substrate 1 while repairing laser damage and making the doping distribution more uniform. After annealing, the ECV surface concentration of the P++ type heavily doped region 6 is 5E19 cm⁻¹. -3 The ECV surface concentration of the N++ type heavily doped region 9 is 2E20 cm⁻¹. -3 The ECV surface concentration of the lightly doped P+ region 5 is 2E19 cm⁻¹. -3 The junction depth is 0.1 μm, and the ECV surface concentration of the N+ type lightly doped region 8 is 0.3E20 cm⁻¹. -3 .
[0052] S7: Texturing is performed on the front and back gap areas 7 of the silicon substrate 1 to form a pyramid structure on the surface of the silicon substrate 1, which enhances the absorption of sunlight and reduces reflection.
[0053] S8: A 1 nm thick aluminum oxide passivation layer (front passivation layer 2 and back passivation layer 10) is deposited on the front and back sides of silicon substrate 1 using the ALD process.
[0054] S9: A 50nm thick antireflection layer 3 is deposited on the front side of the silicon substrate 1 using PECVD process, and a 50nm thick back antireflection layer 11 is deposited on the back side.
[0055] S10: Above the P++ type heavily doped region 6 and N++ type heavily doped region 9 on the back side of the silicon substrate 1, a first electrode 12 and a second electrode 13 are formed by screen printing silver paste or silver-aluminum paste. Subsequently, the first electrode 12 and the second electrode 13 are sintered to penetrate the back antireflection layer 11 and the back passivation layer 10. The first electrode 12 forms a good ohmic contact with the P++ type heavily doped region 6, and the second electrode 13 forms a good ohmic contact with the N++ type heavily doped region 9. The result is as follows: Figure 1 The TBC battery structure is shown.
[0056] Example 2
[0057] This embodiment provides a method for preparing a TBC battery with partial back-side doping, which consists of the following steps:
[0058] S1: Perform a tank alkaline polishing treatment on silicon substrate 1, then rinse it with deionized water and dry it.
[0059] S2: A 10nm thick tunneling silicon oxide layer 4 is deposited on the back side of silicon substrate 1 using PECVD process, followed by a 400nm thick polycrystalline silicon layer deposited using LPCVD process.
[0060] S3: Using screen printing technology, a paste with a high doping source content is printed on the pre-designed metal electrode areas (i.e., the screen grid area) of the polycrystalline silicon layer, while a paste with a low doping source content is printed on the non-metal electrode areas. The doping source is either boron or phosphorus. (The printing schematic is shown in the image.) Figure 2 As shown. Specifically, a high-boron-source paste (boron paste) with a boron source concentration of 20% is printed in the preset P-type metal electrode region, and a low-boron-source paste (boron paste) with a boron source concentration of 10% is printed in the non-metallic electrode region of the P-type doped region; a high-phosphorus-source paste (phosphorus paste) with a phosphorus source concentration of 20% is printed in the preset N-type metal electrode region, and a low-phosphorus-source paste (phosphorus paste) with a phosphorus source concentration of 10% is printed in the non-metallic electrode region of the N-type doped region; after printing, drying and curing are performed.
[0061] S4: A 630nm wavelength red laser with a power of 50W is used to scan and dopant the printing area to achieve selective laser doping. The laser energy activates the dopant sources in the paste and diffuses them downward into the polycrystalline silicon layer and silicon substrate 1. P++ type heavily doped region 6 is formed in the paste area with high boron source content, N++ type heavily doped region 9 is formed in the paste area with high phosphorus source content, P+ type lightly doped region 5 is formed in the paste area with low boron source content, and N+ type lightly doped region 5 is formed in the paste area with low phosphorus source content.
[0062] S5: Initial cleaning with acid solution, followed by cleaning in an ultrasonic cleaner for 30 minutes to remove impurities and residues on the surface of the P-type and N-type doped regions, while etching away the polysilicon layer between the P-type and N-type doped regions to form gap region 7.
[0063] S6: The etched silicon substrate 1 is annealed at 1000℃ for 180 min to activate the doped regions and repair lattice damage. Annealing advances doping in the polysilicon layer, tunneling silicon oxide layer 4, and silicon substrate 1 while repairing laser damage and making the doping distribution more uniform. After annealing, the ECV surface concentration of the P++ type heavily doped region 6 is 5E20 cm⁻¹. -3 The ECV surface concentration of the N++ type heavily doped region 9 is 5E20 cm⁻¹. -3 The ECV surface concentration of the lightly doped P+ region 5 is 8E19 cm⁻¹. -3 The junction depth is 0.5 μm, and the ECV surface concentration of the N+ type lightly doped region 8 is 4E20 cm⁻¹. -3 .
[0064] S7: Texturing is performed on the front and back gap areas 7 of the silicon substrate 1 to form a pyramid structure on the surface of the silicon substrate 1, which enhances the absorption of sunlight and reduces reflection.
[0065] S8: A 10 nm thick aluminum oxide passivation layer (front passivation layer 2 and back passivation layer 10) is deposited on the front and back sides of silicon substrate 1 using the ALD process.
[0066] S9: A 150nm thick antireflection layer 3 is deposited on the front side of silicon substrate 1 using PECVD process, and a 150nm thick antireflection layer 11 is deposited on the back side.
[0067] S10: Above the P++ type heavily doped region 6 and N++ type heavily doped region 9 on the back side of the silicon substrate 1, a first electrode 12 and a second electrode 13 are formed by screen printing silver paste or silver-aluminum paste. Subsequently, the first electrode 12 and the second electrode 13 are sintered to penetrate the back antireflection layer 11 and the back passivation layer 10. The first electrode 12 forms a good ohmic contact with the P++ type heavily doped region 6, and the second electrode 13 forms a good ohmic contact with the N++ type heavily doped region 9. The result is as follows: Figure 1 The TBC battery structure is shown.
[0068] Example 3
[0069] This embodiment provides a method for preparing a TBC battery with partial back-side doping, which consists of the following steps:
[0070] S1: Perform a tank-type alkaline polishing treatment on the N-type silicon substrate 1, then rinse it clean with deionized water and dry it.
[0071] S2: A 5nm thick tunneling silicon oxide layer 4 is deposited on the back side of silicon substrate 1 using PECVD process, followed by a 250nm thick polycrystalline silicon layer deposited using LPCVD process.
[0072] S3: Using screen printing technology, a paste with a high doping source content is printed on the pre-designed metal electrode areas (i.e., the screen grid area) of the polycrystalline silicon layer, while a paste with a low doping source content is printed on the non-metal electrode areas. The doping source is either boron or phosphorus. (The printing schematic is shown in the image.) Figure 2 As shown. Specifically, a high-boron-source paste (boron paste) with a boron source concentration of 17% is printed in the preset P-type metal electrode region, and a low-boron-source paste (boron paste) with a boron source concentration of 7% is printed in the non-metallic electrode region of the P-type doped region; a high-phosphorus-source paste (phosphorus paste) with a phosphorus source concentration of 17% is printed in the preset N-type metal electrode region, and a low-phosphorus-source paste (phosphorus paste) with a phosphorus source concentration of 7% is printed in the non-metallic electrode region of the N-type doped region; after printing, drying and curing are performed.
[0073] S4: A 532nm wavelength green laser with a power of 40W is used to scan and dopant the printing area to achieve selective laser doping. The laser energy activates the dopant sources in the paste and diffuses them downward into the polycrystalline silicon layer and silicon substrate. In the paste area with high boron source content, a P++ type heavily doped region 6 is formed; in the paste area with high phosphorus source content, an N++ type heavily doped region 9 is formed; in the paste area with low boron source content, a P+ type lightly doped region 5 is formed; and in the paste area with low phosphorus source content, an N+ type lightly doped region 8 is formed.
[0074] S5: Initial cleaning with acid solution, followed by cleaning in an ultrasonic cleaner for 12 minutes to remove impurities and residues on the surface of the P-type and N-type doped regions, while etching away the polysilicon layer between the P-type and N-type doped regions to form gap region 7.
[0075] S6: The etched silicon substrate 1 is annealed at 900℃ for 60 minutes to activate the doped regions and repair lattice damage. Annealing advances doping in the polysilicon layer, tunneling silicon oxide layer 4, and silicon substrate 1 while repairing laser damage and making the doping distribution more uniform. After annealing, the ECV surface concentration of the P++ type heavily doped region 6 is 1E20 cm⁻¹. -3 The ECV surface concentration of the N++ type heavily doped region 9 is 3.5E20 cm⁻¹. -3 The ECV surface concentration of the lightly doped P+ region 5 is 5E19 cm⁻¹. -3 The junction depth is 0.3 μm, and the ECV surface concentration of the N+ type lightly doped region 8 is 2.6E20 cm⁻¹. -3 .
[0076] S7: Texturing is performed on the front and back gap areas 7 of the silicon substrate 1 to form a pyramid structure on the surface of the silicon substrate, which enhances the absorption of sunlight and reduces reflection.
[0077] S8: A 5nm thick aluminum oxide passivation layer (front passivation layer 2 and back passivation layer 10) is deposited on the front and back sides of silicon substrate 1 using the ALD process.
[0078] S9: A 100nm thick front antireflection layer 3 is deposited on the front side of silicon substrate 1 using PECVD process, and a 50nm thick back antireflection layer 11 is deposited on the back side.
[0079] S10: Above the P++ type heavily doped region 6 and N++ type heavily doped region 9 on the back side of the silicon substrate 1, a first electrode 12 and a second electrode 13 are formed by screen printing silver paste or silver-aluminum paste. Subsequently, the first electrode 12 and the second electrode 13 are sintered to penetrate the back antireflection layer 11 and the back passivation layer 10. The first electrode 12 forms a good ohmic contact with the P++ type heavily doped region 6, and the second electrode 13 forms a good ohmic contact with the N++ type heavily doped region 9. The result is as follows: Figure 1 The TBC battery structure is shown.
[0080] Example 4
[0081] This embodiment provides a method for preparing a TBC battery with partial back-side doping, which consists of the following steps:
[0082] S1: Perform a tank alkaline polishing treatment on silicon substrate 1, then rinse it with deionized water and dry it.
[0083] S2: A 2nm thick tunneling silicon oxide layer 4 is deposited on the back side of silicon substrate 1 using PECVD process, followed by a 280nm thick polycrystalline silicon layer deposited using LPCVD process.
[0084] S3: Using screen printing technology, a paste with a high doping source content is printed on the pre-designed metal electrode areas (i.e., the screen grid area) of the polycrystalline silicon layer, while a paste with a low doping source content is printed on the non-metal electrode areas. The doping source is either boron or phosphorus. (The printing schematic is shown in the image.) Figure 2 As shown. Specifically, a high-boron-source paste (boron paste) with a boron source concentration of 18% is printed in the preset P-type metal electrode region, and a low-boron-source paste (boron paste) with a boron source concentration of 8% is printed in the non-metallic electrode region of the P-type doped region; a high-phosphorus-source paste (phosphorus paste) with a phosphorus source concentration of 18% is printed in the preset N-type metal electrode region, and a low-phosphorus-source paste (phosphorus paste) with a phosphorus source concentration of 8% is printed in the non-metallic electrode region of the N-type doped region; after printing, drying and curing are performed.
[0085] S4: A 532nm wavelength green laser with a power of 42W is used to scan and dopant the printing area to achieve selective laser doping. The laser energy activates the dopant sources in the paste and diffuses them downward into the polycrystalline silicon layer and silicon substrate 1. P++ type heavily doped region 6 is formed in the paste area with high boron source content, N++ type heavily doped region 9 is formed in the paste area with high phosphorus source content, P+ type lightly doped region 5 is formed in the paste area with low boron source content, and N+ type lightly doped region 8 is formed in the paste area with low phosphorus source content.
[0086] S5: Initial cleaning with acid solution, followed by cleaning in an ultrasonic cleaner for 10 minutes to remove impurities and residues on the surfaces of the P-type and N-type doped regions, while etching away the polysilicon layer between the P-type and N-type doped regions to form gap region 7.
[0087] S6: The etched silicon substrate 1 is annealed at 950℃ for 60 minutes to activate the doped regions and repair lattice damage. Annealing advances doping in the polysilicon layer, tunneling silicon oxide layer 4, and silicon substrate 1 while repairing laser damage and making the doping distribution more uniform. After annealing, the ECV surface concentration of the P++ type heavily doped region 6 is 2E20 cm⁻¹. -3 The ECV surface concentration of N++ type heavily doped region 9 is 4E20 cm⁻¹. -3 The ECV surface concentration of the lightly doped P+ region 5 is 4E19 cm⁻¹. -3 The junction depth is 0.3 μm, and the ECV surface concentration of the N+ type lightly doped region 8 is 0.6E20 cm⁻¹.-3 .
[0088] S7: Texturing is performed on the front and back gap areas 7 of the silicon substrate 1 to form a pyramid structure on the surface of the silicon substrate 1, which enhances the absorption of sunlight and reduces reflection.
[0089] S8: A 5nm thick aluminum oxide passivation layer (front passivation layer 2 and back passivation layer 10) is deposited on the front and back sides of silicon substrate 1 using the ALD process.
[0090] S9: A 100nm thick antireflection layer 3 is deposited on the front side of the silicon substrate 1 using PECVD process, and a 100nm thick antireflection layer 11 is deposited on the back side.
[0091] S10: Above the P++ type heavily doped region 6 and N++ type heavily doped region 9 on the back side of the silicon substrate 1, a first electrode 12 and a second electrode 13 are formed by screen printing silver paste or silver-aluminum paste. Subsequently, the first electrode 12 and the second electrode 13 are sintered to penetrate the back antireflection layer 11 and the back passivation layer 10. The first electrode 12 forms a good ohmic contact with the P++ type heavily doped region 6, and the second electrode 13 forms a good ohmic contact with the N++ type heavily doped region 9. The result is as follows: Figure 1 The TBC battery structure is shown.
[0092] Comparative Example 1
[0093] This comparative example provides a method for preparing a TBC battery with partial back-side doping, comprising the following steps:
[0094] 1. Steps 1-2 (polishing, deposition of tunneling silicon oxide layer and polycrystalline silicon layer) are the same as in Example 1;
[0095] 2. A POCL3 tube diffuser is used to form an N+ back field at 840℃, with a sheet resistance of approximately 80Ω;
[0096] 3. Boron diffusion: BBr3 tube diffusion is used to form a P+ back field at 920℃, with a sheet resistance of about 90Ω;
[0097] 4. The subsequent laser grooving, etching, annealing, texturing, coating, printing and sintering steps are the same as the industry's conventional TBC process.
[0098] Comparative Example 2
[0099] This comparative example provides a method for preparing a TBC battery with partial back-side doping. The difference between this comparative example and Example 1 is that in the S3 paste printing: boron paste with a dopant content of 15% is printed throughout the entire P-type doped region; phosphorus paste with a dopant content of 15% is printed throughout the entire N-type doped region. Then, it is dried; the remaining preparation methods and parameters are consistent with Example 1.
[0100] Comparative Example 3
[0101] This comparative example provides a method for preparing a TBC battery with partial back-side doping. The difference between this comparative example and Example 1 is that in the S3 slurry printing: a slurry with a high boron source content of 13% is printed in the preset P-type metal electrode region; a slurry with a low boron source content of 3% is printed in the non-metallic electrode region of the P-type doped region; a slurry with a high phosphorus source content of 13% is printed in the preset N-type metal electrode region; and a slurry with a low phosphorus source content of 3% is printed in the non-metallic electrode region of the N-type doped region. The remaining preparation methods and parameters are consistent with those of Example 1.
[0102] Comparative Example 4
[0103] This comparative example provides a method for preparing a TBC battery with partial back-side doping. The difference between this comparative example and Example 1 is that in the S3 slurry printing: a slurry with a high boron source content of 22% is printed in the preset P-type metal electrode region; a slurry with a low boron source content of 12% is printed in the non-metallic electrode region of the P-type doped region; a slurry with a high phosphorus source content of 22% is printed in the preset N-type metal electrode region; and a slurry with a low phosphorus source content of 12% is printed in the non-metallic electrode region of the N-type doped region. The remaining preparation methods and parameters are consistent with those of Example 1.
[0104] Performance testing
[0105] The electrical performance of the TBC batteries prepared in Examples 1-4 and Comparative Examples 1-4 was tested.
[0106] The test method was as follows: the parameters of the solar cell were measured using an IV tester, and the results are shown in Table 1.
[0107] Table 1. Battery test results for the examples and comparative examples.
[0108]
[0109] Performance test data conclusions and analysis:
[0110] As shown in the table above, the TBC battery prepared by the method provided by this invention has excellent conversion efficiency, open-circuit voltage, short-circuit current, and fill factor, and the series resistance is significantly reduced. Specific analysis is as follows:
[0111] 1. Performance data analysis of Examples 1-4:
[0112] Examples 1-4 of this invention employ the paste printing combined with laser selective doping process of this invention, and their conversion efficiencies are all higher than 25.9%. Among them, Example 4 shows the best performance, with a conversion efficiency of 26.53%, an open-circuit voltage of 744.5 mV, and a fill factor of 85.09%. This indicates that within the process parameter range described in this invention (especially the paste doping source concentration, laser parameters, annealing temperature, etc.), the battery performance is significantly optimized.
[0113] 2. Comparison with traditional techniques (VS Comparison Example 1):
[0114] Comparative Example 1 uses a traditional high-temperature tubular diffusion process to fabricate TBC cells, with a conversion efficiency of 26.29%, significantly lower than that of Example 4. This indicates that the present invention, by replacing high-temperature diffusion with a paste printing process combined with laser selective doping, simplifies the process, reduces costs, and significantly improves open-circuit voltage (Voc) and fill factor (FF) by optimizing the back-side doping concentration distribution. The improvement in Voc is mainly due to the reduction in recombination in the lightly doped region, while the improvement in FF stems from the decrease in contact resistance (reflected in a lower series resistance Rs) in the heavily doped region and the carrier transport assistance effect of the transverse electric field.
[0115] 3. Comparison with non-selective doping (VS Comparative Example 2):
[0116] Comparative Example 2 used the same concentration of paste throughout the P-type and N-type doped regions, failing to differentiate between light and heavy doping. Its conversion efficiency was the lowest (25.68%), with Voc and FF significantly inferior to all other examples. This directly demonstrates that "selective doping paste" is the key innovation of this invention, effectively reducing contact resistance and surface recombination. Without differentiation between light and heavy doping, either excessive overall doping leads to severe recombination (low Voc), or insufficient overall doping results in poor contact (high Rs, low FF).
[0117] 4. Comparison with improper doping source concentration (VS Comparative Examples 3 and 4):
[0118] The battery performance of Comparative Example 3 (low slurry concentration) and Comparative Example 4 (high slurry concentration) was not as good as that of the Example, indicating that the mass concentration of high doping source in the slurry needs to be controlled at 15%~20% and the mass concentration of low doping source needs to be controlled at 5%~10%. Too low a concentration leads to increased contact resistance, while too high a concentration introduces too many defects and increases recombination.
[0119] This invention simplifies the fabrication process and reduces production costs by replacing the traditional high-temperature diffusion process with paste printing combined with laser doping. Simultaneously, it successfully constructs a selectively doped structure on the back of the TBC battery, forming a lateral high-low junction electric field. Minority carriers accelerate under the influence of this electric field, thereby assisting in the lateral transport of charge carriers. This reduces minority carrier recombination below the electrodes, improving open-circuit voltage and short-circuit current. The formation of electrodes in the heavily doped region reduces the contact resistance between the back electrode and the doped polycrystalline silicon, improving the conversion efficiency of the TBC battery. Furthermore, it helps solve the problem of burn-through damage to ultra-thin passivated contacts caused by high-temperature metal paste, effectively improving the conversion efficiency of the TBC battery, making it particularly suitable for large-scale industrial production.
[0120] The present invention has been further described above with reference to specific embodiments. However, it should be understood that the specific description herein should not be construed as limiting the nature and scope of the present invention. Various modifications made to the above embodiments by those skilled in the art after reading this specification are all within the scope of protection of the present invention.
Claims
1. A method for preparing a TBC battery with partial back-side doping, characterized in that, It consists of the following steps: S1: Provide a silicon substrate and polish it; S2: A tunneling silicon oxide layer and a polycrystalline silicon layer are sequentially deposited on the back side of the silicon substrate; S3: A paste with a high doping source content is printed in a pre-defined heavily doped region on the polysilicon layer, and a paste with a low doping source content is printed in a lightly doped region, followed by drying; wherein, the doping source used in the paste with the high doping source content is a boron source or a phosphorus source, and the doping source used in the paste with the low doping source content is a boron source or a phosphorus source, the heavily doped region is a pre-defined metal electrode region on the polysilicon layer, and the lightly doped region is a non-metallic electrode region on the polysilicon layer; S4: Use a laser to scan the area where the paste was printed in step S3 to achieve selective laser doping; form a P++ type heavily doped region in the area where the paste with high boron source content is printed, form an N++ type heavily doped region in the area where the paste with high phosphorus source content is printed, form a P+ type lightly doped region in the area where the paste with low boron source content is printed, and form an N+ type lightly doped region in the area where the paste with low phosphorus source content is printed. S5: Clean and locally etch the laser-doped silicon substrate to remove surface impurities and etch away the polysilicon layer between the P-type doped region and the N-type doped region to form a gap region. S6: Anneal the etched silicon substrate to activate the doped regions and repair lattice damage; S7: Texturing is performed on the gap areas on the front and back sides of the silicon substrate; S8: Passivation layer and antireflection layer are deposited sequentially on the front and back sides of the silicon substrate; S9: Print and sinter metal electrodes in the heavily doped region on the back side of the silicon substrate to form a back contact structure.
2. The method for preparing a TBC battery with partial back-side doping according to claim 1, characterized in that, In step S3, the mass concentration of the dopant source in the high-doped slurry is 15%~20%, and the mass concentration of the dopant source in the low-doped slurry is 5%~10%.
3. The method for preparing a TBC battery with partial back-side doping according to claim 1, characterized in that, In step S4, the wavelength of the laser is 300nm~680nm and the power is 30W~50W.
4. The method for preparing a TBC battery with partial back-side doping according to claim 1, characterized in that, In step S6, the annealing temperature is 800℃~1000℃ and the time is 20min~180min.
5. The method for preparing a TBC battery with partial back-side doping according to claim 1, characterized in that, After the S6 annealing treatment, the ECV surface concentration of the P++ type heavily doped region is 5E19 cm⁻¹. -3 ~5E20 cm -3 The ECV surface concentration of the N++ type heavily doped region is 2E20 cm⁻¹. -3 ~5E20 cm -3 The ECV surface concentration of the lightly doped P+ region is 2E19 cm⁻¹. -3 ~8E19 cm -3 The junction depth is 0.1 μm to 0.5 μm, and the ECV surface concentration of the lightly doped N+ region is 0.3E20 cm⁻¹. -3 ~4E20 cm -3 Furthermore, the ECV surface concentration in the P++ type heavily doped region is higher than that in the P+ type lightly doped region, and the ECV surface concentration in the N++ type heavily doped region is higher than that in the N+ type lightly doped region.
6. The method for preparing a TBC battery with partial back-side doping according to claim 1, characterized in that, In step S2, the thickness of the polycrystalline silicon layer is 50nm~400nm, and the thickness of the tunneling silicon oxide layer is 0.5nm~10nm.
7. The method for preparing a TBC battery with partial back-side doping according to claim 1, characterized in that, In step S8, the thickness of the passivation layer is 1 nm to 10 nm, and the thickness of the antireflection layer is 50 nm to 150 nm.
8. A TBC battery with partial back-side doping prepared by the preparation method according to any one of claims 1-7.
9. The TBC battery with partial back-side doping according to claim 8, characterized in that, The TBC cell includes a silicon substrate, the front side of which, from the inside out, includes a front passivation layer and a front antireflection layer; the back side of the silicon substrate, from the inside out, includes a tunneling silicon oxide layer, a doped polycrystalline silicon layer, a back passivation layer, a back antireflection layer, and a metal electrode. The doped polysilicon layer includes an N-type doped region and a P-type doped region. The P-type doped region includes alternating lightly doped P+ and heavily doped P++ regions. The N-type doped region includes alternating lightly doped N+ and heavily doped N++ regions. A gap region exists between the lightly doped P+ and the lightly doped N+ regions. The metal electrode includes a first electrode and a second electrode. The first electrode penetrates the back passivation layer and the back antireflection layer to form an ohmic contact with the P++ type heavily doped region. The second electrode penetrates the back passivation layer and the back antireflection layer to form an ohmic contact with the N++ type heavily doped region.
10. The TBC battery with partial back-side doping according to claim 9, characterized in that, The ECV surface concentration of the N++ type heavily doped region is greater than that of the N+ type lightly doped region, and the ECV surface concentration of the P++ type heavily doped region is greater than that of the P+ type lightly doped region, thereby forming a lateral high-low junction electric field on the back of the TBC cell.
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