An optical chip testing assembly

Abstract

The application discloses an optical chip testing assembly, which comprises a substrate and an optical chip fixed on the substrate; further comprises a pressure bearing table arranged on the substrate and a metal cover plate covering the optical chip; when testing, the pressure bearing table and the metal cover plate jointly bear pressure so that the substrate pushes back the pogo pin on the PCB testing plate, thereby realizing the electrical connection between the substrate and the PCB testing plate. The application sets the pressure bearing table on the substrate to bear the downward pressure, and protects the optical chip under the condition of ensuring the successful electrical connection with the PCB testing plate. Meanwhile, the metal cover plate is arranged on the optical chip, and the metal cover plate also bears pressure when being pressed, thereby solving the uneven stress problem.

Description

Technical Field

[0001] This invention belongs to the field of optical chip testing technology, and particularly relates to an optical chip testing component. Background Technology

[0002] In AI computing, electronic chips play a crucial role in data transmission and computation. The entire process of artificial neural algorithms involves a large number of matrix multiplication operations, which traditional computer architectures like CPUs struggle to handle, resulting in low computational efficiency. Therefore, academia and industry have turned their attention to new hardware architectures specifically designed for artificial neural networks and deep learning, such as GPUs, ASICs, and FPGAs. However, regardless of the architecture, all these technologies utilize traditional microelectronics technology for design and manufacturing. Improving AI chip performance is inseparable from increasing microelectronic integration. However, in the early 21st century, microelectronics processes have struggled to keep pace with Moore's Law predictions, making it increasingly difficult to increase chip integration.

[0003] Compared to electrons, photons possess many unique properties: photons have no rest mass, there is no interaction between photons, and they experience almost no interference; different wavelengths of light can be used for simultaneous multi-channel communication, and photons can still achieve stable modulation and information transmission at modulation frequencies of tens of hertz, while electrical signals face radiation loss problems at high frequencies; furthermore, optical signals are unaffected by electromagnetic fields, offering strong confidentiality. Even more uniquely, using certain optical structures, photons can perform mathematical operations with zero energy consumption. Therefore, photons can be used to achieve ultra-high-speed, low-energy, or even zero-energy computing, thereby breaking through the performance and cost bottlenecks of traditional microelectronic chips.

[0004] As the semiconductor industry gradually enters the post-Moore era, the development of integrated circuits continues to evolve in different directions. On the one hand, new semiconductor materials are being developed, especially carbon nanotubes and two-dimensional semiconductor materials, to continue the essence of Moore's Law and further shrink the size of devices or chips, i.e., "More Moore"; on the other hand, new architectures and heterogeneous integrated chips are being developed for specific application areas, such as neuromorphic chips, optoelectronic chips, and quantum chips, to achieve "More than Moore".

[0005] Photonic computing chips based on silicon-based optoelectronic technology (hereinafter referred to as photonic chips) integrate micron- and nano-scale photonic, electronic, and optoelectronic devices on the same silicon substrate using materials and processes compatible with integrated circuits. This achieves functional integration and complementary advantages between microelectronic and optoelectronic devices, resulting in high-performance photonic chips. It is an effective way to solve the performance bottlenecks and information congestion faced by traditional integrated circuits. Thanks to the mature application of optical fiber communication, photons, as information carriers, have more multiplexing dimensions than electrons, such as amplitude, phase, wavelength, and mode, thus possessing greater bandwidth, faster speed, and lower energy consumption. Early silicon-based optoelectronic chips were developed to replace copper interconnect technology and solve the communication bottleneck between the processor core and memory of microelectronic chips. The microprocessor and memory units were implemented by microelectronic devices, while photonic devices mainly completed signal transmission and reception. With the increasing maturity of silicon photonics technology and the enormous advantages of optical communication, attention to silicon photonic computing chips has gradually shifted from information transmission to information processing, including cutting-edge application areas such as analog computing, quantum computing, and neuromorphic computing.

[0006] Before leaving the factory, optical chips need to undergo temperature testing to check their operation at optimal, worst, and normal temperatures.

[0007] Chinese patent application CN201920152609.9 discloses a chip high-temperature aging test fixture with independently controllable temperature, including a base, a flip cover on the base, a pressure head on the lower surface of the flip cover, a groove on the upper surface of the pressure head, a circular groove on the bottom wall of the groove, an irregularly shaped spring in the circular groove, a temperature sensor at the bottom end of the irregularly shaped spring, a slot on one side of the pressure head, a heating rod in the slot, and a cooling fan installed on the upper surface of the flip cover.

[0008] The aforementioned existing technologies are designed for electrical chips and are not applicable to the special structure of optical chips. Summary of the Invention

[0009] The purpose of this invention is to provide an optical chip testing component that partially solves or alleviates the above-mentioned shortcomings in the prior art. It is designed for the special structure of optical chips, thereby realizing optical chip temperature testing.

[0010] To solve the aforementioned technical problems, the present invention specifically adopts the following technical solution: A first aspect of the present invention relates to an optical chip testing assembly, comprising: substrate; A pressure-bearing platform is provided with a first notch in a semi-enclosed manner. The pressure-bearing platform is disposed on the first surface of the substrate and includes: a first pressure-bearing part and at least one second pressure-bearing part connected to the first pressure-bearing part. A first installation space is reserved between the first pressure-bearing part and the at least one second pressure-bearing part, and the end of the second pressure-bearing part is disconnected to form the first notch. An optical chip is fixed on a substrate through a first mounting space, and a second mounting space is provided between the optical chip and the pressure platform. A cover plate, wherein the cover plate is provided with a first mounting groove and a second notch in a semi-enclosed manner; wherein the cover plate includes: a first cover plate area and a second cover plate area connected to each other, a connecting plate is provided on the first cover plate area, and the connecting plate is provided with a first mounting groove in a semi-enclosed manner to accommodate the optical chip, and the connecting plate extends into the second mounting space; the second cover plate area protrudes at least partially from the pressure platform and / or the optical chip; During testing, the pressure-bearing platform and the cover plate can jointly withstand the pressure.

[0011] In some embodiments, the first pressure-bearing portion and the at least one second pressure-bearing portion are connected to form a U-shaped pressure-bearing platform to surround the optical chip on three sides, and the height of the cover plate does not protrude beyond the U-shaped pressure-bearing platform.

[0012] In some embodiments, when the cover plate is connected to the substrate, a first gap space is formed between the cover plate and the pressure platform.

[0013] In some embodiments, the width of the first pressure-bearing portion is greater than the width of the second pressure-bearing portion.

[0014] In some embodiments, the optical chip protrudes outward relative to the substrate through the first notch and the second notch in sequence.

[0015] In some embodiments, the cover plate is a metal cover plate.

[0016] In some embodiments, the side of the optical chip not surrounded by the pressure platform is a coupling part, and the coupling part is provided with a photosensitive area for coupling connection with the optical fiber array.

[0017] In some embodiments, the coupling portion of the optical chip extends out of the substrate and is suspended, and the photosensitive area is disposed on the bottom surface of the coupling portion.

[0018] In some embodiments, the bottom surface of the cover plate is provided with an installation step for fixing the fiber optic array, and the installation step is provided with an installation boss.

[0019] In some embodiments, the substrate is provided with a plurality of conductive bumps, and the optical chip is electrically connected to the substrate using the conductive bumps.

[0020] In some embodiments, the cover plate has an overflow hole.

[0021] In some embodiments, the cover plate extends beyond the substrate, and the mounting step is disposed on the portion of the cover plate extending beyond the substrate.

[0022] In some embodiments, the overflow hole is an elongated hole.

[0023] In some embodiments, the optical chip test assembly is installed in a slot assembly for testing.

[0024] Beneficial Technical Effects: Addressing the issue of "protruding packaging solutions," this invention proposes a partitioned auxiliary connection component. Specifically, this invention employs a multi-layered semi-enclosed structure with interlocking components to provide a partitioned auxiliary connection component (i.e., an optical chip testing component). This allows the protruding packaging solution to maintain a relatively stable state during chip testing, mitigating or reducing the risk of damage under prolonged pressure.

[0025] This invention provides a force transmission structure for synergistically dispersing external forces by connecting different regions in a protruding packaging scheme. The cover plate serves as a connector (or load-bearing structure) to directly or indirectly assemble the pressure platform, optical chip, substrate, and fiber array into a single unit. Furthermore, the cover plate and pressure platform, as two force transmission structures, are synergistically configured in terms of load-bearing positions and the size / area of ​​the load-bearing contact surface. This protects the protruding packaging scheme (especially the optical chip) from damage during prolonged testing and pressure application. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. The elements or parts in the drawings are not necessarily drawn to scale. Obviously, the drawings described below are some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0027] Figure 1 This is an exploded view of the optical chip testing component in Example 1.

[0028] Figure 2 This is a schematic diagram of the optical chip testing component after the metal cover plate has been removed in Example 1.

[0029] Figure 3a This is an exploded view of the optical chip test component coupled with the fiber optic array in Example 1.

[0030] Figure 3b This is a schematic diagram showing the fit between the pressure plate and the metal cover in Example 1.

[0031] Figure 4 This is a schematic diagram of the optical chip test component coupled with the optical fiber array in Example 1.

[0032] Figure 5 This is a schematic diagram of the metal cover plate in the optical chip testing assembly in Example 1.

[0033] Figure 6 This is a cross-sectional view of the optical chip testing component in Example 1.

[0034] Figure 7 This is a three-dimensional view of the optical chip testing system in Example 2.

[0035] Figure 8 This is a cross-sectional view of the optical chip testing system in Example 2.

[0036] Figure 9 This is an exploded view of the slot base in Embodiment 2.

[0037] Summary of attached labeling and identification: 1. Chip testing assembly; 2. Slot assembly; 3. Fiber optic array; 4. PCB testing board; 11. Substrate; 12. Optical chip; 13. Pressure platform; 131. First pressure bearing part; 132. Second pressure bearing part; 133. First notch; 14. Metal cover plate; 121. Photosensitive surface; 134. Glue injection groove; 141. Glue overflow hole; 142. Mounting step; 143. First mounting groove; 144. Mounting boss; 14a. First cover plate area; 14b 145. Second cover plate area; 146. Connecting plate; 21. Second notch; 22. Slot base; 23. Top cover; 211. Slot; 212. Protective dam; 213. Upper perforated plate; 214. Lower perforated plate; 221. Floating pressure block; 222. Fixed pressure block; 223. Claw; 224. Knob; 225. Preload spring; 228. Rotating component; 229. Slider; 230. Support plate; 231. Locking screw; 232. Press-fit nut. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0039] In this document, suffixes such as "module," "part," or "unit" used to denote elements are used only for the purpose of illustrative purposes and have no specific meaning in themselves. Therefore, "module," "part," or "unit" may be used interchangeably.

[0040] In this document, the terms "upper," "lower," "inner," "outer," "front," "rear," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the present invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0041] In this document, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0042] In this document, "and / or" includes any and all combinations of one or more of the listed related items.

[0043] In this article, "multiple" means two or more, that is, it includes two, three, four, five, etc.

[0044] In this article, "floating force" (or buffering force) refers to the degree of fluctuation between the magnitude of the actual applied force (such as the force applied to the optical chip, or the force actually borne by the cover plate or the optical chip) and the magnitude of the external force (such as the downward force applied by the operator through rotation). For example, the floating force is applied by a floating pressure block. When a first driving force is applied to the floating pressure block, the floating pressure block can correspondingly apply a second driving force to the optical chip. The difference between the second driving force and the first driving force is the floating amount, which is determined by the elastic force of the elastic element (or, compression / elongation). Specifically, during the pressure application process, the magnitude of the second driving force is adaptively adjusted according to the buffering effect of the elastic element at the upper end of the floating pressure block.

[0045] Conversely, "fixing force" refers to a force whose magnitude during the application of force (such as the force actually borne by the pressure plate) is the same as or similar to the magnitude of the external force. For example, the fixing force is applied by the fixing block. When the first driving force is applied to the fixing block, the fixing block can correspondingly apply a third driving force to the optical chip that is the same as or similar to the first driving force.

[0046] In this text, "semi-enclosed" refers to one or more components connected to form a partial enclosure, leaving at least one opening for communication with the outside. In other words, "semi-enclosed" means that a space or area is partially surrounded by a solid structure, but not completely closed; that is, part of the structure's boundary is closed by the solid structure, while other boundaries are open. For example, in some embodiments, the first mounting groove reserved in the first cover plate area 14a in this text through semi-enclosure means that connecting plates set on the three edges of the first cover plate area are connected in sequence to form a U-shaped enclosure area (corresponding to the solid structure), and the position where no connecting plate is set forms a second opening (i.e., a U-shaped opening, corresponding to the open state), which is used to communicate with external components (such as leading out a fiber optic array).

[0047] In this article, "protruding" or "protruding packaging scheme" refers to a structural scheme in which one side of the optical chip protrudes outward (or is suspended) relative to the intermediate layer (such as a substrate or other connecting layer). For example, patent application 202410110835.6 discloses a hybrid packaging structure and method for optoelectronic chips based on 2.5D packaging technology, in which the optical chip extends beyond the intermediate layer, leaving the fiber array suspended. That is to say, one side of the optical chip protrudes outward relative to the intermediate layer to provide a protruding packaging scheme. This protruding optical chip packaging scheme is beneficial for achieving miniaturization and high integration of photonic computing units, thereby realizing the miniaturization of high-dimensional matrix optical chips.

[0048] However, this protruding packaging design also presents significant challenges to the testing of optical chips.

[0049] In response to this protruding packaging scheme, the present invention proposes a partitioned auxiliary connection component and, in conjunction with the partitioned auxiliary connection component, a partitioned pressing module.

[0050] Example 1: First, the present invention adopts a multi-layer semi-enclosed structure with interlocking to provide a partitioned auxiliary connection component (i.e., optical chip test component), so that this protruding packaging solution can maintain a relatively stable state during chip testing, thereby mitigating or reducing the risk of damage under long-term pressure.

[0051] See Figure 3a , Figure 3b As shown, the optical chip testing component provided by this invention includes: substrate 11; The pressure-bearing platform 13 is provided with a first notch 133 in a semi-enclosed manner. The pressure-bearing platform 13 is disposed on the first surface of the substrate and includes: a first pressure-bearing part 131 and at least one second pressure-bearing part 132 connected to the first pressure-bearing part 131. A first installation space is reserved between the first pressure-bearing part 131 and the at least one second pressure-bearing part 132, and the end of the second pressure-bearing part 132 is disconnected to form the first notch. The optical chip 12 is fixed on the substrate through the first mounting space, and a second mounting space is left between the optical chip and the pressure platform 13. The cover plate 14 is provided with a first mounting groove 143 and a second notch 146 in a semi-enclosed manner; wherein, the cover plate includes: a first cover plate area 14a and a second cover plate area 14b connected to each other, a connecting plate 145 is provided on the first cover plate area 14a, and the connecting plate 145 is provided with a first mounting groove in a semi-enclosed manner to accommodate the optical chip, and the connecting plate extends into the second mounting space; the second cover plate area 14b protrudes at least partially from the pressure platform 13 and / or the optical chip. During testing, the pressure-bearing platform and the cover plate can jointly withstand the pressure.

[0052] In this embodiment, the substrate has a first surface and a second surface. The first surface of the substrate is used for communication connection with the optical chip, and the second surface is used for connection with external devices (such as PCB test boards or other circuit structures).

[0053] In this embodiment, the surfaces of the first and second pressure-bearing portions are adhered to the first surface of the substrate using adhesive. Correspondingly, the surfaces of the first and second pressure-bearing portions connected to the substrate are referred to as force-transmitting surfaces, and the other surface of the first and second pressure-bearing portions is referred to as pressure-bearing surfaces. Similarly, the first mounting groove of the cover plate can also be connected to the surface of the optical chip using adhesive, and the surface in the first mounting groove connected to the optical chip is also referred to as a force-transmitting surface, while the other side of the cover plate is referred to as a force-bearing surface. This invention essentially provides a force transmission structure for regionally connected protruding packaging schemes to collaboratively disperse external forces. The cover plate can function as a connector (or load-bearing structure) to assemble the pressure-bearing platform, optical chip, substrate, and fiber array directly or indirectly. The cover plate and pressure-bearing platform, as two force transmission structures, are collaboratively configured in terms of load-bearing position and the size / area of ​​the load-bearing contact surface to protect the protruding packaging scheme (especially the optical chip) and prevent damage to the optical chip during prolonged testing and pressure application.

[0054] From another perspective, the present invention provides a dual-load-bearing structure (i.e., a pressure-bearing part and a cover plate) to optimize the transmission path of external forces. The dual-load-bearing structure, on the one hand, can distribute forces in a targeted manner for different areas (such as substrates or optical chips) by cooperating with different load-bearing surfaces. This not only enables uniform force transmission to the structural system formed by the substrate and the optical chip as a whole, but also reduces the damage to the connection between the substrate and the optical chip during the force transmission process.

[0055] In some embodiments, the first pressure-bearing part 131 and the at least one second pressure-bearing part 132 are connected to form a U-shaped pressure-bearing platform to surround the optical chip on three sides, and the height of the cover plate does not protrude beyond the U-shaped pressure-bearing platform.

[0056] For example, in some embodiments, when the test components are connected, the surfaces of the cover plate and the pressure plate (specifically, the pressure-bearing surface / load-bearing surface) can be at the same height. Alternatively, in some embodiments, when the test components are connected, the height of the cover plate can be slightly lower than the height of the U-shaped pressure plate.

[0057] In some embodiments, when the cover plate is connected to the substrate, a first gap space is formed between the cover plate and the pressure platform. This first gap space can be used to accommodate excess adhesive and is therefore also referred to as an adhesive injection tank.

[0058] In some embodiments, the width of the first pressure-bearing portion 131 is greater than the width of the second pressure-bearing portion 132; In some embodiments, the optical chip protrudes outward relative to the substrate 11 through the first notch and the second notch in sequence. The outwardly protruding portion is provided with a coupling portion.

[0059] In some embodiments, the cover plate is a metal cover plate.

[0060] See below. Figures 1-9 The following provides an exemplary description of a specific implementation of the optical chip testing component: like Figure 1 , Figure 2 As shown, this embodiment provides an optical chip testing assembly 1 (or a partitioned auxiliary connection assembly), including a substrate 11 and an optical chip 12 fixed on the substrate 11; it also includes a pressure platform 13 disposed on the substrate 11 and a cover plate, such as a metal cover plate 14, covering the optical chip.

[0061] During testing, the pressure plate 13 and the metal cover plate 14 jointly bear the pressure, causing the substrate 11 to push back the pins on the PCB test board 4, thereby making the substrate 11 electrically connected to the PCB test board 4.

[0062] During testing, the optical chip 12 needs to be mounted on top of the PCB test board 4. Pressure is then applied to the optical chip 12, causing the substrate 11 to push back the pins on the PCB test board 4, ensuring a successful electrical connection. Because the optical chip 12 is relatively brittle, it is easily crushed. In this embodiment, a pressure-bearing platform 13 is provided on the substrate 11 to withstand downward pressure, protecting the optical chip while ensuring a successful electrical connection with the PCB test board 4.

[0063] In this embodiment, the combined bearing platform 13 and cover plate reduce or alleviate the problem of uneven stress on the substrate 11. During pressure application, the substrate 11 may warp, affecting the contact between the substrate 11 and the PCB test board pins, thus compromising the reliability of the electrical connection. The combined bearing solution in this embodiment effectively addresses the problem of uneven stress.

[0064] In this embodiment, the pressure-bearing platform 13 and the metal cover plate 14 work together, with the pressure-bearing platform 13 serving as the main pressure-bearing component. During the pressure test, the pressure-bearing platform 13 first absorbs the externally applied pressure, preventing the pressure from acting directly on the optical chip, thus buffering and protecting the optical chip 12. After absorbing the pressure, the pressure-bearing platform 13 transmits the force to the substrate 11, enabling the substrate 11 to generate sufficient displacement to push back the ejector pins on the PCB test board, thereby ensuring a stable electrical connection between the substrate 11 and the PCB test board, meeting the electrical path requirements of the test. The metal cover plate 14 is disposed on the optical chip and shares the pressure with the pressure-bearing platform 13 during pressure application. It works in conjunction with the pressure-bearing platform 13 to disperse the force originally concentrated on the pressure-bearing platform 13, making the force on the substrate 11 more uniform in the vertical direction. In this way, the substrate 11 will not warp due to uneven force when bearing pressure, ensuring the stability of the contact between the substrate 11 and the ejector pins. The metal cover plate 14 covers the optical chip 12, further reducing the possibility of the optical chip 12 being subjected to additional stress. The metal cover 14 and the pressure plate 13 together provide protection for the optical chip 12 from different directions, achieving electrical connection while minimizing the probability of the optical chip 12 being damaged by force.

[0065] Specifically, the substrate 11 serves as the supporting foundation for the optical chip 12, providing physical support for the optical chip 12 and ensuring a stable mounting position for the optical chip 12 within the entire test assembly. The substrate 11 has several conductive bumps, through which the optical chip 12 connects to the substrate 11, enabling it to transmit internal electrical signals to external circuits or receive electrical signals input from external circuits.

[0066] like Figure 6 As shown, the pressure plate 13 is fixed to the substrate 11 by bonding. A glue injection groove 134 is provided between the metal cover plate 14 and the pressure plate 13; the metal cover plate 14 has an overflow hole 141. The overflow hole 141 is an elongated hole located at the end of the metal cover plate adjacent to the glue injection groove 134. The glue injection groove 134, located between the metal cover plate 14 and the pressure plate 13, provides space for the encapsulating adhesive. Adhesive can be added between the optical chip 12 and the substrate 11 through the glue injection groove 134. After the adhesive is filled, it seals the area around the optical chip, preventing the intrusion of moisture, dust, and other contaminants. The overflow hole 141 provides a channel for the adhesive to overflow, allowing excess adhesive used to bond the metal cover plate 14 and the optical chip 12 to overflow through the overflow hole 141. A first mounting groove 143 is formed on the bottom surface of the metal cover plate 14, and the optical chip 12 is placed in the first mounting groove 143 for positioning and installation.

[0067] In this embodiment, the pressure-bearing platform 13 is U-shaped to surround the optical chip on three sides. This three-sided enclosure creates a "semi-open frame" for the pressure-bearing platform 13, providing maximum all-around protection for the optical chip without causing interference. When external pressure is applied to the pressure-bearing platform 13, the force can be transmitted to the substrate 11 through the pressure-bearing platform 13, avoiding local deformation and warping of the substrate 11 caused by single-point force.

[0068] In addition, the height of the metal cover plate 14 in this embodiment is not higher than that of the pressure-bearing platform 13. Through the height difference design, it is ensured that the pressure-bearing platform 13 bears the pressure first when pressure is applied, and the metal cover plate 14 only assists in bearing the force after the pressure-bearing platform 13 is compressed to a certain extent, so as to avoid the optical chip bearing direct load from above.

[0069] like Figures 3a-4 As shown, to facilitate connection with the fiber optic array 3, the side of the optical chip not surrounded by the pressure platform 13 is a coupling section, and the coupling section is provided with a photosensitive area for coupling connection with the fiber optic array 3. In this embodiment, the pressure platform 13 surrounds the optical chip on three sides, and the side not surrounded serves as the coupling section specifically for the input and output of optical signals, which is the interface for interaction between the optical chip and the fiber optic array 3.

[0070] like Figure 5 As shown, more specifically, the coupling portion of the optical chip 12 extends out of the substrate 11 and is suspended in mid-air, with the photosensitive area disposed on the bottom surface of the coupling portion. The bottom surface of the metal cover plate 14 is provided with a mounting step 142 for fixing the fiber optic array 3, and a mounting boss 144 is provided on the mounting step. The coupling portion extends out of the substrate 11 and is suspended in mid-air, so that the photosensitive area on the bottom surface is completely exposed to the space below the substrate 11, providing an unobstructed optical path for the vertical alignment of the fiber optic array 3 and avoiding physical obstruction of the optical signal by the substrate 11. The mounting step 142 is disposed on the bottom surface of the metal cover plate 14 for fixing and positioning the fiber optic array 3.

[0071] In other embodiments, the cover plate may also be made of other materials with a certain strength, such as plastic cover plates, etc.

[0072] The beneficial technical effects of the testing component in this embodiment are as follows: The optical chip testing system with the above structure includes a pressure-bearing platform on the substrate to withstand downward pressure, protecting the optical chip while ensuring successful electrical connection with the PCB test board. Relying solely on the pressure-bearing platform can lead to uneven stress on the substrate due to the concentrated force application point at the platform. During pressure application, the substrate may warp, affecting the contact between the substrate and the PCB test board pins, thus compromising the reliability of the electrical connection. Therefore, this invention also includes a metal cover plate on the optical chip, which simultaneously bears the pressure, solving the problem of uneven stress distribution.

[0073] In this embodiment, the pressure-bearing platform and the metal cover plate work together, with the pressure-bearing platform serving as the primary pressure-bearing component. During the pressure test, it first absorbs the externally applied pressure, preventing direct pressure on the optical chip and acting as a buffer to protect it. After absorbing the pressure, the pressure-bearing platform transfers the force to the substrate, enabling it to generate sufficient displacement to push back the ejector pins on the test board. This ensures a stable electrical connection between the substrate and the PCB test board, meeting the electrical path requirements of the test. The metal cover plate is placed on the optical chip and shares the pressure with the pressure-bearing platform during pressure application. Working in conjunction with the pressure-bearing platform, it disperses the force originally concentrated on the platform, making the force on the substrate more uniform in the vertical direction. This prevents the substrate from warping due to uneven force distribution, ensuring stable contact between the substrate and the ejector pins. The metal cover plate, covering the optical chip, further reduces the possibility of additional stress on the chip. Together, the metal cover plate and the pressure-bearing platform provide protection for the optical chip from different directions, achieving electrical connection while minimizing the probability of damage due to stress.

[0074] Example 2: In response to the above-mentioned protruding packaging scheme, the present invention also provides a partitioned pressure measurement module (or slot assembly 2). The test system includes an optical chip test assembly and a slot assembly for mounting the optical chip test assembly for testing. The optical chip testing component includes: substrate 11; The pressure-bearing platform 13 includes: a first pressure-bearing part 131, and at least one second pressure-bearing part 132 connected to the first pressure-bearing part 131, wherein a first installation space is reserved between the first pressure-bearing part 131 and the at least one second pressure-bearing part 132, and the end of the second pressure-bearing part 132 is disconnected to form the first notch. Optical chip 12, the optical chip is mounted on the substrate 11 through the first mounting space; The cover plate 14 includes a first cover plate area 14a and a second cover plate area 14b. The first cover plate area 14a is provided with a first mounting groove for accommodating the optical chip, and the first cover plate area is provided corresponding to the first mounting space. The second cover plate area protrudes from the optical chip and / or the pressure support platform. That is to say, the second cover plate area can be suspended relative to the optical chip. The slot assembly includes a slot base and a top cover; the slot base includes a slot and a protective dam surrounding the slot; preferably, a perforated plate is provided inside the slot so that when the slot base is connected to the PCB test board, the retractable pins on the PCB test board can penetrate the slot and make contact with the contacts on the substrate. The top cover includes: The fixed pressure block is set corresponding to the pressure plate; The floating pressure block is provided corresponding to the first cover plate area; the substrate can push the ejector pin back under the action of the fixed pressure block and the floating pressure block, thereby making the substrate electrically connected to the PCB test board; it also includes a pressing drive mechanism for driving the fixed pressure block and the floating pressure block to press down; The top cover and the slot base are respectively provided with a connecting mechanism for mutual connection.

[0075] In some embodiments, a second gap space is provided between the fixed pressure block and the floating pressure block; an overflow hole is provided at one end of the first cover plate area 14a near the second pressure bearing part 132. Correspondingly, when the floating pressure block contacts the first cover plate area under the action of the downward driving mechanism, the overflow hole corresponds to the second gap space to avoid contact with the force application surface of the floating pressure block.

[0076] In some embodiments, the size of the force-applying surface of the floating pressure block is greater than or equal to the size of the optical chip.

[0077] like Figure 7 As shown, this embodiment provides an optical chip testing system, including an optical chip testing component 1 and a slot component 2 for mounting the optical chip testing component 1 for testing.

[0078] The slot assembly 2 includes a slot base 21 and a top cover 22; the slot base 21 includes a slot 211 and a protective dam 212 disposed around the slot 211; a perforated plate is provided in the slot 211 so that when the slot base 21 is connected to the PCB test board 4, the retractable pins on the PCB test board 4 can pass through the slot and make contact with the contacts on the substrate 11; the top cover 22 is provided with a fixed pressure block 222 acting on the pressure platform 13 and a floating pressure block 221 acting on the cover plate (such as the metal cover plate 14); the substrate 11 can push the pins back under the force of the fixed pressure block 222 and the floating pressure block 221, thereby allowing the substrate 11 to be electrically connected to the PCB test board 4.

[0079] In this embodiment, the slot assembly 2 is used to mount the optical chip test assembly 1 onto the PCB test board 4 for testing. The slot base 21 in the slot assembly 2 can be pre-connected to the PCB test board 4 using detachable connection methods such as bolts or clips. After the optical chip assembly is installed in the slot assembly 2, the top cover 22 is fixedly connected to the slot base 21, and the optical chip testing can then begin.

[0080] In this embodiment, a floating pressure block 221 is provided for the suspended optical chip docking. This floating block can move up and down, allowing for a certain amount of clearance when it contacts the metal cover plate 14. For example, the force-applying surface of the floating pressure block 221 can directly contact the metal cover plate, while its other side corresponds to an elastic element (such as a preload spring). Under the elastic action of the elastic element, the floating pressure block can buffer external forces to a certain extent, thereby reducing or avoiding the risk of the optical chip breaking due to hard compression. Specifically, the pressure-applying part in this embodiment also includes a fixed pressure block 222 corresponding to the pressure platform 13 and a floating pressure block 221 corresponding to the metal cover plate 14 (actually corresponding to the position of the optical chip).

[0081] Specifically, in this embodiment, the top cover 22 has a second mounting groove, the floating pressure block 221 is disposed in the second mounting groove, and a pre-tensioning spring 225 is disposed between the second mounting groove and the floating pressure block 221; the cross-sectional shape of the floating pressure block 221 corresponds to the optical chip, and the cross-sectional shape of the fixed pressure block 222 corresponds to the pressure platform 13.

[0082] The fixed pressure block 222 has a U-shaped protrusion that matches the pressure platform 13. The pressure is applied directly to the top of the pressure platform 13, and the ejector pin is driven back through the rigid displacement of the substrate 11. During this process, the U-shaped structure of the pressure platform 13 evenly distributes the pressure to the edge of the substrate 11, preventing the pressure from being transmitted to the optical chip body. The fixed pressure block 222 is rigidly connected to the top cover 22, ensuring the immediacy and stability of pressure transmission and meeting the mechanical stroke accuracy required for the ejector pin to return.

[0083] The floating pressure block 221 is connected to the top cover 22 via a pre-tension spring 225 and can float adaptively in the vertical direction (the stroke can be adjusted according to the actual situation). When it comes into contact with the metal cover plate 14, the spring of the floating pressure block 221 is compressed and retracted to avoid hard squeezing of the optical chip 12.

[0084] like Figure 8 It also includes a pressing drive mechanism for driving the fixed pressure block 222 and the floating pressure block 221 to press down; the pressing drive mechanism includes a slider 229 that can move axially along the top cover 22, and the floating pressure block 221 and the fixed pressure block 222 are both disposed on the slider 229; it also includes a rotating component 228 disposed above the slider 229 and threadedly engaged with the top cover 22, which can generate axial displacement along the top cover 22 when the rotating component 228 rotates, thereby pressing the slider 229 against the optical chip test assembly 1. In order to facilitate the rotation of the rotating component 228, a knob 224 or a handle for auxiliary rotation can be provided on the rotating component 228.

[0085] When the top cover 22 descends, the fixed pressure block 222 contacts the pressure platform 13 and begins to apply pressure. Pressure is applied via the rotating component 228. The fixed pressure block 222 and the floating pressure block 221 act on the pressure platform 13 and the metal cover plate 14 respectively, causing the substrate 11 to press down and the ejector pin to begin to return. During the pressing process, the floating pressure block 221, located directly above the optical chip, acts on the metal cover plate 14 to perform auxiliary pressing, ensuring uniform force on the entire component. Furthermore, the floating pressure block 221 can contact the metal plate, thereby improving heat transfer and facilitating subsequent temperature testing.

[0086] More specifically, in this embodiment, the floating pressure block 221 is equipped with a TEC temperature control module to control the temperature rise or fall of the floating pressure block 221, thereby enabling the optical chip to reach the preset test temperature. For better heat transfer, the floating block is made of pure copper, while the fixed block can be made of engineering plastic to save costs.

[0087] A TEC (Thermoelectric Cooler) is a solid-state cooling / heating device based on the Peltier effect. Its principle is that when a direct current passes through a thermocouple composed of two different semiconductor materials, one end of the thermocouple absorbs heat (acting as a cooling end) and the other end releases heat (acting as a heating end). Cooling or heating functions can be achieved by controlling the direction of the current.

[0088] The temperature test in this invention examines the operation of the optical chip at its optimal, worst, and normal temperatures. By using a TEC temperature control module to heat or cool the chip, the temperature is precisely adjusted to a preset level, thus achieving the testing objective.

[0089] In some embodiments, a heat sink disposed on the top cover 22 is also included. The heat sink is an air-cooled heat sink or a water-cooled heat sink, used to provide auxiliary heat dissipation for the optical chip.

[0090] Due to the presence of a heat sink, the structure of the auxiliary rotating component also differs. For example, in the absence of a heat sink, the rotating component could be a knob 224 located on the top of the top cover 22, such as... Figure 7 , Figure 8 As shown. In the case of a radiator, the rotating component is a handle that extends from the radiator for easy operation.

[0091] To accommodate the unique structure of the optical chip, the slot and the protective dam 212 have corresponding notches for the metal cover plate 14 (specifically the second cover plate area 14b) to pass through; the fiber optic array 3 is fixed on the mounting step 142 and coupled to the optical chip. The notches prevent interference between the protective dam 212 and the slot, the metal cover plate 14, and the fiber optic array 3. Furthermore, the notches allow the ambient temperature to influence the operating temperature of the optical chip, making temperature regulation easier.

[0092] like Figure 7 , Figure 8 , Figure 9 As shown, in order to improve strength, the protective cofferdam 212 is connected and locked to the slot 211, the perforated plate (including the upper perforated plate 213 and the lower perforated plate 214), the PCB test board 4, and the support plate 230 set at the bottom of the PCB test board 4 by bolts, using locking screws 231 and rivet nuts 232. This ensures the stability between the components and prevents the protective cofferdam 212 from deforming under pressure due to gaps.

[0093] In addition, to facilitate the connection between the slot base 21 and the cover, the top cover 22 and the slot base 21 are respectively provided with a connecting mechanism for mating connection. The top cover 22 and the slot base 21 are hinged, and the connecting structure includes a claw 223 provided on the top cover 22, which can be mated with a slot on the slot base 21, as shown in the figure. Of course, in some other embodiments, the slot base 21 and the cover are separate, and are also connected by the claw 223 and the slot. In this embodiment, the claw 223 is a lever type, connected to the top cover 22 through a pivot. A return spring is provided at the pivot. By pressing the rear end of the claw 223, the claw 223 opens outward, and when released, the claw 223 can retract under the action of the return spring to connect with the slot.

[0094] During operation, the slot base 21 is pre-fixed to the PCB test board 4. Then, the optical chip test assembly 1 is installed in the slot, and the fiber array 3 is coupled to the optical chip 12. The top cover 22 is fastened to the slot base 21, and then the rotating part 228 is operated to press it tight, and the temperature test can begin.

[0095] It is understood that the test components or test systems in this invention are preferably applied to the performance testing of optical chips using a bump packaging process, but of course they can be applied to the testing of other types of optical chips, which will not be elaborated here.

[0096] The testing system in this embodiment has at least the following beneficial technical effects: The optical chip testing system with the above structure includes a pressure-bearing platform on the substrate to withstand downward pressure, protecting the optical chip while ensuring successful electrical connection with the PCB test board. Therefore, this invention also includes a metal cover plate on the optical chip. When pressure is applied, the metal cover plate and the pressure-bearing platform work together to withstand the pressure, solving the problem of uneven force distribution. Relying solely on the pressure-bearing platform to withstand pressure leads to uneven stress on the substrate because the force is concentrated at the platform location. During pressure application, the substrate may warp, affecting the contact between the substrate and the PCB test board pins, thus compromising the reliability of the electrical connection.

[0097] In this embodiment, the pressure-bearing platform and the metal cover plate work together, with the pressure-bearing platform serving as the primary pressure-bearing component. During the pressure test, it first absorbs the externally applied pressure, preventing direct pressure on the optical chip and acting as a buffer to protect it. After absorbing the pressure, the pressure-bearing platform transfers the force to the substrate, enabling it to generate sufficient displacement to push back the ejector pins on the test board. This ensures a stable electrical connection between the substrate and the PCB test board, meeting the electrical path requirements of the test. The metal cover plate is placed on the optical chip and shares the pressure with the pressure-bearing platform during pressure application. Working in conjunction with the pressure-bearing platform, it disperses the force originally concentrated on the platform, making the force on the substrate more uniform in the vertical direction. This prevents the substrate from warping due to uneven force, ensuring stable contact between the substrate and the ejector pins. The metal cover plate, covering the optical chip, further reduces the possibility of additional stress on the chip. Together, the metal cover plate and the pressure-bearing platform provide protection for the optical chip from different directions, achieving electrical connection while minimizing the probability of damage due to force.

[0098] The slot assembly is used to mount the optical chip test component onto the PCB test board for testing. The slot base in the slot assembly can be pre-connected to the PCB test board using detachable connection methods such as bolts or clips. After the optical chip component is installed in the slot assembly, the top cover is then fixedly connected to the slot base 21, and optical chip testing can begin.

[0099] Since the optical chip testing assembly is equipped with a pressure platform to primarily withstand downward pressure, the pressure application part in this invention also includes a fixed pressure block corresponding to the pressure platform and a floating pressure block corresponding to the metal cover plate (actually corresponding to the position of the optical chip). The floating pressure block can float up and down, and has a certain amount of play when in contact with the metal cover plate, thereby avoiding hard compression that could cause the optical chip to break.

[0100] The floating pressure block is equipped with a TEC temperature control module to control its temperature rise or fall, thereby ensuring the optical chip reaches the preset test temperature. For better heat transfer, the floating block is made of pure copper, while the fixed block can be made of engineering plastic to save costs.

[0101] The temperature test in this invention examines the operation of the optical chip at its optimal, worst, and normal temperatures. By using a TEC temperature control module to heat or cool the chip, the temperature is precisely adjusted to a preset level, thus achieving the testing objective.

[0102] From another perspective, in response to the aforementioned protruding packaging scheme, this invention provides a partitioned pressure measurement module. This partitioned pressure measurement module consists of a floating pressure block with a certain degree of self-adjustment capability (i.e., the floating block can rely on a spring to provide a certain degree of buffering effect on the applied force) and a fixed pressure block with a relatively fixed applied force, and the pressure partitions formed by the floating and fixed pressure blocks respectively correspond to the optical chip and its pressure support platform.

[0103] Therefore, this pressure application scheme, which combines self-regulating pressure and fixed pressure, is particularly suitable for protruding packaging schemes (which facilitate the miniaturization of high-dimensional matrix optical chips). In other words, this invention provides a special testing device for miniaturized high-dimensional matrix optical chips, offering an effective testing method for the miniaturization of these chips.

[0104] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0105] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a computer terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0106] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. An optical chip testing component, characterized in that, include: substrate(11); The pressure-bearing platform (13) is provided with a first notch (133) in a three-sided surrounding manner. The pressure-bearing platform (13) is disposed on the first surface of the substrate and includes: a first pressure-bearing part (131) and at least one second pressure-bearing part (132) connected to the first pressure-bearing part (131). A first installation space is reserved between the first pressure-bearing part (131) and the at least one second pressure-bearing part (132), and the end of the second pressure-bearing part (132) is disconnected to form the first notch. The optical chip (12) is fixed on the substrate through the first mounting space, and a second mounting space is left between the optical chip and the pressure platform (13); A cover plate (14) is provided with a first mounting groove (143) and a second notch (146) in a semi-enclosed manner; wherein, the cover plate includes: a first cover plate area (14a) and a second cover plate area (14b) connected to each other, a connecting plate (145) is provided on the first cover plate area (14a), and the connecting plate (145) is provided with a first mounting groove in a semi-enclosed manner to accommodate the optical chip, and the connecting plate extends into the second mounting space; the second cover plate area (14b) protrudes at least partially from the pressure platform (13) and / or the optical chip. During testing, the pressure-bearing platform and the cover plate can jointly withstand the pressure.

2. The optical chip testing assembly according to claim 1, characterized in that, The first pressure-bearing part (131) and the at least one second pressure-bearing part (132) are connected to form a U-shaped pressure-bearing platform to surround the optical chip on three sides, and the height of the cover plate does not protrude beyond the U-shaped pressure-bearing platform.

3. The optical chip testing assembly according to claim 1, characterized in that, When the cover plate is connected to the base plate, a first gap space is formed between the cover plate and the pressure platform.

4. The optical chip testing assembly according to claim 1, characterized in that, The width of the first pressure-bearing part (131) is greater than the width of the second pressure-bearing part; And / or, the optical chip protrudes outward relative to the substrate (11) through the first notch and the second notch in sequence; The cover plate is a metal cover plate.

5. The optical chip testing assembly according to claim 4, characterized in that, The side of the optical chip not surrounded by the pressure platform is the coupling part, and the coupling part is provided with a photosensitive area for coupling and connection with the optical fiber array.

6. The optical chip testing assembly according to claim 5, characterized in that, The coupling portion of the optical chip extends out of the substrate and is suspended in mid-air, while the photosensitive area is disposed on the bottom surface of the coupling portion.

7. The optical chip testing assembly according to claim 1, characterized in that, The bottom surface of the cover plate is provided with an installation step for fixing the fiber optic array, and the installation step is provided with an installation boss. And / or, the substrate is provided with a plurality of conductive bumps, and the optical chip is electrically connected to the substrate by means of the conductive bumps; And / or, the cover plate has an overflow hole.

8. The optical chip testing assembly according to claim 7, characterized in that, The cover plate extends out of the substrate, and the mounting step is provided on the portion of the cover plate that extends out of the substrate.

9. The optical chip testing assembly according to claim 7, characterized in that, The overflow hole is an elongated hole.

10. An optical chip testing assembly according to any one of claims 1-9, characterized in that, The optical chip test assembly is installed in the slot assembly for testing.

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