Anti-counterfeiting method and system, radio frequency identification chip, radio frequency identification tag

Abstract

The application discloses an anti-counterfeiting method and system, a radio frequency identification chip and a radio frequency identification label. The anti-counterfeiting method comprises the following steps: when a reading instruction is received, determining a current target address according to a start address in the reading instruction and chip information of the radio frequency identification chip; determining a total storage capacity corresponding to the current target address; judging whether the total storage capacity corresponding to the current target address reaches a target capacity or whether the current target address is zero; if not, determining a next target address according to storage data corresponding to the current target address and a label secret key, and returning to execute a step of adding a storage capacity of a storage position corresponding to the current target address to a total storage capacity corresponding to a previous target address; and if yes, sending the storage data corresponding to each target address except the target address of zero to an upper computer, so that the upper computer performs anti-counterfeiting verification according to the received storage data. The technical scheme of the application can better perform anti-counterfeiting verification.

Description

Technical Field

[0001] This invention relates to the field of radio frequency identification (RFID) technology, and in particular to an anti-counterfeiting method and system, an RFID chip, and an RFID tag. Background Technology

[0002] With the development of Radio Frequency Identification (RFID) technology, more and more products are adopting RFID for anti-counterfeiting verification. RFID chips are fabricated into RFID tags, which are then affixed to products requiring anti-counterfeiting measures. After the product leaves the factory, the content of the RFID tag can be read and compared with preset information to verify authenticity. If the read content matches the preset content, the product with the RFID tag is genuine; if the read content does not match the preset content, the product with the RFID tag is counterfeit, thus achieving anti-counterfeiting verification.

[0003] Existing anti-counterfeiting methods rely on identifying the unique identifier of the RFID chip or the tag's key. However, if the unique identifier of the RFID chip is obtained and the identifier on a counterfeit product matches that on a genuine product, the anti-counterfeiting function of the RFID chip becomes weak when using the unique identifier. In other words, existing anti-counterfeiting methods have limitations. Alternatively, cracking the RFID chip's key weakens its security, making it ineffective at preventing counterfeiting. Summary of the Invention

[0004] This invention provides an anti-counterfeiting method and system, an RFID chip, and an RFID tag to solve the problem that existing anti-counterfeiting methods cannot effectively prevent counterfeiting.

[0005] According to one aspect of the present invention, an anti-counterfeiting method is provided, applied to a radio frequency identification chip, the anti-counterfeiting method comprising:

[0006] After the RFID tag formed by the RFID chip leaves the factory, when a read command is received, the current target address is determined according to the starting address in the read command and the chip information of the RFID chip; wherein, the chip information includes at least the tag key and a unique identifier;

[0007] Add the storage capacity of the storage location corresponding to the current target address to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address;

[0008] Determine whether the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or whether the current target address is zero;

[0009] If the total storage capacity corresponding to the current target address does not reach the target capacity in the read instruction, and the current target address is not zero, determine the next target address based on the storage data corresponding to the current target address and the tag key, and return to execute the step of adding the storage capacity of the storage location corresponding to the current target address to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address.

[0010] When the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or when the current target address is zero, the storage data corresponding to each target address other than the target address zero is sent to the host computer so that the host computer can perform anti-counterfeiting verification based on the received storage data.

[0011] Optionally, determining the next target address based on the stored data corresponding to the current target address and the tag key includes:

[0012] Based on the stored data corresponding to the current target address and the tag key, the next target address is determined according to the first preset algorithm corresponding to the current target address; wherein, the first preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm, or a shift algorithm.

[0013] Optionally, the storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address, including:

[0014] If the current target address is greater than the maximum storage address of the RFID chip, then according to the second preset algorithm, the current target address and the preset value are calculated to obtain the updated current target address, and the storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address; wherein, the second preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm or a shift algorithm.

[0015] Optionally, after the RFID tag formed by the RFID chip leaves the factory, before determining the current target address based on the starting address in the reading instruction and the chip information of the RFID chip upon receiving a reading instruction, the method further includes:

[0016] Before the RFID tag leaves the factory, the unique identifier of the RFID chip is sent to the host computer, so that the host computer can determine the tag key according to the unique identifier and the initial key, according to a third preset algorithm; wherein, the third preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm or a shift algorithm;

[0017] Receive the tag key sent by the host computer.

[0018] Optionally, determining the current target address based on the starting address in the read instruction and the chip information of the RFID chip includes:

[0019] Based on the starting address in the read instruction, the tag key, and the unique identifier, the current target address is determined according to the fourth preset algorithm; wherein, the fourth preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm, or a shift algorithm.

[0020] According to another aspect of the present invention, an anti-counterfeiting method is provided, applied to a host computer, the anti-counterfeiting method comprising:

[0021] After the RFID tag formed by the RFID chip leaves the factory, a read command is sent to the RFID chip so that the RFID chip determines the current target address based on the starting address in the read command and the chip information of the RFID chip; the storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address; it is then determined whether the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or whether the current target address is zero; if the total storage capacity corresponding to the current target address does not reach the target capacity in the read command, and the current target address is not zero, the next target address is determined based on the storage data corresponding to the current target address and the tag key, until the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or the current target address is zero; if the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or the current target address is zero, the storage data corresponding to each target address other than the target address zero is sent to the host computer; wherein, the chip information includes at least the tag key and a unique identifier;

[0022] It receives all the stored data sent by the RFID chip and performs anti-counterfeiting verification based on all the stored data.

[0023] Optionally, after the RFID tag formed by the RFID chip leaves the factory, but before sending the read command to the RFID chip, the process further includes:

[0024] Before the RFID tag leaves the factory, the tag key is determined according to the unique identifier and initial key sent by the RFID chip, and the tag key is sent to the RFID chip according to a third preset algorithm; wherein, the third preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm or a shift algorithm.

[0025] According to another aspect of the present invention, a radio frequency identification (RFID) chip is provided, comprising: a storage unit and a logic unit; the logic unit is used to execute the anti-counterfeiting method applied to the RFID chip according to any embodiment of the present invention;

[0026] The logic unit is connected to the storage unit; the storage unit is used to store the tag key and the unique identifier.

[0027] According to another aspect of the present invention, a radio frequency identification (RFID) tag is provided, the RFID tag comprising: an antenna and an RFID chip as described in any embodiment of the present invention;

[0028] The antenna is connected to the radio frequency identification chip.

[0029] According to another aspect of the present invention, an anti-counterfeiting system is provided, the anti-counterfeiting system including a radio frequency identification tag and a host computer as described in any embodiment of the present invention; the host computer is used to execute the anti-counterfeiting method applied to the host computer as described in any embodiment of the present invention.

[0030] The technical solution of this invention, after the RFID tag formed by the RFID chip leaves the factory, upon receiving a read command, determines the current target address based on the starting address in the read command and the chip information of the RFID chip. The storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address. If the total storage capacity corresponding to the current target address does not reach the target capacity in the read command, and the current target address is not zero, the calculation continues based on the storage data corresponding to the current target address and the tag key to obtain the next target address. This process is repeated until the total storage capacity corresponding to the target address reaches the target capacity in the read command, or the target address is zero. When the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or the current target address is zero, the storage data corresponding to each target address other than zero is sent to the host computer, realizing the transmission of storage data from chained storage locations to the host computer. The host computer compares all the storage data with preset data to perform anti-counterfeiting verification. This improves the security of information storage on the RFID tag attachment, enhances the effectiveness of anti-counterfeiting, and provides better anti-counterfeiting measures. This means that if only the unique identifier of the RFID chip or only the tag key is obtained, when reading the relevant information of the attached object, only the data corresponding to the starting address can be obtained, and the actual stored data cannot be obtained, thus failing the anti-counterfeiting verification.

[0031] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a flowchart of an anti-counterfeiting method provided in an embodiment of the present invention;

[0034] Figure 2 This is a flowchart of another anti-counterfeiting method provided in an embodiment of the present invention;

[0035] Figure 3 This is a flowchart of another anti-counterfeiting method provided in an embodiment of the present invention;

[0036] Figure 4This is a flowchart of another anti-counterfeiting method provided in an embodiment of the present invention;

[0037] Figure 5 This is a flowchart of another anti-counterfeiting method provided in an embodiment of the present invention;

[0038] Figure 6 This is a schematic diagram of the structure of a radio frequency identification chip provided in an embodiment of the present invention;

[0039] Figure 7 This is a schematic diagram of the structure of another radio frequency identification chip provided in an embodiment of the present invention;

[0040] Figure 8 This is a schematic diagram of the structure of a radio frequency identification tag provided in an embodiment of the present invention;

[0041] Figure 9 This is a schematic diagram of the structure of an anti-counterfeiting system provided in an embodiment of the present invention. Detailed Implementation

[0042] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0043] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0044] This invention provides an anti-counterfeiting method applied to radio frequency identification (RFID) chips, i.e. executed by the RFID chip. Figure 1 This is a flowchart of an anti-counterfeiting method provided in an embodiment of the present invention, see reference. Figure 1 Anti-counterfeiting methods include:

[0045] S110. After the RFID tag formed by the RFID chip leaves the factory, when a read command is received, the current target address is determined according to the starting address in the read command and the chip information of the RFID chip; wherein, the chip information includes at least the tag key and the unique identifier.

[0046] The RFID chip can form an RFID tag, which can be attached to an object and shipped with the object. The object can be any product requiring anti-counterfeiting measures; there are no restrictions here. The tag key and unique identifier (UID) can be stored in a read-only area of ​​the RFID chip. Different RFID chips correspond to different tag keys, and different RFID chips correspond to different unique identifiers.

[0047] Specifically, after the RFID tag leaves the factory with the attached object, when anti-counterfeiting verification of the object is required, a read command can be sent via a host computer. The host computer can send the read command directly to the RFID chip, or it can send the read command to the RFID chip via a reader / writer. The host computer reads the information stored in the RFID chip, and then performs anti-counterfeiting verification on the attached object containing the RFID tag based on the information stored in the RFID chip. The read command includes the starting address of the information to be read. The starting address can be a mapped address, i.e., not the actual address in the RFID chip. The RFID chip performs calculations based on the starting address and chip information to obtain the current target address. For example, the starting address, tag key, and unique identifier can be calculated to obtain the current target address.

[0048] The current target address is the address of the memory block in the RFID chip, which is the address of the storage location in the RFID chip. This determines the actual storage address, making it easier to obtain the storage data corresponding to the actual storage address.

[0049] S120. Add the storage capacity of the storage location corresponding to the current target address to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address.

[0050] The storage capacity of the storage location corresponding to the current target address is equal to the data length of the stored data stored at the current address.

[0051] Specifically, after each calculation of the current target address, the storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address. This allows determination of the length of the acquired stored data. For example, if the current target address is the target address obtained in the third calculation, and the storage capacity of the storage location corresponding to the target address obtained in the first calculation is 1KB, then the total storage capacity corresponding to the target address obtained in the first calculation is 1KB. If the storage capacity of the storage location corresponding to the target address obtained in the second calculation is 2KB, then the total storage capacity corresponding to the target address obtained in the second calculation is 3KB. If the storage capacity of the storage location corresponding to the target address obtained in the third calculation is 1KB, then the total storage capacity corresponding to the target address obtained in the third calculation is 4KB. In this way, the total storage capacity corresponding to the current target address can be obtained each time.

[0052] S130. Determine whether the total storage capacity corresponding to the current target address has reached the target capacity in the read instruction, or whether the current target address is zero. If not, proceed to step S140; if yes, proceed to step S150.

[0053] The read command also includes a target capacity. The target capacity is the length of data to be read.

[0054] Specifically, after determining the current target address each time, it is necessary to determine whether the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or whether the current target address is zero.

[0055] S140. Determine the next target address based on the stored data corresponding to the current target address and the tag key, and return to step S120.

[0056] The data stored at the current target address is the data stored in the memory block (storage location) corresponding to the current target address.

[0057] Specifically, if the total storage capacity corresponding to the current target address does not reach the target capacity in the read instruction, and the current target address is not zero, then the calculation continues based on the storage data and tag key corresponding to the current target address to obtain the next target address. This process is repeated until the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or the current target address is zero. Therefore, the next target address is the current target address in the next execution step S120.

[0058] S150. Send the stored data corresponding to each target address other than the target address zero to the host computer so that the host computer can perform anti-counterfeiting verification based on the received stored data.

[0059] Specifically, after determining that the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or that the current target address is zero, the calculation ends, and the storage data corresponding to each target address except for the target address zero is sent to the host computer. In other words, after determining a storage location based on the chip information and the starting address, the calculation continues based on the storage data at that location to obtain the next storage location. This process continues until the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or the current target address is zero. At this point, the storage data corresponding to each target address except for the target address zero is sent to the host computer, realizing the sending of storage data from chained storage locations. The host computer compares all the storage data with preset data to perform anti-counterfeiting verification. All the storage data can be information about the object on which the RFID tag is attached. This improves the security of information storage on the object on which the RFID tag is attached, ensuring that only obtaining the unique identifier of the RFID chip or only obtaining the tag key will only retrieve the data corresponding to the starting address during information reading, and will not obtain the actual storage data, thus failing the anti-counterfeiting verification. Therefore, the technical solution of this embodiment improves the effectiveness of anti-counterfeiting and can effectively prevent counterfeiting.

[0060] In this embodiment, after the RFID tag formed by the RFID chip leaves the factory, upon receiving a read command, the current target address is determined based on the starting address in the read command and the chip information of the RFID chip. The storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address. If the total storage capacity corresponding to the current target address does not reach the target capacity in the read command, and the current target address is not zero, the calculation continues based on the storage data corresponding to the current target address and the tag key to obtain the next target address. This process is repeated until the total storage capacity corresponding to the target address reaches the target capacity in the read command, or the target address is zero. When the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or the current target address is zero, the storage data corresponding to each target address other than zero is sent to the host computer, realizing the transmission of storage data from chained storage locations to the host computer. The host computer compares all the storage data with preset data to perform anti-counterfeiting verification. This improves the security of information storage on the RFID tag attachment, enhances the effectiveness of anti-counterfeiting, and provides better anti-counterfeiting measures. This means that if only the unique identifier of the RFID chip or only the tag key is obtained, when reading the relevant information of the attached object, only the data corresponding to the starting address can be obtained, and the actual stored data cannot be obtained, thus failing the anti-counterfeiting verification.

[0061] Based on the above technical solutions, Figure 2 This is a flowchart of another anti-counterfeiting method provided in an embodiment of the present invention. Optionally, refer to... Figure 2 Anti-counterfeiting methods include:

[0062] S210. After the RFID tag formed by the RFID chip leaves the factory, when a read command is received, the current target address is determined according to the starting address in the read command and the chip information of the RFID chip; wherein, the chip information includes at least the tag key and the unique identifier.

[0063] S220. Add the storage capacity of the storage location corresponding to the current target address to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address.

[0064] S230. Determine whether the total storage capacity corresponding to the current target address has reached the target capacity in the read instruction, or whether the current target address is zero. If not, proceed to step S240; if yes, proceed to step S250.

[0065] S240. Based on the stored data and tag key corresponding to the current target address, determine the next target address according to the first preset algorithm corresponding to the current target address, and return to the execution step S220; wherein, the first preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm, or a shift algorithm.

[0066] The first preset algorithm corresponding to different current target addresses can be the same or different, and this is not limited here. The block cipher algorithm can be the SM7 algorithm, and the encryption algorithm can be the Advanced Encryption Standard (AES) algorithm. The preset algorithm can also be other algorithms (such as addition, addition, etc.) or a custom algorithm, and this embodiment does not limit it.

[0067] Specifically, based on the stored data and tag key corresponding to the current target address, a first preset algorithm corresponding to the current target address is used to calculate the next target address, which is the current target address in the next execution step S220. For example, if the first preset algorithm corresponding to the current target address is an XOR algorithm, then the stored data corresponding to the current target address and the tag key can be XORed to obtain the next target address.

[0068] By repeating this process, storage data corresponding to multiple target addresses can be obtained, thereby enabling the transmission of storage data from chained storage locations to the host computer.

[0069] In this process, after determining a target address, the data corresponding to that target address can first be stored in the RFID chip's buffer. Only after the total storage capacity corresponding to the current target address reaches the target capacity, or after the current target address becomes zero, is the storage data corresponding to each target address (excluding the zero target address) sent to the host computer. This improves computational efficiency.

[0070] S250: Send the stored data corresponding to each target address other than the target address zero to the host computer so that the host computer can perform anti-counterfeiting verification based on the received stored data.

[0071] Based on the above technical solutions, Figure 3 This is a flowchart of another anti-counterfeiting method provided in an embodiment of the present invention. Optionally, refer to... Figure 3 Anti-counterfeiting methods include:

[0072] S310. After the RFID tag formed by the RFID chip leaves the factory, when a read command is received, the current target address is determined according to the starting address in the read command and the chip information of the RFID chip; wherein, the chip information includes at least the tag key and the unique identifier.

[0073] S320. If the current target address is greater than the maximum storage address of the RFID chip, then according to the second preset algorithm, the current target address and the preset value are calculated to obtain the updated current target address, and the storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address; wherein, the second preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm or a shift algorithm.

[0074] The maximum storage address of the RFID chip is the maximum value among all memory blocks of the RFID chip, i.e., the maximum value among all storage locations in the RFID chip. The second preset algorithm can be the same as or different from the first preset algorithm; this is not limited here. For example, if the second preset algorithm is an XOR algorithm, the current target address is XORed with a preset value to obtain the updated current target address. For example, when the second preset algorithm is an XOR operation, if the storage address is an 8-bit binary value, the preset value can be 11111111. If the current target address is greater than the maximum storage address of the RFID chip, then the current target address is larger, meaning there are more "1" bits in the current target address. This results in a smaller updated target address after XORing the current target address with the preset value, thus avoiding a target address larger than the maximum storage address. It is understood that the storage address can also be hexadecimal data or data in other bases; this is not limited here. The storage address can also include values ​​of other bit lengths; this embodiment does not limit this.

[0075] Specifically, after determining the current target address, it is checked whether the current target address is greater than the maximum storage address of the RFID chip. If the current target address is less than or equal to the maximum storage address of the RFID chip, the storage capacity of the storage location corresponding to the current target address is directly added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address. If the current target address is greater than the maximum storage address of the RFID chip, the current target address is calculated with a preset value according to the second preset algorithm to obtain the updated current target address. Then, the storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address. In this way, the problem of not being able to obtain stored data when the current target address is abnormal (greater than the maximum storage address of the RFID chip) can be avoided, thus ensuring that stored data can be sent to the host computer, thereby ensuring the reliability of anti-counterfeiting verification.

[0076] S330. Determine whether the total storage capacity corresponding to the current target address has reached the target capacity in the read instruction, or whether the current target address is zero. If not, proceed to step S340; if yes, proceed to step S350.

[0077] S340. Based on the stored data and tag key corresponding to the current target address, determine the next target address according to the first preset algorithm corresponding to the current target address, and return to the execution step S320; wherein, the first preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm, or a shift algorithm.

[0078] S350: Send the stored data corresponding to each target address other than the target address zero to the host computer so that the host computer can perform anti-counterfeiting verification based on the received stored data.

[0079] Based on the above technical solutions, Figure 4 This is a flowchart of another anti-counterfeiting method provided in an embodiment of the present invention. Optionally, refer to... Figure 4 Anti-counterfeiting methods include:

[0080] S410. Before the RFID tag leaves the factory, the unique identifier of the RFID chip is sent to the host computer so that the host computer can determine the tag key according to the unique identifier and the initial key, according to the third preset algorithm; wherein, the third preset algorithm includes block cipher algorithm, encryption algorithm, XOR algorithm or shift algorithm.

[0081] Specifically, before the RFID tag leaves the factory—that is, after the RFID tag is fabricated from the RFID chip—during the initialization process, the RFID chip sends its unique identifier to the host computer. The host computer then performs a calculation on the unique identifier and the initial key according to a third preset algorithm to obtain the tag key. The third preset algorithm can be the same as or different from the first preset algorithm; this is not limited here. For example, if the first preset algorithm is an XOR algorithm, the host computer will perform an XOR operation between the unique identifier and the initial key to obtain the tag key.

[0082] S420: Receive the tag key sent by the host computer.

[0083] Specifically, after calculating the tag key, the host computer sends the tag key to the RFID chip. The RFID chip receives the tag key from the host computer and stores it, for example, in a read-only area of ​​the RFID chip, thus preventing the tag key from being rewritten. This allows the RFID chip to determine the target address based on the tag key in subsequent operations.

[0084] S430. After the RFID tag formed by the RFID chip leaves the factory, when a read command is received, the current target address is determined according to the starting address in the read command and the chip information of the RFID chip; wherein, the chip information includes at least the tag key and the unique identifier.

[0085] S440. Add the storage capacity of the storage location corresponding to the current target address to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address.

[0086] S450. Determine whether the total storage capacity corresponding to the current target address has reached the target capacity in the read instruction, or whether the current target address is zero. If not, proceed to step S460; if yes, proceed to step S470.

[0087] S460. Based on the stored data and tag key corresponding to the current target address, determine the next target address according to the first preset algorithm corresponding to the current target address, and return to the execution step S440; wherein, the first preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm, or a shift algorithm.

[0088] S470. Send the stored data corresponding to each target address other than the target address zero to the host computer so that the host computer can perform anti-counterfeiting verification based on the received stored data.

[0089] Based on the above technical solutions, optionally, the current target address can be determined according to the starting address in the read instruction and the chip information of the RFID chip, including:

[0090] Based on the starting address, tag key, and unique identifier in the read instruction, the current target address is determined according to the fourth preset algorithm; wherein, the fourth preset algorithm includes block cipher algorithm, encryption algorithm, XOR algorithm, or shift algorithm.

[0091] Specifically, the RFID chip performs calculations on the starting address, tag key, and unique identifier according to a fourth preset algorithm to obtain the current target address, facilitating the transmission of the stored data corresponding to the current target address to the host computer. The fourth preset algorithm can be the same as or different from the first preset algorithm; this is not limited here. For example, if the fourth preset algorithm is an XOR algorithm, the starting address and tag key are XORed, and the result is then XORed with the unique identifier to obtain the current target address. Alternatively, the starting address and unique identifier are XORed, and the result is then XORed with the tag key to obtain the current target address. Other operational orders can also be used; this is not limited here.

[0092] Optionally, after receiving the tag key sent by the host computer in step S420, before the RFID tag formed by the RFID chip leaves the factory, the anti-counterfeiting method further includes:

[0093] Upon receiving a test command, the current target address is determined based on the starting address in the test command and the chip information of the RFID chip. If the current target address is greater than the maximum storage address of the RFID chip, the current target address is calculated with a preset value according to the second preset algorithm to obtain the updated current target address. If the updated current target address is still greater than the maximum storage address, an alarm message is issued.

[0094] Specifically, before the RFID tags formed by the RFID chip leave the factory, the RFID chip can be tested. A test command is sent to the RFID chip, including a starting address. The RFID chip determines the current target address based on the starting address in the test command and the chip information. If the current target address is greater than the maximum storage address of the RFID chip, a second preset algorithm is used to calculate the current target address against a preset value to obtain an updated current target address. If the updated current target address is still greater than the maximum storage address, it indicates that the RFID chip is abnormal, and an alarm message is issued so that staff can be notified in time, thereby removing or repairing abnormal RFID chips and preventing unqualified RFID tags from leaving the factory.

[0095] This invention provides an anti-counterfeiting method applied to a host computer, i.e., executed by the host computer. Figure 5 This is a flowchart of another anti-counterfeiting method provided in an embodiment of the present invention, see reference. Figure 5 Anti-counterfeiting methods include:

[0096] S510. After the RFID tag formed by the RFID chip leaves the factory, a read command is sent to the RFID chip so that the RFID chip determines the current target address based on the starting address in the read command and the chip information of the RFID chip; the storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address; it is then determined whether the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or whether the current target address is zero; if the total storage capacity corresponding to the current target address does not reach the target capacity in the read command, and the current target address is not zero, the next target address is determined based on the storage data corresponding to the current target address and the tag key, until the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or the current target address is zero; if the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or the current target address is zero, the storage data corresponding to each target address other than the target address zero is sent to the host computer; wherein, the chip information includes at least the tag key and a unique identifier.

[0097] Specifically, after the RFID tag leaves the factory with the attached object, when anti-counterfeiting verification of the object is required, the host computer sends a read command to the RFID chip. The host computer can send the read command directly to the RFID chip, or it can send the read command to the RFID chip through a reader / writer. The host computer reads the information stored in the RFID chip, and then performs anti-counterfeiting verification on the attached object containing the RFID tag based on the information stored in the RFID chip. The read command includes the starting address of the information to be read. The starting address can be a mapped address, that is, not the actual address in the RFID chip. The RFID chip performs calculations based on the starting address and chip information to obtain the current target address. For example, the starting address, tag key, and unique identifier are calculated to obtain the current target address.

[0098] The current target address is the address of the memory block in the RFID chip, which is the address of the storage location in the RFID chip. This determines the actual storage address, making it easier to obtain the storage data corresponding to the actual storage address.

[0099] After determining the current target address based on chip information and the starting address, the RFID chip adds the storage capacity of the storage location corresponding to the current target address to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address. It then determines whether the total storage capacity corresponding to the current target address reaches the target capacity specified in the read instruction, or whether the current target address is zero. If not, it continues to calculate the next target address based on the stored data and tag key corresponding to the current target address, repeating this process until the total storage capacity corresponding to the current target address reaches the target capacity specified in the read instruction, or the current target address is zero. Once it is determined that the total storage capacity corresponding to the current target address has reached the target capacity specified in the read instruction, or that the current target address is zero, the calculation ends, and the RFID chip sends the stored data corresponding to each target address except for the one with the zero target address to the host computer. In other words, after determining a storage location based on chip information and starting address, the system continues to perform calculations based on the stored data at that location to obtain the next storage location. The system then continues to perform calculations based on the stored data at the next storage location until the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or the current target address is zero. In this case, the system sends the storage data corresponding to each target address other than zero to the host computer, thus realizing the sending of storage data from chained storage locations to the host computer.

[0100] S520 receives all the stored data sent by the RFID chip and performs anti-counterfeiting verification based on all the stored data.

[0101] Specifically, the host computer compares all stored data with preset data to perform anti-counterfeiting verification. This improves the security of information storage on the object containing the RFID tag, ensuring that only obtaining the unique identifier of the RFID chip or only obtaining the tag key will only retrieve the data corresponding to the starting address when reading information, failing to obtain the actual stored data and thus preventing successful anti-counterfeiting verification. Therefore, the technical solution of this embodiment improves the effectiveness of anti-counterfeiting and can perform anti-counterfeiting measures more effectively.

[0102] Based on the above technical solution, optionally, after the RFID tag formed by the RFID chip leaves the factory and before sending the read command to the RFID chip, the following method is also included:

[0103] Before the RFID tag leaves the factory, the tag key is determined according to the unique identifier and initial key sent by the RFID chip, and the tag key is sent to the RFID chip according to the third preset algorithm; wherein, the third preset algorithm includes block cipher algorithm, encryption algorithm, XOR algorithm or shift algorithm.

[0104] Specifically, before the RFID tag leaves the factory—that is, after the RFID tag is fabricated from the RFID chip—during the tag initialization process, the RFID chip sends its unique identifier to the host computer. The host computer then uses a third preset algorithm to calculate the tag key from the unique identifier and the initial key. The host computer sends the tag key to the RFID chip, which receives and stores the tag key, for example, in a read-only area, preventing it from being rewritten. This allows the RFID chip to determine the target address based on the tag key in subsequent operations.

[0105] This invention also provides a radio frequency identification chip. Figure 6 This is a schematic diagram of the structure of a radio frequency identification chip provided in an embodiment of the present invention, for reference. Figure 6 The radio frequency identification chip 100 includes a storage unit 101 and a logic unit 102; the logic unit 102 is used to execute the anti-counterfeiting method for radio frequency identification chips provided in any embodiment of the present invention.

[0106] The logic unit 102 is connected to the storage unit 101; the storage unit 101 is used to store the tag key and unique identifier.

[0107] The storage unit 101 may include a memory that can store the tag key and unique identifier, and can also store information about the attachment on which the RFID tag formed by the RFID chip is located, facilitating anti-counterfeiting verification of the attachment. The logic unit 102 includes an address translation circuit, which includes a logic arithmetic unit. The type of the logic arithmetic unit is determined according to a first preset algorithm and a fourth preset algorithm. Upon receiving a read instruction, the address translation circuit determines the current target address based on the starting address in the read instruction and the chip information of the RFID chip, and determines the next target address based on the stored data and tag key corresponding to the current target address. Since the logic unit 102 in the RFID chip 100 is used to execute the anti-counterfeiting method for RFID chips provided in any embodiment of the present invention, the RFID chip 100 possesses the same beneficial effects as the anti-counterfeiting method for RFID chips provided in any embodiment of the present invention, and will not be elaborated further here.

[0108] Based on the above technical solutions, Figure 7 This is a schematic diagram of another radio frequency identification chip provided in an embodiment of the present invention. Optionally, refer to... Figure 7 The logic unit 102 also includes an oscillation circuit, a filter circuit, an amplifier circuit, a modulation circuit, a demodulation circuit, an analog-to-digital converter circuit, and a digital-to-analog converter circuit.

[0109] Optionally, refer to Figure 7 The RFID chip 100 may also include an analog front-end 103 for converting electromagnetic signals received by the antenna into electrical signals. The analog front-end 103 includes a rectifier circuit, a voltage regulator circuit, a clock circuit, a modulation circuit, a demodulation circuit, a reset circuit, a tuning capacitor, and a random number generator, etc.

[0110] This invention also provides a radio frequency identification tag. Figure 8 This is a schematic diagram of the structure of a radio frequency identification tag provided in an embodiment of the present invention, for reference. Figure 8 The radio frequency identification tag 300 includes an antenna 200 and a radio frequency identification chip 100 provided in any embodiment of the present invention;

[0111] Antenna 200 is connected to RFID chip 100.

[0112] Specifically, by setting up the antenna 200, the RFID chip 100 can communicate with the reader or host computer through the antenna 200. Since the RFID tag 300 includes the RFID chip 100 provided in any embodiment of the present invention, the RFID tag 300 has the same beneficial effects as the RFID chip 100 provided in any embodiment of the present invention, and will not be described further here.

[0113] This invention also provides an anti-counterfeiting system. Figure 9 This is a schematic diagram of the structure of an anti-counterfeiting system provided in an embodiment of the present invention, for reference. Figure 9 The anti-counterfeiting system includes a radio frequency identification tag 300 and a host computer 400 provided in any embodiment of the present invention. The host computer 400 is used to execute the anti-counterfeiting method applied to the host computer provided in any embodiment of the present invention.

[0114] The anti-counterfeiting system includes an RFID tag 300 and a host computer 400 provided in any embodiment of the present invention. The host computer 400 in the anti-counterfeiting system is used to execute the anti-counterfeiting method applied to the host computer provided in any embodiment of the present invention. Therefore, the anti-counterfeiting system has the same beneficial effects as the anti-counterfeiting method provided in any embodiment of the present invention, which will not be described in detail here.

[0115] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0116] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. An anti-counterfeiting method, characterized in that, The anti-counterfeiting method, applied to radio frequency identification chips, includes: After the RFID tag formed by the RFID chip leaves the factory, when a read command is received, the current target address is determined according to the starting address in the read command and the chip information of the RFID chip; wherein, the chip information includes at least the tag key and a unique identifier; wherein, the starting address is a mapped address, and the current target address is the address of the memory block in the RFID chip, and the current target address is obtained by calculation from the starting address and the chip information; Add the storage capacity of the storage location corresponding to the current target address to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address; where the storage capacity of the storage location corresponding to the current target address is the data length of the stored data stored at the storage location corresponding to the current address. Determine whether the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or whether the current target address is zero; If the total storage capacity corresponding to the current target address does not reach the target capacity in the read instruction, and the current target address is not zero, determine the next target address based on the storage data corresponding to the current target address and the tag key, and return to execute the step of adding the storage capacity of the storage location corresponding to the current target address to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address. When the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or when the current target address is zero, the storage data corresponding to each target address other than the target address zero is sent to the host computer so that the host computer can perform anti-counterfeiting verification based on the received storage data.

2. The method according to claim 1, characterized in that, Determining the next target address based on the stored data corresponding to the current target address and the tag key includes: Based on the stored data corresponding to the current target address and the tag key, the next target address is determined according to the first preset algorithm corresponding to the current target address; wherein, the first preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm, or a shift algorithm.

3. The method according to claim 1, characterized in that, Add the storage capacity of the current target address to the total storage capacity of the previous target address to obtain the total storage capacity of the current target address, including: If the current target address is greater than the maximum storage address of the RFID chip, then according to the second preset algorithm, the current target address and the preset value are calculated to obtain the updated current target address, and the storage capacity of the storage location corresponding to the current target address is added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address; wherein, the second preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm or a shift algorithm.

4. The method according to claim 1, characterized in that, After the RFID tag formed by the RFID chip leaves the factory, upon receiving a read command, before determining the current target address based on the starting address in the read command and the chip information of the RFID chip, the process also includes: Before the RFID tag leaves the factory, the unique identifier of the RFID chip is sent to the host computer, so that the host computer can determine the tag key according to the unique identifier and the initial key, according to a third preset algorithm; wherein, the third preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm or a shift algorithm; Receive the tag key sent by the host computer.

5. The method according to any one of claims 1-4, characterized in that, Determining the current target address based on the starting address in the read instruction and the chip information of the RFID chip includes: Based on the starting address in the read instruction, the tag key, and the unique identifier, the current target address is determined according to the fourth preset algorithm; wherein, the fourth preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm, or a shift algorithm.

6. An anti-counterfeiting method, characterized in that, Applied to a host computer, the anti-counterfeiting method includes: After the RFID tag formed by the RFID chip leaves the factory, a read command is sent to the RFID chip. This allows the RFID chip to determine the current target address based on the starting address in the read command and the chip information of the RFID chip. The storage capacity of the storage location corresponding to the current target address is then added to the total storage capacity corresponding to the previous target address to obtain the total storage capacity corresponding to the current target address. It is then determined whether the total storage capacity corresponding to the current target address reaches the target capacity in the read command, or whether the current target address is zero. If the total storage capacity corresponding to the current target address does not reach the target capacity in the read command, and the current target address is not zero, the storage data corresponding to the current target address and the tag key are used to determine the target address. The next target address is determined until the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or the current target address is zero. When the total storage capacity corresponding to the current target address reaches the target capacity in the read instruction, or the current target address is zero, the storage data corresponding to each target address other than zero is sent to the host computer. The chip information includes at least a tag key and a unique identifier. The starting address is a mapped address, the current target address is the address of the memory block in the RFID chip, and the current target address is obtained by calculating the starting address and the chip information. The storage capacity of the storage location corresponding to the current target address is the data length of the stored data stored at the storage location corresponding to the current address. It receives all the stored data sent by the RFID chip and performs anti-counterfeiting verification based on all the stored data.

7. The method according to claim 6, characterized in that, After the RFID tag formed by the RFID chip leaves the factory, before sending the read command to the RFID chip, the process also includes: Before the RFID tag leaves the factory, the tag key is determined according to the unique identifier and initial key sent by the RFID chip, and the tag key is sent to the RFID chip according to a third preset algorithm; wherein, the third preset algorithm includes a block cipher algorithm, an encryption algorithm, an XOR algorithm or a shift algorithm.

8. A radio frequency identification chip, characterized in that, include: A storage unit and a logic unit; the logic unit is used to execute the anti-counterfeiting method according to any one of claims 1-5; The logic unit is connected to the storage unit; the storage unit is used to store the tag key and the unique identifier.

9. A radio frequency identification tag, characterized in that, include: Antenna and the radio frequency identification chip as described in claim 8; The antenna is connected to the radio frequency identification chip.

10. An anti-counterfeiting system, characterized in that, It includes the radio frequency identification tag and host computer as described in claim 9; the host computer is used to execute the anti-counterfeiting method as described in claim 6 or 7.

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