Method for embedding resistance in PCB and embedded resistance circuit board
Patent Information
- Application Number
- CN202511295196.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-11
- Publication Date
- 2026-09-08
- Estimated Expiration
- 2045-09-11
AI Technical Summary
[0004]然而,在上述的埋阻电路板产品制作方法中,对电阻层进行酸性蚀刻时的操作难度较大,主要原因在于:通常在制作埋阻铜箔时,会在电阻层表面覆设一层镍铬合金保护层;而采用普通的酸性蚀刻药液很难将其蚀刻掉,并且在蚀刻后,也容易在电阻层表面形成残留(即形成毛边、毛刺),从而造成电阻阻值波动范围较大、不稳定,很难达到要求的阻值范围
[0015] The beneficial effects of this invention are as follows: Compared with conventional methods for manufacturing embedded resistor circuit boards, the method for processing embedded resistors in PCB boards provided by this invention has the following advantages: ① This invention innovatively adopts a two-stage acid etching process, which can produce copper foil layer patterns and resistor layer patterns with smooth, burr-free peripheral surfaces. In particular, it ensures that the peripheral surface of the resistor layer pattern is smooth and burr-free, thereby effectively ensuring high resistance consistency and high precision of the resulting embedded resistors, resulting in high product yield and well meeting the production requirements of embedded resistor circuit boards. ② The temperature of the acid etching solution used in the two-stage acid etching process provided by this invention is not high temperature. In particular, the temperature of the acid etching solution used in the second stage acid etching process can be set at room temperature without heating. This simplifies the processing technology, reduces processing costs, and avoids defects such as peeling of the photosensitive dry film due to high temperature, improving the quality of acid etching processing and increasing product yield. ③ The processing method provided by this invention is reasonable and simple, and does not involve an immersion process, making it easy to operate and implement.
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Figure CN121126686B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit board technology, and in particular to a method for processing resistors embedded in a PCB board and a circuit board with embedded resistors. Background Technology
[0002] Embedded resistor circuit board products are a new type of PCB products that use embedded resistors (or embedded resistors) to replace traditional resistor components, making the products more flat and with better electrical performance.
[0003] Currently, the conventional manufacturing method for buried resistor circuit board products is as follows: S11, providing a buried resistor copper foil composed of a copper base layer and a resistor layer, and sequentially performing resist dry film coating, exposure, development, and alkaline etching on the buried resistor copper foil to create a pattern prototype on the copper base layer of the buried resistor copper foil; at that time, the pattern prototype is covered and protected by the resist dry film; S12, performing acid etching on the portion of the resistor layer exposed outside the resist dry film; S13, removing the resist dry film to expose the pattern prototype; S14, sequentially performing pretreatment, resist dry film coating, exposure, development, and alkaline etching on the pattern prototype to etch away a predetermined portion of the pattern prototype and expose part of the resistor layer, thus obtaining the buried resistor.
[0004] However, in the aforementioned methods for manufacturing buried resistor circuit boards, the acid etching of the resistor layer is quite challenging. This is primarily because a nickel-chromium alloy protective layer is typically applied to the surface of the resistor layer during the fabrication of the buried resistor copper foil. Ordinary acidic etching solutions struggle to remove this protective layer, and residues (burrs) are easily left on the resistor layer surface after etching. This results in a large and unstable resistance value, making it difficult to achieve the required resistance range. Therefore, existing methods for manufacturing buried resistor circuit boards suffer from high etching difficulty, high product scrap rates, and low yields, failing to adequately meet production needs.
[0005] In view of this, the present invention is hereby proposed. Summary of the Invention
[0006] To overcome the above-mentioned defects, the present invention provides a processing method for embedding resistors in a PCB board and an embedded resistor circuit board. The processing method is simple, reasonable, low in processing cost and easy to operate and implement. The embedded resistors produced have high resistance value consistency and high precision, and the product yield is high, which well meets the production needs of embedded resistor circuit board products.
[0007] The technical solution adopted by this invention to solve its technical problem is: a processing method for embedding resistors in a PCB board, comprising the following processing steps: S1: A buried resistive copper foil composed of a copper foil layer and a resistive layer is provided, and the buried resistive copper foil is laminated and fixed on the substrate with the resistive layer facing the substrate; wherein, the surface of the resistive layer is covered with a nickel-chromium alloy protective layer; S2: The buried copper foil is subjected to pretreatment, lamination, exposure, development, acid etching, and stripping processes in sequence to create an intermediate pattern layer composed of copper foil layer patterns and resistor layer patterns stacked together; wherein, the above-mentioned acid etching adopts a two-stage acid etching process, the raw material composition of the acid etching solution used in the two stages of acid etching is the same, and the acidity of the acid etching solution used in the second stage of acid etching is greater than that of the acid etching solution used in the first stage of acid etching, and the temperature of the acid etching solution used in the second stage of acid etching is room temperature, which is lower than that of the acid etching solution used in the first stage of acid etching, so as to make the periphery of the resistor layer pattern in the intermediate pattern layer smooth and burr-free; S3: The intermediate pattern layer is subjected to pretreatment, lamination, exposure, development, alkaline etching and stripping in sequence to etch away the preset part of the copper foil layer pattern on the intermediate pattern layer and expose the corresponding part of the resistor layer pattern, thereby obtaining the embedded resistor.
[0008] As a further improvement of the present invention, in S2 above, the acid etching solution used in both acid etching processes contains hydrochloric acid and sodium chlorate. Furthermore, in the first stage of acid etching, the concentration of hydrochloric acid in the acid etching solution is 2% to 3%; in the second stage of acid etching, the concentration of hydrochloric acid in the acid etching solution is 12% to 18%.
[0009] As a further improvement of the present invention, in the first stage of acid etching process, the concentration of hydrochloric acid in the acid etching solution is 2.5%; in the second stage of acid etching process, the concentration of hydrochloric acid in the acid etching solution is 15%.
[0010] As a further improvement of the present invention, in S2 above, the temperature of the acid etching solution in the first stage of acid etching process is 50℃±5℃.
[0011] As a further improvement of the present invention, in S2 above, the etching line speed used in the two acid etching processes is the same.
[0012] As a further improvement of the present invention, in S2 above, the copper foil layer pattern is obtained by acid etching of the copper foil layer, and the resistor layer pattern is obtained by acid etching of the resistor layer.
[0013] As a further improvement of the present invention, it also includes S4: covering the embedded resistor with a solder resist layer.
[0014] The present invention also provides a buried resistor circuit board, including a substrate and a buried resistor disposed on the substrate using the processing method for buried resistors in PCB boards as described in the present invention, and the substrate is provided with circuit patterns.
[0015] The beneficial effects of this invention are as follows: Compared with conventional methods for manufacturing embedded resistor circuit boards, the method for processing embedded resistors in PCB boards provided by this invention has the following advantages: ① This invention innovatively adopts a two-stage acid etching process, which can produce copper foil layer patterns and resistor layer patterns with smooth, burr-free peripheral surfaces. In particular, it ensures that the peripheral surface of the resistor layer pattern is smooth and burr-free, thereby effectively ensuring high resistance consistency and high precision of the resulting embedded resistors, resulting in high product yield and well meeting the production requirements of embedded resistor circuit boards. ② The temperature of the acid etching solution used in the two-stage acid etching process provided by this invention is not high temperature. In particular, the temperature of the acid etching solution used in the second stage acid etching process can be set at room temperature without heating. This simplifies the processing technology, reduces processing costs, and avoids defects such as peeling of the photosensitive dry film due to high temperature, improving the quality of acid etching processing and increasing product yield. ③ The processing method provided by this invention is reasonable and simple, and does not involve an immersion process, making it easy to operate and implement. Attached Figure Description
[0016] Figure 1 This is a flowchart of the processing method for embedding resistors in a PCB board as described in Embodiment 1 of the present invention; Figure 2 This is a schematic cross-sectional view of the intermediate plate obtained after the buried copper foil is laminated and fixed onto the substrate in Example 1. Figure 3 This is a schematic diagram of the cross-sectional structure of the intermediate graphic layer obtained in Example 1 from a first-view perspective; Figure 4 This is a schematic diagram of the cross-sectional structure of the intermediate graphic layer obtained in Example 1 from a second perspective; Figure 5 This is a schematic cross-sectional view of the embedded resistor obtained in Example 1.
[0017] Referring to the accompanying drawings, the following explanations are provided: 1. Embedded copper foil; 10. Copper foil layer; 100. Copper foil layer pattern; 11. Resistor layer; 110. Resistor layer pattern; 2. Substrate; 3. Intermediate pattern layer; 4. Embedded resistor; 5. Adhesive layer. Detailed Implementation
[0018] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0019] Example 1:
[0020] Please see the appendix Figure 1To be continued Figure 5 As shown, this embodiment 1 provides a method for embedding resistors in a PCB board, including the following processing steps: S1: A buried resistive copper foil 1 is provided, which is composed of a copper foil layer 10 and a resistive layer 11. The buried resistive copper foil 1, the adhesive layer 5, and the substrate 2 are stacked and then firmly bonded together by a lamination process to form an intermediate board. For details, please refer to the appendix. Figure 2 As shown.
[0021] In this embodiment, the specific material selection for the resistive layer 11 can be determined according to the design requirements of the circuit board product. For example, it can be, but is not limited to, metals or alloys such as tungsten and molybdenum, or nickel-phosphorus alloys, or polymer materials with resistive properties. The resistive layer 11 can be formed on the copper foil layer 10 by chemical deposition, electroplating, or sputtering. In addition, this embodiment does not impose any restrictions on the specific thickness of the copper foil layer 10 and the resistive layer 11. According to the design requirements of the circuit board product, this application also electroplats a nickel-chromium alloy protective layer (which is common knowledge) on the surface of the resistive layer 11.
[0022] The adhesive layer 5 can be made of materials such as prepreg, and the substrate 2 can be made of a board material with the circuit pattern already fabricated.
[0023] When the buried resist copper foil 1, the adhesive layer 5, and the substrate 2 are stacked, the copper foil layer 10 of the buried resist copper foil 1 is located on the outer side, and the resistive layer 11 faces the substrate 2. During lamination, the lamination process preferably employs an electrothermal lamination method with a maximum lamination temperature of not less than 230°C and a maximum lamination pressure of not less than 450 Psi, to reliably laminate and fix the buried resist copper foil 1 onto the substrate 2.
[0024] S2: The buried resistive copper foil 1 on the intermediate plate is subjected to pretreatment, lamination, exposure, development, acid etching, and stripping processes in sequence to create an intermediate pattern layer 3 composed of copper foil layer pattern 100 and resistive layer pattern 110 stacked together; see appendix for details. Figure 3 and attached Figure 4 As shown.
[0025] The aforementioned pretreatment process refers to degreasing and micro-etching the copper foil layer 10 to enhance the adhesion between the copper foil layer 10 and the photosensitive dry film in the subsequent process.
[0026] The aforementioned lamination process refers to applying an anti-corrosion photosensitive dry film onto the copper foil layer 10 using a vacuum laminator.
[0027] The aforementioned exposure and development process refers to LDI exposure of the photoresist dry film according to the exposure work data, followed by development using an alkaline developer to remove the unexposed portions of the photoresist dry film, resulting in a dry film pattern. It is understood that the dry film pattern is used to provide anti-corrosion protection for the portion of the buried copper foil 1 covered by it.
[0028] The aforementioned acid etching process refers to using an acidic etching solution to acid-etch the portion of the buried copper foil 1 that is exposed outside the dry film pattern, in order to create the intermediate pattern layer 3 composed of a copper foil layer pattern 100 and a resistor layer pattern 110 stacked together. It is understood that: ① the copper foil layer pattern 100 is obtained by acid etching the copper foil layer 10, and the resistor layer pattern 110 is obtained by acid etching the resistor layer 11. ② After the acid etching process is completed and before the film stripping process, the resulting intermediate pattern layer 3 is covered and protected by the dry film pattern.
[0029] It should be emphasized that when acid etching is performed on the buried copper foil 1, the reaction rate of the resistor layer 11 with the acid etching solution is slower than that of the copper foil layer 10 with the acid etching solution (mainly because the acid etching solution has difficulty etching away the nickel-chromium alloy protective layer, thus affecting the reaction rate of the resistor layer 11 with the acid etching solution). If conventional acid etching process is used to acid etch the buried copper foil 1, it is very easy to cause invisible burrs (or rough edges) to appear at the edge of the resistor layer pattern 110, resulting in a large and unstable resistance value fluctuation range of the buried resistors obtained in subsequent processes and a low product yield. To avoid the aforementioned problems, this application improves and optimizes the acid etching process by innovatively employing a two-stage acid etching process. In this process, the raw materials of the acid etching solution used in both stages are the same, but the acidity and temperature of the acid etching solution differ. Specifically: ① Both stages of the acid etching process use acid etching solutions containing hydrochloric acid (HCl) and sodium chlorate (NaClO3) (these two raw materials are core components of the acid etching solution). Understandably, HCl provides chloride ions to form soluble complexes with copper ions, enhancing etching ability, and also maintains the acidity of the solution to prevent copper ions from hydrolyzing and forming precipitates; sodium chlorate (NaClO3) acts as an oxidant to oxidize the monovalent copper ions generated during the etching process. Copper ions are oxidized to divalent copper ions, realizing the recycling of copper ions; ② The acidity of the acid etching solution used in the second stage acid etching process is greater than that of the acid etching solution used in the first stage acid etching process, and the temperature of the acid etching solution used in the second stage acid etching process is lower than that of the acid etching solution used in the first stage acid etching process. Specifically: in the first stage acid etching process, the concentration of hydrochloric acid in the acid etching solution is 2% to 3% (more preferably 2.5%), and the temperature of the acid etching solution is 50℃±5℃; in the second stage acid etching process, the concentration of hydrochloric acid in the acid etching solution is 12% to 18% (more preferably 15%), and the temperature of the acid etching solution is room temperature. Understandably, compared to the acidic etching solution used in the first stage of acidic etching, the acidic etching solution used in the second stage of acidic etching has a higher concentration of hydrochloric acid, which can achieve the effect of rapid etching of the resistive layer 11. Therefore, after the copper foil layer pattern prototype and the resistive layer pattern prototype are made by using the first stage of acidic etching, the copper foil layer pattern prototype and the resistive layer pattern prototype are then subjected to the second stage of acidic etching using a high-acidity acidic etching solution, so as to obtain the copper foil layer pattern 100 and the resistive layer pattern 110 with smooth and burr-free peripheral surfaces (in particular, ensuring that the peripheral surface of the resistive layer pattern 110 is smooth and burr-free), that is, the intermediate pattern layer 3 with precise resistance width W characteristics is obtained.In addition, since high-concentration hydrochloric acid has a rapid etching effect on the resistive layer 11, the temperature of the acid etching solution used in the second acid etching process can be at room temperature, without heating. This simplifies the processing technology, reduces processing costs, and avoids the problem of the photosensitive dry film peeling off due to high temperature, thereby improving the quality of the acid etching process and increasing the product yield.
[0030] In addition, in the two acid etching processes mentioned above, ① the etching line speed used in both acid etching processes is the same, which can be designed to be 2-5 m / min according to production needs, improving the connection and adaptability of the two acid etching processes; ② the sodium chlorate (NaClO3) concentration in the acid etching solution used in the two acid etching processes can be designed to be 12%-45% according to production needs; ③ the acid etching solution also contains auxiliary components such as sodium chloride (or ammonium chloride) and hydrogen peroxide (which are known technologies) to optimize etching capability. Note: Since this application mainly removes the burrs on the resistive layer pattern 110 by adjusting the acidity (i.e., hydrochloric acid concentration) of the acid etching solution in the two acid etching processes, and the influence of other raw material components on burr removal is negligible, other raw material components (such as sodium chloride, hydrogen peroxide, etc.) will not be described in detail here.
[0031] The above-mentioned stripping process refers to removing the dry film pattern using a stripping solution (a conventional stripping solution is sufficient), thereby exposing the intermediate pattern layer 3.
[0032] In addition, after completing the above-mentioned film removal process, the intermediate pattern layer 3 needs to be subjected to AOI optical inspection to determine whether the intermediate pattern layer 3 meets the design requirements; if any abnormality is found, it should be dealt with in a timely manner to avoid any omissions.
[0033] S3: The intermediate pattern layer 3 is subjected to pretreatment, lamination, exposure, development, alkaline etching, and stripping processes in sequence to etch away a predetermined portion of the copper foil layer pattern 100 on the intermediate pattern layer 3, thereby exposing a corresponding portion of the resistor layer pattern 110, thus obtaining the embedded resistor 4. For details, please refer to the appendix. Figure 5 As shown.
[0034] The "pretreatment, lamination, exposure, development, and stripping" processes described in S3 above can all employ the same or similar techniques as those in S2 (understandably, the exposure data in S2 and S3 are different), so they will not be elaborated upon here. In the alkaline etching process described in S3 above, the alkaline etching solution can be a conventional alkaline etching solution (such as one containing copper chloride, ammonia, ammonium chloride, etc.). Understandably, the alkaline etching solution only etches the copper foil layer 10 and does not etch the resistive layer 11.
[0035] As can be seen from the above, the width W of the embedded resistor 4 was made based on S2, and the length L of the embedded resistor 4 was made based on S3.
[0036] S4: A solder resist layer (such as a solder resist ink layer) is applied to the embedded resistor 4 to protect the embedded resistor 4.
[0037] As can be seen from the above, compared with the conventional manufacturing method of embedded resistor circuit board products, the PCB board embedded resistor processing method provided in this application has the following advantages: ① This application innovatively adopts a two-stage acid etching process, which can produce the copper foil layer pattern 100 and the resistor layer pattern 110 with smooth and burr-free peripheral surfaces. In particular, it ensures that the peripheral surface of the resistor layer pattern 110 is smooth and burr-free, thereby effectively ensuring high resistance consistency and high precision of the embedded resistor 4 obtained in the subsequent process, and high product yield, which well meets the production requirements of embedded resistor circuit board products. ② The temperature of the acid etching solution used in the two-stage acid etching process provided in this application is not high temperature. In particular, the temperature of the acid etching solution used in the second stage acid etching process can be at room temperature without heating. This simplifies the processing process, reduces processing costs, and avoids the defect of photosensitive dry film peeling off due to high temperature, improving the quality of acid etching processing and improving product yield. ③ The processing method provided in this application is reasonable and simple, without soaking process, and easy to operate and implement.
[0038] Example 2:
[0039] This embodiment 2 provides a buried resistor circuit board, which includes a substrate 2 and a buried resistor 4 disposed on the substrate 2 using the processing method of embedded resistors in PCB boards provided in embodiment 1 above, and the substrate 2 is provided with circuit patterns.
[0040] As can be seen from the above, the buried resistor circuit board obtained in this embodiment 2 has high resistance value consistency and high precision, and high product yield, which well meets the production needs.
[0041] Many specific details have been set forth in the foregoing description to provide a thorough understanding of the present invention. However, the above description is merely a preferred embodiment of the present invention, and the present invention can be implemented in many other ways different from those described herein. Therefore, the present invention is not limited to the specific embodiments disclosed above. Furthermore, any person skilled in the art can make many possible variations and modifications to the technical solutions of the present invention, or modify them into equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the present invention. Any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention, shall still fall within the protection scope of the present invention.
Claims
1. A method for fabricating embedded resistors in a PCB board, characterized in that: The processing steps include the following: S1: Provide a buried resistive copper foil (1) composed of a copper foil layer (10) and a resistive layer (11), and laminate the buried resistive copper foil (1) onto the substrate (2) with the resistive layer (11) facing the substrate (2); wherein, the surface of the resistive layer (11) is covered with a nickel-chromium alloy protective layer. S2: The buried copper foil (1) is subjected to pretreatment, lamination, exposure, development, acid etching and stripping in sequence to produce an intermediate pattern layer (3) composed of copper foil layer pattern (100) and resistor layer pattern (110) stacked together; wherein, the above acid etching adopts a two-stage acid etching process, the raw material composition of the acid etching solution used in the two stages of acid etching is the same, both containing hydrochloric acid and sodium chlorate; and in the first stage of acid etching, the concentration of hydrochloric acid in the acid etching solution is 2% to 3%; in the second stage of acid etching, the concentration of hydrochloric acid in the acid etching solution is 12% to 18%; and the temperature of the acid etching solution used in the second stage of acid etching is room temperature, which is lower than the temperature of the acid etching solution used in the first stage of acid etching, so as to make the periphery of the resistor layer pattern (110) in the intermediate pattern layer (3) smooth and burr-free; S3: The intermediate pattern layer (3) is subjected to pretreatment, lamination, exposure, development, alkaline etching and stripping in sequence to etch away the preset part of the copper foil layer pattern (100) on the intermediate pattern layer (3) and expose the corresponding part of the resistor layer pattern (110), thus obtaining the embedded resistor (4).
2. The method for embedding resistors in a PCB board according to claim 1, characterized in that: In the first stage of acid etching, the concentration of hydrochloric acid in the acid etching solution is 2.5%; in the second stage of acid etching, the concentration of hydrochloric acid in the acid etching solution is 15%.
3. The method for embedding resistors in a PCB board according to claim 1, characterized in that: In S2 above, during the first stage of acid etching, the temperature of the acid etching solution is 50℃±5℃.
4. The method for embedding resistors in a PCB board according to claim 1, characterized in that: In S2 above, the etching line speed used in the two acid etching processes is the same.
5. The method for embedding resistors in a PCB board according to claim 1, characterized in that: In the above S2, the copper foil layer pattern (100) is obtained by acid etching of the copper foil layer (10), and the resistor layer pattern (110) is obtained by acid etching of the resistor layer (11).
6. The method for embedding resistors in a PCB board according to claim 1, characterized in that: It also includes S4: covering the embedded resistor (4) with a solder resist layer.
7. A buried resistor circuit board, characterized in that: The substrate (2) includes a substrate (2) and an embedded resistor (4) disposed on the substrate (2) using the processing method of embedding resistors in a PCB board as described in any one of claims 1 to 6, and the substrate (2) is provided with a circuit pattern.
Citation Information
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