High-layer pcb board nonlinear expansion and contraction abnormal coefficient compensation method and pcb board

Abstract

This invention relates to the field of PCB boards, specifically to a method for compensating for nonlinear expansion and contraction anomalies in high-layer PCB boards. The method adds a step S0 before the original step S1, employing a nonlinear mosaic design to revise the nonlinear expansion and contraction model into a linear one. Between the original steps S3 and S4, a step S34 is added to perform the first measurement on each core layer, repeating steps S2 and S3, and continuing with S4. Between the original steps S4 and S5, a step S45 is added to perform a second measurement on each core layer, repeating steps S2 to S4, and continuing with S5. Through the nonlinear mosaic design, the nonlinear expansion and contraction of the core board is revised into linear expansion and contraction. Multiple baking processes improve the dimensional stability of the PCB board, ensuring that subsequent expansion and contraction are not excessive. Multiple measurements of the expansion and contraction coefficient can continuously correct the expansion and contraction performance of each core layer, allowing each core layer to receive specific expansion and contraction compensation according to the designed copper thickness requirements. This ensures that even core layers with irregular graphic designs are compensated consistently, improving the accuracy of hole positions.

Description

Technical Field

[0001] This invention relates to the field of PCB manufacturing, and more specifically, to a method for compensating for nonlinear expansion and contraction anomaly coefficients in high-layer PCBs and the PCB itself. Background Technology

[0002] With the widespread adoption of HDI (High-Density Interconnect PCBs) and high-multilayer high-speed circuit boards (especially in 224GHz servers), the production of complex PCBs, particularly those employing high-multilayer, high-density, and high-reliability interconnect technologies, demands extremely high hole-position accuracy compared to ordinary PCBs. This is especially true in high-layer and multilayer boards, where the increased number of layers, denser circuitry, and vias necessitates precise hole-position alignment. Ensuring accurate hole-position alignment is crucial for connecting precise upper and lower holes and circuitry. Insufficient hole-position accuracy can lead to poor connections between inner and outer layer circuitry, causing open or short circuits and impacting the electrical reliability of the PCB. High-precision hole-position alignment ensures accurate alignment of circuitry across layers, reducing electrical connection problems.

[0003] Therefore, minimizing or controlling the impact of hole position accuracy on the performance of high-layer and multi-layer boards is crucial. Traditional solutions for handling inconsistent PCB expansion and contraction involve pre-calculating coefficients based on experience. These coefficients are not always accurate and require four test boards before lamination. After lamination, the coefficients for each layer are standardized, resulting in a more accurate final coefficient. This final coefficient is then used to correct misalignment or deviation caused by inconsistent expansion and contraction across layers. A conventional approach involves measuring the PCB's expansion and contraction after lamination to provide compensation drill tape for stretched PCBs. This compensation is applied linearly across all layers, resulting in square compensation. However, the irregular pattern design of current high-speed, high-layer, and high-frequency boards leads to the release of gravity after etching, resulting in irregular expansion and contraction—non-linear expansion and contraction (e.g., rhomboid or trapezoidal expansion and contraction). Conventional linear square compensation cannot account for anomalies in every area. Therefore, the coefficient provided after the final lamination cannot guarantee consistent expansion and contraction across all layers; it only provides a rough average. This means that the uniform linear compensation drill strip system cannot accurately compensate for the hole position accuracy of each layer; it can only take the average value of each layer, resulting in low alignment accuracy. Summary of the Invention

[0004] The present invention aims to overcome at least one of the defects (deficiencies) of the prior art and provide a method for compensating the nonlinear expansion and contraction anomaly coefficient of high-layer PCB boards. This method solves the problem that the traditional uniform linear compensation drill tape system cannot accurately compensate for the hole position accuracy of each layer and can only take the average value of each layer, resulting in low alignment accuracy.

[0005] The technical solution adopted in this invention is a method for compensating for nonlinear expansion and contraction anomalies in high-layer PCBs, comprising the following steps:

[0006] S1, Pre-set expansion / contraction coefficient;

[0007] S2, Graphic Transfer;

[0008] S3, Inner layer etching;

[0009] S4, browning treatment;

[0010] S5, fusion and pressure plate;

[0011] S6 and PL machines measure the expansion and contraction coefficient of the core board.

[0012] S7. Compensate the core board and provide the formal coefficients;

[0013] S8. Use formal coefficients to create formal versions;

[0014] Add step S0 before step S1: first use nonlinear jigsaw puzzle design to revise the nonlinear expansion and contraction model into a linear expansion and contraction model.

[0015] Add step S34 between steps S3 and S4, perform a second measurement on each core layer, and repeat steps S2 and S3, then continue with S4;

[0016] Add step S45 between steps S4 and S5, perform a third measurement on each core layer, and repeat steps S2 to S4, then continue with S5.

[0017] For high-speed, high-layer, and high-frequency PCBs, the pattern design is irregular. After etching, the original all-copper layout becomes a special copper distribution with patterns, leading to uneven stress release and irregular expansion and contraction, i.e., non-linear expansion and contraction, such as rhomboid or trapezoidal expansion and contraction. Even after compensation of the core board, each core layer still exhibits non-linear expansion and contraction, such as rhomboid or trapezoidal expansion and contraction. By adopting a non-linear mosaic design, the non-linear expansion and contraction is first corrected to linear expansion and contraction, and then the above-mentioned multi-layer PCB expansion and contraction coefficient compensation scheme is used. This can compensate each core layer to be consistent, improving the accuracy of hole positions. The new process flow involves multiple measurements and compensations of the inner core layers, improving the dimensional stability of the inner core layers and increasing the control and measurement of expansion and contraction. Multiple baking processes can improve the dimensional stability of the PCB, ensuring that subsequent shrinkage or stretching is not excessive. Multiple measurements of the expansion and contraction coefficient can continuously correct the expansion and contraction performance of each core layer, ensuring that the expansion and contraction of each core layer can be specifically compensated according to the design copper thickness requirements, thereby compensating each core layer to be consistent and improving the accuracy of hole positions.

[0018] Furthermore, the step S0 of revising the nonlinear expansion and contraction into linear expansion and contraction includes the following steps:

[0019] S01, Pre-set coefficients, and use the pre-set coefficients for graphic transfer;

[0020] SO2, browning treatment, followed by fusion and pressing;

[0021] S03. Perform the first measurement on the core board to obtain the nonlinear expansion and contraction coefficient ratio;

[0022] S04. Create a non-linear jigsaw puzzle design and revise the non-linear expansion and contraction to linear expansion and contraction.

[0023] Before receiving the customer's drawings, the expansion and contraction direction of the core board and the expansion and contraction ratio of each unit in each process are unknown. Through the above process test, the non-linear expansion and contraction ratio of the core board can be determined so that it can be revised to linear expansion and contraction.

[0024] Furthermore, step S34 includes etching and baking each core layer after etching, then measuring the expansion and contraction coefficient a second time, and compensating each core layer to be consistent.

[0025] After etching, the inconsistent stress on the core board due to differences in copper design and distribution patterns leads to changes in expansion and contraction. Baking after etching can improve the dimensional stability caused by uneven copper distribution after etching. Etching causes abrupt shrinkage of the copper area; baking stabilizes this shrinkage. A second measurement using a PL machine is used to measure the expansion and contraction changes caused by pattern differences after etching, and the coefficients are revised based on the second measurement results to compensate for the expansion and contraction of the core board caused by etching.

[0026] Furthermore, step S45 includes baking each core layer after browning, then measuring the expansion and contraction coefficient for the third time, and compensating each core layer to be consistent.

[0027] After browning, a wet process is performed. Baking after browning removes moisture and further improves the dimensional stability of the core board, preventing severe deformation and abnormal expansion / contraction during the high-temperature, high-pressure lamination process. Baking after browning causes expansion / contraction in the core board. A PL (Pressure Propeller) machine is used to measure the expansion / contraction changes caused by browning and post-browning processes a third time. Based on the results of this third measurement, coefficients are revised to compensate for the expansion / contraction caused by browning and post-browning baking. This third measurement further corrects for the impact of the wet browning process on expansion / contraction, providing a final expansion / contraction coefficient before lamination, allowing for coefficient revisions for the high-temperature, high-pressure lamination process.

[0028] Furthermore, step S001, which involves baking the core board upon arrival, is added between steps S0 and S1.

[0029] Baking the incoming material can increase the dimensional stability of the core board, making it less susceptible to changes in its expansion and contraction due to high temperature and high humidity processes.

[0030] Furthermore, in step S001, the baking temperature of the core board material is 10-20 degrees higher than the material Tg, and the baking time is 1.5-2.5 hours.

[0031] Material Tg refers to the critical temperature at which the substrate transitions from a hard and brittle glassy state to a soft and elastic state. If the baking temperature is below the material Tg, the baking energy will be absorbed, failing to achieve the desired effect. Conversely, excessively high baking temperatures will directly damage the mechanical, electrical, and process reliability of the core board. Furthermore, excessively long baking times will impair the reliability and processability of the core board through thermal aging, oxidation, and stress accumulation.

[0032] Furthermore, the baking time after etching is longer than the baking time after receiving the material and the baking time after browning.

[0033] The baking time after etching needs to be longer than the baking time of the incoming material and the baking time of the subsequent browning. Preferably, it should be one hour longer than the baking time of the incoming material and the baking time after browning, i.e., 2.5 to 3.5 hours. The purpose is mainly that the area distribution of copper changes abruptly after etching, and the difference in expansion and contraction is obvious. Using a long baking time can fix the abnormal expansion and contraction in one go, effectively preventing further shrinkage or stretching in the future.

[0034] Furthermore, during the graphic transfer in step S2, the alignment method of the LDI positioning hole drilling process is used to improve the accuracy of the upper and lower alignment of the graphic.

[0035] This invention uses drilling to achieve alignment, which avoids the UV light emitter's retainer from loosening due to repeated movements, thus preventing a decrease in positioning accuracy and misalignment of the upper and lower target points. The average FTB (Fixed Tolerance) using traditional point alignment is 0.908 mil, while the average FTB using the LDI (Low Difference Identification) positioning hole drilling process is 0.527 mil, representing a 43.1% improvement in accuracy.

[0036] Furthermore, the LDI positioning hole process includes first drilling the positioning hole with a small drill bit, and then enlarging the hole with a large drill bit.

[0037] Before applying the dry film to the core board, positioning holes are drilled on the core board using a small drill bit. These positioning holes penetrate both the upper and lower surfaces of the core board. Then, the positioning holes are enlarged using a large drill bit, with different diameters to achieve directional positioning. The core board with the drilled holes is then fitted with the dry film, and the upper and lower patterns are aligned using an LDI (Low Displacement Diode) to ensure alignment accuracy. This drilling method avoids drill bit misalignment or tilting during drilling, further ensuring the alignment accuracy of the upper and lower patterns.

[0038] Furthermore, a multilayer PCB board manufactured using claims 1 to 9.

[0039] The present invention also provides a multilayer PCB board manufactured using claims 1 to 9. The core boards of each layer of this multilayer PCB board undergo multiple baking and compensation processes, and after lamination, each core board is compensated to be consistent, resulting in high hole position accuracy. This ensures precise alignment of the circuits in each layer and improves the reliability of electrical performance.

[0040] Compared with existing technologies, the beneficial effects of this invention are as follows: By reducing the design of pattern expansion and contraction schemes, nonlinear stretching mosaic design, and multi-unit symmetrical layout mosaic design, the nonlinear expansion and contraction of the core board is revised to linear expansion and contraction. Then, through multiple baking processes, the dimensional stability of the PCB board is improved, ensuring that subsequent shrinkage or stretching will not be excessive. Multiple measurements of the expansion and contraction coefficient can continuously correct the expansion and contraction performance of each core board layer, so that the expansion and contraction of each core board layer can be specially compensated according to the design copper thickness requirements. This compensates even core boards with irregular pattern designs to be consistent, improves the accuracy of hole positions, ensures the precise alignment of circuits in each layer, and improves the reliability of the electrical performance of multilayer PCB boards. In step S34, each core board layer after etching is baked, and the expansion and contraction coefficient is measured a second time to compensate each core board layer to be consistent. This improves the dimensional stability of the core board after etching and compensates for the expansion and contraction changes caused by differences in the pattern after etching. In step S45, each core board layer after browning is baked, and the expansion and contraction coefficient is measured a third time to compensate each core board layer to be consistent. On the one hand, it eliminates moisture generated during the browning process; on the other hand, it further improves the dimensional stability of the core board, preventing severe deformation and abnormal expansion / contraction during the high-temperature, high-pressure lamination process. It also compensates for the expansion / contraction caused by browning and subsequent baking, providing a final expansion / contraction coefficient before lamination and revising the coefficient for high-temperature, high-pressure lamination. Using a higher temperature for incoming material baking increases the dimensional stability of the core board, making it less susceptible to changes in expansion / contraction due to the high-temperature, high-humidity process. After etching, the copper area distribution undergoes abrupt changes, resulting in significant expansion / contraction differences. Prolonged baking can fix these abnormal expansion / contractions in one go, effectively preventing further shrinkage or stretching. This invention also uses an LDI positioning hole drilling process for alignment, avoiding the loosening of the UV light emitter caused by multiple movements in traditional point-to-point alignment methods, which leads to decreased positioning accuracy and misalignment of upper and lower target points. During drilling, a small drill bit is used to drill the positioning hole first, followed by a large drill bit to enlarge the hole, preventing misalignment and skewed drilling. Attached Figure Description

[0041] Figure 1 This is a process flow diagram of the nonlinear expansion and contraction compensation scheme of the present invention.

[0042] Figure 2a This is a conventional method for aligning the upper and lower patterns on an LDI laser exposure machine.

[0043] Figure 2b This is a schematic diagram showing the UV light emitter after it has become loose.

[0044] Figure 3a A schematic diagram of drilling holes for LDI positioning.

[0045] Figure 3b This is a schematic diagram of applying dry film after drilling holes in the core board.

[0046] Figure 4 This is a virtual pad design for low residual copper ratio.

[0047] Figure 5 This is a design drawing of virtual pads and solar-emitting copper foil when the residual copper ratio is medium.

[0048] Figure 6 Design drawing for solar-emitting copper foil with high residual copper ratio.

[0049] Figure 7 This is a schematic diagram showing the diamond-shaped expansion and contraction of the core board.

[0050] Figure 8 This is a schematic diagram illustrating the stretching of a rhomboid shape during expansion and contraction.

[0051] Figure 9 This is a schematic diagram of the trapezoidal expansion and contraction of the core board.

[0052] Figure 10 This is a schematic diagram of stretching a trapezoid during expansion and contraction.

[0053] Figure 11 This is one of the schematic diagrams for a non-uniform copper panel design.

[0054] Figure 12 This is the second schematic diagram of a non-uniform copper panel design.

[0055] Figure 13 This is the third schematic diagram of a non-uniform copper panel design. Detailed Implementation

[0056] The accompanying drawings are for illustrative purposes only and should not be construed as limiting the invention. To better illustrate the following embodiments, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions; it is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0057] Example 1

[0058] The irregular pattern design of high-speed, high-density, and high-frequency PCBs can lead to stress release after etching, resulting in irregular expansion and contraction, such as non-linear expansion and contraction, like rhomboid or trapezoidal expansion and contraction. Even after compensation, non-square expansion and contraction, such as rhomboid or trapezoidal expansion and contraction, still persists, failing to account for anomalies in every area. Therefore, it is necessary to first revise the non-linear expansion and contraction model to a linear one, and then perform multiple measurements and compensations on each core layer, continuously correcting the expansion and contraction behavior of each core layer. This ensures that the expansion and contraction of each core layer can be specifically compensated according to the designed copper thickness requirements, thereby compensating for irregular patterns on the core boards to a consistent level and improving the accuracy of hole positions. Figure 1 As shown, a method for compensating for nonlinear expansion and contraction anomalies in high-layer PCBs includes the following steps:

[0059] S0. First, a non-linear jigsaw puzzle design is used to revise the non-linear expansion and contraction model into a linear expansion and contraction model. The steps for revising the non-linear expansion and contraction model into a linear expansion and contraction model are as follows:

[0060] S01, Pre-set coefficients, and use the pre-set coefficients for graphic transfer;

[0061] SO2, browning and baking, followed by fusion and pressing;

[0062] S03. Perform the first measurement on the core board to obtain the nonlinear expansion and contraction coefficient ratio;

[0063] S04. Create a non-linear jigsaw puzzle design and revise the non-linear expansion and contraction to linear expansion and contraction.

[0064] Based on the first measurement results in S03, a non-linear jigsaw puzzle design is created, which can revise the non-linear expansion and contraction into linear expansion and contraction.

[0065] S001. Baking the incoming material; the baking temperature here needs to be higher than the material Tg, preferably 10 to 20 degrees higher than the material Tg, and the baking time is 1.5 to 2.5 hours.

[0066] S1. Estimated expansion / contraction coefficient: Based on the graphics and materials provided by the customer, the expansion / contraction coefficient is estimated. This coefficient is estimated based on experience and is not very accurate.

[0067] S2, Graphic Transfer;

[0068] Pattern transfer requires ensuring the alignment accuracy of the upper and lower patterns on the core board, such as... Figure 2a As shown, the traditional method involves applying a dry film to the core board and then using UV light to create four target points (one large and one small) on the top and bottom of the dry film. The different sizes of the target points help distinguish the orientation. Figure 2b As shown, however, with repeated movement of the fixture fixing the UV light emitter, the fixture may loosen, resulting in decreased positioning accuracy and misalignment of the upper and lower target points, thus affecting accuracy. For example... Figure 3a , Figure 3b As shown, this invention uses drilling to achieve alignment. Before applying the dry film to the core board, positioning holes are drilled into the core board, penetrating both the upper and lower surfaces. These positioning holes are then enlarged to different diameters to distinguish the positioning direction. The core board with the drilled holes is then coated with the dry film, and an LDI (Low Displacement Diode) is used to capture the drilled target points for vertical alignment, ensuring the alignment accuracy of the upper and lower patterns. Using a small drill bit for initial positioning and then a large drill bit for enlargement effectively prevents misalignment or skewing, thus ensuring perpendicularity and improving the alignment accuracy of the upper and lower patterns.

[0069] S3, Inner layer etching;

[0070] S34. Perform a second measurement on each core layer, and repeat steps S2 and S3, then continue to S4; step S34 includes etching and baking each core layer after etching, then measuring the expansion and contraction coefficient for the second time, and compensating each core layer to be consistent.

[0071] After etching, the copper area distribution undergoes abrupt changes, resulting in significant differences in expansion and contraction. Baking effectively prevents further shrinkage or stretching. The baking time here needs to be longer than the initial material baking time and the subsequent browning baking time. Preferably, the baking time here is 2.5–3.5 hours to fix the expansion and contraction. The baking temperature is 10–20 degrees Celsius higher than the material's Tg. A second measurement using a PL machine is performed to determine the expansion and contraction changes caused by pattern differences after etching. Based on the second measurement results, adjustments are made to compensate for the expansion and contraction of the core board caused by etching. Step S34 has already compensated each core board layer to be consistent. Therefore, the board is remade using the expansion and contraction coefficient measured in the second step, and steps S2 and S3 are repeated. At this point, the expansion and contraction of each core board layer is consistent, and there will be no situation where some layers shrink while others stretch.

[0072] S4, browning treatment;

[0073] S45. Perform a third measurement on each core layer, and repeat steps S2 to S4, then continue to S5; step S45 includes baking each core layer after browning, then measuring the expansion and contraction coefficient for the third time, and revising according to the results of the third measurement to compensate each core layer to be consistent.

[0074] Browning involves a wet process. Baking after browning removes moisture and further improves the dimensional stability of the core board, preventing severe deformation and abnormal expansion / contraction during the high-temperature, high-pressure lamination process. The baking temperature is 10-20 degrees Celsius higher than the material's Tg, and the preferred baking time is 1.5-2.5 hours. During browning and baking, the core board will experience expansion / contraction. A third measurement and compensation ensure that the expansion / contraction of each core layer is specifically compensated according to the designed copper thickness requirements. Step S45 has already compensated each core layer to be consistent. Therefore, the board is remade using the expansion / contraction coefficient from the third measurement, and steps S2-S4 are repeated. At this point, the expansion / contraction of each core layer is consistent, preventing some layers from shrinking while others stretch.

[0075] S5. Welding and pressing; check the alignment of the fusion plates and press them; during the pre-alignment of the fusion, it is necessary to observe the alignment and expansion / contraction of each layer to ensure that the core plates of each layer have been compensated to be consistent before pressing.

[0076] The S6 and PL machines measure the expansion and contraction coefficient of the core board. The pressing process involves high temperature and high pressure, and due to the differences in the patterns on each core board, its expansion, contraction, and dimensional stability will also change. Therefore, it is necessary to measure again.

[0077] S7. Compensate the core board and give the official coefficient; all core boards have been compensated to be consistent, so the coefficient given at this time is the official coefficient. Make the board again according to this compensation coefficient, and the expansion and contraction of each core board will be consistent.

[0078] S8. Use the formal coefficient to make the formal board. In step S7, all core layers have been compensated to be consistent. The formal board made according to this formal coefficient should provide a 1:1 ratio of drill tape to the drilling room, without the need for special compensation.

[0079] By using the nonlinear expansion and contraction anomaly coefficient compensation method for high-layer PCBs, the yield of PCB alignment after lamination can be improved to 83% with an alignment accuracy of less than 2.7 mil, while the yield of ordinary process alignment with an alignment accuracy of less than 2.7 mil is only 11%, resulting in an overall yield improvement of 72%.

[0080] Example 2

[0081] This embodiment is one of the non-linear pattern design solutions. It addresses the issue of a single large unit on the entire board, where non-linear expansion and contraction occur in the core layers. The solution reduces this expansion and contraction, correcting the non-linear expansion and contraction to linear expansion and contraction. This solution primarily utilizes different board edge enclosure designs based on the residual copper ratio of the customer's pattern.

[0082] When the residual copper content of the pattern is ≤30%, the copper-free area occupies the majority of the pattern, resulting in significant pattern shrinkage. Using virtual pads with similar residual copper content to fill the area around the pattern and the board frame ensures uniform shrinkage across the entire board surface. Uniform shrinkage reduces the risk of non-linear expansion and contraction, and the ratio of virtual pad size to spacing should be greater than 6:1. Smaller spacing and larger virtual pads ensure uniform shrinkage of the board edges and pattern while maintaining overall board rigidity, preventing brittle core boards and the risk of bending. As shown in Figure 3, the virtual pads are circular, 95 mil in size, with a spacing (edge ​​to edge) of 10 mil. Actual sizes need to be adjusted based on the residual copper content of the pattern; excessive spacing can lead to rapid and uneven shrinkage. This design reduces abnormal shrinkage caused by abrupt changes in copper area after etching, resulting in uniform shrinkage across the board edges.

[0083] When the residual copper content of the pattern is >30% and ≤65%, the proportions of copper-containing and copper-free areas are balanced, but the proportion of copper-free areas is still slightly larger than that of copper-containing areas. The pattern will shrink to some extent. Therefore, near the edge of the pattern, a virtual pad design with a medium residual copper content should be used to ensure a certain amount of shrinkage, making the pattern shrink evenly. A large, sunburst copper strip design should be used at the board edge to stretch the shrinkage, neutralizing the stress release tension in the copper-free areas after etching. While maintaining uniform pattern shrinkage, the large copper surface at the board edge provides some tension to the pattern, preventing excessive shrinkage. The large copper surface at the board edge also ensures good rigidity of the etched board. The distance between the copper strip and the board edge should be no less than 1.5 inches to ensure the rigidity and tensile strength of the board. Figure 4 As shown, this diagram uses a square virtual pad, and the current graphic is also square, consistent with the shrinkage stress of the graphic. Of course, it can also be designed as a circle, square, hexagon, or other shapes depending on the graphic requirements.

[0084] like Figure 5 As shown, when the residual copper content of the pattern is greater than 65%, the copper area accounts for the majority of the pattern shrinkage. The copper area in the pattern provides a pulling force when the pattern shrinks. Therefore, using a solar radiating copper foil design with a high residual copper content provides a pulling force to the pattern when the pattern shrinkage is small, in order to offset the shrinkage effect caused by the change in copper area after etching.

[0085] Example 3

[0086] This embodiment is a second non-linear jigsaw puzzle design scheme. For graphics with multiple units, a non-linear stretching jigsaw puzzle design is adopted, revising the non-linear expansion and contraction into linear expansion and contraction. The shrinking units are non-linearly stretched and shrunk. For example... Figure 6As shown, the copper-free areas in the lower left and upper right corners lack support, leading to contraction. The copper-containing areas in the upper left and lower right corners provide support, resulting in less contraction. The copper-free areas diagonally opposite each other cause stress release, pulling the area diagonally towards the opposite corner and forming a diamond-shaped expansion and contraction pattern. Figure 7 As shown, at this point, the shrinking lower left and upper right corner units can be stretched from the center to the corners to counteract the shrinkage caused by stress release in the copper-free area after etching.

[0087] like Figure 8 As shown, the copper area is on top, and the copper-free area is on the bottom. After etching, the copper-free area shrinks due to stress release, while the copper area shrinks less, thus forming a trapezoidal shape that is narrower at the bottom and wider at the top. Figure 9 As shown, at this point, the two lower units can be stretched from the center to the two lower corners to counteract the shrinkage caused by stress release in the copper-free area after etching.

[0088] This solution is not only effective for multiple unit puzzles, but also for a single unit that can be stretched and adjusted with the center of the board as the center.

[0089] Example 4

[0090] This embodiment is the third nonlinear jigsaw puzzle design scheme. For multi-unit designs with uneven residual copper ratio in the inner layer, in order to reduce the uneven stress distribution on the core board surface, a multi-unit symmetrical layout jigsaw puzzle design is adopted. The design of connecting copper-free areas of different units is prohibited to offset the gravitational release caused by uneven copper surface, thereby revising the nonlinear expansion and contraction into linear expansion and contraction.

[0091] like Figure 10 As shown, the copper surface in the circuit board unit has a non-uniform structure, including asymmetrically distributed copper areas and copper-free areas. The copper-free area is located at one corner of the copper area. The copper-free areas of two adjacent circuit board units are staggered or parallel to each other through the copper areas at adjacent corners. The copper-free areas of two or more circuit board units set on the same core board are staggered.

[0092] like Figure 11 As shown, the copper surface in the circuit board unit has a non-uniform structure, including asymmetrically distributed copper areas and copper-free areas. The copper-free areas are located on one side of the copper areas. The copper-free areas of two adjacent circuit board units are staggered or parallel to each other through the copper areas on one side. The copper-free areas of two or more circuit board units set on the same core board are staggered.

[0093] like Figure 12 As shown, the copper surface in the circuit board unit has a non-uniform structure, including asymmetrically distributed copper areas and copper-free areas. The copper-free areas are located within the copper areas and are eccentrically positioned. The copper-free areas of two adjacent circuit board units are separated from each other by the copper areas on the other side of the eccentricity, or are arranged side by side. The copper-free areas of two or more circuit board units located in the same core board are arranged in a staggered manner.

[0094] Example 5

[0095] This embodiment provides a multilayer PCB board, which is manufactured using the technical solutions of embodiments 1 to 4 above, either individually or in combination.

[0096] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the technical solution of the present invention, and are not intended to limit the specific implementation of the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the claims of the present invention should be included within the protection scope of the claims of the present invention.

Claims

1. A method for compensating for nonlinear expansion and contraction anomalies in high-layer PCBs, comprising the following steps: S1, Pre-set expansion / contraction coefficient; S2, Graphic Transfer; S3, Inner layer etching; S4, browning treatment; S5, fusion and pressure plate; S6 and PL machines measure the expansion and contraction coefficient of the core board. S7. Compensate the core board and provide the formal coefficients; S8. Use formal coefficients to create formal versions; Its features are: Add step S0 before step S1: first use nonlinear jigsaw puzzle design to revise the nonlinear expansion and contraction model into a linear expansion and contraction model. A step S34 is added between steps S3 and S4. Step S34 includes etching and baking each core board after etching, then measuring the expansion and contraction coefficient for the second time, compensating each core board to be consistent, and repeating steps S2 and S3, and continuing to S4. A step S45 is added between steps S4 and S5. Step S45 includes baking each core board after browning, then measuring the expansion and contraction coefficient for the third time, compensating each core board to be consistent, and repeating steps S2 to S4, and continuing to S5.

2. The method for compensating for nonlinear expansion and contraction anomalies in high-layer PCBs according to claim 1, characterized in that: Step S0, revising the nonlinear expansion and contraction to linear expansion and contraction, includes the following steps: S01, Pre-set coefficients, and use the pre-set coefficients for graphic transfer; SO2, browning treatment, followed by fusion and pressing; S03. Perform the first measurement on the core board to obtain the nonlinear expansion and contraction coefficient ratio; S04. Create a non-linear jigsaw puzzle design and revise the non-linear expansion and contraction to linear expansion and contraction.

3. The method for compensating for nonlinear expansion and contraction anomaly coefficients in high-layer PCBs according to any one of claims 1 to 2, characterized in that, A step S001 is added between steps S0 and S1: baking the core board upon arrival.

4. The method for compensating for nonlinear expansion and contraction anomalies in high-layer PCBs according to claim 3, characterized in that, In step S001, the baking temperature for the core board is 10-15 degrees higher than the material Tg, and the baking time is 1.5-2.5 hours.

5. The method for compensating for nonlinear expansion and contraction anomalies in high-layer PCBs according to claim 3, characterized in that, The baking time after etching is longer than the baking time after receiving the material and the baking time after browning.

6. The method for compensating for nonlinear expansion and contraction anomalies in high-layer PCBs according to claim 3, characterized in that, In step S2, during graphic transfer, the alignment method of the LDI positioning hole drilling process is used to improve the accuracy of the graphic's vertical alignment.

7. The method for compensating for nonlinear expansion and contraction anomalies in high-layer PCBs according to claim 6, characterized in that, The LDI positioning hole drilling process includes first drilling the positioning hole with a small drill bit, and then enlarging the hole with a large drill bit.

8. A multilayer PCB board, characterized in that, It is manufactured using the nonlinear expansion and contraction anomaly coefficient compensation method for high-layer PCB boards as described in any one of claims 1 to 7.

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