Method for optimizing the voltage withstanding capability of super junction products

Abstract

The application provides a method for optimizing the voltage resistance of a super-junction product, which comprises the following steps: providing a semiconductor substrate with a cell region and a terminal region, and forming alternating P-type columns and N-type drift regions in the cell region; and injecting P-type impurities in the terminal region. By means of compensatory doping in the terminal region, the charge balance of the terminal region can be adjusted, so that the optimal charge matching condition of the terminal region is closer to the optimal charge matching condition of the cell region. The application can significantly improve the overall voltage resistance of the product, effectively widen the process window, and improve the yield and reliability of the product.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for optimizing the withstand voltage capability of superjunction products. Background Technology

[0002] Superjunction power devices are advanced power devices that utilize the charge compensation principle to achieve high voltage withstand and low on-resistance characteristics. Please refer to [link / reference]. Figure 1 Its core structure typically includes a cell region and a terminal region located around the cell region. Within the cell region, multiple PN junctions are formed by alternating P-type doped regions (e.g., P-type pillars) and N-type doped regions (e.g., N-type drift regions). In the off state of the device, these P-type and N-type regions deplete each other, forming a space charge region similar to that of an intrinsic semiconductor, thus enabling it to withstand high voltages.

[0003] Ideally, to achieve the highest breakdown voltage, the total P-type doping dose and the total N-type doping dose within the cell region need to be precisely charge-matched. However, in actual device design and manufacturing, there are significant differences in the structure and electric field distribution between the cell region and the termination region. For example, the termination region requires complex termination structures (such as field plates, guard rings, etc.) to reduce the surface electric field and prevent premature surface breakdown. This structural difference, along with the inconsistency in the magnitude and direction of the bias voltage experienced by the cell region and the termination region during operation, makes it difficult to unify the optimal charge-matching conditions between the cell region and the termination region.

[0004] This inconsistency typically leads to the following technical problems: the actual overall breakdown voltage of the device is lower than the theoretically achievable breakdown voltage of the cell region, because breakdown often occurs in weak regions with poor charge matching (usually the termination region or the boundary between cell and termination regions). Furthermore, to balance the performance of both the cell and termination regions, the overall manufacturing process window becomes very narrow, requiring extremely stringent control of the doping dosage, thus increasing manufacturing difficulty and reducing product yield.

[0005] Therefore, how to effectively adjust the charge balance of the terminal region so that its optimal matching conditions are closer to those of the cell region, in order to solve the charge mismatch problem between the cell region and the terminal region, thereby improving the overall withstand voltage capability of the superjunction product and broadening its process window, is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0006] The technical problem to be solved by this application is to provide an optimized method that can solve the problem of inconsistent charge matching between the cell region and the terminal region in existing superjunction products, which leads to a decrease in overall withstand voltage and a narrow process window.

[0007] To achieve the above and other related objectives, the present invention provides a method for optimizing the pressure resistance of superjunction products, comprising:

[0008] Step 1: Provide a semiconductor substrate having a cell region and a terminal region, wherein alternating P-type pillars and N-type drift regions are formed in the cell region;

[0009] Step 2: Inject P-type impurities into the terminal region to adjust the charge balance in the terminal region so that the optimal charge matching condition of the terminal region is close to the optimal charge matching condition of the cell region.

[0010] Preferably, in step two, the step of injecting the P-type impurity is performed after the step of forming the P-type column.

[0011] Preferably, in step two, the step of injecting the P-type impurity is performed before the step of forming the P-type column.

[0012] Preferably, in step two, the P-type impurity is injected into the entire area of ​​the terminal region.

[0013] Preferably, in step two, the P-type impurity is injected into a predetermined selected area within the terminal region.

[0014] Preferably, in step two, the P-type impurity includes boron or boron difluoride.

[0015] Preferably, in step two, the injection dose of the injected P-type impurity is 1 x 102 11 atoms / cm 2 Up to 9x10 12 atoms / cm 2 .

[0016] Preferably, the superknot product is a superknot product manufactured using a deep trench process.

[0017] As described above, the method for optimizing the pressure resistance of superjunction products according to the present invention has the following beneficial effects:

[0018] This application actively compensates for the charge mismatch between the termination region and the cell region by additionally injecting P-type impurities into the termination region. This method ensures that when the cell region is in an optimal charge-matched state, the termination region is also in or near its optimal charge-matched state, effectively preventing the termination region from becoming a bottleneck in the device's breakdown voltage, thereby significantly improving the overall breakdown voltage of the entire product. For example, experimental data show that this method can increase the product's breakdown voltage by approximately 20V. Attached Figure Description

[0019] Figure 1 The diagram shown is a schematic of a superjunction power device in the prior art.

[0020] Figure 2 The diagram shows a method for optimizing the pressure resistance of superjunction products according to the present invention.

[0021] Figure 3 The diagram shows a comparison of the pressure resistance simulation results of the present invention.

[0022] Figure 4 The diagram shows the technical mechanism by which the present invention improves pressure resistance and widens the process window.

[0023] Figure 5 The diagram shown is a comparison of experimental fabrication data for this invention. Detailed Implementation

[0024] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0025] To address the issues of reduced overall breakdown voltage and narrow process window in existing superjunction products due to inconsistencies in the optimal charge matching conditions between the cell region and the termination region, this application provides a method for optimizing the breakdown voltage of superjunction products. The method provided in this application effectively adjusts the charge balance in the termination region, bringing the optimal matching conditions between the termination region and the cell region closer together. This significantly improves the overall breakdown voltage of the product, broadens the process window, and ultimately enhances device reliability, product yield, and market competitiveness.

[0026] A method for optimizing the pressure resistance of superjunction products includes the following steps:

[0027] Step 1: Provide a semiconductor substrate with a cell region and a termination region. Alternating P-type pillars and N-type drift regions are formed within the cell region. This semiconductor substrate can be an N-type epitaxial substrate formed by growing an N-type epitaxial layer on an N+ heavily doped substrate, or other substrate types suitable for fabricating superjunction devices. The P-type pillars and N-type drift regions within the cell region together constitute the core breakdown voltage structure of the superjunction device, and their charge-matching degree directly determines the breakdown voltage performance of the cell region.

[0028] Step 2: Inject P-type impurities into the termination region to adjust the charge balance within the region, bringing the optimal charge matching condition of the termination region closer to that of the unit cell region. Due to the complex structure of the termination region and its different electric field distribution compared to the unit cell region, its inherent charge matching center typically deviates from the optimal matching point of the unit cell region. By additionally injecting P-type impurities into the termination region, the net doping concentration of the termination region can be compensated and fine-tuned, actively shifting the charge matching center of the termination region towards the matching center of the unit cell region. In this way, when the unit cell region achieves optimal charge matching, the termination region is simultaneously at or near its optimal matching state, thus preventing the termination region from becoming a bottleneck in the overall device breakdown voltage and ultimately optimizing the overall breakdown voltage capability.

[0029] In some embodiments, step two, the implantation of P-type impurities, is performed after the formation of the P-type pillar. The advantage of this approach is that, after the P-type pillar is formed, the dosage and energy of the terminal compensation implantation can be determined more precisely based on the actual doping situation, achieving more accurate charge-matching control. This implantation can serve as a final calibration for the entire structure after formation, offering greater flexibility.

[0030] In some embodiments, in step two, the implantation of P-type impurities is performed before the formation of the P-type pillar. This approach combines termination implantation with other implantation steps in the early stages of device fabrication, simplifying the process flow. For example, implantation can be performed simultaneously with the formation of field-limiting rings or other termination structures, helping to reduce the number of lithography and implantation steps, thereby reducing manufacturing costs and shortening the production cycle.

[0031] In some embodiments, in step two, P-type impurities are implanted into the entire terminal region. This comprehensive implantation method is simple to operate, requires no additional mask, and is suitable for scenarios where the entire terminal region needs charge compensation. It can quickly and effectively improve the charge balance of the entire terminal region, thereby widening the process window.

[0032] In some embodiments, in step two, P-type impurities are implanted into a predetermined selected region within the termination region. This selective implantation method allows for precise dose compensation at specific locations within the termination region (e.g., regions of concentrated electric fields or boundaries with cell regions) by designing specific implantation masks. This approach is more refined, enabling optimization of weak points in the termination region. While improving breakdown voltage, it minimizes unnecessary impacts on other structures within the termination region, resulting in optimized device performance.

[0033] In some embodiments, in step two, the P-type impurity includes boron (B) or boron difluoride (BF2). Boron is a commonly used P-type dopant in semiconductor processes, and its processing is mature and stable. Boron difluoride, as a molecular ion, can achieve shallower implantation depths and steeper distributions at low-energy implantation, and its ion beam current is larger, which helps to improve implantation efficiency. Those skilled in the art can select boron, boron difluoride, or other suitable P-type dopants according to specific process requirements and equipment conditions.

[0034] In some embodiments, in step two, the injection dose of the P-type impurity is 1 x 102 11 atoms / cm 2 Up to 9x10 12 atoms / cm 2 This dosage range is an optimized range derived from extensive simulations and experimental verification. When the injected dose is below 1x10... 11 atoms / cm 2 At that time, the compensation effect on the terminal charge was not obvious; while when the injected dose was higher than 9x10, the effect on the terminal charge compensation was not obvious. 12 atoms / cm 2 However, excessive doping in the terminal region could disrupt the charge balance and decrease the breakdown voltage. Therefore, selecting within this optimization range can effectively improve the breakdown voltage and broaden the process window.

[0035] In some embodiments, in step two, the implantation energy determines the implantation depth of the impurity in the semiconductor substrate. Selecting an appropriate implantation energy ensures that P-type impurities can be precisely implanted to the target depth requiring charge compensation, such as the region interacting with the terminal field plate or field confinement ring, thereby achieving the most effective charge control.

[0036] In some embodiments, the superjunction product is a superjunction product manufactured using a deep trench process. Deep trench technology is one of the mainstream technologies for manufacturing high-performance superjunction devices. The method proposed in this application is particularly suitable for such products because the deep trench structure makes the structural differences between the cell region and the termination region more significant and the process control more difficult, resulting in a more prominent charge mismatch problem. By performing compensation injection in the termination region, the matching difficulties brought about by the deep trench process can be effectively solved, fully leveraging the high-performance advantages of deep trench superjunction devices.

[0037] To illustrate the technical effects of this application in more detail, please refer to the appendix. Figure 3The breakdown voltage simulation results are shown. The graphs in the attached figures illustrate the relationship between the device's breakdown voltage capability (vertical axis) and a key process parameter (e.g., the implantation dose of the P-pillar, horizontal axis). The ideal breakdown voltage curve considering only the cell region structure (labeled "Cell Region Breakdown Voltage Simulation") shows the theoretically highest breakdown voltage achievable by the device under ideal charge matching. When the termination region is introduced, the breakdown voltage curve of the complete device without the method described in this application (labeled "Cell Region + Termination Breakdown Voltage Simulation") shows that its peak breakdown voltage is significantly lower than the ideal value, and the process window for achieving higher breakdown voltages is also significantly narrowed. This is precisely due to the charge mismatch between the cell region and the termination region.

[0038] After implementing the terminal P-type implantation method of this application, the peak withstand voltage of the complete device's withstand voltage curve (labeled as "cell region + terminal + terminal implantation withstand voltage simulation") was significantly recovered, almost reaching the ideal withstand voltage level of the cell region, and the process window corresponding to its high withstand voltage was also effectively widened. The schematic diagram of the device structure below the attached figure also shows the electric field distribution inside the device when a reverse bias voltage is applied. After optimization by the method of this application, the electric field distribution in the terminal region is more uniform, avoiding local electric field concentration. This simulation result intuitively proves that the method of this application can effectively compensate for the matching difference between the cell region and the terminal region, thereby overcoming the problems of reduced withstand voltage and shrinkage of the process window caused by the introduction of the terminal structure, and ultimately achieving a significant optimization of the overall performance of the superjunction product.

[0039] The technical mechanism by which this application improves pressure resistance and broadens the process window can be found in the appendix. Figure 4 The schematic diagram shown illustrates the dependence of the breakdown voltage (BV) of the cell region and the terminal region on a key process parameter (e.g., the doping dose of the P-pillar).

[0040] As shown in the schematic diagram on the "no-terminal injection" side, in traditional superjunction products, the peak values ​​of the breakdown voltage curves (labeled "cell" and "terminal," respectively) of the cell region and the termination region, i.e., the process parameter points for achieving optimal breakdown voltage, are offset from each other. This mismatch means that the entire device can only simultaneously achieve acceptable breakdown voltage performance within the narrow overlapping region of the two curves (labeled "no-terminal injection window space"), which is the fundamental reason for the narrow process window in existing technologies.

[0041] As shown in the schematic diagram on the "Increased Terminal Injection" side, this application injects P-type impurities into the terminal region, which is equivalent to actively compensating and adjusting the net charge of the terminal region. The effect is that the withstand voltage capability curve of the terminal region shifts overall towards the curve of the cell region (as indicated by the arrow). By precisely controlling the dosage and energy of the terminal injection, the peak positions of the two curves can be aligned as closely as possible. The final result is a significant widening of the effective overlap area of ​​the two curves, i.e., the "increased terminal injection window space." This indicates that, through the method of this application, the cell region and the terminal region can simultaneously achieve near-optimal withstand voltage states within a wider range of process parameters, thereby relaxing the control precision requirements of core process parameters, reducing manufacturing difficulty, and ultimately improving product yield and consistency.

[0042] The beneficial effects of this application can also be confirmed by specific experimental tape-out data. (See attached...) Figure 5 The box plot shown illustrates the results of the comparative experiments, where the vertical axis represents the breakdown voltage (BVDSS1_VALUE), and the horizontal axis represents different process groups. The left side of the figure (labeled "SJ-2.5+No Terminal Injection") represents the data for the comparative sample not using the method of this application, and the right side (labeled "SJ-2.5+Terminal Injection 1E12") represents the data using the method of this application, with a terminal injection dose of 1x10⁻¹⁰. 12 atoms / cm 2 Sample data.

[0043] As can be seen from the "Process Window" labeling, the effective process window of the comparative sample is very narrow, only a single-sided "+0.2E15" range, indicating its extreme sensitivity to fluctuations in process parameters. In contrast, the sample using the method of this application has a significantly widened process window to a double-sided "+-0.2E15" range, effectively doubling the process window size. Furthermore, the breakdown voltage distribution shows that the overall withstand voltage level of the sample using the method of this application is also effectively improved, with an experimental data showing an increase of approximately 20V. Simultaneously, the yield curve above shows that the product yield has increased from 93.3% to over 98%, fully demonstrating the significant advantages of the method of this application in improving device performance and production stability, and greatly enhancing the product's market competitiveness.

[0044] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0045] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for optimizing the pressure resistance of a superjunction product, wherein the superjunction product is a superjunction product manufactured using a deep trench process, characterized in that, At least including: Step 1: Provide a semiconductor substrate having a cell region and a terminal region, wherein alternating P-type pillars and N-type drift regions are formed in both the cell region and the terminal region; Step 2: Inject P-type impurities into the terminal region to adjust the charge balance of the superjunction in the terminal region, so that the optimal charge matching condition of the superjunction in the terminal region is close to that of the optimal charge matching condition of the superjunction in the cell region.

2. The method for optimizing the pressure resistance of superjunction products according to claim 1, characterized in that: In step two, the step of injecting P-type impurities is performed after the step of forming the P-type column.

3. The method for optimizing the pressure resistance of superjunction products according to claim 1, characterized in that: In step two, the step of injecting P-type impurities is performed before the step of forming the P-type column.

4. The method for optimizing the pressure resistance of superjunction products according to any one of claims 1 to 3, characterized in that: In step two, the P-type impurity is injected into the entire area of ​​the terminal region.

5. The method for optimizing the pressure resistance of superjunction products according to any one of claims 1 to 3, characterized in that: In step two, the P-type impurity is injected into a predetermined selected area within the terminal region.

6. The method for optimizing the pressure resistance of superjunction products according to claim 1, characterized in that: In step two, the P-type impurity includes boron or boron difluoride.

7. The method for optimizing the pressure resistance of superjunction products according to claim 1, characterized in that: In step two, the injection dose of the P-type impurity is from 1 x 10¹¹ atoms / cm² to 9 x 10¹² atoms / cm².

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