Storage space processing method and apparatus

Abstract

This specification provides a storage space processing method and apparatus. The storage space processing method includes: when at least one target device exists in the device list of a target system, obtaining initial storage space parameters for the at least one target device, wherein the target device is a device that supports storage space adjustment; obtaining the bus address space corresponding to the device list, and selecting a target adjustment strategy corresponding to the at least one target device based on the bus address space; updating the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain target storage space parameters for the at least one target device, wherein the target storage space parameters of the at least one target device are used to adjust the storage space of the at least one target device while the target system is running. This achieves dynamic expansion of the address space represented by the base address register, solving the problem of application runtime limitations.

Description

Technical Field

[0001] The embodiments in this specification relate to the field of computer technology, and in particular to a storage space processing method and apparatus. Background Technology

[0002] In modern high-performance computing, artificial intelligence training, and data center applications, the efficiency of data interaction between accelerators such as CPUs and GPUs, as well as between accelerators, directly impacts overall system performance. PCIe devices (Peripheral Component Interconnect Express), as the mainstream high-speed interconnect interface, rely heavily on their memory space mapping mechanism for efficient device access. Currently, Resizable BAR technology is commonly used to increase the device's BAR (Base Address Register) space, enabling access to a larger BAR area. However, existing solutions rely on firmware support, and the Linux kernel imposes numerous limitations on adjusting the BAR space size of PCIe devices, making dynamic adjustment difficult. Therefore, a technical solution is urgently needed that does not rely on firmware configuration and can securely achieve dynamic BAR adjustment under any PCIe topology. Summary of the Invention

[0003] In view of the above, embodiments of this specification provide a storage space processing method. One or more embodiments of this specification also relate to a storage space processing apparatus, a computing device, a computer-readable storage medium, and a computer program product, to address the technical deficiencies existing in the prior art.

[0004] According to a first aspect of the embodiments of this specification, a storage space processing method is provided, comprising: If it is determined that there is at least one target device in the device list of the target system, the initial storage space parameters of the at least one target device are obtained, wherein the target device is a device that supports adjusting the storage space. Obtain the bus address space corresponding to the device list, and select the target adjustment strategy corresponding to the at least one target device based on the bus address space; The initial storage space parameters of the at least one target device are updated according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, wherein the target storage space parameters of the at least one target device are used to adjust the storage space of the at least one target device when the target system is running.

[0005] According to a second aspect of the embodiments of this specification, a storage space processing apparatus is provided, comprising: If it is determined that there is at least one target device in the device list of the target system, the initial storage space parameters of the at least one target device are obtained, wherein the target device is a device that supports adjusting the storage space. Obtain the bus address space corresponding to the device list, and select the target adjustment strategy corresponding to the at least one target device based on the bus address space; The initial storage space parameters of the at least one target device are updated according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, wherein the target storage space parameters of the at least one target device are used to adjust the storage space of the at least one target device when the target system is running.

[0006] According to a third aspect of the embodiments of this specification, a computing device is provided, comprising: Memory and processor; The memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions. When the computer-executable instructions are executed by the processor, they implement the steps of the above-described memory space processing method.

[0007] According to a fourth aspect of the embodiments of this specification, a computer-readable storage medium is provided that stores computer-executable instructions, which, when executed by a processor, implement the steps of the storage space processing method described above.

[0008] According to a fifth aspect of the embodiments of this specification, a computer program product is provided, including a computer program or instructions that, when executed by a processor, implement the steps of the above-described storage space processing method.

[0009] One embodiment of this specification implements the acquisition of initial storage space parameters for at least one target device when at least one target device with adjustable storage space exists in the device list of the target system. By selecting a target adjustment strategy for at least one target device based on the bus address space, and updating the initial storage space parameters of at least one target device according to the corresponding target adjustment strategy, the storage space of at least one target device can be subsequently adjusted according to the target storage space parameters. This achieves dynamic expansion of the base address register storage space and solves the problem of application operation limitations caused by insufficient storage space resources. Attached Figure Description

[0010] Figure 1 This is a flowchart illustrating a storage space processing method according to one embodiment of this specification; Figure 2 This is a flowchart illustrating the processing procedure of a storage space processing method according to one embodiment of this specification; Figure 3 This is a schematic diagram of the structure of a storage space processing device provided in one embodiment of this specification; Figure 4 This is a structural block diagram of a computing device provided in one embodiment of this specification. Detailed Implementation

[0011] Many specific details are set forth in the following description to provide a full understanding of this specification. However, this specification can be implemented in many other ways than those described herein, and those skilled in the art can make similar extensions without departing from the spirit of this specification. Therefore, this specification is not limited to the specific implementations disclosed below.

[0012] The terminology used in one or more embodiments of this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the one or more embodiments of this specification. The singular forms “a,” “described,” and “the” as used in one or more embodiments of this specification and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in one or more embodiments of this specification refers to and includes any or all possible combinations of one or more associated listed items.

[0013] It should be understood that although the terms first, second, etc., may be used to describe various information in one or more embodiments of this specification, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, first may also be referred to as second without departing from the scope of one or more embodiments of this specification, and similarly, second may also be referred to as first. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to a determination."

[0014] Furthermore, it should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in one or more embodiments of this specification are all information and data authorized by the user or fully authorized by all parties. Moreover, the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation entry points are provided for users to choose to authorize or refuse.

[0015] First, the terms and concepts used in one or more embodiments of this specification will be explained.

[0016] PCIe Resize: PCIe Resize (usually referring to Resizable BAR) is a PCIe (Peripheral Component Interconnect Express) bus technology that allows the system to expand the device's BAR (Base Address Register) space from the default small size to any of its supported space sizes.

[0017] Kernel: The kernel is the core program of an operating system (such as Linux, Windows, macOS). It runs at a high privilege level (kernel mode) and is responsible for managing hardware resources such as CPU, memory, disk, network, and peripherals; providing system call interfaces for applications to use the hardware; coordinating the operation of multiple programs (process scheduling); and ensuring system security and stability.

[0018] Firmware is persistent software embedded in hardware devices, typically stored in ROM, EEPROM, or Flash chips. It is responsible for initializing the hardware, providing basic control functions, running before the operating system boots, and continuing to be used after boot.

[0019] PCIe realloc: PCIe realloc (full name: PCIe Resource Re-allocation) is a mechanism provided by the Linux kernel to release existing PCIe resource allocation results and re-allocate global resources.

[0020] With the rapid development of applications such as high-performance computing, artificial intelligence, and data centers, PCIe devices (such as GPUs, FPGAs, and smart network interface cards) are playing an increasingly important role in systems. These devices typically have large amounts of local memory (such as video memory) and require high-frequency, high-efficiency data exchange with the CPU or other devices.

[0021] To improve device access efficiency, PCI-SIG introduced Resizable BAR technology, which allows the device's BAR space to be expanded from the traditional default small size (such as 256MB) to its first maximum supported range (such as 128GB or 256GB), thereby enabling access to more storage space on the device and improving P2P (Peer-to-Peer) communication performance.

[0022] However, in practical applications, existing Resizable BAR implementations have many limitations, which severely restrict the popularization and effectiveness of this technology. These limitations are mainly reflected in the following aspects: 1. Heavily dependent on firmware support Current mainstream implementations rely on BIOS / UEFI to allocate BAR space during the system boot phase. However, many firmwares do not enable the Resizable BAR function by default, and their configuration is complex and has poor compatibility, making it impossible to enable even if the hardware supports it.

[0023] 2. The firmware allocation strategy is conservative, with insufficient reserved space. When allocating resources, the firmware performs on-demand and compact allocation based on the device's default BAR space size, without reserving enough MMIO (Memory-Mapped I / O) space for direct expansion. This causes the operating system to be unable to find a contiguous large block of address space during runtime, resulting in the failure of the resize operation.

[0024] 3. Cannot support multi-function devices. Modern high-performance devices contain multiple functional units. Performing BAR resizing on a multifunctional device may affect the normal operation of other devices, preventing the multifunctional device from benefiting from Resizable BAR technology.

[0025] 4. Limited by PCIe topology When multiple devices of the same type (such as multiple GPUs) are connected through the same PCIe switch, the kernel refuses to adjust the BAR space of any device, even if the overall system MMIO resources are sufficient, because it is worried about address conflicts or insufficient upstream switch windows.

[0026] 5. Lacks runtime dynamic adjustment capabilities The kernel only supports limited runtime dynamic adjustments and cannot flexibly change according to application load.

[0027] Based on this, this specification provides a storage space processing method, and also relates to a storage space processing apparatus, a computing device, a computer-readable storage medium, and a computer program product, which will be described in detail in the following embodiments.

[0028] See Figure 1 , Figure 1 A flowchart of a storage space processing method according to an embodiment of this specification is shown, which specifically includes the following steps.

[0029] Step 102: If at least one target device exists in the device list of the target system, obtain the initial storage space parameters of the at least one target device, wherein the target device is a device that supports adjusting the storage space.

[0030] The storage space processing method provided in this manual is based on the PCIe realloc function and supports various types of space adjustments in the PCIe ResizeBAR space, such as IORESOURCE_IO, IORESOURCE_MEM, IORESOURCE_MEM_64, and IORESOURCE_PREFETCH.

[0031] The target system can be understood as a computer system running the storage space processing methods provided in this manual, typically a server, workstation, or high-performance computing platform with a PCIe bus architecture and multiple PCIe devices (such as GPUs, FPGAs, etc.). The device list can be understood as the collection of all PCIe devices enumerated by the kernel or firmware during system startup, including the device's BDF (Bus Device Function) address, vendor ID, device ID, capability registers, and other information. The target device can be understood as a PCIe device that supports the Resizable BAR function, and the target device can adjust its storage space. The initial storage space parameters can be understood as the parameters of the device's first largest BAR space capability supported at the hardware level, which may include the first largest addressable space, supported BAR types, etc.

[0032] In a specific embodiment of this specification, the target system can be a server with multiple PCIe devices configured on it. After the server starts running, the firmware initializes and allocates resources to all PCIe devices, such as allocating default resources to the graphics cards (GPUs) in the PCIe devices, such as 256MB per GPU BAR0. However, the actual hardware capability of the graphics card GPU supports a first large BAR space of 128GB (exposed through the Resizable BAR Capability register). The kernel scans the device list under the target system of the server. For example, if it finds two devices in the device list that are both graphics cards, it queries their PCIe expansion capability register and finds that they support Resizable BAR. Then, it can obtain the initial storage space parameters of each device, such as "initial storage space parameters = {first large BAR space: 128GB, type: IORESOURCE_MEM_64, supports resizable: yes}".

[0033] Based on this, during the system startup phase, all PCIe devices are actively scanned to identify target devices that support ResizableBAR and obtain their "future scalable first large storage space" capability parameter, which serves as the basis for subsequent resource reservation and dynamic adjustment.

[0034] Furthermore, before obtaining the initial storage space parameters of the at least one target device, the method further includes: scanning the device list of the target system to determine the device configuration information corresponding to at least one initial device; and determining at least one target device among the at least one initial device based on the device configuration information corresponding to the at least one initial device.

[0035] Device scanning can be understood as the kernel discovering all connected devices by traversing the PCIe bus during the boot phase. The initial device can be understood as all enumerated PCIe devices in the system, regardless of whether they support Resizable BAR. Device configuration information can be understood as the configuration information set for the initial device, which may include vendor ID, device ID, PCIe expansion capability registers, BAR configuration (size, type, starting address), whether it supports Resizable BAR, and whether it is a multi-function device. Based on the device configuration information, target devices can be selected from the initial device.

[0036] In practical applications, to perform PCIe resizing on devices, it's necessary to filter out devices that support ResizableBAR. This requires obtaining the device configuration information for each device and filtering based on that information. The target device is the one selected from all initial devices; it can be a high-performance device supporting ResizableBAR (such as a GPU, FPGA, or smart network interface card). In implementation, the kernel PCIe realloc process is modified to fully probe and traverse the PCIe device list to confirm whether the current PCIe tree contains a resizeable device. If no such device is found, the process is complete. If a resizeable device exists, the firmware's enumeration allocation record is triggered, and the realloc function is used to fully enumerate and allocate space.

[0037] In one specific embodiment of this specification, in a server equipped with two graphics cards, after the target system of the server is powered on, the kernel begins to perform a device scan. It accesses the address of each device on the PCIe bus, reads its configuration space, and constructs a device list. It obtains the device configuration information of the two graphics cards, determines based on the device configuration information that both graphics cards have the ability to dynamically adjust their runtime BAR space, and then uses both graphics cards as target devices.

[0038] Based on this, by first scanning the device list to obtain complete configuration information for each initial device, and then accurately identifying target devices that support Resizable BAR based on this information, proactive discovery and screening of optimizable resources in the system is achieved, ensuring the accuracy and technical feasibility of subsequent storage space adjustment operations. This process does not depend on whether the firmware enables related functions; it only needs to read hardware registers to understand the true capabilities of the device. This lays a solid foundation for releasing the original resource allocation, triggering kernel-level reallocation, and reserving the first large BAR space during the system startup phase. Ultimately, it supports flexible, safe, and efficient dynamic adjustment of the target device's storage space at runtime.

[0039] Furthermore, obtaining the initial storage space parameters of the at least one target device includes: determining a set of storage space parameters for the at least one target device; and selecting the initial storage space parameters of the at least one target device from the set of storage space parameters.

[0040] The storage space parameter set can be understood as the set of all parameters related to storage space access read from the PCIe configuration space of the target device, including the space size supported by each BAR (such as BAR0, BAR1); the address type of the BAR (32-bit Memory, 64-bit Memory, I / O, etc.); and the optional size levels declared in the Resizable BAR extension capability (such as 32MB, 64MB, 128GB, etc.).

[0041] In practical applications, determining the storage space parameter set refers to parsing the PCIe expansion capability structure of the target device (such as the Resizable BAR Capability structure), extracting all possible BAR size options and related attributes, and forming a complete candidate parameter list. Selecting the initial storage space parameter refers to choosing a first optimal value from the storage space parameter set, based on system policy or device capability limits, as the device's "initial storage space parameter," typically the largest supported BAR space, for subsequent resource reallocation and reservation. In specific implementation, during the PCIe realloc process, the largest resizable BAR space size for all devices is traversed, and space is allocated and reserved according to this largest space size (multiple devices have different types of space resizing (IO, MEM, MEM64, etc.). Additionally, the actual requirement for SR-IOV (Single Root I / O Virtualization) VF resizing BAR space also needs to be considered). The resizing method provided in this specification supports PF (Physical Function) resizing and VF (Virtual Function) resizing.

[0042] In a specific embodiment of this specification, two graphics cards in the server have been identified as target devices. Next, the kernel begins to obtain their initial storage space parameters. The kernel reads the PCIe extension capability chain of the first graphics card; VFResize uses the VF Resizable BAR Extended Capability structure (Capability id=0x24), and PFResize uses the PF Resizable bar capability structure (Capability ID=0x15). Taking the PF Resizable bar capability as an example, the kernel locates the PF Resizable BAR Capability structure and parses the set of storage space parameters, including: {BAR0 supports sizes: 32MB, 64MB, 128MB, 256MB, ... 16GB, 32GB, 64GB, 128GB;} BAR type: 64-bit Memory (IORESOURCE_MEM_64) This set indicates that the device's BAR0 can support a maximum of 128GB of memory mapping space. The system then performs a "selection" operation: selecting the largest value of 128GB from this set as the initial memory space parameter for the target device. Similarly, the initial memory space parameter for the second graphics card is also determined to be 128GB. At this point, the system has completed obtaining the initial memory space parameters for all target devices, providing crucial input for subsequent adjustments based on the bus address space and updates to reserved space.

[0043] Based on this, by first determining the set of storage space parameters of the target device, and then selecting its first supported largest BAR space as the initial storage space parameter, a comprehensive perception of the device's storage space expansion capability is achieved. This process is based on direct reading of hardware registers, without relying on firmware configuration or default allocation, ensuring the accuracy and foresight of parameter acquisition. The selected initial storage space parameter reflects the device's physical first largest storage space capability, laying the data foundation for triggering resource reallocation during system startup, reserving sufficient MMIO space, and supporting dynamic adjustments during runtime. Thus, flexible, efficient, and secure control of the storage space of high-performance PCIe devices can be achieved without interrupting device operation.

[0044] Step 104: Obtain the bus address space corresponding to the device list, and select the target adjustment strategy corresponding to the at least one target device according to the bus address space.

[0045] The bus address space, also known as the root bus address space, can be understood as the global address range reserved for MMIO (Memory-Mapped I / O) resources in the PCIe tree. It is typically configured by the firmware on the Root Bus during system startup. This includes address ranges available for 32-bit memory mapping, 64-bit memory mapping, and I / O memory mapping. The bus address space is a scarce resource shared by all PCIe devices under the Root Bus, determining whether the system can reserve a large BAR space for a device. The target adjustment strategy can be understood as a memory space parameter adjustment scheme for at least one target device based on the sufficiency of the current bus address space. Common strategies include: if space is sufficient: directly reserve the first large BAR space for all target devices; if space is tight: reserve only for some devices, or adopt a phased degradation strategy; if space is severely insufficient: restore the default configuration and report an error. The choice of this strategy directly affects the subsequent update method of memory space parameters, and the memory space of the target device belongs to the bus address space.

[0046] Furthermore, selecting the target adjustment strategy corresponding to the at least one target device based on the bus address space includes: calculating the space budget to be adjusted based on the initial storage space parameters of the at least one target device; comparing the space budget to be adjusted with the bus address space; and selecting the target adjustment strategy corresponding to the at least one target device from a preset adjustment strategy set based on the comparison result.

[0047] The space budget to be adjusted can be understood as the total MMIO resources required to reserve the first largest BAR space for all target devices. It is calculated by aligning and stacking the initial storage space parameters of each target device, and is a "demand-side" indicator for resource allocation. For example, two devices supporting 128GB BARs have a space budget to be adjusted of at least 256GB. Since the bus address space refers to the global address range reserved by the firmware on the PCIe root bus for MMIO mapping, a target adjustment strategy can be selected from preset adjustment strategies by comparing the space budget to be adjusted with the bus address space. The preset adjustment strategy set can be understood as multiple resource adjustment schemes predefined during the system design phase, each strategy corresponding to different resource usage conditions. For example, sufficient space: reserve the first largest space for all target devices; limited space: reserve only for some high-priority devices; insufficient space: restore default allocation, prohibit resizing, etc.

[0048] In practical applications, after calculating the space budget to be adjusted, it can be compared with the bus address space. The bus address space is the MMIO space reserved by the firmware for the PCIe tree. If the comparison result shows that the bus address space is greater than the space budget to be adjusted, i.e., there is enough space, all device resize requirements can be met. At this point, the PCIe tree can be expanded sequentially from bottom to top, affecting the space allocation and reserved size of PCIe ep, Switch, Root port, etc.

[0049] When the reserved space is insufficient for the space required for resizing, there are several implementation options: For example, cancel all device resize adjustments, restore the device's default size, and re-execute realloc to ensure that the device allocates space according to the default size.

[0050] If you only cancel the adjustment of address space types that are insufficient for resize (such as IO, MEM, etc.), you can restore these address spaces to the device's default size and reallocate them (equivalent to completing the resize adjustment of some types of address spaces). At the same time, you need to record the BAR space information that can be resized for each device (to determine the feasibility of the resize operation during actual dynamic runtime).

[0051] If all the space types that actually need to be resized are categorized and sorted from largest to smallest, and the largest BAR space of a device in the sorted list is adjusted to its second largest supported space size, then PCIe realloc is retried and the allocation is reordered for reallocation. If the space allocation requirement is still not met during the relocation process, the device with the largest resize space can be changed to the second largest space size, until PCIe realloc completes all space allocation. The supported size of each BAR space is recorded for each device and used to determine the feasibility of the resize request process (resize is rejected when the runtime resize request exceeds the first largest reserved size in the realloc process).

[0052] In a specific embodiment of this specification, the initial storage space parameter of a certain device is 128GB, and the calculated space budget to be adjusted is 256GB. The bus address space is acquired and a reallocation attempt is made. Based on the result of the reallocation attempt, a target adjustment strategy is selected from a preset set of adjustment strategies. If the result of the reallocation attempt is that the bus address space meets the space requirements, the target adjustment strategy is a full reservation strategy.

[0053] Based on this, the system calculates the budget of the space to be adjusted according to the initial storage space parameters of the target device, compares it with the bus address space, and then selects the appropriate target adjustment strategy from the preset adjustment strategy set based on the comparison results. This achieves the quantification and automation of resource allocation decisions. The process is based on the availability of global MMIO resources in the system, ensuring that the selected strategy meets the device performance requirements without exceeding the system's carrying capacity. It not only avoids address conflicts and allocation failures, but also supports flexible switching of adjustment schemes under different resource conditions, improving the robustness and applicability of the method. This provides accurate strategy guidance for the subsequent safe and efficient completion of storage space parameter updates and runtime dynamic adjustments.

[0054] Furthermore, selecting a target adjustment strategy corresponding to the at least one target device from a preset adjustment strategy set based on the comparison results includes: if the bus address space meets the space budget to be adjusted based on the comparison results, selecting an allocation adjustment strategy from the preset adjustment strategy set as the target adjustment strategy corresponding to the at least one target device; if the bus address space does not meet the space budget to be adjusted based on the comparison results, selecting a rollback adjustment strategy, a downgrade adjustment strategy, or an iterative adjustment strategy from the preset adjustment strategy set as the target adjustment strategy corresponding to the at least one target device.

[0055] The allocation adjustment strategy can be understood as the strategy adopted when the bus address space is sufficient. This involves allocating the largest supported BAR space to all target devices and recursively adjusting the storage space windows of the PCIe Switch and Root Port upstream to achieve full resource reservation and improve device access performance. The rollback adjustment strategy can be understood as abandoning the current adjustment and restoring the original firmware allocation state when the bus address space is severely insufficient or conflicts exist. No BAR expansion operations are performed to ensure the normal operation of basic system functions. The degradation adjustment strategy can be understood as reserving a large BAR only for some high-priority target devices (such as the main GPU) when space is insufficient, while maintaining the default configuration for other devices, achieving priority scheduling and limited optimization of resources. The iterative adjustment strategy can be understood as reserving BAR space for devices in stages and batches when space is tight but still usable. For example, first reserving 64GB for one GPU, then attempting to reserve 32GB for another, gradually approaching the first optimal configuration to avoid a one-time allocation failure.

[0056] In a specific embodiment of this specification, the space budget to be adjusted is 256GB, the bus address space is 900GB, and the allocation adjustment strategy is selected as the target adjustment strategy. If the bus address space is 200GB, then one of the following strategies—rollback adjustment, degradation adjustment, and iterative adjustment—is selected as the target adjustment strategy.

[0057] Based on this, by determining whether the bus address space meets the budget for the space to be adjusted according to the comparison results, and selecting different strategies such as allocation, rollback, degradation, or iteration from the preset adjustment strategy set, fine-grained control over the resource adjustment process is achieved. This mechanism can not only give full play to hardware performance when resources are sufficient, but also flexibly degrade or execute in stages when resources are limited, avoiding system anomalies caused by allocation failure. By introducing multi-level response strategies, the adaptability, robustness, and practicality of the method are significantly improved, ensuring that the optimized configuration of the target device's storage space can be completed safely and effectively in various actual deployment environments, providing a reliable strategy guarantee for subsequent dynamic adjustments during runtime.

[0058] Step 106: Update the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, wherein the target storage space parameters of the at least one target device are used to adjust the storage space of the at least one target device when the target system is running.

[0059] The target adjustment strategy can be understood as the specific resource allocation scheme selected in the above steps based on the comparison between the bus address space and the budget of the space to be adjusted. Examples include "allocation adjustment strategy" (full reservation) and "degradation adjustment strategy" (partial reservation). This strategy serves as the basis for the update operation in this step. The target storage space parameter can be understood as the parameter obtained after actually updating the initial storage space parameter according to the target adjustment strategy. It represents the actual BAR space size that the system will reserve or adjust for this device. It may be the largest supported value (e.g., 128GB) or a downgraded value (e.g., 64GB), serving as the target basis for subsequent resizing during runtime.

[0060] In practical applications, since the target adjustment strategy can be one of allocation, rollback, degradation, or iteration, updating the initial storage space parameters of the target device according to the target adjustment strategy can involve various scenarios, such as maintaining the original value or rolling back to the default value. Updating the initial storage space parameters can be understood as modifying the BAR size and address range fields in the device resource management structure in the kernel to reflect the new reserved space, preparing for subsequent PCIe realloc or runtime adjustments. After obtaining the target storage space parameters, the target device's storage space can then be updated using these parameters. The storage space, or BAR, can be understood as the address space through which devices, CPUs, etc., access PCIe devices (such as GPU memory) via MMIO. Traditionally, a small BAR can only map a portion of the GPU memory, while a large BAR can enable more direct access to GPU memory, improving P2PDMA and computational efficiency.

[0061] Furthermore, the target adjustment strategy is an allocation adjustment strategy; updating the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device includes: using the initial storage space parameters of the at least one target device as the target storage space parameters of the at least one target device according to the allocation adjustment strategy.

[0062] When system resources are sufficient, the target adjustment strategy is an allocation adjustment strategy. This means that the first largest support BAR space needs to be fully reserved for all target devices. Under this allocation adjustment strategy, the initial storage space parameters of the target devices are still used as their target storage space parameters.

[0063] In a specific embodiment of this specification, after determining that the target adjustment strategy is an allocation adjustment strategy, the kernel uses the initial storage space parameter of 128GB for the first graphics card as its target storage space parameter. Similarly, the initial storage space parameter of the second graphics card is used as its target storage space parameter. In the kernel data structure, the target size of these two BARs is marked as 128GB, awaiting actual resource reservation during the PCIe realloc stage. Subsequently, the kernel completes BAR expansion according to the set target storage space parameters, enabling direct access to all video memory.

[0064] Based on this, by directly using the initial storage space parameters of the target device as its target storage space parameters when adopting the allocation adjustment strategy, this invention achieves lossless inheritance and full utilization of the device's primary access capability. Under the premise of sufficient system resources, this method ensures that all high-performance PCIe devices can obtain the full BAR space reservation supported by their hardware, providing a clear target basis for subsequent dynamic adjustments during runtime. It simplifies the parameter conversion logic and improves the storage space bandwidth and access efficiency between devices, making it particularly suitable for high-performance scenarios such as AI training and scientific computing that require low-latency, high-throughput memory access, significantly improving the overall computing performance and resource utilization of the system.

[0065] Furthermore, the target adjustment strategy is a rollback adjustment strategy; updating the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device includes: determining the basic storage space parameters of the at least one target device according to the rollback adjustment strategy, wherein the basic storage space parameters are the default size of the storage space of the at least one target device; and using the basic storage space parameters as the target storage space parameters of the at least one target device.

[0066] The rollback adjustment strategy is a conservative approach that abandons optimization operations involving large BAR reservations for the target device and maintains the original system state when the bus address space is severely insufficient, the budget for adjustment space cannot be met, or resource conflicts exist. Therefore, it is necessary to determine the basic storage space parameters of the target device. These basic storage space parameters can be understood as the BAR space size allocated by the firmware based on the device's default configuration when the Resizable BAR function is not enabled; it represents the standard initial configuration for PCIe devices. These basic storage space parameters will be used as the target storage space parameters for the target device.

[0067] In a specific embodiment of this specification, the target adjustment strategy is determined to be a rollback adjustment strategy. The kernel queries the firmware allocation results and finds that the current size of the graphics card's BAR0 is 256MB, which is the basic storage space parameter, i.e., the standard default value. The basic storage space parameter is used as the target storage space parameter, and no large space reservation operations are subsequently performed in the kernel, maintaining the original resource configuration.

[0068] Based on this, by determining the basic storage space parameters of the target device when adopting the rollback adjustment strategy and using them as the target storage space parameters, a safety fallback mechanism is implemented in scenarios with severe resource shortages. This approach ensures that the system can still start and run normally when it cannot support large BAR expansion, avoiding system failure to initialize due to resource allocation failure. Although the basic storage space parameters, as the standard access capability of PCIe devices, do not fully utilize the hardware's primary performance, they ensure compatibility and stability, demonstrating the method's adaptive and degradable engineering robustness in different deployment environments, and providing a reliable fault-tolerant path for complex systems.

[0069] Furthermore, the target adjustment strategy is a degradation adjustment strategy; updating the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device includes: determining the resource type to be degraded according to the degradation adjustment strategy, and determining the target resource type corresponding to the at least one target device; if the target resource type corresponding to the at least one target device is the same as the resource type to be degraded, using the basic storage space parameters of the at least one target device as the target storage space parameters of the at least one target device, wherein the basic storage space parameters are the default size of the storage space of the at least one target device; if the target resource type corresponding to the at least one target device is different from the resource type to be degraded, using the initial storage space parameters of the at least one target device as the target storage space parameters of the at least one target device.

[0070] The degradation adjustment strategy is a selective optimization scheme adopted when the system bus address space is insufficient to support all target devices simultaneously expanding to the first large BAR space. This strategy can cancel adjustments only for address space types experiencing insufficient resize, such as IO and MEM, restoring only these address spaces to their default values. Therefore, the resource types to be degraded can be determined first; these are the address space types experiencing insufficient resize. Then, the target resource type of the target device is compared with the resource type to be degraded. Under different circumstances, the initial storage space parameters of the target device are used as the target storage space number; under the same circumstances, the basic storage space parameters of the target device are used as the target storage space parameters.

[0071] In practical applications, the type of resource to be downgraded can also be selected based on the device priority. When there is insufficient resource space, a lower priority resource type can be selected as the resource type to be downgraded.

[0072] In a specific embodiment of this specification, the downgrade adjustment strategy is selected as the target adjustment strategy. If the target resource type of graphics card A is the same as the resource type to be downgraded, then the basic storage space parameter of graphics card A, 256MB, is used as the target storage space parameter. If the target resource type of graphics card B is different from the resource type to be downgraded, then the initial storage space parameter of graphics card B, 128GB, is used as the target storage space parameter.

[0073] Based on this, when adopting the degradation adjustment strategy, the type of resource to be degraded and the target resource type are identified, and whether to retain the large BAR reservation is determined based on whether the two are consistent, thus realizing fine-grained control over resource allocation in a multi-device system.

[0074] Furthermore, the target adjustment strategy is an iterative adjustment strategy; updating the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device includes: determining the secondary storage space parameters of the at least one target device according to the iterative adjustment strategy, wherein the secondary storage space parameters are adjacent to the initial storage space parameters of the at least one target device; calculating the target space budget based on the secondary storage space parameters of the at least one target device; if the bus address space satisfies the target space budget, using the secondary storage space parameters as the target storage space parameters of the at least one target device; if the bus address space does not satisfy the target space budget, using the secondary storage space parameters as the initial storage space parameters of the at least one target device, and continuing to determine the secondary storage space parameters of the at least one target device according to the iterative adjustment strategy until the secondary storage parameters are used as the target storage space parameters of the at least one target device.

[0075] The iterative adjustment strategy involves a resource allocation approach that, when the system bus address space is insufficient to support the target device's reservation of the first largest BAR space, uses a step-by-step, iterative approach to find a feasible BAR size configuration scheme. Therefore, it requires iterative allocation attempts to allocate resources as efficiently as possible within limited resources.

[0076] In practical applications, the secondary storage space parameters of the target device can be determined based on the iterative adjustment strategy. The secondary storage space parameters are adjacent to the initial storage space parameters. The secondary storage space parameters can be understood as the next smaller legal BAR space size relative to the current "initial storage space parameters". This value is usually derived from the list of supported levels defined in the device's Resizable BAR capability structure (such as 128GB-64GB-32GB-16GB), and the "adjacent relationship" means that they are adjacent in the supported size levels.

[0077] In practical implementation, after determining the secondary storage space parameters of the target device, the target space budget can be calculated based on these parameters. The target space budget can be understood as the total MMIO resource requirement calculated by summing the secondary storage space parameters of all target devices. This budget is used to compare with the available bus address space of the system to determine if the current configuration is feasible. If the bus address space is sufficient, the secondary storage space parameters can be used as the target storage space parameters, i.e., resource allocation is performed using the current secondary storage space parameters. If the bus address space is insufficient, a next iteration is required. This involves using the current secondary storage space parameters as the initial storage space parameters, re-determining the next secondary storage space parameters, and continuing to calculate the target space budget and compare it with the bus address space until a round suitable for resource allocation is determined. It should be noted that the embodiments in this specification simultaneously support PCIe remove (hot removal) and rescan (rescan) running in the Kernel. When performing the rescan process after PCIe remove, the allocation is still performed according to the device's adjustable space from largest to smallest. Finally, the target storage space parameters of the target device can be determined. At this point, the target storage space parameters are the first feasible value that meets the resource constraints after one or more rounds of degradation.

[0078] In a specific embodiment of this specification, the target adjustment strategy is determined to be an iterative adjustment strategy. The initial storage space parameter of the graphics card is determined to be 128GB, and its next adjacent secondary storage space parameter is determined to be 64GB. Based on the graphics card's secondary storage space parameter, the target space budget is calculated to be 64GB. After attempting bus address space reallocation, it is determined that the reallocation requirement is not met. Therefore, 64GB is used as the initial storage space parameter, and its next adjacent secondary storage space parameter is determined to be 32GB. Based on the graphics card's secondary storage space parameter, the target space budget is calculated to be 32GB. Since the target space budget is met, 32GB is used as the target storage space parameter for the graphics card. During the rescanning process, devices with larger adjustable storage space can be prioritized for adjustment. For example, after optimizing the secondary storage space parameter of graphics card A individually, it is found that the storage space budget is still not met. At this time, a rescan can be performed, and it is found that the next secondary storage space parameter of graphics card A is 32GB, meaning that the next level of optimizable storage space for graphics card A is reduced from 64GB to 32GB. However, the next secondary storage space parameter for graphics card B is 64GB, meaning the next optimizable storage space for graphics card B is reduced from 128GB to 64GB. Therefore, we can adjust the storage space optimization for graphics card B and determine whether it meets the reserved size of the bus address space.

[0079] Based on this, by progressively reducing the BAR space level of the target device when adopting an iterative adjustment strategy, and repeatedly calculating and verifying resource feasibility, the first optimal resource configuration under the condition of limited bus address space was achieved.

[0080] Furthermore, the method further includes: when the target system is running and a storage space adjustment request for the at least one target device is received, determining the target storage space parameters and preset storage space parameters for the at least one target device; verifying the target storage space parameters using the preset storage space parameters; and adjusting the storage space of the target device based on the target storage space parameters if the verification is successful.

[0081] In this context, "target system running" can be understood as the system having completed the boot process, with the kernel, drivers, and user space services functioning normally and ready to provide computing or services. Adjusting storage space at this stage is a "runtime dynamic operation" and does not require a restart. A storage space adjustment request can be understood as an instruction initiated by a user, application, or system policy to change the size of the BAR space of a PCIe device. The target device's storage space can be adjusted while the target system is running.

[0082] In practical applications, when the target system is running and a request to adjust the storage space of the target device is received, it is necessary to determine the target storage space parameters and preset storage space parameters of the target device. Preset storage space parameters can be understood as security thresholds or allowed ranges pre-set by the system or administrator, used to verify the legality of the target storage space parameters. Preset storage space parameters may include the allowed BAR size for the device, allowed adjustments for specific device types, etc. Using preset storage space parameters, the target storage space parameters can be verified. If the verification is successful, the storage space can be adjusted based on the target storage space parameters.

[0083] In practice, during the dynamic PCIe Resize request process in the PCIe device driver, the system determines whether the resize requirement is met based on the largest supported resize record of the current device BAR space recorded during the kernel initialization process. If the requirement is met, the system directly modifies the Resizable BAR Extended Capability control register to adjust the device BAR space without adjusting the PCIe Switch memory / IO window or the BAR space of other PCIe devices. (The current method of adjusting the device BAR space size will not result in overlapping device BAR space addresses, will not affect data access operations of other devices, and will only adjust the resizable device configuration, ensuring safe adjustment.)

[0084] In a specific embodiment of this specification, when the target system is running and receives a request to adjust the storage space of the graphics card, the target storage space parameter of the graphics card is determined to be 128GB. The system reads the preset storage space parameter and determines that the allowed storage space BAR of the graphics card is 128GB, thus the verification is successful. Based on the target storage space parameter, the graphics card's storage space is adjusted. The kernel calls the PCIe configuration mechanism to update the graphics card's BAR0 register, expanding its mapped space to 128GB, allowing other devices to directly access all video memory.

[0085] Based on this, the system receives storage space adjustment requests during runtime and verifies the legality of target storage space parameters in conjunction with preset storage space parameters. Under the premise of ensuring security, the system completes dynamic adjustment of storage space, realizing flexible and controllable optimization of high-performance PCIe device resources.

[0086] The storage space processing method provided in this specification includes, when determining that there is at least one target device in the device list of the target system, obtaining the initial storage space parameters of the at least one target device, wherein the target device is a device that supports storage space adjustment; obtaining the bus address space corresponding to the device list, and selecting a target adjustment strategy corresponding to the at least one target device according to the bus address space; updating the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, wherein the target storage space parameters of the at least one target device are used to adjust the storage space of the at least one target device when the target system is running. By identifying the target device and acquiring its primary support capabilities, combining this with the system bus address space to select an appropriate adjustment strategy, and updating the target storage space parameters accordingly for runtime adjustment, a complete closed loop from device capability awareness to dynamic resource optimization is achieved. This process does not rely on firmware configuration and proactively completes resource planning and reservation at the kernel level, breaking through the static limitations of traditional PCIe storage space mapping. The obtained target storage space parameters reflect both hardware potential and system resource constraints, ensuring that the storage space of high-performance devices can still be safely and efficiently expanded under the normal operation of the target system. This significantly improves the bandwidth and access efficiency of the data path between the CPU and the accelerator, providing strong underlying support for high-throughput scenarios such as AI training and scientific computing.

[0087] The storage space processing method provided in this manual actively identifies PCIe devices that support Resizable BARs during system startup, obtains their first large BAR capability (initial storage space parameters), and assesses resource availability in conjunction with the bus address space on the Root Bus. It then dynamically selects adjustment strategies such as allocation, degradation, or iteration to ultimately generate target storage space parameters usable at runtime. These parameters serve as the legal basis for runtime adjustments, allowing PCIe device drivers to dynamically, repeatedly, and arbitrarily adjust BAR space within their supported resize range by directly calling specific functions. For example, dynamically expanding the GPU's storage space from the default 256MB to 32GB or 128GB without restarting the system. This mechanism does not depend on whether the firmware enables Resizable BAR support; it only requires the firmware to reserve sufficient MMIO space in the Root Bus. The kernel can then autonomously complete resource reallocation and reservation, completely resolving the problem of traditional solutions where large BARs cannot be enabled due to missing firmware functionality or misconfiguration. Meanwhile, this method overcomes the limitations imposed by the upstream kernel on PCIe resizing, particularly addressing the challenge of resizing multi-function devices in complex topologies, whether as a whole or in parts. BAR expansion operations can be completed regardless of whether the device is downstream of a PCIe switch or directly connected to the root port. The entire process significantly reduces pre-configuration dependencies on system settings, requiring no specific BIOS settings, ACPI table support, or static resource reservations. Furthermore, this method exhibits robust fault tolerance during runtime, unaffected by PCIe device hot removal, dynamic rescanning, and various reset operations (including secondary bus reset, functionlevel reset, power management reset, and slot reset). Even if the device undergoes a reset or re-enumeration, the large BAR configuration can still be restored based on the saved target storage space parameters, ensuring the system continuously and stably provides high-performance storage space access capabilities in dynamically changing operating environments.

[0088] Through the above mechanism, this invention enables secure, flexible, and repeatable dynamic adjustment of the storage space of high-performance devices (such as GPUs and FPGAs) without relying on firmware functions, limiting PCIe topology, or increasing deployment complexity. This significantly improves the system's resource utilization, compatibility, and operating efficiency, meeting the urgent need for low-latency, high-bandwidth device storage space access in practical application scenarios such as AI training, cloud computing, and high-performance computing.

[0089] The following is in conjunction with the appendix Figure 2Taking the application of the storage space processing method provided in this specification in model training as an example, the storage space processing method will be further explained. Figure 2 The present specification shows a flowchart of a storage space processing method according to an embodiment, which specifically includes the following steps.

[0090] Step 202: Scan the device list of the target system to determine the device configuration information corresponding to at least one initial device, and determine the target device from among the at least one initial device based on the device configuration information corresponding to the at least one initial device.

[0091] Step 204: If the target device exists in the device list of the target system, obtain the initial storage space parameters of the target device.

[0092] In one feasible approach, at least one set of storage space parameters for a target device is determined, and initial storage space parameters for the target device are selected from the set of storage space parameters.

[0093] Step 206: Obtain the bus address space corresponding to the device list, and select the target adjustment strategy corresponding to the target device based on the bus address space.

[0094] In one feasible approach, a space budget to be adjusted is calculated based on the initial storage space parameters of the target device; the space budget to be adjusted is compared with the bus address space, and a target adjustment strategy corresponding to the target device is selected from a preset adjustment strategy set based on the comparison result. If the comparison result determines that the bus address space meets the space budget to be adjusted, an allocation adjustment strategy is selected from the preset adjustment strategy set as the target adjustment strategy corresponding to at least one target device.

[0095] Step 208: According to the allocation adjustment strategy, the initial storage space parameters of at least one target device are used as the target storage space parameters of at least one target device.

[0096] Step 210: When the target system is running and a storage space adjustment request for the target device is received, determine the target storage space parameters and preset storage space parameters of the target device.

[0097] Step 212: Verify the target storage space parameters using preset storage space parameters. If the verification is successful, adjust the storage space of the target device based on the target storage space parameters.

[0098] Corresponding to the above method embodiments, this specification also provides embodiments of a storage space processing device. Figure 3 A schematic diagram of a storage space processing device according to one embodiment of this specification is shown. Figure 3As shown, the device includes: The acquisition module 302 is configured to acquire the initial storage space parameters of the at least one target device when it is determined that there is at least one target device in the device list of the target system, wherein the target device is a device that supports adjusting the storage space. Selection module 304 is configured to obtain the bus address space corresponding to the device list and select the target adjustment strategy corresponding to the at least one target device according to the bus address space; The update module 306 is configured to update the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, wherein the target storage space parameters of the at least one target device are used to adjust the storage space of the at least one target device when the target system is running.

[0099] Optionally, it is further configured to perform a device scan on the device list of the target system to determine the device configuration information corresponding to at least one initial device; and to determine at least one target device from the at least one initial device based on the device configuration information corresponding to the at least one initial device.

[0100] Optionally, it is further configured to determine a set of storage space parameters for the at least one target device; and select initial storage space parameters for the at least one target device from the set of storage space parameters.

[0101] Optionally, it is further configured to calculate a space budget to be adjusted based on the initial storage space parameters of the at least one target device; compare the space budget to be adjusted with the bus address space; and select a target adjustment strategy corresponding to the at least one target device from a preset adjustment strategy set based on the comparison result.

[0102] Optionally, it is further configured to, if the comparison result determines that the bus address space meets the space budget to be adjusted, select an allocation adjustment strategy from a preset adjustment strategy set as the target adjustment strategy corresponding to the at least one target device; if the comparison result determines that the bus address space does not meet the space budget to be adjusted, select a rollback adjustment strategy, a downgrade adjustment strategy, or an iterative adjustment strategy from the preset adjustment strategy set as the target adjustment strategy corresponding to the at least one target device.

[0103] Optionally, it is further configured to use the initial storage space parameters of the at least one target device as the target storage space parameters of the at least one target device in accordance with the allocation adjustment strategy.

[0104] Optionally, it is further configured to determine the basic storage space parameters of the at least one target device according to the rollback adjustment strategy, wherein the basic storage space parameters are the default size of the storage space of the at least one target device; and use the basic storage space parameters as the storage space parameters of the at least one target device.

[0105] Optionally, it is further configured to determine the type of resource to be downgraded according to the downgrade adjustment strategy, and determine the target resource type corresponding to the at least one target device; if the target resource type corresponding to the at least one target device is the same as the downgraded resource type, the basic storage space parameter of the at least one target device is used as the target storage space parameter of the at least one target device, wherein the basic storage space parameter is the default size of the storage space of the at least one target device; if the target resource type corresponding to the at least one target device is different from the downgraded resource type, the initial storage space parameter of the at least one target device is used as the target storage space parameter of the at least one target device.

[0106] Optionally, it is further configured to determine the secondary storage space parameters of the at least one target device according to the iterative adjustment strategy, wherein the secondary storage space parameters are adjacent to the initial storage space parameters of the at least one target device; calculate the target space budget based on the secondary storage space parameters of the at least one target device; if the bus address space satisfies the target space budget, use the secondary storage space parameters as the target storage space parameters of the at least one target device; if the bus address space does not satisfy the target space budget, use the secondary storage space parameters as the initial storage space parameters of the at least one target device, and continue to determine the secondary storage space parameters of the at least one target device according to the iterative adjustment strategy until the secondary storage space parameters are used as the target storage space parameters of the at least one target device.

[0107] Optionally, it is further configured to, when the target system is running and a storage space adjustment request for the at least one target device is received, determine the target storage space parameters and preset storage space parameters of the at least one target device; verify the target storage space parameters using the preset storage space parameters; and, if the verification is successful, adjust the storage space of the target device based on the target storage space parameters.

[0108] The above is a schematic scheme of a storage space processing device according to this embodiment. It should be noted that the technical solution of this storage space processing device and the technical solution of the storage space processing method described above belong to the same concept. For details not described in detail in the technical solution of the storage space processing device, please refer to the description of the technical solution of the storage space processing method described above.

[0109] Figure 4 A structural block diagram of a computing device 400 according to one embodiment of this specification is shown. The components of the computing device 400 include, but are not limited to, a memory 410 and a processor 420. The processor 420 is connected to the memory 410 via a bus 430, and a database 450 is used to store data.

[0110] The computing device 400 also includes an access device 440, which enables the computing device 400 to communicate via one or more networks 460. Examples of these networks include Public Switched Telephone Network (PSTN), Local Area Network (LAN), Wide Area Network (WAN), Personal Area Network (PAN), or combinations of communication networks such as the Internet. The access device 440 may include one or more of any type of wired or wireless network interface (e.g., a network interface card (NIC)), such as an IEEE 802.11 Wireless Local Area Network (WLAN) wireless interface, a Wi-MAX (Worldwide Interoperability for Microwave Access) interface, an Ethernet interface, a Universal Serial Bus (USB) interface, a cellular network interface, a Bluetooth interface, or a Near Field Communication (NFC) interface.

[0111] In one embodiment of this specification, the aforementioned components of the computing device 400 and Figure 4 Other components, not shown, can also be connected to each other, for example, via a bus. It should be understood that... Figure 4 The block diagram of the computing device shown is for illustrative purposes only and is not intended to limit the scope of this specification. Those skilled in the art can add or replace other components as needed.

[0112] The computing device 400 can be any type of stationary or mobile computing device, including mobile computers or mobile computing devices (e.g., tablet computers, personal digital assistants, laptop computers, notebook computers, netbooks, etc.), mobile phones (e.g., smartphones), wearable computing devices (e.g., smartwatches, smart glasses, etc.) or other types of mobile devices, or stationary computing devices such as desktop computers or personal computers (PCs). The computing device 400 can also be a mobile or stationary server.

[0113] The processor 420 is configured to execute the following computer-executable instructions, which, when executed by the processor, implement the steps of the above-described storage space processing method.

[0114] The above is an illustrative scheme of a computing device according to this embodiment. It should be noted that the technical solution of this computing device and the technical solution of the storage space processing method described above belong to the same concept. For details not described in detail in the technical solution of the computing device, please refer to the description of the technical solution of the storage space processing method described above.

[0115] An embodiment of this specification also provides a computer-readable storage medium storing computer-executable instructions that, when executed by a processor, implement the steps of the above-described storage space processing method.

[0116] The above is an illustrative scheme of a computer-readable storage medium according to this embodiment. It should be noted that the technical solution of this storage medium and the technical solution of the storage space processing method described above belong to the same concept. For details not described in detail in the technical solution of the storage medium, please refer to the description of the technical solution of the storage space processing method described above.

[0117] An embodiment of this specification also provides a computer program product, including a computer program or instructions that, when executed by a processor, implement the steps of the above-described storage space processing method.

[0118] The above is an illustrative scheme of a computer program product according to this embodiment. It should be noted that the technical solution of this computer program product and the technical solution of the storage space processing method described above belong to the same concept. For details not described in detail in the technical solution of the computer program product, please refer to the description of the technical solution of the storage space processing method described above.

[0119] The foregoing has described specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are possible or may be advantageous.

[0120] The computer instructions include computer program code, which may be in the form of source code, object code, executable file, or certain intermediate forms. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording media, USB flash drive, portable hard drive, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium may be appropriately added or removed according to the requirements of patent practice. For example, in some regions, according to patent practice, computer-readable media may not include electrical carrier signals and telecommunication signals.

[0121] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments in this specification are not limited to the described order of actions, because according to the embodiments in this specification, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in this specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to the embodiments in this specification.

[0122] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0123] The preferred embodiments disclosed above are merely illustrative of this specification. Optional embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the embodiments described in this specification. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of the embodiments, thereby enabling those skilled in the art to better understand and utilize this specification.

Claims

1. A storage space processing method, comprising: If it is determined that there is at least one target device in the device list of the target system, the initial storage space parameters of the at least one target device are obtained, wherein the target device is a device that supports adjusting the storage space. If the target device supports Resizable BAR, the firmware releases the enumeration allocation record of the at least one target device and reallocates it based on the first large BAR space capability supported by the hardware layer of the at least one target device through the kernel PCIe realloc process. Obtain the bus address space corresponding to the device list, calculate the space budget to be adjusted based on the initial storage space parameters of the at least one target device, compare the space budget to be adjusted with the bus address space, and select the target adjustment strategy corresponding to the at least one target device based on the comparison result. The initial storage space parameters of the at least one target device are updated according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, wherein the target storage space parameters of the at least one target device are used to adjust the storage space of the at least one target device when the target system is running; When the target system is running and receives a BAR space adjustment request for at least one target device, the BAR space is adjusted by modifying the Resizable BAR Extended Capability control register of the at least one target device. The adjustment of the BAR space does not require adjustment of the memory / IO window of the PCIe Switch or the BAR space of other PCIe devices.

2. The method according to claim 1, before obtaining the initial storage space parameters of the at least one target device, the method further includes: Perform a device scan on the device list of the target system to determine the device configuration information corresponding to at least one initial device; Based on the device configuration information corresponding to the at least one initial device, at least one target device is determined from the at least one initial device.

3. The method according to claim 1, wherein obtaining the initial storage space parameters of the at least one target device includes: Determine the set of storage space parameters for the at least one target device; From the set of storage space parameters, select the initial storage space parameters of the at least one target device.

4. The method according to claim 1, wherein selecting a target adjustment strategy corresponding to the at least one target device based on the comparison result includes: If the bus address space meets the space budget to be adjusted based on the comparison results, an allocation adjustment strategy is selected from the preset adjustment strategy set as the target adjustment strategy corresponding to the at least one target device. If the bus address space does not meet the budget of the space to be adjusted based on the comparison results, a rollback adjustment strategy, a downgrade adjustment strategy, or an iterative adjustment strategy is selected from the preset adjustment strategy set as the target adjustment strategy for the at least one target device.

5. The method according to claim 4, wherein the target adjustment strategy is an allocation adjustment strategy; The initial storage space parameters of the at least one target device are updated according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, including: According to the allocation adjustment strategy, the initial storage space parameters of the at least one target device are used as the target storage space parameters of the at least one target device.

6. The method according to claim 4, wherein the target adjustment strategy is a rollback adjustment strategy; The initial storage space parameters of the at least one target device are updated according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, including: The basic storage space parameters of the at least one target device are determined according to the rollback adjustment strategy, wherein the basic storage space parameters are the default size of the storage space of the at least one target device; The basic storage space parameters are used as the target storage space parameters of the at least one target device.

7. The method according to claim 4, wherein the target adjustment strategy is a downgrade adjustment strategy; The initial storage space parameters of the at least one target device are updated according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, including: The type of resource to be downgraded is determined according to the downgrade adjustment strategy, and the target resource type corresponding to the at least one target device is determined. If the target resource type corresponding to the at least one target device is the same as the resource type to be downgraded, the basic storage space parameter of the at least one target device shall be used as the target storage space parameter of the at least one target device, wherein the basic storage space parameter is the default size of the storage space of the at least one target device; If the target resource type corresponding to the at least one target device is different from the resource type to be downgraded, the initial storage space parameter of the at least one target device shall be used as the target storage space parameter of the at least one target device.

8. The method according to claim 4, wherein the target adjustment strategy is an iterative adjustment strategy; The initial storage space parameters of the at least one target device are updated according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device, including: The secondary storage space parameters of the at least one target device are determined according to the iterative adjustment strategy, wherein the secondary storage space parameters are adjacent to the initial storage space parameters of the at least one target device. Calculate the target space budget based on the secondary storage space parameters of the at least one target device; If the bus address space satisfies the target space budget, the secondary storage space parameters shall be used as the target storage space parameters of the at least one target device. If the bus address space does not meet the target space budget, the secondary storage space parameters are used as the initial storage space parameters of the at least one target device, and the process of determining the secondary storage space parameters of the at least one target device according to the iterative adjustment strategy continues until the secondary storage space parameters are used as the target storage space parameters of the at least one target device.

9. The method according to any one of claims 1-8, further comprising: When the target system is running and a storage space adjustment request for the at least one target device is received, the target storage space parameters and preset storage space parameters of the at least one target device are determined. The target storage space parameters are verified using the preset storage space parameters. If the verification is successful, the storage space of the target device is adjusted based on the target storage space parameters.

10. A storage space processing apparatus, comprising: The acquisition module is configured to, when it is determined that there is at least one target device in the device list of the target system, acquire the initial storage space parameters of the at least one target device, wherein the target device is a device that supports adjusting storage space; and, if the target device supports Resizable BAR, release the enumeration allocation record of the at least one target device by the firmware, and reallocate the storage space based on the first large BAR space capability supported by the hardware layer of the at least one target device through the kernel PCIe realloc process. The selection module is configured to obtain the bus address space corresponding to the device list, calculate the space budget to be adjusted based on the initial storage space parameters of the at least one target device, compare the space budget to be adjusted with the bus address space, and select the target adjustment strategy corresponding to the at least one target device based on the comparison result. The update module is configured to update the initial storage space parameters of the at least one target device according to the target adjustment strategy to obtain the target storage space parameters of the at least one target device. These target storage space parameters are used to adjust the storage space of the at least one target device when the target system is running. When the target system is running and a BAR space adjustment request for the at least one target device is received, the BAR space adjustment is implemented by modifying the Resizable BAR Extended Capability control register of the at least one target device. The BAR space adjustment does not require adjustment of the memory / IO window of the PCIe Switch or the BAR space of other PCIe devices.

11. A computing device, comprising: Memory and processor; The memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions, which, when executed by the processor, implement the steps of the storage space processing method according to any one of claims 1 to 9.

12. A computer-readable storage medium storing computer-executable instructions that, when executed by a processor, implement the steps of the storage space processing method according to any one of claims 1 to 9.

13. A computer program product comprising a computer program or instructions which, when executed by a processor, implement the steps of the storage space processing method of any one of claims 1 to 9.

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