Picture rendering method and electronic equipment

Abstract

The invention discloses a picture rendering method and electronic equipment, and relates to the technical field of electronic equipment. The picture rendering time can be reduced, and the rendering efficiency is improved. The method is applied to the electronic equipment, the electronic equipment is provided with a CPU, a GPU, a storage device and a display screen, and the method comprises the steps that the electronic equipment obtains a to-be-rendered picture, and the CPU stores texture compression data corresponding to the to-be-rendered picture into the storage device. Wherein the texture compression data are arranged according to an arrangement mode adopted by the GPU, and the texture compression data are picture data in a texture compression format. Then, the CPU obtains the texture compression data from the storage device and stores the texture compression data in the first memory. And then the GPU renders the texture compression data in the first memory to a display screen.

Description

Technical Field

[0001] This application relates to the field of electronic device technology, and in particular to image rendering methods and electronic devices. Background Technology

[0002] Current image rendering methods first store texture-compressed image data in the central processing unit (CPU) memory. Then, this data is copied to the graphics processing unit (GPU) memory. Finally, the image data in the GPU memory is rendered onto the display screen, completing the image rendering process. Furthermore, before rendering the image data from the GPU memory to the display screen, the GPU rearranges the layout of the image data in memory to optimize its arrangement. This image rendering method is time-consuming and relatively inefficient. Summary of the Invention

[0003] This application provides an image rendering method and an electronic device that can reduce the time required for image rendering and improve rendering efficiency.

[0004] To achieve the above objectives, this application adopts the following technical solution:

[0005] In a first aspect, an image rendering method is provided, applied to an electronic device, the electronic device being configured with a central processing unit (CPU), a graphics processing unit (GPU), a storage device, and a display screen. The method includes: the electronic device acquiring an image to be rendered; the CPU storing texture compression data corresponding to the image to be rendered into the storage device, the texture compression data being arranged according to the arrangement method adopted by the GPU, and the texture compression data being image data in a texture compression format; the CPU acquiring the texture compression data from the storage device; the CPU storing the texture compression data into a first memory; and the GPU rendering the texture compression data in the first memory onto the display screen.

[0006] Based on the above technical solution, after the electronic device acquires the image to be rendered, it can pre-arrange the corresponding texture compression data of the image according to the arrangement method adopted by the GPU and save it to the storage device. Then, when rendering the image, the CPU retrieves the texture compression data of the image from the storage device, and this texture compression data has already been pre-arranged according to the arrangement method adopted by the GPU. Subsequently, the GPU can directly render the texture data to the display screen without performing the arrangement operation again. The texture compression data arrangement process and the image rendering process are decoupled. In this way, only one arrangement operation is required. Subsequently, when rendering the image, the pre-arranged texture compression data of the image can be directly retrieved from the storage device, and the GPU does not need to perform the arrangement operation again. This saves the GPU's time in performing the arrangement operation, reduces the time consumption of image rendering, and improves rendering efficiency.

[0007] In one possible design, both the CPU and the GPU can access the first memory. This allows the CPU to store the acquired compressed texture data in memory accessible to both the GPU and the CPU, eliminating the need for the GPU to copy the compressed texture data to its own memory. This saves time on the copy operation, reducing image rendering time and improving rendering efficiency.

[0008] In one possible design, the CPU can access the first memory, but the GPU cannot. The GPU renders the compressed texture data from the first memory onto the display screen, including: the GPU storing the compressed texture data in a second memory, which the GPU can access, but the CPU cannot; and the GPU then renders the compressed texture data from the second memory onto the display screen. Thus, when the CPU stores the acquired compressed texture data in memory accessible to the CPU, the GPU cannot access that memory. Therefore, the GPU copies the compressed texture data from that memory to memory accessible to the GPU, enabling efficient rendering of the compressed texture data by the GPU.

[0009] In one possible design, the image to be rendered is in either an image compression format or a texture compression format. This way, the pre-arranged scheme is applicable regardless of the format of the image acquired by the electronic device, such as an image compression format or a texture compression format.

[0010] In one possible design, the image to be rendered is in an image compression format; the CPU stores the texture compression data corresponding to the image to be rendered in the storage device, including: the CPU encodes the image to be rendered into the texture compression data, and stores the texture compression data in the storage device.

[0011] In one possible design, the size of the image to be rendered is greater than or equal to a preset size. Since images larger than or equal to the preset size take longer to render, this design can significantly reduce rendering time and improve rendering efficiency.

[0012] In one possible design, the first memory is inter-process communication (ION) memory on non-contiguous memory.

[0013] In one possible design, the first memory is the anonymous shared memory Ashmem.

[0014] Secondly, an image rendering method is provided, applied to an electronic device, the electronic device being configured with a CPU, a GPU, a storage device, and a display screen. The method includes: the CPU obtaining texture compression data corresponding to an image to be rendered from the storage device, the texture compression data being image data in a texture compression format; the CPU storing the texture compression data in a first memory, the texture compression data being arranged in the first memory according to the arrangement method adopted by the GPU; and the GPU rendering the texture compression data in the first memory onto the display screen.

[0015] Based on the above technical solution, after the CPU obtains the texture compression data corresponding to the image to be rendered from the storage device, it pre-arranges the texture compression data according to the arrangement method adopted by the GPU and saves it into memory. Subsequently, the GPU does not need to perform the operation of arranging and saving the texture compression data in memory into memory accessible to the GPU. This saves the time of the GPU to perform data copying and arrangement, which can reduce the time consumption of image rendering and improve rendering efficiency.

[0016] Thirdly, an image rendering method is provided, applied to an electronic device, the electronic device being configured with a CPU, a GPU, and a display screen. The method includes: the CPU acquiring texture compression data corresponding to an image to be rendered, the texture compression data being image data in a texture compression format; the CPU storing the texture compression data in a first memory, both the CPU and the GPU being able to access the first memory; and the GPU rendering the texture compression data in the first memory onto the display screen.

[0017] In one possible design, the texture compression data is arranged in the first memory according to the arrangement method adopted by the CPU; the GPU renders the texture compression data in the first memory onto the display screen, including: the GPU storing the texture compression data in the first memory into a second memory, the second memory being the memory of the GPU, the texture compression data being arranged in the second memory according to the arrangement method adopted by the GPU, the arrangement method adopted by the GPU being different from the arrangement method adopted by the CPU; the GPU rendering the texture compression data in the second memory onto the display screen.

[0018] Fourthly, a method for rendering images is provided, applied to an electronic device, the electronic device being equipped with a CPU, a GPU, and a display screen. The method includes: the CPU acquiring texture compression data corresponding to an image to be rendered, the texture compression data being image data in texture compression format, and the size of the image to be rendered being smaller than a preset size; the CPU storing the texture compression data in a third memory, the CPU being able to access the third memory, and the GPU being unable to access the third memory; the GPU storing the texture data in the third memory in a fourth memory, the GPU being able to access the fourth memory; and the GPU rendering the texture compression data in the fourth memory onto the display screen.

[0019] In one possible design, the texture compression data is arranged in the fourth memory according to the arrangement method adopted by the CPU; the GPU renders the first texture compression data in the fourth memory onto the display screen, including: the GPU storing the texture compression data in the fourth memory into a fifth memory, the GPU being able to access the fifth memory, the fifth memory being different from the fourth memory, the texture compression data being arranged in the fifth memory according to the arrangement method adopted by the GPU, the arrangement method adopted by the GPU being different from the arrangement method adopted by the CPU; the GPU rendering the texture compression data in the fifth memory onto the display screen.

[0020] In one possible design, the electronic device is further configured with a storage device; the CPU acquires the texture compression data corresponding to the second image to be rendered, including: the CPU acquires the texture compression data from the storage device, wherein the texture compression data is arranged in the storage device, the third memory, and the fourth memory according to the arrangement method adopted by the GPU.

[0021] Fifthly, an electronic device is provided that has the function of implementing the method described in any of the designs of any of the preceding aspects. This function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the described function.

[0022] A sixth aspect provides an electronic device comprising: a processor, a display screen, and a memory, the processor including a CPU and a GPU, the memory and the display screen being coupled to the processor, the memory storing program code including instructions, and the processor reading the instructions from the memory to cause the electronic device to perform the method as described in any of the designs of any of the preceding aspects. Optionally, the memory may be coupled to the processor or may be independent of the memory. The display screen can be used by the electronic device to perform display operations.

[0023] A seventh aspect provides a computer-readable storage medium comprising a computer program that, when executed on an electronic device, causes the electronic device to perform the method as described in any of the preceding aspects.

[0024] Eighthly, a computer program product is provided, the computer program product comprising: a computer program or instructions that, when the computer program or instructions are run on a computer, cause the computer to perform the method as designed in any of the preceding aspects.

[0025] A ninth aspect provides a chip system including at least one processor and at least one interface circuit, the at least one interface circuit being used to perform transceiver functions and send instructions to at least one processor, wherein when at least one processor executes instructions, at least one processor performs the method as described in any of the designs in any of the preceding aspects.

[0026] The technical effects of the aforementioned aspects can be referenced from each other, and will not be elaborated further here. Attached Figure Description

[0027] Figure 1 This is a schematic diagram illustrating a rendering scheme provided in an embodiment of this application;

[0028] Figure 2 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0029] Figure 3 A flowchart illustrating an image rendering method provided in an embodiment of this application;

[0030] Figure 4 A schematic diagram illustrating the linear arrangement of texture compression data in memory, as provided in an embodiment of this application;

[0031] Figure 5 A schematic diagram illustrating the arrangement of texture compression data in memory using "Z" and "I" shaped order, as provided in an embodiment of this application;

[0032] Figure 6 A flowchart illustrating yet another image rendering method provided in an embodiment of this application;

[0033] Figure 7 A flowchart illustrating yet another image rendering method provided in an embodiment of this application;

[0034] Figure 8 A flowchart illustrating yet another image rendering method provided in an embodiment of this application;

[0035] Figure 9 This application provides a schematic diagram of an image rendering process in a Vulkan scenario.

[0036] Figure 10 This is a schematic diagram illustrating another image rendering process in a Vulkan scenario provided in an embodiment of this application;

[0037] Figure 11 A flowchart illustrating yet another image rendering method provided in an embodiment of this application;

[0038] Figure 12 This is a schematic diagram of a chip system provided in an embodiment of this application. Detailed Implementation

[0039] In the description of this application, unless otherwise stated, " / " indicates that the objects before and after are in an "or" relationship. For example, A / B can mean A or B. "And / or" in this application is merely a description of the relationship between the related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. A and B can be singular or plural.

[0040] In the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, at least one of a, b, or c can mean: a, b, c, a and b, a and c, b and c, a and b and c, where a, b, and c can be single or multiple.

[0041] Furthermore, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0042] In one image rendering scheme, the electronic device first stores the texture-compressed image data (also known as texture compressed data, texture image data, texture data, etc., hereinafter referred to as texture compressed data) in the memory of the central processing unit (CPU). Then, the texture compressed data in the CPU memory is copied to the memory of the graphics processing unit (GPU). Finally, the texture compressed data in the GPU memory is rendered onto the display screen, thus completing the image rendering.

[0043] As we can understand it, a texture compression format is an image format specifically designed for storing textures in graphics rendering systems. This image format compresses the image by independently encoding image blocks, offering features such as random access and high decoding parallelism, and is currently supported by most graphics cards. Common texture compression formats include adaptive scalable texture compression (ASTC).

[0044] For example, Figure 1 A schematic diagram of the rendering process for the above rendering scheme is shown. For example... Figure 1 As shown, images (such as Image 1, Image 2, etc.) can be stored in universal flash storage (UFS) in electronic devices. UFS is a storage device that can permanently store data; the data stored in UFS will not disappear even after the electronic device is powered off. Figure 1 The example used is UFS, but images can also be stored on other types of storage devices, including but not limited to embedded multimedia memory cards (eMMC) and hard disks.

[0045] Optionally, the images stored in UFS can be images captured by tools such as cameras, images downloaded from the network, or images pre-installed in application installation packages. This application embodiment does not limit the source of the images stored in UFS. Optionally, the images stored in UFS can be in texture compression formats or image compression formats, such as, but not limited to, JPG, PNG, JPEG, and other image compression formats.

[0046] Taking image 1 as an example, which uses a texture compression format, combined with... Figure 1 The process of rendering image 1 will be described. For example... Figure 1 As shown, the CPU in the electronic device executes step 1, reading the data of image 1, i.e., the texture compression data, from the UFS. Then, it executes step 2.1, storing the texture compression data in the CPU's memory. Since the GPU cannot access the CPU's memory, the electronic device then executes step 3, copying the texture compression data from the CPU's memory to the GPU's memory 1. GPU memory 1 can be a block of memory allocated from the GPU's memory. GPU memory 1 is bound to a handle 1 (which can be called an upload buffer handle), allowing the GPU to access the texture compression data in memory 1.

[0047] In some scenarios, to improve rendering efficiency, the GPU may use a different memory layout than the CPU memory before rendering the compressed texture data in memory 1. That is, the arrangement of compressed texture data in GPU memory differs from its arrangement in CPU memory. Therefore, as... Figure 1 As shown, during the rendering of image 1, after executing step 3, the electronic device will also execute step 4, which rearranges the texture compression data in GPU memory 1 and stores it in GPU memory 2. GPU memory 2 can also be a block of memory allocated from the GPU's memory. GPU memory 2 is also bound to a handle 2 (which can be called an image handle), allowing the GPU to access the texture compression data in memory 2 through handle 2.

[0048] It is understandable that in this scenario, the arrangement of texture compression data in CPU memory is the same as that in GPU memory 1, but the arrangement of texture compression data in GPU memory 1 is different from that in GPU memory 2.

[0049] Then, as Figure 1As shown, after executing step 4, the GPU executes step 5, accessing the texture compression data in memory 2 through handle 2 and rendering the texture compression data. Finally, the electronic device executes step 6, sending the rendered texture compression data to the display screen for display.

[0050] Taking image 2 as an example of image compression format, combined with Figure 1 The process of rendering image 2 is described below. Similar to the rendering process of image 1, the CPU of the electronic device reads the data of image 2 from the UFS by executing step 1. Then, the CPU can execute step 2.2 to encode the data of image 2 into texture compressed data and store the encoded texture compressed data in the CPU's memory. Subsequently, the electronic device can also render image 2 onto the display screen by executing steps 3 to 6 above.

[0051] In the above image rendering scheme, the electronic device needs to perform various operations such as copying data from the CPU memory to the GPU memory and arranging the data in the GPU memory when rendering images, which makes the image rendering time long and the efficiency relatively low.

[0052] Based on this, this application provides an image rendering method that can save at least one of the following operations during the image rendering process: copying data from CPU memory to GPU memory and arranging data in GPU memory. This can reduce the time consumed by image rendering and improve rendering efficiency.

[0053] The technical solutions provided in this application can be applied to electronic device 100 or to a system having electronic device 100.

[0054] Electronic device 100 can be a mobile phone, a personal digital assistant (PDA), a desktop computer, a laptop computer, a handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, as well as augmented reality (AR) devices, virtual reality (VR) devices, artificial intelligence (AI) devices, wearable devices, in-vehicle devices, smart home devices, and / or smart city devices. Optionally, electronic device 100 can be a fixed device or a portable device. Optionally, the operating system installed on electronic device 100 can include, but is not limited to, […]. Alternatively, other operating systems may be used. This application does not impose specific limitations on the specific type of electronic device or the operating system installed.

[0055] For example, Figure 2 A schematic diagram of the structure of an electronic device 100 provided in an embodiment of this application is shown.

[0056] like Figure 2 As shown, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, buttons 180, a display screen 190, etc.

[0057] Processor 110 may include multiple processing units, such as a CPU, GPU, etc. Optionally, processor 110 may also include an application processor (AP), a modem processor, an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0058] In some embodiments of this application, the CPU can be used to perform operations such as reading data from internal memory 121, external memory, etc., and encoding image compression format data into texture compression format data. In still other embodiments of this application, the CPU can also be used to perform operations such as arranging texture compression data. In some embodiments, the CPU may be provided with memory for storing instructions and data. The memory provided in the CPU is the CPU's main memory. In the embodiments of this application, the memory accessible by the CPU may be the CPU's main memory or may not be the CPU's main memory.

[0059] In some embodiments of this application, the GPU can be used to perform image rendering operations. In still other embodiments, the GPU can also be used to perform operations on arranging texture compression data. In some embodiments, the GPU may also have memory for storing instructions and data. The memory provided in the GPU is the GPU's main memory. In the embodiments of this application, the memory accessible to the GPU may or may not be the GPU's main memory.

[0060] Optionally, the CPU's memory or GPU's memory can be implemented as a cache memory. This memory can store instructions or data that the CPU or GPU has just used or is recurring. If the CPU or GPU needs to use the instruction or data again, it can be directly retrieved from the memory. This avoids repeated accesses, reduces the CPU or GPU's waiting time, and thus improves system efficiency.

[0061] In some embodiments, processor 110 may include one or more interfaces, such as USB interface 130.

[0062] The charging management module 140 receives charging input from the charger. While charging the battery 142, the charging management module 140 can also supply power to the electronic device through the power management module 141.

[0063] The power management module 141 is used to connect the battery 142, the charging management module 140, and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140 to power the processor 110, internal memory 121, display screen 190, and wireless communication module 160, etc.

[0064] The wireless communication function of electronic device 100 can be realized through antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, modem processor and baseband processor, etc.

[0065] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover one or more communication frequency bands. Different antennas can also be reused to improve antenna utilization.

[0066] The mobile communication module 150 can provide wireless communication solutions, including 2G / 3G / 4G / 5G, for use on electronic devices 100.

[0067] The wireless communication module 160 can provide solutions for wireless communication applications on the electronic device 100, including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), Starflash, global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR) technology, etc.

[0068] In some embodiments, antenna 1 of electronic device 100 is coupled to mobile communication module 150, and antenna 2 is coupled to wireless communication module 160, enabling electronic device 100 to communicate with networks and other devices via wireless communication technology. The wireless communication technology may include Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Time-Division Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), BT, Starflash, GNSS, WLAN, NFC, FM, and / or IR technologies, etc.

[0069] The display screen 190 is used to display images, videos, etc. The display screen 190 includes a display panel. In some embodiments of this application, the display screen 190 can be used to display rendered pictures.

[0070] The external memory interface 120 can be used to connect an external memory card (or described as an external storage device), such as a MicroSD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to perform data storage functions. For example, music, video, and other files can be stored on the external memory card. In some embodiments of this application, the external memory card can also be used to store data of an image to be rendered. This data can be in an image compression format or a texture compression format and not arranged according to the GPU's layout, or it can be texture compression data arranged according to the GPU's layout.

[0071] Internal memory 121 can be used to store computer executable program code, which includes instructions. Internal memory 121 may include a program storage area and a data storage area. The program storage area may store the operating system, applications required for at least one function, etc. The data storage area may store data created during the use of electronic device 100, etc. In addition, internal memory 121 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc. Processor 110 executes various functional applications and data processing of electronic device 100 by running instructions stored in internal memory 121 and / or instructions stored in memory disposed in the processor.

[0072] In some embodiments of this application, the internal memory 121 can be used to provide memory that is accessible to both the CPU and the GPU, meaning that both the CPU and the GPU can access this memory. In still other embodiments of this application, the internal memory 121 can also be used to store data of an image to be rendered. In some implementations, the data of the image to be rendered can be data in an image compression format or a texture compression format that is not arranged according to the layout adopted by the GPU. In other implementations, the data of the image to be rendered can be texture-compressed data that is arranged according to the layout adopted by the GPU.

[0073] The audio module 170 is used to convert digital audio information into analog audio signal output, and also to convert analog audio input into digital audio signal.

[0074] Buttons 180 include a power button, volume buttons, etc. Buttons 180 can be mechanical buttons or touch-sensitive buttons. Electronic device 100 can receive button input and generate key signal inputs related to user settings and function control of electronic device 100.

[0075] Understandable Figure 2 The illustrated structure does not constitute a specific limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The processing steps or functional characteristics of the illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0076] The technical solutions involved in the following embodiments can all be applied to applications with, for example, Figure 2 Implemented in the device with the structure shown.

[0077] In some embodiments, the electronic device may provide memory accessible to both the CPU and GPU. This memory, which allows cross-hardware access, can be interprocess communication over non-contiguous memory (ION) memory or direct memory access (DMA) memory. For example, the electronic device may employ a uniform memory access (UMA) architecture, in which the CPU and GPU can access the same segment of physical memory.

[0078] In this embodiment, Figure 3 A schematic flowchart of an image rendering method provided in an embodiment of this application is shown. Figure 3 As shown, taking image 1 as an example, the CPU can execute step 1 to read the data of image 1 from the UFS. Then, the CPU can execute step 2 to store the texture compressed data corresponding to image 1 into memory a. It can be understood that the texture compressed data mentioned in this embodiment can refer to texture data obtained through texture compression, such as including but not limited to ASTC data.

[0079] When image 1 is stored on UFS in an image compression format, the CPU can first encode the data of image 1 read from UFS into texture compressed data, and then store the encoded texture compressed data in memory 'a'. Specifically, the CPU can first decode the data of image 1 into RGBA data, and then encode the RGBA data into texture compressed data. When image 1 is stored on UFS in a texture compressed format, the data of image 1 read by the CPU from UFS is the texture compressed data, and the CPU can directly store the read texture compressed data in memory 'a'.

[0080] Here, memory 'a' can be a block of memory allocated from the electronic device when rendering image 1, such as from... Figure 2The memory requested in the internal memory 121 shown. When requesting this memory, the type of memory can be specified as memory accessible to both the CPU and GPU, such as ION memory. Memory a can be bound to a handle 1 (i.e., upload buffer handle), through which the GPU can directly access the texture compression data in memory a and then render the texture compression data onto the display screen. Optionally, before the GPU accesses the texture compression data in memory a through handle 1, the electronic device can also pass the type of memory a, file descriptor (FD), etc., to the GPU. The file descriptor can be used by the GPU to determine memory a. The type of memory a can be used by the GPU to determine whether the data in memory a can be directly accessed.

[0081] In some scenarios, the way texture compressed data is arranged in memory by the GPU differs from that of the CPU. This arrangement of texture compressed data in memory can refer to the arrangement of the read addresses or the reading method of the texture compressed data.

[0082] For example, the CPU can be arranged linearly. For instance, Figure 4 This diagram illustrates the linear arrangement of texture compression data in memory. Figure 4 As shown, for an image to be rendered, the corresponding texture compression data is stored sequentially in memory, line by line. For example, ... Figure 4 Each number shown in (1) (such as 0, 1, 2, 3, etc.) can represent a block of image data (or an image block), that is, a pixel. Figure 4 (1) Taking an image data block of 16*16 pixels as an example. Each image data block can include multiple pixels. Taking the image data represented by the number 0 as an example, the pixels included in this image data can be as follows: Figure 4 As shown in (2) Figure 4 (2) Only some pixels are shown). Among them, such as Figure 4 Each number shown in (2) (such as 0-9) can represent a pixel, and these pixels are also linearly arranged in memory.

[0083] GPUs can be arranged in either Z-order or I-order. For example, Figure 5 This diagram illustrates how texture compressed data is arranged in memory using both "Z" and "I" shaped orders. (See diagram for example.) Figure 5 As shown in (1), for an image to be rendered, the GPU first divides the image into 64*64 pixel sections. Figure 5As shown in (2), for each 64*64 pixel image block, the GPU will divide it into 4×4 image blocks, which can be simply referred to as large blocks. Figure 5 Each number shown in (2) represents a large block. These blocks are arranged in a "Z" shaped order. Then, as... Figure 5 As shown in (3), for such Figure 5 Each large block shown in (2) is further divided by the GPU into 4×4 image blocks, which can be simply referred to as medium blocks. Figure 5 Each number shown in (3) represents a middle block. These middle blocks are arranged in an "I" order. Finally, as Figure 5 As shown in (4), for such Figure 5 Each of the medium blocks shown in (3) is further divided by the GPU into 4×4 image blocks, which can be simply referred to as small blocks. Figure 5 Each number shown in (4) represents one small block. These blocks are arranged in a "Z" order.

[0084] It is understood that the embodiments in this application use a linear arrangement of the CPU and a "Z" or "I" shaped arrangement of the GPU as examples. These embodiments are also applicable to CPUs and GPUs using other different arrangement methods.

[0085] In this scenario, combined Figure 3 In the illustrated scheme, the texture compression data stored in memory a is linear. In some embodiments, before rendering the texture compression data stored in memory a onto the display screen, the GPU can further perform step 3, rearranging the texture compression data in memory a according to a "Z" order and an "I" order, and storing the rearranged data in memory b. Optionally, memory b can be a block of memory allocated from the GPU's memory, accessible to the GPU but not to the CPU. Alternatively, memory b can also be a block of memory allocated from an electronic device, accessible to both the CPU and the GPU. Memory b can also be bound to a handle 2 (i.e., an image handle). Finally, the GPU can perform step 4, accessing the texture compression data in memory b through handle 2 and rendering the texture compression data onto the display screen.

[0086] Optionally, in this embodiment, the arrangement operation of texture compression data performed by the GPU can be triggered by an arrangement task issued by the CPU. That is, the arrangement task issued by the CPU can be used to instruct the GPU to perform the arrangement operation of texture compression data. In this way, when the GPU receives the arrangement task issued by the CPU, it can arrange the texture compression data according to the arrangement method adopted by the GPU.

[0087] based on Figure 3The proposed solution eliminates the need to copy texture compression data from the CPU's memory to the GPU's memory during image rendering, saving the time required for this copying operation, thus reducing rendering time and improving rendering efficiency.

[0088] In some embodiments, the electronic device may also perform the texture arrangement operation in advance.

[0089] In this embodiment, as a possible implementation, the electronic device can arrange the texture compression data corresponding to the image according to the arrangement method adopted by the GPU (such as "Z" order and "I" order) before image rendering, and store the arranged texture compression data on a storage device such as UFS. It is understood that in this embodiment, the texture compression data stored on the storage device such as UFS will be permanently stored in the electronic device and will not disappear even if the electronic device is powered off. The texture compression data in memory (such as memory accessible by the CPU, memory accessible by the GPU, or memory accessible by both the CPU and GPU) is only temporarily stored in the electronic device. After an image is rendered, the texture compression data of that image stored in memory will be cleared. For example, when the electronic device acquires an image, it can encode the image into texture compression data and arrange the texture compression data according to the arrangement method adopted by the GPU. For example, the image acquired by the electronic device can include, but is not limited to, images captured by a camera or other tools, images downloaded from the network, or images pre-installed in an application installation package. Electronic devices can encode these acquired images into texture compressed data, arrange the texture compressed data according to the arrangement method adopted by the GPU, and then store it on storage devices such as UFS.

[0090] In this implementation, Figure 6 Figure (1) shows a flowchart of another image rendering method provided in an embodiment of this application. Figure 6 As shown in (1), taking image 1 stored in a storage device such as UFS as an example, image 1 is texture compressed data in a texture compression format and is arranged according to the arrangement method adopted by the GPU. When rendering image 1, the CPU can execute step 1 to read the texture compressed data of image 1 from UFS. Then, the CPU can execute step 2 to store the texture compressed data of image 1 in memory accessible to the CPU. In the embodiment of this application, the memory accessible to the CPU can be the CPU's memory. Since the GPU cannot access the memory accessible to the CPU, the electronic device then executes step 3 to copy the texture compressed data in the memory accessible to the CPU to memory 1 accessible to the GPU. In the embodiment of this application, the memory 1 accessible to the GPU can be as follows: Figure 1The image shows GPU memory 1. In this implementation, the GPU no longer needs to perform the operation of arranging the texture compression data in GPU-accessible memory 1, nor does it need to copy the texture compression data in GPU-accessible memory 1 to another memory block of the GPU, such as... Figure 1 In memory 2, as shown. Finally, the GPU can execute step 4, directly rendering the texture compression data in memory 1, which is accessible to the GPU, onto the display screen.

[0091] Optionally, memory 1 accessible by the GPU can be bound to handle 2. Handle 2 and Figure 1 The handle 2 shown can be the same. When executing step 3, the GPU can directly access the texture compression data in memory 1 through handle 2, and then render the texture compression data in memory 1 onto the display screen.

[0092] Based on this implementation, the texture compression data of the image is pre-arranged according to the GPU's layout method and saved to the storage device. The texture compression data arrangement process and the image rendering process are decoupled. This means that only one arrangement operation is needed. Subsequent rendering of the image can directly retrieve the pre-arranged texture compression data from the storage device, eliminating the need for the GPU to perform the arrangement operation again. This saves the GPU's time spent on arrangement operations, reducing image rendering time and improving rendering efficiency.

[0093] In this embodiment, as another possible implementation, when rendering an image, the electronic device, after obtaining the image from a storage device such as UFS, arranges the texture compression data corresponding to the image according to the arrangement method adopted by the GPU (such as "Z" order and "I" order).

[0094] In this implementation, Figure 6 Figure (2) shows a flowchart of another image rendering method provided in an embodiment of this application. Figure 6As shown in (2), taking the image to be rendered as image 1 as an example, when rendering image 1, the CPU can execute step 1 to read the data of image 1 from UFS. Then, the CPU can execute step 2 to arrange the texture compression data corresponding to image 1 according to the arrangement method adopted by the GPU, and store the arranged texture compression data in the memory accessible by the CPU. Among them, when image 1 is stored on storage devices such as UFS in image compression format, the CPU can first decode the read image 1 data into RGBA data, then encode the RGBA data into texture compression data, and store the texture compression data in the memory accessible by the CPU after arranging it according to the arrangement method adopted by the GPU. For example, the memory accessible by the CPU can be the CPU's memory. When image 1 is stored on storage devices such as UFS in texture compression format, the data of image 1 read by the CPU is the texture compression data, and the CPU can arrange the texture compression data according to the arrangement method adopted by the GPU and store it in the memory accessible by the CPU.

[0095] Similarly, as Figure 6 The process shown in (1) is similar. Since the GPU cannot access the memory that the CPU can access, the electronic device then executes step 3, copying the texture compression data from the CPU-accessible memory to the GPU-accessible memory 1. In this implementation, the GPU no longer needs to perform the operation of arranging the texture compression data in GPU-accessible memory 1, and it does not need to copy the texture compression data in GPU-accessible memory 1 to another memory block of the GPU, such as... Figure 1 In memory 2, as shown. Finally, the GPU can perform step 4, directly rendering the texture-compressed data from memory 1, which is accessible to the GPU, onto the display screen. About Figure 6 For an introduction to the handles bound to memory 1 that the GPU can access, as shown in (2), please refer to [reference needed]. Figure 6 The introduction shown in (1) is as follows.

[0096] Based on this implementation, after the CPU reads the image data to be rendered from storage devices such as UFS, it pre-arranges the corresponding texture compression data according to the layout method used by the GPU and saves it to memory accessible to the CPU but not the GPU. Subsequently, after the GPU copies the texture compression data from the CPU memory to the GPU-accessible memory, there is no need to perform the data copying process again. This saves the GPU's data copying time, reducing image rendering time and improving rendering efficiency.

[0097] Optional, Figure 3 and Figure 6 The illustrated solutions can be used individually or in combination. Figure 3 and Figure 6Taking the combined use of the scheme shown in (1) as an example, Figure 7 This illustration shows a flowchart of yet another image rendering method provided in an embodiment of this application. For example... Figure 7 As shown, taking Image 1 as an example, Image 1 contains texture-compressed data in a texture compression format, and its layout follows the GPU's arrangement. When rendering Image 1, the CPU can execute step 1, reading the texture-compressed data of Image 1 from the UFS. Then, the CPU can execute step 2, storing the texture-compressed data of Image 1 into memory 'a'. For an introduction to memory 'a', please refer to... Figure 3 The diagram shows an introduction to memory 'a'. Then, the GPU can execute step 3, directly rendering the texture compression data in memory 'a' onto the display screen. Optionally, memory 'a' can be directly bound to handle 2, allowing the GPU to directly access the texture compression data in memory 'a' and render it onto the display screen. For an introduction to handle 2, please refer to [link to relevant documentation]. Figure 6 The handle 2 described in (1) is introduced.

[0098] based on Figure 7 The proposed solution eliminates the need to copy texture compression data from the CPU's memory to the GPU's memory during image rendering, saving the time required for this copying operation. Furthermore, the texture compression data is pre-arranged according to the GPU's layout and stored in the storage device. This decoupling of the texture compression data arrangement process from the image rendering process ensures that the pre-arranged texture compression data can be directly retrieved from the storage device during subsequent image rendering. The GPU no longer needs to perform the arrangement operation, further saving GPU time. This reduces image rendering time and improves rendering efficiency.

[0099] Similarly, Figure 6 The scheme shown in (2) can also be combined with Figure 3 The solutions shown are used in combination. When used in combination, with... Figure 7 The difference in the proposed scheme is that, when rendering an image, the CPU does not directly store the data read from storage devices such as UFS into memory 'a'. Instead, it first arranges the texture compression data corresponding to the image according to the layout method used by the GPU, and then stores it into memory 'a'. Other processes are the same as... Figure 7 The process described is the same.

[0100] This combined approach eliminates the need to copy texture compression data from the CPU's memory to the GPU's memory during image rendering, saving the time required for this copy operation. Furthermore, after the CPU reads the image data to be rendered from storage devices such as UFS, it pre-arranges the corresponding texture compression data according to the GPU's layout and saves it to memory accessible to both the GPU and CPU. Subsequently, the GPU can directly render this texture compression data from memory to the display without performing the data copy process again, saving GPU time. This reduces image rendering time and improves rendering efficiency.

[0101] In some embodiments, for images with long rendering times, such as images larger than or equal to a preset size, a method such as... Figure 3 , Figure 6 , Figure 7 The solutions shown are as follows. For images with shorter rendering times, such as those smaller than a preset size, alternatives can be used. Figure 1 The scheme shown illustrates this. In other words, during image rendering, whether to perform the operation of copying compressed texture data from memory accessible to the CPU but not the GPU to memory accessible to the GPU, and / or whether to perform the pre-execution of texture arrangement, depends on the image size. When the image is larger than or equal to a preset size, the aforementioned operations can be omitted; otherwise, they can be performed. This significantly reduces image rendering time and improves rendering efficiency.

[0102] For example, in this embodiment, Figure 8 A schematic flowchart of an image rendering method provided in an embodiment of this application is shown. Figure 8 As shown, the method includes the following steps:

[0103] S801, The electronic device acquires the image.

[0104] For example, the image can be a picture taken by an electronic device using a camera or other tools, a picture downloaded from the Internet, or a picture obtained from the images pre-installed in the application installation package.

[0105] S802. The electronic device determines whether the image is larger than or equal to a preset size.

[0106] If the value is greater than or equal to the preset size, the electronic device executes steps S803 to S806. If the value is less than the preset size, the electronic device executes steps S807 and S811.

[0107] S803 The electronic device arranges the texture compression data corresponding to the image in the arrangement method adopted by the GPU and stores it in the storage device.

[0108] For example, in the embodiments of this application, the storage device can be as follows: Figure 2 The internal memory 121 shown can also be as follows: Figure 2 The external memory connected to the external memory interface 120 shown.

[0109] Furthermore, when it is necessary to render the image described in step S803, the electronic device may continue to execute steps S804 to S806.

[0110] S804: The CPU of the electronic device retrieves the texture compression data corresponding to the image from the storage device.

[0111] S805, the CPU stores the compressed texture data in memory a.

[0112] S806, the GPU of the electronic device renders the texture compression data in memory a onto the display screen.

[0113] It is understandable that steps S803 to S806 are based on the condition that the image is greater than or equal to a preset size, and the following steps are taken: Figure 7 The illustrated scheme is used as an example for explanation. For details on these steps, please refer to [reference needed]. Figure 7 The corresponding steps are explained. Similarly, for... Figure 3 , Figure 6 The same applies to the schemes shown above.

[0114] S807 The electronic device stores the image in a storage device.

[0115] For example, the image may be stored in a storage device in an image compression format or a texture compression format, and is not arranged in the manner adopted by the GPU.

[0116] Furthermore, when it is necessary to render the image described in step S807, the electronic device may continue to execute steps S808 to S811.

[0117] S808 The CPU of the electronic device arranges the texture compression data corresponding to the image according to the arrangement method adopted by the CPU and stores it in the memory that the CPU can access.

[0118] Among them, the memory that the CPU can access cannot be accessed by the GPU, such as the memory that the CPU can access but can access the CPU's memory.

[0119] S809, The GPU of the electronic device copies the texture compression data in the CPU to memory 1 that the GPU can access.

[0120] Optionally, the GPU can access memory 1 that the CPU cannot access. For example, the GPU can access memory 1 as follows: Figure 1 The GPU memory shown is 1.

[0121] S810: The GPU arranges the texture compression data in memory 1 accessible by the GPU according to the arrangement method adopted by the GPU, and stores it in memory 2 accessible by the GPU.

[0122] Optionally, the GPU can access memory 2 that the CPU cannot access. For example, the GPU can access memory 2 as follows: Figure 1 The GPU memory shown is 2.

[0123] S811, the GPU renders the texture compression data in memory 2, which the GPU can access, onto the display screen.

[0124] For a description of steps S807 to S811, please refer to [link / reference]. Figure 1 The corresponding steps are explained.

[0125] Alternatively, for images smaller than the preset size, you can also use... Figure 6 The scheme shown in (1) allows for the pre-arrangement of texture compression data regardless of image size, and the pre-arranged texture compression data is stored in storage devices such as UFS. This eliminates the need for electronic devices to differentiate between images, as all images are pre-arranged uniformly, simplifying implementation.

[0126] For example, taking Vulkan as an example, the graphical application programming interface (API) used by electronic devices, for example... Figure 1 The rendering process of image 2 shown will be described in detail. For example... Figure 9 As shown, the CPU can decode image 2 read from the storage device into RGBA data, then encode the RGBA data into ASTC data, and store the ASTC data in anonymous shared memory (Ashmem). Figure 9 China is Figure 1 The memory types accessible to the CPU shown are based on Ashmem as an example. In practical applications, the CPU can access other memory types, such as heap memory. ASTC data is arranged linearly in Ashmem.

[0127] Then, the GPU can use copy functions (such as memcpy) to copy the ASTC data to temporary memory, and then copy the data in the temporary memory to GPU Device Memory 1 through mapping or other methods. The temporary memory is a dedicated memory area within the GPU memory used for data copying, and this memory can be accessed by the CPU. GPU Device Memory 1 can be bound to a VkBuffer handle. The VkBuffer handle represents a buffer object that is not used to store the actual image data. GPU Device Memory 1 is used to store the actual image data. The VkBuffer handle is associated with the actually stored image data by binding to GPU Device Memory 1. Once the VkBuffer handle is bound to GPU Device Memory 1, the GPU can directly access the ASTC data in GPU Device Memory 1 using the VkBuffer handle.

[0128] Next, the GPU rearranges the ASTC data in GPU Device Memory 1 according to its arrangement (such as "Z" order and "I" order), and then uses commands like CopyBufferToImage to store the rearranged data in GPU Device Memory 2. GPU Device Memory 2 can be bound to a VkImage handle. A VkImage handle is an object representing an image in Vulkan; similar to a VkBuffer handle, it is not used to store the actual image data. GPU Device Memory 2 is used to store the actual image data. The VkImage handle is associated with the actual image data by binding to GPU Device Memory 2. Once the VkImage handle is bound to GPU Device Memory 2, the GPU can directly use the VkImage handle to render the ASTC data in GPU Device Memory 2 onto the display screen.

[0129] It is understood that the technical solutions provided in the embodiments of this application are also applicable to GLES. When using GLES, the names of the GPU memory and the names of the bound handles may differ from those in Vulkan.

[0130] Similarly, taking Vulkan as an example again, for Figure 7 The proposed solution will be described in detail. For example... Figure 10 As shown, the CPU can directly store the ASTC data corresponding to image 1 into memory a. The ASTC data in memory a is arranged in "Z" order and "I" order. For information on image 1 and memory a, please refer to [reference needed]. Figure 7Introduction. Since the GPU does not need to copy texture compression data from the CPU's memory to its own memory, nor does it need to perform a rearrangement operation on the texture compression data, memory 'a' can be directly mapped to GPU device memory 1 and GPU device memory 2. The GPU can directly access memory 'a' through the VkBuffer handle bound to GPU device memory 1, and it can also directly access memory 'a' through the VkImage handle bound to GPU device memory 2. Therefore, the GPU can directly render the ASTC data in memory 'a' to the display screen through the VkImage handle.

[0131] For example, Figure 11 This illustration shows a flowchart of another image rendering method provided in an embodiment of this application. This method can be applied to an electronic device equipped with a CPU, GPU, storage devices, and a display screen. For a description of the storage devices, please refer to the description of storage devices described above. Figure 11 As shown, the method includes the following steps:

[0132] S1101, The electronic device acquires the image to be rendered.

[0133] Optionally, the size of the image to be rendered can be greater than or equal to the preset size. For a description of step S1101, please refer to [link / reference needed]. Figure 8 The following is a description of step S801.

[0134] S1102, The CPU stores the compressed texture data corresponding to the image to be rendered into a storage device.

[0135] The texture compression data is arranged according to the layout method adopted by the GPU, and the texture compression data is image data in texture compression format.

[0136] In some embodiments, the image to be rendered can be in an image compression format. Step S1102 can be specifically implemented as follows: the CPU encodes the image to be rendered into texture compression data and stores the texture compression data in a storage device. The encoding process can refer to the process described above for encoding image compression format data into texture compression format data.

[0137] In other embodiments, the image to be rendered can be in a texture compression format. In this embodiment, the image to be rendered acquired by the electronic device is texture compression data.

[0138] For an explanation of step S1102, please refer to the explanation of step S801.

[0139] S1103, The CPU obtains texture compression data from the storage device.

[0140] S1104, The CPU stores the texture compressed data in the first memory.

[0141] In some embodiments, both the CPU and GPU can access the first memory. The first memory can be as follows: Figure 3 The memory a shown is an example. In this embodiment, for instance, the first memory may be ION memory.

[0142] In other embodiments, the first memory may be as follows: Figure 6 The memory shown in (1) is accessible to the CPU but inaccessible to the GPU. For example, in this embodiment, the first memory can be Ashmem memory. In this embodiment, step S1104 can be specifically implemented as follows: the GPU stores the texture compression data in the second memory, which is accessible to the GPU but inaccessible to the CPU. The second memory can be as follows: Figure 6 The GPU can access memory 1 as shown in (1). The GPU renders the texture compression data in the second memory to the display screen.

[0143] S1105, the GPU renders the texture compression data in the first memory to the display screen.

[0144] about Figure 11 Other information shown can be found in the following descriptions. Figure 6 Zhong (1) and Figure 7 Introduction.

[0145] The above primarily describes the solutions provided by the embodiments of this application from a methodological perspective. It is understood that, in order to achieve the above functions, the electronic device includes hardware structures and / or software modules corresponding to the execution of each function. Based on the units and algorithm steps of the various examples described in the embodiments disclosed in this application, the embodiments of this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by a computer driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the technical solutions of the embodiments of this application.

[0146] This application provides embodiments that can divide an electronic device into functional modules based on the above method examples. For example, each function can be divided into its own functional module, or two or more functions can be integrated into one processing unit. The integrated unit can be implemented in hardware or as a software functional module.

[0147] This application also provides a chip system, such as... Figure 12As shown, the chip system includes at least one processor 1201 and at least one interface circuit 1202. The processor 1201 and the interface circuit 1202 are interconnected via lines. For example, the interface circuit 1202 can be used to receive signals from other devices. As another example, the interface circuit 1202 can be used to send signals to other devices (e.g., the processor 1201). Exemplarily, the interface circuit 1202 can read instructions stored in memory and send those instructions to the processor 1201. When the instructions are executed by the processor 1201, the electronic device can perform the various steps performed by the electronic device in the above embodiments. Of course, the chip system may also include other discrete components, and this application embodiment does not specifically limit this.

[0148] Optionally, the chip system may contain one or more processors. These processors can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, an integrated circuit, etc. When implemented in software, the processor can be a general-purpose processor, implemented by reading software code stored in memory.

[0149] Optionally, the chip system may contain one or more memories. The memory may be integrated with the processor or disposed separately from it; this application does not limit this. For example, the memory may be a non-transient processor, such as a read-only memory (ROM), which may be integrated with the processor on the same chip or disposed separately on different chips. This application does not specifically limit the type of memory or the arrangement of the memory and processor.

[0150] For example, the chip system may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processor unit (CPU), a network processor (NP), a digital signal processor (DSP), a micro controller unit (MCU), a programmable logic device (PLD), or other integrated chips.

[0151] It should be understood that each step in the above method embodiments can be completed by integrated logic circuits in the processor hardware or by instructions in software form. The method steps disclosed in the embodiments of this application can be directly manifested as being executed by a hardware processor, or being executed by a combination of hardware and software modules in the processor.

[0152] This application also provides a computer storage medium storing computer instructions, which, when executed on an electronic device, cause the electronic device to perform the methods described in the above-described method embodiments.

[0153] This application provides a computer program product, which includes a computer program or instructions that, when run on a computer, cause the computer to perform the methods described in the above-described method embodiments.

[0154] In addition, this application also provides an apparatus, which may specifically be a chip, component or module. The apparatus may include a connected processor and a memory. The memory is used to store computer execution instructions. When the apparatus is running, the processor can execute the computer execution instructions stored in the memory to cause the apparatus to perform the methods in the above-described method embodiments.

[0155] In this embodiment, the electronic device, computer storage medium, computer program product or chip are all used to execute the corresponding method provided above. Therefore, the beneficial effects that can be achieved can be referred to the beneficial effects of the corresponding method provided above, and will not be repeated here.

[0156] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The embodiments may be combined with or referenced to each other without conflict.

[0157] The technical solutions of this application, in essence, or the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0158] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An image rendering method, characterized in that, Applied to an electronic device configured with a central processing unit (CPU), a graphics processing unit (GPU), storage devices, and a display screen, the method includes: The electronic device acquires the image to be rendered; The CPU stores the texture compressed data corresponding to the image to be rendered into the storage device. The texture compressed data is arranged according to the arrangement method adopted by the GPU, and the texture compressed data is image data in texture compression format. The CPU obtains the texture compression data from the storage device; The CPU stores the compressed texture data in the first memory; The GPU renders the texture compression data in the first memory onto the display screen.

2. The method according to claim 1, characterized in that, Both the CPU and the GPU can access the first memory.

3. The method according to claim 1, characterized in that, The CPU can access the first memory, but the GPU cannot access the first memory; The GPU renders the texture compression data in the first memory onto the display screen, including: The GPU stores the compressed texture data in the second memory. The GPU can access the second memory, but the CPU cannot access the second memory. The GPU renders the texture compression data in the second memory onto the display screen.

4. The method according to any one of claims 1-3, characterized in that, The image to be rendered is in an image compression format or a texture compression format.

5. The method according to any one of claims 1-3, characterized in that, The image to be rendered is in a compressed image format; The CPU stores the compressed texture data corresponding to the image to be rendered into the storage device, including: The CPU encodes the image to be rendered into the texture compressed data and stores the texture compressed data in the storage device.

6. The method according to any one of claims 1-5, characterized in that, The size of the image to be rendered is greater than or equal to the preset size.

7. The method according to claim 2, characterized in that, The first memory is the inter-process communication (ION) memory on non-contiguous memory.

8. The method according to claim 3, characterized in that, The first memory is the anonymous shared memory Ashmem.

9. An image rendering method, characterized in that, Applied to an electronic device configured with a CPU, GPU, storage devices, and a display screen, the method includes: The CPU obtains the texture compression data corresponding to the image to be rendered from the storage device, and the texture compression data is image data in texture compression format; The CPU stores the texture compression data in the first memory, and the texture compression data is arranged in the first memory according to the arrangement method adopted by the GPU. The GPU renders the texture compression data in the first memory onto the display screen.

10. An image rendering method, characterized in that, Applied to an electronic device equipped with a CPU, GPU, and display screen, the method includes: The CPU acquires the texture compression data corresponding to the image to be rendered, and the texture compression data is image data in texture compression format; The CPU stores the compressed texture data in the first memory, and both the CPU and the GPU can access the first memory; The GPU renders the texture compression data in the first memory onto the display screen.

11. The method according to claim 10, characterized in that, The texture compression data is arranged in the first memory according to the arrangement method adopted by the CPU; The GPU renders the compressed texture data in the first memory onto the display screen, including: The GPU stores the compressed texture data in the first memory into the second memory, which is the memory of the GPU. The compressed texture data is arranged in the second memory according to the arrangement method adopted by the GPU, which is different from the arrangement method adopted by the CPU. The GPU renders the texture compression data in the second memory onto the display screen.

12. An electronic device, characterized in that, include: The electronic device includes a processor, a display screen, and a memory, the processor including a CPU and a GPU, the memory and the display screen being coupled to the processor, the memory being used to store program code including instructions, and the processor reading the instructions from the memory to cause the electronic device to perform the method as described in any one of claims 1-11.

13. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a computer program that, when run on an electronic device, causes the electronic device to perform the method as described in any one of claims 1-11.

14. A computer program product, characterized in that, The computer program product includes: a computer program or instructions that, when run on a computer, cause the computer to perform the method as described in any one of claims 1-11.

Images