An optical network unit (ONU) device based on an all-optical network

Abstract

The application discloses an optical network unit (ONU) device based on an all-optical network and belongs to the optical network design field.The ONU device comprises an optical interface, a time synchronization module, a data conversion module, a service scheduling module, a data cache module and a protocol processing module.The optical interface supports 10Gbps XGS-PON connection, the time synchronization module realizes nanosecond-level synchronization, the service scheduling module allocates time slots according to priorities, and the protocol processing module is compatible with multiple industrial and vehicle-mounted protocols.The device meets the low-latency and high-synchronization requirements of intelligent factory multi-device collaboration and vehicle-mounted real-time communication through the cooperation of multiple modules and adapts to the high-bandwidth access requirements of corresponding scenes.

Description

Technical Field

[0001] This application relates to the field of optical network design, and in particular to an optical network unit (ONU) device based on an all-optical network. Background Technology

[0002] Traditional passive optical networks (PONs) adopt a point-to-multipoint architecture and have advantages such as high bandwidth, low cost, and green and low carbon emissions, and have been widely used in data transmission scenarios.

[0003] However, existing PON equipment lacks Time Sensitive Networking (TSN) technology adaptation, can only support basic data acquisition, cannot achieve nanosecond-level clock synchronization, and has not optimized the transmission mechanism for service priorities.

[0004] In scenarios such as multi-robot collaborative control in smart factories and vehicle-mounted safety sensing data transmission, traditional PONs lack real-time performance and synchronization, making it difficult to meet the low-latency transmission requirements of industrial control commands and vehicle-mounted safety data, thus limiting their application in high real-time scenarios. Summary of the Invention

[0005] This application provides an optical network unit (ONU) device based on an all-optical network. The technical solution is as follows.

[0006] An optical network unit (ONU) device based on an all-optical network is provided, comprising: The optical interface module supports 10Gbps fiber optic connections according to the XGS-PON standard. It is used to establish point-to-multipoint communication links with optical fiber and optical line terminal (OLT) to achieve bidirectional low-loss transmission of optical signals and adapt to the access requirements of smart factory equipment and vehicle terminals. The time synchronization module, based on the IEEE 802.1AS-Rev protocol, achieves nanosecond-level clock synchronization, providing a time reference for motion control in smart factories and real-time sensing data transmission in vehicles; The data conversion module is used to convert industrial control signals and vehicle Ethernet signals on the terminal side into optical signals suitable for fiber optic transmission. At the same time, it receives downlink optical signals from the OLT and restores them into data signals that the terminal can recognize. It also supports TSN low-latency modulation and demodulation. The business scheduling module connects the data conversion module and the data caching module. It is used to prioritize business types, with motion control commands for smart factories and vehicle safety-related data having the highest priority. Priority transmission is achieved through dynamic time slot allocation. The data caching module is used to cache the received optical signal data and execute the caching strategy in conjunction with the priority instructions of the service scheduling module; The protocol processing module supports Profinet, EtherCAT, Modbus industrial control protocols and automotive Ethernet protocols, and performs low-latency protocol conversion based on data type.

[0007] Optionally, the data caching module is used to dynamically adjust the cache capacity according to the production cycle flow of the smart factory and the real-time data volume during peak hours of the vehicle, and to adopt a zero-wait caching mechanism for the highest priority industrial control frames and vehicle safety frames.

[0008] Optionally, the protocol processing module has a built-in protocol adapter submodule that supports bidirectional conversion of ProfinetRT, EtherCAT, and Modbus protocols, and is compatible with the IEEE 802.3bw protocol for automotive Ethernet.

[0009] Optionally, the data conversion module includes a TSN-adaptive modem and a wavelength division multiplexing (WDM) module. The modem supports burst mode transmission to adapt to the time-division transmission characteristics of the ONU, and WDM allocates independent wavelength channels for smart factory services and automotive services.

[0010] Optionally, the data caching module adopts an intelligent sorting algorithm based on business characteristics. By identifying industrial control instruction identifiers and vehicle safety data tags in the data packets, it can automatically determine the importance of the data packets and prioritize caching and forwarding intelligent factory robot collaboration instructions and vehicle autonomous driving perception data.

[0011] Optionally, the data conversion module supports bidirectional optical signal synchronous processing, used to simultaneously receive uplink control commands from smart factory equipment and downlink feedback data from the OLT.

[0012] Optionally, the XGS-PON connection of the optical interface module supports dynamic bandwidth adjustment. When the smart factory starts multi-device collaborative operation or the vehicle terminal transmits high-definition surround view data, it is also used to automatically expand to full-speed transmission of 10Gbps.

[0013] Optionally, the protocol processing module includes a scenario-based data filtering submodule, used to filter unnecessary data according to preset rules; Specifically, for smart factory scenarios, production control data streams are retained while redundant equipment status information is filtered out; for vehicle scenarios, safety perception data streams are retained while entertainment service data is filtered out.

[0014] This application discloses an Optical Network Unit (ONU) device based on an all-optical network, belonging to the field of optical network design. It includes modules for optical interface, time synchronization, data conversion, service scheduling, data buffering, and protocol processing. The optical interface supports 10Gbps XGS-PON connections, the time synchronization module achieves nanosecond-level synchronization, the service scheduling module allocates time slots according to priority, and the protocol processing module is compatible with multiple industrial and automotive protocols. Through multi-module collaboration, this device meets the low-latency and high-synchronization requirements of multi-device collaboration in smart factories and real-time communication in vehicles, adapting to the high-bandwidth access requirements of corresponding scenarios. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the modular architecture of an optical network unit (ONU) device based on an all-optical network. Figure 2 Partial diagram of the 10Gbps signal transmission link at GE0 port; Figure 3 A schematic diagram of a 10Gbps PHY chip circuit for the GE0 port; Figure 4 A schematic diagram of the GE1 port 1Gbps PHY chip circuit; Figure 5 This is a schematic diagram of the physical interface circuit for the GE1 port RJ45. Figure 6 This is a schematic diagram showing the connection between the GE1 port and the PCIe link of the SOC chip; Figure 7 Schematic diagram of the GE2 port 1Gbps PHY chip circuit; Figure 8 This is a schematic diagram of the physical interface circuit for the GE2 port RJ45. Figure 9 This is a schematic diagram of the connection link between the GPHY4 chip on the GE4 port and the SOC. Figure 10 This is a schematic diagram of the physical interface circuit for the GE4 port RJ45. Figure 11 This is a schematic diagram of the top-level architecture of the device's hardware system. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0017] In this article, "multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0018] Example 1 like Figure 1 The diagram illustrates a modular architecture of an optical network unit (ONU) device based on an all-optical network. This invention provides an optical network unit (ONU) device based on an all-optical network, comprising the following components.

[0019] The optical interface module supports 10Gbps fiber optic connections according to the XGS-PON standard. It is used to establish point-to-multipoint communication links with optical fiber and optical line terminal (OLT) to achieve bidirectional low-loss transmission of optical signals and adapt to the access requirements of smart factory equipment and vehicle terminals. The time synchronization module, based on the IEEE 802.1AS-Rev protocol, achieves nanosecond-level clock synchronization, providing a time reference for motion control in smart factories and real-time sensing data transmission in vehicles; The data conversion module is used to convert industrial control signals and vehicle Ethernet signals on the terminal side into optical signals suitable for fiber optic transmission. At the same time, it receives downlink optical signals from the OLT and restores them into data signals that the terminal can recognize. It also supports TSN low-latency modulation and demodulation. The business scheduling module connects the data conversion module and the data caching module. It is used to prioritize business types, with motion control commands for smart factories and vehicle safety-related data having the highest priority. Priority transmission is achieved through dynamic time slot allocation. The data caching module is used to cache the received optical signal data and execute the caching strategy in conjunction with the priority instructions of the service scheduling module; The protocol processing module supports Profinet, EtherCAT, Modbus industrial control protocols and automotive Ethernet protocols, and performs low-latency protocol conversion based on data type.

[0020] The optical interface module of the Optical Network Unit (ONU) adopts a hardware design compliant with the XGS-PON standard, supporting 10Gbps fiber optic transmission. It establishes a point-to-multipoint (P2MP) communication architecture with the Optical Line Terminal (OLT) via fiber optic links, enabling bidirectional low-loss transmission and reception of optical signals. This meets the access requirements of robots, PLCs, and vehicle terminals in smart factories. The time synchronization module, developed based on the IEEE 802.1AS-Rev protocol, integrates a high-precision clock synchronization circuit. Through clock calibration with the OLT, it achieves nanosecond-level full-network synchronization, providing a benchmark for multi-device collaboration in smart factory motion control and timestamp alignment of real-time vehicle sensing data. The data conversion module incorporates a TSN-compatible signal processing circuit, modulating the industrial control electrical signals and vehicle Ethernet electrical signals output from the terminal into optical signals suitable for fiber optic transmission. Simultaneously, it receives downlink optical signals from the OLT and demodulates them into terminal-recognizable electrical signals. The entire conversion process incorporates TSN low-latency optimization strategies. The service scheduling module connects the data conversion module and the data caching module via logic circuits. It has a built-in service type identification unit that automatically distinguishes between different services such as smart factory motion control commands and vehicle safety data. It prioritizes these services according to preset rules and uses a dynamic time slot allocation algorithm to allocate transmission time slots to the highest priority services, ensuring they occupy link resources preferentially. The data caching module uses a high-speed storage unit. After receiving priority instructions from the service scheduling module, it executes the corresponding caching and forwarding strategy to achieve orderly temporary storage and scheduling of data. The protocol processing module integrates protocol parsing and conversion circuits. It pre-stores parsing rules for industrial control protocols such as Profinet, EtherCAT, and Modbus, as well as vehicle Ethernet protocols. It can automatically complete format conversion based on the protocol type of the input data, and the conversion process optimizes latency control.

[0021] like Figure 1 As shown, the "DC24VIN / 2" input on the left is converted from DC to DC to supply power to the system's "PWR" (Power Management) and various functional modules, ensuring stable operation of the equipment.

[0022] The "PONMAC" module within the SOC (System-on-a-Chip) implements optical network media access control according to the XGS-PON standard. The corresponding "Optical Interface Module" is used to establish a point-to-multipoint communication link with the Optical Line Terminal (OLT), supporting 10Gbps bidirectional low-loss fiber transmission and adapting to smart factory and vehicle terminal access.

[0023] The "EthernetMAC" module within the SOC is responsible for bidirectional conversion between Ethernet and optical signals. It also handles the parsing and low-latency processing of industrial control protocols (Profinet, EtherCAT, etc.) and automotive Ethernet protocols, corresponding to the core functions of the "Data Conversion Module" and "Protocol Processing Module".

[0024] On the left are “SerialA” and “SerialB” (which can access various signals from smart factories / vehicle terminals), and on the right are “SerialCCONN”, “GE_RTY”, and “RJ45” (gigabit Ethernet interfaces for connecting to industrial control equipment or vehicle terminals). These provide access channels for smart factory motion control commands, vehicle safety data, and other services. Together with logic such as “service scheduling” and “data caching” (implemented by SOC), they ensure low-latency transmission of high-priority services.

[0025] The overall circuit architecture embodies the core requirements of "high bandwidth access + low latency transmission + multi-protocol compatibility", and is suitable for scenarios such as intelligent factory robot collaboration and vehicle safety perception.

[0026] In summary, a TSN-PONONU device adapted to smart factory and vehicle scenarios was constructed through multi-module collaboration. The 10Gbps transmission capability of the optical interface meets the high bandwidth requirements of both scenarios, and the point-to-multipoint architecture enables efficient device access. Nanosecond-level time synchronization solves the clock consistency problem of motion control of multiple devices in smart factories and the time calibration requirements of vehicle sensing data. The synchronization accuracy meets the stringent standards of industrial control and vehicle communication. The TSN-optimized data conversion and service scheduling mechanism, combined with dynamic time slot allocation, ensures the transmission priority of high-priority services from the hardware level. The multi-protocol support capability of the protocol processing module breaks down the protocol barriers of different terminal devices, realizing seamless transmission of industrial control and vehicle data. The overall solution effectively makes up for the shortcomings of traditional ONUs in real-time performance and synchronization, and is fully adapted to the communication needs of core scenarios such as robot collaboration in smart factories and vehicle safety perception.

[0027] Example 2 The following is a further technical disclosure corresponding to Embodiment 1.

[0028] In one possible implementation, the data caching module is used to dynamically adjust the cache capacity according to the production cycle flow of the smart factory and the real-time data volume during peak vehicle periods, and to adopt a zero-wait caching mechanism for the highest priority industrial control frames and vehicle safety frames.

[0029] The data caching module incorporates a traffic monitoring unit and a dynamic storage control circuit. It acquires the equipment's data transmission frequency by collecting real-time production cycle parameters from the smart factory, and simultaneously monitors the real-time data generation volume of the vehicle terminal during peak hours (such as in heavy traffic). Based on a preset traffic-caching mapping algorithm, it dynamically adjusts the available capacity of the high-speed storage unit. For industrial control frames in the smart factory (such as motion control command frames) and safety frames in vehicle scenarios (such as autonomous driving environmental perception frames), this module triggers a zero-wait caching mechanism through the priority identifier of the business scheduling module. After data enters the cache unit, it does not need to wait for queue sorting and is directly transmitted to the next-level module through a high-speed forwarding channel.

[0030] This enables on-demand allocation of cache resources, avoiding the overflow or waste that can occur when fixed cache capacity fluctuates in production cycle time or when there is a sudden surge in vehicle data, thus significantly improving cache resource utilization. The zero-wait caching mechanism completely eliminates the queuing delay of high-priority data in the caching process, ensuring that motion control commands in the smart factory can be sent to the execution equipment in real time, avoiding mechanical deviations, and guaranteeing millisecond-level response of vehicle safety data. This effectively reduces industrial production errors or vehicle safety risks caused by cache latency, and further enhances the equipment's adaptability to real-time scenarios.

[0031] In one possible implementation, the protocol processing module has a built-in protocol adapter submodule that supports bidirectional conversion of ProfinetRT, EtherCAT, and Modbus protocols, and is compatible with the IEEE 802.3bw protocol for automotive Ethernet.

[0032] The protocol adaptation submodule of the protocol processing module adopts a modular circuit design, integrating dedicated parsing and conversion chips for ProfinetRT, EtherCAT, and Modbus protocols. Through hardware logic, it achieves rapid identification of protocol frame structures, field extraction, and format reconstruction, supporting bidirectional conversion between the aforementioned protocols and fiber optic networks. Simultaneously, this submodule integrates a compatibility processing unit for the IEEE 802.3bw automotive Ethernet protocol, pre-storing the physical layer and data link layer adaptation parameters for this protocol. It can automatically identify IEEE 802.3bw format data sent by the automotive terminal and complete the adaptation and conversion with the fiber optic transmission protocol, ensuring that data of different protocol types can be transmitted across networks via the ONU.

[0033] Therefore, the adoption of dedicated hardware chips significantly improves protocol conversion efficiency, avoids the latency accumulation caused by software conversion, ensures low latency characteristics in the industrial control protocol conversion process, and meets the real-time communication requirements of multi-device collaboration in smart factories. Compatibility with the IEEE 802.3bw protocol breaks down the protocol barriers between vehicle terminals and all-optical networks, achieving full protocol coverage in both industrial and vehicle scenarios. This eliminates the need for additional protocol conversion gateways, reducing system deployment costs, while ensuring consistency and reliability of data transmission across different protocols, and enhancing the flexibility of device adaptation to various scenarios.

[0034] In one possible implementation, the data conversion module includes a TSN-adaptive modem and a wavelength division multiplexing (WDM) module.

[0035] The modem supports burst mode transmission to adapt to the time-division transmission characteristics of the ONU, and WDM allocates independent wavelength channels for smart factory services and automotive services.

[0036] The TSN-adaptive modem in the data conversion module adopts a burst-mode transmission circuit design. Its transmission timing is precisely synchronized with the uplink time slots allocated by the OLT. It can quickly start or stop signal transmission according to the OLT's time slot scheduling instructions, adapting to the time-division transmission characteristics of the ONU under the TDMA mechanism and avoiding uplink data conflicts. The wavelength division multiplexing module (WDM) integrates multi-wavelength splitting and combining components. Through preset wavelength planning, it allocates a 1577nm wavelength channel for smart factory services (such as PLC communication data) and a 1530nm wavelength channel for vehicle services (such as vehicle-to-everything (V2X) data). The two types of services are transmitted through independent wavelengths without interference.

[0037] Therefore, the burst-mode modem is perfectly compatible with the TDMA uplink mechanism of PON networks, completely resolving the signal conflict problem caused by multiple ONUs transmitting simultaneously, and improving the transmission efficiency and stability of the uplink. WDM's independent wavelength allocation achieves physical layer isolation between smart factory and automotive services, effectively avoiding signal interference between data from different scenarios during transmission, ensuring the integrity of industrial control data transmission and the reliability of automotive safety data transmission. Simultaneously, both services can share fiber optic link resources, eliminating the need for separate cabling and reducing network construction costs.

[0038] In one possible implementation, the data caching module employs an intelligent sorting algorithm based on business characteristics. By identifying industrial control instruction identifiers and vehicle safety data tags in data packets, it automatically determines the importance of data packets and prioritizes caching and forwarding intelligent factory robot collaboration instructions and vehicle autonomous driving perception data.

[0039] The intelligent sorting algorithm of the data caching module is implemented through a combination of software logic and hardware acceleration. The algorithm pre-stores the feature identifiers of industrial control instructions for smart factories (such as the instruction code field of ProfinetRT frames) and the tag information of vehicle safety data (such as the safety level field of autonomous driving perception data). After the data enters the cache, the algorithm quickly matches these feature information to determine the importance of the data packets. For high-priority data packets identified as smart factory robot collaboration instructions or vehicle autonomous driving perception data, the algorithm inserts them at the front of the forwarding queue, giving priority to allocating cache exit bandwidth and achieving immediate caching and forwarding; for ordinary priority data, they are processed in the normal queue order.

[0040] Thus, the intelligent sorting algorithm enables differentiated allocation of cache resources, ensuring that high-value, high-real-time data prioritizes transmission resources and avoids interference from irrelevant data on critical business transmission. Prioritized forwarding of robot collaboration instructions ensures the accuracy of multi-robot motion coordination in smart factories, reducing connection delays in the production process; rapid transmission of onboard autonomous driving perception data provides the autonomous driving system with immediate environmental decision-making support, shortening safety response time. Simultaneously, the algorithm's intelligent recognition capability reduces the complexity of manual priority configuration, improving equipment operation and maintenance efficiency.

[0041] In one possible implementation, the data conversion module supports bidirectional optical signal synchronous processing, used to simultaneously receive uplink control commands from smart factory equipment and downlink feedback data from the OLT.

[0042] The data conversion module adopts a dual-path parallel processing circuit design, with the uplink and downlink channels operating independently and synchronously. The uplink channel receives control command electrical signals from intelligent factory equipment (such as robot controllers and sensors) in real time through a signal acquisition unit, converts them into optical signals through a modulation circuit, and then transmits them to the OLT. The downlink channel synchronously receives vehicle feedback data (such as vehicle-to-everything (V2X) response information) from the OLT through an optical receiving unit, demodulates it back into electrical signals, and then sends them to the vehicle terminal. The signal processing timing of the two channels is calibrated by an internal clock synchronization module to ensure that there is no time difference between uplink and downlink data processing, achieving synchronous processing of bidirectional optical signals.

[0043] Therefore, the dual-path parallel design completely breaks through the serial transmission limitations of traditional single-path conversion, enabling simultaneous transmission of uplink industrial control commands and downlink vehicle feedback data, significantly improving data interaction efficiency. Smart factory equipment can instantly upload status data and receive control commands, while the vehicle terminal can simultaneously acquire environmental information and respond to commands. This effectively meets the closed-loop control requirements of "command-feedback" in industrial production and the real-time interaction requirements of "perception-decision-response" in vehicle scenarios, avoiding system response lag caused by one-way transmission delays and improving the real-time interaction of the entire communication link.

[0044] In one possible implementation, the XGS-PON connection of the optical interface module supports dynamic bandwidth adjustment. When the smart factory starts multi-device collaborative operation or the vehicle terminal transmits high-definition surround view data, it is also used to automatically expand to full-speed transmission of 10Gbps.

[0045] The XGS-PON connection of the optical interface module incorporates a dynamic bandwidth adjustment circuit. Through a flow monitoring unit, it collects real-time data rates from the aggregated data flow of multiple devices working collaboratively in a smart factory (such as control data from multiple production lines operating simultaneously) and the high-definition surround-view data transmission rate of the vehicle terminal. When the detected rate reaches a preset threshold (e.g., 8Gbps), the circuit automatically sends a bandwidth expansion request to the OLT. Upon the OLT's response, the module adjusts the optical signal modulation parameters to increase the transmission rate to its full 10Gbps speed. When the flow decreases, it automatically reduces the bandwidth to a reasonable level, achieving dynamic bandwidth adaptation.

[0046] Thus, the dynamic bandwidth adjustment mechanism enables flexible allocation of transmission resources. In high-bandwidth scenarios such as multi-device collaboration in smart factories or high-definition data transmission in vehicles, the full-speed 10Gbps transmission capability ensures smooth data transmission and avoids video stuttering or control data packet loss caused by insufficient bandwidth. Automatically reducing bandwidth during low-traffic periods minimizes resource waste and aligns with the requirements of green and low-carbon network construction. This on-demand allocation model satisfies bandwidth demands during peak periods while optimizing overall network resource utilization and reducing long-term operation and maintenance costs.

[0047] In one possible implementation, the protocol processing module includes a contextualized data filtering submodule for filtering unnecessary data according to preset rules.

[0048] Specifically, for smart factory scenarios, production control data streams are retained while redundant equipment status information is filtered out; for vehicle scenarios, safety perception data streams are retained while entertainment service data is filtered out.

[0049] The contextualized data filtering submodule of the protocol processing module has a built-in scene recognition unit and rule configuration storage area. It distinguishes application scenarios by recognizing scene identification fields in data frames (such as the equipment type field in smart factory data and the business type field in vehicle data). For smart factory scenarios, this submodule retains production control data streams (such as equipment start / stop commands and parameter adjustment frames) according to preset rules and filters redundant equipment status information (such as repetitive normal operation status reports). For vehicle scenarios, it retains safety perception data streams (such as obstacle detection data and vehicle speed feedback frames) and filters entertainment service data (such as audio and video playback cache data). The filtering process is implemented through hardware logic and does not occupy the core resources of protocol conversion.

[0050] Therefore, the scenario-based filtering mechanism significantly reduces the amount of unnecessary data transmitted in the fiber optic link, effectively reducing link load, increasing the bandwidth ratio of critical business data transmission, ensuring that production control data streams and vehicle safety data streams can obtain more sufficient transmission resources, and further reducing transmission latency. At the same time, filtering redundant data reduces the overhead of invalid data processing by terminal devices, improves the instruction execution efficiency of smart factory equipment and the safety decision-making speed of vehicle terminals, avoids interference from irrelevant data to core business, and enhances the communication reliability and efficiency of equipment in complex scenarios.

[0051] Example 3 The following is through Figures 2 to 10 The modular structure design of the above embodiments is illustrated.

[0052] Figure 2 A partial diagram of the 10Gbps signal transmission link at port GE0.

[0053] This diagram shows a partial schematic of the core signal transmission link between the GE0 (10Gbps rate port) and the SOC chip, focusing on the high-speed signal transmission path after optical and electrical signal conversion. The core components in the diagram are the signal matching and filtering circuit, where C2095, C2096, C2097, and C2098 are all 0.22μF ceramic capacitors, primarily responsible for signal filtering and impedance matching, effectively suppressing signal interference during high-speed transmission and ensuring signal integrity at 10Gbps rates.

[0054] In this link, one end of the capacitor is connected to the signal transceiver node of the GEO port, and the other end is precisely connected to the TXP_SDSC (differential transmit positive terminal), TXN_SDSC (differential transmit negative terminal), RXP_SDSC (differential receive positive terminal), and RXN_SDSC (differential receive negative terminal) pins of the SOC chip, forming a high-speed data channel between the GEO port and the SOC core. This link directly supports... Figure 1 The "optical interface module" meets the 10Gbps XGS-PON signal transmission requirement and provides a high-speed signal interaction foundation for the "data conversion module," ensuring low-loss transmission of high-bandwidth services such as multi-device collaboration in smart factories and high-definition surround view data in vehicles.

[0055] Figure 3 This is a schematic diagram of a 10Gbps PHY chip circuit for the GE0 port.

[0056] This diagram shows the core processing circuit of the 10Gbps physical layer (PHY) of the GE0 port. The core chip is U2056 (RTL8211FS), which is a high-performance Ethernet PHY chip compatible with 10Gbps speed. It has built-in signal modulation and demodulation unit, clock synchronization circuit and link management module, which can realize efficient conversion between optical signals and Ethernet electrical signals and protocol adaptation.

[0057] Chip core structure and important pin descriptions. Pins 2 (Phy0TDA+), 3 (Phy0TDA-), 5 (Phy0TDB+), and 6 (Phy0TDB-) are differential signal transceiver pins, responsible for receiving high-speed data signals from the GEO port and transmitting them to the chip's internal processing. Figure 1 The "Data Conversion Module" features TSN low-latency modulation and demodulation; the clock unit, with pins 45 (XTAL_IN) and 46 (XTAL_OUT / EXT_CLK) connected to an external 25MHz crystal oscillator (X1) and 18pF filter capacitors (C2085, C2086), provides a high-precision clock reference for the chip, used for corresponding... Figure 1 The "Time Synchronization Module" requires a nanosecond-level synchronization underlying clock; the management interface, with pins 14 (MDC) and 15 (MDIO) as management data clock / input / output pins, is used to interact with the SOC chip for configuration information, enabling link status monitoring and parameter adjustment; the signal output interface connects the processed signal to the SOC chip via an internal link, cooperating with... Figure 2 The capacitor matching circuit together ensures low-latency transmission of 10Gbps signals; auxiliary components include R2088 (47kΩ) and R2098 (4.7kΩ) as current-limiting resistors for LED indicator lights, used to display the link connection status; capacitors such as C2094 (0.1μF) and C2078 (1μF) are power supply filter capacitors to ensure stable operation of the chip.

[0058] The circuit is Figure 1 The core hardware carriers of the "optical interface module" and "data conversion module" are adapted to the 10Gbps transmission requirements of the XGS-PON standard, providing physical layer support for high-bandwidth services.

[0059] Figure 4 This is a schematic diagram of a 1Gbps PHY chip circuit for the GE1 port.

[0060] This diagram shows the physical layer core processing circuit of GE1 (1Gbps gigabit Ethernet interface). The core chip is U2156 (RTL8211FS), which is a dedicated PHY chip for gigabit Ethernet. It has a built-in gigabit signal processing unit, PCIe interface adapter module and protocol parsing front-end circuit, and is adapted to the gigabit access requirements of smart factory equipment and vehicle terminals.

[0061] Chip core structure and key pin descriptions. The high-speed signal interaction interface includes pins 33 (HSIP) and 34 (HSIN) for differential transmission, and pins 39 (HSOP) and 40 (HSON) for differential reception. These pins are connected to the TXP_L0_PCIE, TXN_L0_PCIE, RXP_L0_PCIE, and RXN_L0_PCIE pins of the SOC chip via 0.22μF capacitors, respectively, forming a high-speed PCIe data channel between GE1 and the SOC, supporting… Figure 1 The "Data Conversion Module" performs bidirectional conversion between Ethernet and optical signals; the clock and reset unit has pins 45 (XTAL_IN) and 46 (XTAL_OUT / EXT_CLK) connected to an external 25MHz crystal oscillator and filter capacitors to provide a stable clock; pin 13 (PHYRSTB) is the reset pin, connected to the power supply via a resistor to achieve power-on reset and ensure stable chip initialization; the management and indication interface has pins 14 (MDC) and 15 (MDIO) as management interfaces, enabling the SOC to configure and read the status of the PHY chip; pins 36 (LED1 / CFG_LDO0) and 37 (LED2 / CFG_LDO1) are connected to indicator lights via current-limiting resistors (R2199, R2198) to display link connectivity and data transmission status; the power supply and filtering system includes a 3.3V power input (pins 30 and 31), filtered by capacitors such as C2164 (0.1μF) and C2178 (1μF) to ensure stable power supply.

[0062] This circuit corresponds to Figure 1 The core hardware of the "terminal access" stage provides gigabit access channels for devices such as smart factory robot controllers and vehicle-mounted safety sensing terminals, and works with the "business scheduling module" to achieve priority transmission of high-priority data.

[0063] Figure 5 This is a schematic diagram of the physical interface circuit for the GE1 port RJ45.

[0064] This diagram illustrates the RJ45 physical interface connection of the GE1 port. It serves as the direct connection carrier between the GE1 interface and external devices (smart factory PLC, vehicle terminal, etc.), focusing on the signal transmission and status indication design of the physical link.

[0065] In the signal connection link, the TD1+ / - (pins 9, 10), TD2+ / - (pins 7, 11), TD3+ / - (pins 5, 13), and TD4+ / - (pins 3, 15) pins of the RJ45 interface are respectively connected to the Phy1TDA+ / -, TDB+ / -, TDC+ / -, and TDD+ / - signal pins of the Phy1 chip, forming four pairs of differential signal transmission channels to adapt to the signal transmission requirements of Gigabit Ethernet; in the status indication circuit, pins 4 (LED_GREEN-), 12 (LED_GREEN+), 14 (LED_YELLOW-), and 13 (LED_YELLOW-) are connected to the Phy1TDA+ / -, TDB+ / -, TDC+ / -, and TDD+ / - signal pins of the Phy1 chip, respectively, forming four pairs of differential signal transmission channels to adapt to the signal transmission requirements of Gigabit Ethernet; The ELLOW+ LED is connected to the LED control pin of the Phy1 chip via 499Ω current-limiting resistors (R2101, R2102). The green light indicates the link connection status, and the yellow light indicates the data transmission status, which is convenient for operation and maintenance monitoring. The power supply and grounding information includes a 3.3V power supply connected to pin 1 (VCC) to power the interface, and pins 6 (GND) and 16 (PGND) as signal ground and protective ground, respectively, to achieve grounding isolation and suppress external interference. In addition, the label "phy-MDI[A]-[D] equal length" indicates that the wiring length of the differential signal pair is strictly matched to ensure signal synchronization at gigabit speeds and reduce transmission delay.

[0066] This circuit is Figure 1 The physical implementation of the "terminal access" function provides a standardized interface for connecting external devices to the GE1 port, ensuring stable access to industrial control signals and vehicle sensing data.

[0067] Figure 6 This is a schematic diagram showing the connection between the GE1 port and the PCIe link of the SOC chip.

[0068] This diagram illustrates the core connection of the PCIe high-speed link between the GE1 port and the SOC chip after processing by the PHY chip. This is the key channel for gigabit data to enter the SOC for protocol processing and service scheduling.

[0069] Link Core Structure Description. In the PCIe differential signal pair, the link contains two sets of PCIe transmission channels. The GE1 transmit signal, after processing by the PHY chip, is transmitted to the SOC via the TXP_L0_PCIE (pin D15) and TXN_L0_PCIE (pin C15) differential pairs. The receive signal is received from the SOC via the RXP_L0_PCIE (pin A16) and RXN_L0_PCIE (pin B16) differential pairs. Each differential pair is connected in series with a 0.22μF capacitor (C2192, C2196, etc.) for signal filtering to ensure signal integrity during high-speed transmission. For the clock and reference signals, pins C17 (CLKPPCIE) and D17 (CLKNPCIE) are the PCIe reference clock differential pairs, providing high-frequency response for the link. A high-speed synchronous clock supports low-latency data transmission; pin E15 (RREF_PCIE) is a reference resistor pin, connected to an external 5.6kΩ resistor (R146) for signal level calibration; the link is equipped with dual power supplies of 0.9V (VCC09APCIE) and 1.8V (VCC18APCIE), and a filter network composed of 10μF electrolytic capacitors (C71, C75) and 0.1μF ceramic capacitors (C73, C76) ensures stable power supply; pin B10 (g1_p_GPIO74 / pe_rst) is a reset pin, realizing power-on reset and abnormal reset of the link; in addition, the label "AC / no100" indicates that the link adopts an AC coupling design and the impedance control is 100Ω, which is compatible with the PCIe protocol standard.

[0070] This link is directly connected Figure 1 The core of the SOC is the data interaction bridge between the "data conversion module", "protocol processing module" and "service scheduling module", ensuring that gigabit data enters the SOC for subsequent processing with low latency.

[0071] Figure 7 This is a schematic diagram of a GE2 port 1Gbps PHY chip circuit.

[0072] This diagram shows the physical layer core processing circuit of GE2 (1Gbps gigabit Ethernet interface), and... Figure 4 The PHY circuit architecture of the GE1 port is the same, and the core chip is U2256 (RTL8211FS). It mainly provides an independent gigabit access channel for parallel access of multiple devices in smart factories and simultaneous communication of multiple terminals in vehicles, thus relieving the access pressure of the GE1 port.

[0073] Chip core structure and important pin descriptions. In the high-speed signal interaction interface, pins 33 (HSIP) and 34 (HSIN) are differential transmit pins, and pins 39 (HSOP) and 40 (HSON) are differential receive pins. These are connected to the TXP_L1_PCIE, TXN_L1_PCIE, RXP_L1_PCIE, and RXN_L1_PCIE pins of the SOC chip via 0.22μF capacitors, respectively, forming a second PCIe high-speed channel with the SOC, enabling parallel data transmission between GE2 and GE1. Figure 1 To meet the requirements of "multi-device access", in the clock and reset unit, pins 45 (XTAL_IN) and 46 (XTAL_OUT / EXT_CLK) are connected to an external 25MHz crystal oscillator and 18pF filter capacitors (C2285, C2286), independent of the GE1 port clock to avoid cross-interference; pin 13 (PHYRSTB) is the reset pin to ensure independent chip initialization; in the management and indication interface, pins 14 (MDC) and 15 (MDIO) are independent management interfaces, and the SOC can configure the GE2 port parameters separately; pins 36 (LED1 / CFG_LDO0) and 37 (LED2 / CFG_LDO1) control the indicator lights through current-limiting resistors (R2299, R2298) to independently display the GE2 link status; in the power supply and filtering, the 3.3V power input is filtered by capacitors such as C2264 and C2278 to ensure stable chip operation and isolation from the GE1 port power supply.

[0074] This circuit is Figure 1 The "Terminal Access" function has been expanded to accommodate the simultaneous access needs of multiple robots in smart factories and multiple sensing terminals in vehicles through a dual gigabit port design, and can be used in conjunction with the "Business Scheduling Module" to achieve parallel scheduling of multiple services.

[0075] Figure 8 This is a schematic diagram of the physical interface circuit for the GE2 port RJ45.

[0076] This diagram illustrates the physical interface connection of the GE2 port's RJ45 connector. Figure 5 The GE1 interface RJ45 circuit architecture is consistent with that of the GE2 port, which is the physical connection carrier between the GE2 port and external devices, providing a standardized interface for the access of a second gigabit device.

[0077] In the signal connection link, the TD1+ / - (pins 9, 10), TD2+ / - (pins 7, 11), TD3+ / - (pins 5, 13), and TD4+ / - (pins 3, 15) pins of the RJ45 interface are respectively connected to the signal pins of the Phy2 chip, forming four pairs of differential signal transmission channels. The wiring strictly follows the "phy-MDI[A]-[D] equal length" principle to ensure synchronous transmission of gigabit signals. In the status indication circuit, pins 4 (LED_GREEN-), 12 (LED_GREEN+), and 14 (LED_YEL) are connected to the signal pins of the Phy2 chip, forming four pairs of differential signal transmission channels. LOW- and 13 (LED_YELLOW+) are connected to the LED control pins of the Phy2 chip via 499Ω current-limiting resistors (R2200, R2201) to independently display the GE2 link connectivity and data transmission status. In terms of power supply and grounding, pin 1 (VCC) is connected to a 3.3V power supply, and pins 6 (GND) and 16 (PGND) isolate the signal ground from the protective ground to suppress external electromagnetic interference. In addition, the interface conforms to the RJ45 Ethernet standard and can be directly connected to mainstream RJ45 devices in smart factories and automotive scenarios without additional adapters.

[0078] This circuit and Figure 5 Together they constitute the dual gigabit physical access terminals of the device, corresponding to Figure 1 "Adapts to the access requirements of smart factory equipment and vehicle terminals," providing reliable physical link support for the parallel access of multiple devices.

[0079] Figure 9 This is a schematic diagram of the connection link between the GPHY4 chip on the GE4 port and the SOC.

[0080] This diagram illustrates the RGMII (Gigabit Media Independent Interface) connection link between the GPHY4 chip (Gigabit PHY chip) on the GE4 port and the SOC chip. It focuses on the interaction path between data signals and control signals, adapting to the low-latency transmission requirements of industrial control protocols and automotive Ethernet protocols.

[0081] Link Core Structure Description. In the transmission link, the GPHY4 chip's transmit pin group includes TXC (transmit clock), TXCTL (transmit control), and TXD0-TXD3 (transmit data). These are connected to the SOC chip's g0_RGMII_TXC, g0_RGMII_TXCTL, and g0_RGMII_TXD0-g0_RGMII_TXD3 pins respectively via current-limiting resistors, forming an 8-bit parallel transmit channel with a transmission rate of up to 1Gbps. Figure 1The signal output requirements of the "data conversion module" are as follows: In the receiving link, the GPHY4 chip's receiving pin group includes LED0 / PHYAD0, RXC / PHYAD1, RXCTL / PHYAD2, RXD0 / RXDLY, RXD1 / CFG_MODE0, RXD2 / CFG_MODE1, and RXD3 / CFG_MODE2. These pins are connected to the SOC chip's g0_RGMII_RXC, g0_RGMII_RXCTL, and g0_RGMII_RXD0-g0_RGMII_RXD3 pins respectively via current-limiting resistors to realize the transmission of receiving clock, control signals, and 8-bit parallel data, supporting... Figure 1 The protocol processing module receives protocol parsing inputs; in the impedance matching design, the resistors for both the transmitting and receiving links are 10kΩ or 499Ω to achieve signal impedance matching, reduce reflection interference in high-speed transmission, and ensure low-latency transmission; furthermore, the transmitting clock (TXC) and receiving clock (RXC) are transmitted independently. Figure 1 The nanosecond-level synchronization benchmark alignment of the "time synchronization module" ensures consistent data transmission and reception timing.

[0082] This link is the core channel for GE4 port data to enter the SOC, directly supporting the "protocol processing module" in parsing and converting protocols such as Profinet and automotive Ethernet, and the "service scheduling module" in identifying and scheduling high-priority data.

[0083] Figure 10 This is a schematic diagram of the physical interface circuit for the GE4 port RJ45.

[0084] This diagram illustrates the physical connection of the RJ45 interface of the GE4 port. It serves as the physical connection carrier between the GE4 port and external industrial / vehicle equipment, adapting to protocol data access scenarios that require transmission via the RGMII interface.

[0085] Circuit core structure description. In the signal connection link, the TD1+ / - (pins 9, 10), TD2+ / - (pins 7, 11), TD3+ / - (pins 5, 13), and TD4+ / - (pins 3, 15) of the RJ45 interface are respectively connected to the phy1-MDI[0]+ / - to phy1-MDI[3]+ / - signal pins of the Phy4 chip, forming 4 pairs of differential signal transmission channels. The wiring is marked "phy-MDI[0]-[3] equal length" to ensure signal synchronization at gigabit speed; in the status indicator circuit, pins 12 (LED_GREEN-), 11 (LED_GREEN+), 14 (LED_YELLOW-), and 13 (LED_YELLOW-) are connected to the Phy4 chip, forming 4 pairs of differential signal transmission channels. +) Connect the LED control pins (Phy32Led1, Phy32Led2) of the Phy4 chip via 500Ω current-limiting resistors (R249, R250). The green light indicates that the link is connected, and the yellow light indicates data transmission, which facilitates real-time monitoring of the interface status. In terms of power supply and grounding, pin 1 (VCC) is connected to a 3.3V power supply, and pins 6 (GND) and 16 (PGND) are the signal ground and protective ground, respectively, to achieve grounding isolation and reduce the impact of external interference on industrial control signals and vehicle safety data. In addition, the interface is compatible with Ethernet standards and can directly connect to terminal devices that support protocols such as Profinet and automotive Ethernet IEEE802.3bw without the need for an additional protocol conversion gateway.

[0086] This circuit is Figure 1 The "Terminal Access" function supplements the existing functions and provides a physical access channel for high-priority services that need to be transmitted through the RGMII interface (such as intelligent factory robot collaboration instructions and vehicle autonomous driving perception data), ensuring the stable transmission and reception of core business data.

[0087] Example 4 Figure 11 This is a top-level architecture diagram of the device's hardware system, used to illustrate the entire hardware composition logic from power input and optical signal access, to SOC (System-on-a-Chip) core processing, and then to Ethernet interface output. Figure 1 (Functional Module Logic Diagram) and Figure 2-10 The hardware architecture background and top-level guidance (interface and chip detail diagrams) can help understand the hardware carrier and signal flow of each functional module.

[0088] 1. Power Supply and Power Link. The "DC24VIN2" on the left is a dual 24V DC input, providing power redundancy to ensure stable operation even in the event of a single power supply failure; it supplies power to the "PWR (Power Management Unit)" inside the SOC via a "DCDC" power conversion module. This is... Figure 1 All functional modules, including the "Time Synchronization Module" and "Business Scheduling Module," as well as... Figure 2-10The stable operation of core components such as PHY chips and SOCs ensures a stable power supply for each module.

[0089] Second, optical signal access links. "SerdesASFP+" and "SerdesBSFP+" are SFP+ optical module interfaces, supporting 10Gbps-level high-speed optical signal access (corresponding to...). Figure 1 "Optical interface module", Figure 2-3 (GE010Gbps port scenario). Optical signals enter the "PONMAC (PON Media Access Control Unit)" inside the SOC through these two interfaces, where they undergo protocol parsing, data encapsulation, and other processing on the optical network side. These are the hardware access points for optical network technologies such as XGSPON, providing... Figure 1 The "data conversion module" provides the "raw optical signal" to support the optical signal input for high-bandwidth services (such as multi-device collaboration in smart factories and high-definition surround view data in vehicles).

[0090] Third, the SOC core processing unit. The SOC (System-on-a-Chip) is the core hardware carrier of the device, integrating three key units.

[0091] “PWR”: Power Management Unit, responsible for distributing the power converted from DC-DC converter to various modules inside the SOC and external PHY chip; “PONMAC”: Processes data on the optical network side, and is the basis for protocol conversion between optical signals and electrical signals; “EthernetMAC”: Processes Ethernet-side data and provides protocol and data forwarding support for Ethernet terminal access.

[0092] yes Figure 1 The hardware implementation carriers of the "protocol processing module," "time synchronization module," and "service scheduling module" (for example, the nanosecond-level clock reference of the "time synchronization module" is generated by the internal clock circuit of the SOC, and the multi-service priority scheduling of the "service scheduling module" is completed by the internal logic of the SOC); it is also Figure 2-10 The core control center for the interaction between each PHY chip and the SOC pins is where all Ethernet interface signals ultimately need to interact with the internal units of the SOC.

[0093] Fourth, Ethernet interface output link. The SOC's "EthernetMAC" is connected to the "RJ45" Ethernet interface through multiple "GEPHY (Gigabit Physical Layer Chip)" and is divided into two types of interface forms.

[0094] “GEPHYSGMII”: SGMII stands for “Serial Gigabit Media Independent Interface”, adapted for high-speed serial links (corresponding to…). Figure 4-8 Gigabit ports such as GE1 and GE2 (these ports interact with the SOC via PCIe high-speed links). “GEPHYRGMII”: RGMII stands for “Simplified Gigabit Media Independent Interface”, which is compatible with parallel signal links (corresponding to…). Figure 9-10 The GE4 port interacts with the SOC via a parallel signal group.

[0095] yes Figure 1 The hardware of the "terminal access module" directly manifests itself, providing a standardized Ethernet access channel for smart factory equipment, vehicle terminals, and other devices; while Figure 2-10 These are detailed diagrams showing the specific chip circuits and pin connections in these "GEPHY to RJ45" links.

[0096] In conclusion, Figure 11 The complete hardware logic of the device, from "optical signal input → SOC core processing → Ethernet terminal output," is clearly presented. Figure 1 The "hardware implementation blueprint" of the functional modules also provides Figure 2-10 The detailed circuit design provides "top-level architecture guidance".

[0097] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An optical network unit (ONU) device based on an all-optical network, characterized in that, include: The optical interface module supports 10Gbps fiber optic connections according to the XGS-PON standard. It is used to establish point-to-multipoint communication links with optical fiber and optical line terminal (OLT) to achieve bidirectional low-loss transmission of optical signals and adapt to the access requirements of smart factory equipment and vehicle terminals. The time synchronization module, based on the IEEE 802.1AS-Rev protocol, achieves nanosecond-level clock synchronization, providing a time reference for motion control in smart factories and real-time sensing data transmission in vehicles; The data conversion module is used to convert industrial control signals and vehicle Ethernet signals on the terminal side into optical signals suitable for fiber optic transmission. At the same time, it receives downlink optical signals from the OLT and restores them into data signals that the terminal can recognize. It also supports TSN low-latency modulation and demodulation. The business scheduling module connects the data conversion module and the data caching module. It is used to prioritize business types, with motion control commands for smart factories and vehicle safety-related data having the highest priority. Priority transmission is achieved through dynamic time slot allocation. The data caching module is used to cache the received optical signal data and execute the caching strategy in conjunction with the priority instructions of the service scheduling module; The protocol processing module supports Profinet, EtherCAT, Modbus industrial control protocols and automotive Ethernet protocols, and performs low-latency protocol conversion based on data type.

2. The Optical Network Unit (ONU) device according to claim 1, characterized in that, The data caching module is used to dynamically adjust the cache capacity according to the production cycle flow of the smart factory and the real-time data volume during peak periods of vehicle operation, and adopts a zero-wait caching mechanism for the highest priority industrial control frames and vehicle safety frames.

3. The Optical Network Unit (ONU) device according to claim 1, characterized in that, The protocol processing module has a built-in protocol adapter submodule that supports bidirectional conversion of ProfinetRT, EtherCAT, and Modbus protocols, and is compatible with the IEEE 802.3bw protocol for automotive Ethernet.

4. The Optical Network Unit (ONU) device according to claim 1, characterized in that, The data conversion module includes a TSN-adaptive modem and a wavelength division multiplexing (WDM) module. The modem supports burst mode transmission to adapt to the time-division transmission characteristics of the ONU, and WDM allocates independent wavelength channels for smart factory services and automotive services.

5. The Optical Network Unit (ONU) device according to claim 1, characterized in that, The data caching module employs an intelligent sorting algorithm based on business characteristics. By identifying industrial control instruction identifiers and vehicle safety data tags in data packets, it automatically determines the importance of data packets and prioritizes caching and forwarding intelligent factory robot collaboration instructions and vehicle autonomous driving perception data.

6. The Optical Network Unit (ONU) device according to claim 1, characterized in that, The data conversion module supports bidirectional optical signal synchronous processing, which is used to simultaneously receive uplink control commands from smart factory equipment and downlink feedback data from the OLT.

7. The Optical Network Unit (ONU) device according to claim 1, characterized in that, The XGS-PON connection of the optical interface module supports dynamic bandwidth adjustment. When the smart factory starts multi-device collaborative operation or the vehicle terminal transmits high-definition surround view data, it is also used to automatically expand to full-speed transmission of 10Gbps.

8. The optical network unit (ONU) device according to claim 1, characterized in that, The protocol processing module includes a scenario-based data filtering submodule, which is used to filter unnecessary data according to preset rules; Specifically, for smart factory scenarios, production control data streams are retained while redundant equipment status information is filtered out; for vehicle scenarios, safety perception data streams are retained while entertainment service data is filtered out.

Images