A vision-based wafer size detection apparatus

Abstract

The application discloses a kind of vision-based wafer size detection device, to solve the problem of low precision, long detection time and hardware fatigue caused by rotation tilt and center offset in existing wafer diameter detection.The device includes an imaging module, at least three area array cameras, an appropriate telecentric lens, adjustable slide rails and back light source, a calibration module, a checkerboard calibration plate and a mapping matrix calculation unit, a detection module and a data processing module;By establishing pixel-physical coordinate mapping through calibration, the wafer image is synchronously captured and the edge sub-pixel coordinates are extracted during detection, and the circle is fitted after coordinate conversion, and the center coordinates and diameter are output.The application realizes non-contact detection, improves the size detection precision and repeatability, shortens the detection time, and ensures the yield of production line.

Description

Technical Field

[0001] This invention relates to the field of semiconductor inspection technology, and in particular to a vision-based wafer size inspection device. Background Technology

[0002] As a crucial carrier in semiconductor manufacturing, the accurate measurement of wafer diameter is of great significance for subsequent process control and finished product yield. However, in current inspection practices, wafers are typically measured using mechanical supports or moving parts, which often presents the following problems:

[0003] 1. Unstable detection benchmark: During the detection process, if the wafer is slightly tilted or warped, the edge data acquisition results may deviate from the true position, which will affect the accuracy of the final diameter calculation.

[0004] 2. Insufficient detection efficiency: Data collection relying on mechanical movement or point-by-point scanning often requires a long detection time, which is not conducive to meeting the detection speed requirements of mass production.

[0005] 3. Accumulation of systematic errors: The detection process involves the mechanical coordination of multiple links. If the detection center position or edge feature point recognition is not stable enough, it is easy to cause error accumulation, affecting the accuracy of the final diameter size and the center position.

[0006] In summary, existing detection methods have certain limitations in terms of detection accuracy, efficiency, and stability. Therefore, there is an urgent need to propose a new detection device to achieve high-precision and high-efficiency detection of wafer diameter. Summary of the Invention

[0007] In view of the shortcomings of the existing technology, the purpose of this invention is to provide a vision-based wafer size detection device for achieving high-precision and high-efficiency detection of wafer diameter.

[0008] To achieve the above objectives, the present invention provides the following technical solution: a vision-based wafer size inspection device, comprising:

[0009] The imaging module includes at least three area array cameras, a telecentric lens adapted to each of the area array cameras, an adjustable slide rail for adjusting the position of the cameras, and a backlight for providing the image.

[0010] Each of the area scan cameras is vertically mounted above the plane of the wafer to be inspected via the adjustable slide rail, and the center of the field of view of each of the area scan cameras covers the edge area of ​​the wafer to be inspected.

[0011] The telecentric lens is fixedly mounted on the lens end of each of the area array cameras, and is used to maintain the stability of imaging when the wafer to be inspected has warping within a preset range or slight deformation caused by support.

[0012] The backlight source is located in the area below each of the area array cameras and the edge of the wafer to be inspected, and the light emission direction of the backlight source is directly opposite to the center of the adapted telecentric lens.

[0013] The calibration module, connected to the imaging module, includes a calibration plate with a checkerboard pattern and a mapping matrix calculation unit for calculating coordinate mapping relationships.

[0014] The mapping matrix calculation unit is configured as follows:

[0015] The system receives calibration board images captured by each of the area array cameras, extracts the pixel coordinates of the checkerboard corner points in the calibration board images, obtains the physical coordinates of each corner point relative to the preset origin of the calibration board, and calculates the mapping matrix from pixel coordinates to physical coordinates of each of the area array cameras based on the correspondence between the pixel coordinates and physical coordinates.

[0016] The detection module is connected to the imaging module, and the detection module is configured to:

[0017] After calibration, each of the area array cameras is controlled to synchronously capture wafer images of the wafer to be inspected, and edge extraction processing is performed on the captured wafer images to extract sub-pixel level coordinate data of the wafer edges;

[0018] A data processing module, connected to the calibration module and the detection module, is configured as follows:

[0019] The mapping matrix corresponding to each of the area array cameras is invoked to convert each of the sub-pixel level coordinate data into wafer edge physical coordinates under the same preset physical coordinate system;

[0020] A circular fitting operation is performed on the physical coordinates of all converted wafer edges to obtain the fitting result. Based on the fitting result, the center coordinates and diameter of the wafer to be tested are calculated and output.

[0021] Furthermore, the adjustable slide rail includes a focusing slide rail extending in the vertical direction and a position adjusting slide rail extending in the horizontal direction;

[0022] The focusing slide rail is used to drive the corresponding area array camera to move in the vertical direction in order to adjust the distance between the camera and the wafer to be inspected;

[0023] The position adjustment slide rail is used to drive the corresponding area array camera to move horizontally in order to adjust the camera's field of view coverage.

[0024] Furthermore, the imaging module also includes a brightness adjustment unit, which is electrically connected to each of the area array cameras and each of the backlight sources.

[0025] The brightness adjustment unit is configured as follows:

[0026] The average grayscale value of each wafer image is acquired in real time. The difference between the average grayscale values ​​of each wafer image is compared, and the luminous brightness of the corresponding backlight and the exposure time of the area scan camera are adjusted synchronously to make the grayscale values ​​of the wafer images output by each area scan camera consistent.

[0027] Furthermore, the calibration plate is a rigid planar structure, its size is not less than the maximum design size of the wafer to be tested, and the checkerboard pattern of the calibration plate satisfies:

[0028] The side length accuracy error of adjacent chessboard squares is ≤ ±0.001mm, and the sharpness of the corner points of the chessboard squares is ≥90°;

[0029] The calibration plate can be adapted to be placed in the support position of the wafer to be tested, and after placement, the upper surface of the calibration plate is coplanar with the upper surface of the wafer to be tested, with a coplanarity error ≤0.005mm.

[0030] Furthermore, the mapping matrix calculation unit is configured to:

[0031] The pixel coordinates of the extracted checkerboard corner points are denoised to remove abnormal corner point coordinates caused by image noise.

[0032] Based on the denoised pixel coordinates and their corresponding physical coordinates, the 3×3 mapping matrix of each area array camera is calculated using the least squares method. And when the average error of each of the mapping matrices is ≤0.001mm, the calculated mapping matrices are stored in the local storage unit, where n is the number of area scan cameras and n≥3;

[0033] The local storage unit is used for long-term storage of each of the mapping matrices, and when the installation position of each of the area array cameras does not change, the stored mapping matrices can be directly called for multiple batches of wafer inspection without repeated calibration.

[0034] Furthermore, the detection module is configured to: extract sub-pixel level coordinate data of the wafer edge.

[0035] First, after the backlight is turned on, the image of the wafer is already displayed in a binarized distribution state.

[0036] The average grayscale of the captured wafer images is then evaluated, and the exposure time of each area array camera is adjusted to make the grayscale of the wafer images consistent.

[0037] Then, a subpixel edge detection algorithm is used to extract the edges of the preprocessed image to obtain the subpixel-level coordinate data of the wafer edge, and the extraction accuracy of the extracted subpixel-level coordinate data is higher than 1 / 10 pixel.

[0038] Furthermore, the data processing module is configured to perform circle fitting operations as follows:

[0039] First, outlier removal is performed on all converted wafer edge physical coordinates, removing isolated coordinate points that deviate from the preset edge contour;

[0040] Then, the least squares circle fitting algorithm is used to fit the remaining physical coordinates, and the center coordinates of the fitted circle are calculated. and diameter ;

[0041] During the fitting process, the following condition must be met: the maximum distance deviation between the fitted circle and each of the physical coordinate points must be ≤0.002mm.

[0042] Furthermore, it also includes an auxiliary verification module, which is connected to the imaging module, the detection module, and the data processing module respectively. The auxiliary verification module includes a rotating platform and an industrial robotic arm.

[0043] The rotating platform is used to carry the wafer to be inspected and can rotate around an axis perpendicular to the wafer plane by N angles, where N≥3. During the rotation, it avoids the wafer's notch, and the rotation angle accuracy error is ≤0.1°.

[0044] The industrial robotic arm is used to grasp the wafer to be inspected and drive the wafer to be inspected to translate or rotate, with a translation error ≤1mm and a rotation error ≤0.1°.

[0045] The auxiliary verification module is configured as follows:

[0046] The wafer is photographed from multiple angles by a rotating platform and the wafer is dynamically displaced by the industrial robotic arm. Multiple sets of physical coordinates of the wafer edge are obtained and circle fitting is performed to form fitting results. The center coordinates and diameter differences of multiple sets of fitting results are compared to verify the repeatability of the detection results. The final output wafer diameter detection result has a fluctuation range of ≤±2μm and a standard deviation of ≤0.3μm.

[0047] Furthermore, a support mechanism is provided at the support position of the wafer to be tested, and the support mechanism is a three-point support structure or a planar support structure;

[0048] The three support points of the three-point support structure are evenly distributed along the same circumference with the center of the wafer as the center, and the upper surface of the support points is made of flexible material.

[0049] The support surface of the planar support structure adopts a vacuum adsorption design, which fixes the wafer by negative pressure adsorption, and the adsorption pressure is ≤0.05MPa.

[0050] Furthermore, the number of the area scan cameras is three. The three area scan cameras are evenly distributed along the circumference of the wafer to be inspected. The field of view coverage of two adjacent area scan cameras does not overlap, and the field of view of the three area scan cameras together cover the edge contour of the wafer in three directions.

[0051] Each of the area array cameras has a resolution of ≥5 million pixels and a frame rate of ≥24fps.

[0052] The beneficial effects of this invention are:

[0053] 1. Improved detection accuracy: By using at least three area array cameras in conjunction with a telecentric lens to achieve multi-view imaging, stable and distortion-free edge images can still be obtained even when the wafer is warped or deformed within a preset range, thus ensuring the accuracy of diameter detection results.

[0054] 2. The calibration module establishes a precise mapping relationship between pixel coordinates and physical coordinates through a checkerboard calibration board and a mapping matrix calculation unit, so that data captured by different cameras are unified under the same physical coordinate system, avoiding errors caused by differences in camera installation positions and improving the consistency of detection results.

[0055] 3. Improved inspection efficiency: Each area array camera can complete the synchronous acquisition of wafer images at the same time, without the need for point-by-point scanning with the help of a rotating platform, thus significantly shortening the inspection time and making it suitable for rapid inspection scenarios of large batches of wafers.

[0056] 4. Enhanced detection stability: The use of a telecentric lens effectively reduces imaging distortion caused by slight wafer warping and uneven support, ensuring the stability of edge extraction; the backlight is positioned directly in front of the center of the telecentric lens, providing a uniform contrast imaging environment, ensuring clear edge features and stable detection results.

[0057] 5. Ensure the reliability of results: The data processing module can effectively eliminate the interference of local defects by performing circular fitting on the physical coordinates of the wafer edge, thereby outputting more realistic and reliable wafer center coordinates and diameter dimensions.

[0058] In summary, this invention significantly improves detection accuracy, detection efficiency, detection stability, and result reliability, and can meet the semiconductor manufacturing industry's demand for high-precision and high-efficiency wafer size detection. Attached Figure Description

[0059] Figure 1 This is a schematic diagram of the vision-based wafer size detection device in this invention.

[0060] Reference numerals: 1. Imaging module; 11. Area scan camera; 12. Telecentric lens; 13. Adjustable slide rail; 14. Backlight; 15. Brightness adjustment unit; 2. Calibration module; 21. Calibration plate; 22. Mapping matrix calculation unit; 3. Detection module; 4. Data processing module; 5. Auxiliary verification module; 51. Rotating platform; 52. Industrial robotic arm. Detailed Implementation

[0061] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Identical components are denoted by the same reference numerals. It should be noted that the terms "front," "rear," "left," "right," "upper," and "lower" used in the following description refer to directions in the accompanying drawings, and the terms "bottom surface," "top surface," "inner," and "outer" refer to directions toward or away from the geometric center of a specific component, respectively.

[0062] Example 1, refer to Figure 1 This is the first embodiment of the present invention. This embodiment provides a vision-based wafer size inspection device, including:

[0063] The system consists of an imaging module 1, a calibration module 2, a detection module 3, and a data processing module 4.

[0064] Imaging module 1: This module includes three area array cameras 11, telecentric lenses 12 that are adapted to each area array camera 11, adjustable slide rails 13, and backlight 14.

[0065] Three area array cameras 11 are mounted on the same horizontal plane and their positions are adjusted by sliding rails to ensure that each camera is arranged perpendicular to the edge of the wafer plane and that the center of its field of view covers the edge area of ​​the wafer.

[0066] Each telecentric lens 12 is fixed to the front of the camera to maintain imaging stability and geometric consistency when the wafer is warped or the support is deformed.

[0067] The backlight 14 is fixed at the edge of the wafer and directly below the telecentric lens 12, with the light source pointing directly at the center of the lens to ensure uniformity and contrast in the image.

[0068] To further ensure grayscale consistency across the three cameras, the average grayscale value of each camera image was calculated, and the light source brightness and camera exposure time were adjusted to unify the imaging brightness of each camera. Since the wafer itself is opaque, it appears as a black area in the image, while the background under illumination is a gray or white area, thus clearly highlighting the wafer outline.

[0069] Calibration module 2 includes a checkerboard calibration board 21 and a mapping matrix calculation unit 22.

[0070] The calibration plate 21 is positioned on the same detection plane as the wafer to ensure that the calibration surface and the detection surface are consistent. The size of the calibration plate 21 can be adjusted according to the wafer to be tested. For example, a 300mm × 300mm calibration plate 21 is compatible with wafers of 300 inches and smaller.

[0071] During calibration, the calibration board 21 is moved within the field of view of each camera to fill the screen as much as possible with the checkerboard pattern. Pixel coordinates of corner points are extracted by drawing regions of interest (ROIs), and combined with physical coordinates, a mapping matrix from pixel coordinates to physical coordinates for each camera is calculated. The calibration results are stored and can be used long-term while the camera positions remain unchanged.

[0072] Detection Module 3: After calibration, place the wafer to be tested on the support device. The support method can be three-point support or planar support. Ensure that the edges of the wafer are all within the field of view of the three cameras.

[0073] During inspection, three cameras simultaneously acquire wafer images and extract sub-pixel level coordinate point sets at the wafer edge.

[0074] Data processing module 4: Calls the mapping matrix corresponding to each camera to convert the image coordinate point set into a physical coordinate point set.

[0075] After merging the three sets of edge physical coordinates, a circle fitting calculation is performed to obtain the center coordinates and diameter of the wafer.

[0076] Working principle of Example 1:

[0077] This device is based on the principle of multi-camera visual imaging. Multiple cameras simultaneously acquire wafer edge images on the same plane, avoiding tilt errors and low detection efficiency caused by mechanical methods such as rotational scanning. The telecentric lens 12 eliminates geometric distortions caused by wafer warping or support deformation, ensuring accurate edge feature extraction. The backlight 14 provides stable illumination, creating high contrast between the wafer and the background, facilitating edge extraction. The calibration module 2 establishes a precise pixel-to-physical coordinate mapping relationship, unifying data across different camera coordinate systems. Finally, the data processing module 4 uses a circle fitting method to eliminate local interference such as notch gaps, achieving accurate measurement of the wafer diameter and center.

[0078] Technical effects of Example 1:

[0079] High detection accuracy: The telecentric lens 12 imaging and multi-camera calibration ensure the geometric accuracy of edge extraction; the circle fitting algorithm eliminates Notch interference, making the measurement results true and reliable. This device is a non-contact vision measurement device, and the detection accuracy will not change due to hardware fatigue.

[0080] High inspection efficiency: Three cameras acquire images simultaneously, eliminating the need for rotating scans, significantly shortening inspection time and making it suitable for high-volume wafer inspection.

[0081] High detection stability: The light source and camera are evenly arranged, and grayscale correction ensures consistent imaging. Even if the wafer has slight warping, it will not affect the detection results.

[0082] Good repeatability: Experimental verification shows that by using the supplementary detection method of rotation angle, the measurement fluctuation range can be controlled within ±2, and the standard deviation is within 0.3, which meets the high-precision detection requirements of the semiconductor industry.

[0083] Example 2, the second embodiment of the present invention, further proposes an improved vision-based wafer size inspection device based on Example 1. This device optimizes the specific structures of the imaging module 1 and the calibration module 2 to further enhance the flexibility, imaging consistency, and calibration accuracy of wafer inspection.

[0084] Imaging module 1: Based on embodiment 1, each area array camera 11 is mounted on an adjustable slide rail 13 system consisting of a focusing slide rail and a position adjustment slide rail.

[0085] The focusing slide rail is arranged vertically to drive the camera up and down, thereby adjusting the distance between the camera and the wafer to obtain the best image sharpness and edge coverage.

[0086] The position adjustment slide rail is arranged horizontally to drive the camera to move horizontally, so as to flexibly adjust the camera's field of view to cover different edge areas of the wafer.

[0087] Imaging module 1 also includes a brightness adjustment unit 15, which is electrically connected to the three area array cameras 11 and the corresponding backlight 14. The brightness adjustment unit 15 acquires the average grayscale value of the wafer image obtained by each camera in real time, compares the differences, and automatically adjusts the light source brightness and camera exposure time to ensure that the images output by the three cameras are consistent in grayscale level.

[0088] Calibration Module 2: Calibration board 21 adopts a rigid planar structure, and its size is larger than the maximum design size of the wafer to be tested, ensuring the calibration coverage.

[0089] The checkerboard pattern on calibration plate 21 meets the following requirements: the side length accuracy error of adjacent checkerboard squares is ≤ ±0.001mm, and the corner sharpness is ≥90°.

[0090] When the calibration plate 21 is placed in the wafer support position, its upper surface is coplanar with the upper surface of the wafer after placement, and the coplanarity error is no more than 0.005mm, thereby ensuring the high consistency between the calibration plane and the detection plane.

[0091] Working principle of Example 2:

[0092] Before inspection, the operator can adjust the vertical and horizontal positions of each camera using the adjustable slide rail system 13, ensuring that all three cameras can image the wafer edge at the optimal distance and angle. Simultaneously, the brightness adjustment unit 15 compares the average grayscale values ​​of the images acquired by the three cameras in real time and dynamically adjusts the light source brightness and exposure time to ensure uniform image brightness and grayscale. This mechanism avoids image differences caused by uneven lighting or inconsistent camera parameters, thus guaranteeing the reliability of subsequent edge extraction results.

[0093] During the calibration process, the calibration board 21 is placed on the wafer support, and the checkerboard pattern is simultaneously captured by three cameras. Because the calibration board 21 has high-precision geometric dimensions and excellent coplanarity, the pixel coordinates it acquires can correspond to the precise physical coordinates, making the calibration results more stable and reliable.

[0094] During the inspection phase, after the wafer to be tested is placed in the support position, each camera synchronously acquires wafer edge images under uniform grayscale conditions, and the physical coordinates of the edges are extracted using a high-precision calibration matrix. Data processing module 4 obtains the wafer center and diameter by performing circle fitting on the edge points.

[0095] Technical effects of Example 3:

[0096] Increased inspection flexibility: The adjustable slide rail 13 allows the camera to be adjusted in both vertical and horizontal directions, enabling it to adapt to wafers of different sizes and placement positions, thus improving the applicability of the inspection device.

[0097] Enhanced imaging consistency: The brightness adjustment unit 15 ensures consistent brightness and grayscale in the output images of the three cameras by real-time correction of the light source and camera exposure parameters, avoiding edge extraction errors caused by differences in lighting.

[0098] Improved calibration accuracy: The rigid calibration plate 21 adopts a high-precision checkerboard pattern and strict coplanarity control, which makes the mapping relationship between pixel coordinates and physical coordinates more accurate and stable, fundamentally improving the overall detection accuracy.

[0099] Enhanced reliability of test results: With the support of unified imaging conditions and high-precision calibration, the results of circle fitting are closer to the true geometric dimensions of the wafer, effectively reducing error fluctuations and improving the consistency of repeated measurements.

[0100] In summary, this embodiment, through optimization of camera adjustment methods, illumination control mechanisms, and calibration accuracy, further ensures the flexibility, stability, and reliability of the wafer size inspection process, meeting the stringent requirements of semiconductor manufacturing for high-precision size inspection.

[0101] Example 3 is the third embodiment of the present invention. Based on Examples 1 and 2, this embodiment further proposes a vision-based wafer size detection device optimized in the calibration process, edge extraction process and data processing process.

[0102] Device structure and functional expansion:

[0103] Mapping matrix calculation unit 22: When calculating the mapping matrix, the extracted checkerboard corner pixel coordinates are first denoised to remove abnormal corner coordinates caused by image noise.

[0104] Based on the denoised pixel coordinates and their corresponding physical coordinates, the least squares method is used to fit and calculate the 3×3 mapping matrix of each area array camera 11.

[0105] Each mapping matrix is ​​stored in the local storage unit when the average error of each mapping matrix is ​​≤0.001mm, and the number of matrices in each camera group is ≥3. As long as the installation position of each camera does not change, subsequent detection can directly call the existing matrix file without repeated calibration.

[0106] Detection module 3: First, after the backlight 14 is turned on, the image of the wafer is already in a binarized distribution state.

[0107] The average grayscale of the captured wafer images is then evaluated. By adjusting the exposure time of each of the area array cameras, the grayscale of the wafer images is made consistent, thereby enhancing the contrast between the wafer and the background.

[0108] The preprocessed image is then processed by a subpixel edge detection algorithm to extract the subpixel-level coordinate data of the wafer edge. The extraction accuracy of the subpixel-level coordinate data is higher than 1 / 10 of a pixel to ensure the fine representation of the edge contour.

[0109] Data processing module 4: Before performing circular fitting, outliers are removed from the physical coordinate points of all wafer edges, and isolated points that deviate from the preset edge contour are cleared.

[0110] Then, the least squares circle fitting algorithm was used to calculate the coordinates of the wafer center and the diameter. The maximum deviation between the fitted circle and each physical coordinate point was required to be no more than 0.002 mm during the fitting process, so as to ensure the high accuracy of the final fitting result.

[0111] Working principle of Example 3:

[0112] During the calibration stage, this embodiment generates a high-precision mapping matrix and saves it for a long time by denoising the corner pixel coordinates and calculating the least squares fit. This reduces the workload of repeated calibration and ensures the consistency and efficiency of wafer inspection in multiple batches.

[0113] During the detection phase, the wafer image is first preprocessed to enhance edge contrast, and then a sub-pixel-level edge detection algorithm is used to obtain high-density edge point coordinate data. This process ensures that the contour information of the wafer edges is complete and rich in detail.

[0114] During the data processing stage, outlier isolated points are first removed to avoid local interference, and then the wafer center and diameter are obtained through a least-squares circle fitting algorithm. Because the fitting accuracy is strictly controlled within a maximum deviation of ≤0.002mm, the final measured wafer dimensions have extremely high reliability.

[0115] Technical effects of Example 3:

[0116] The calibration process is efficient and stable: the mapping matrix generated by denoising and least squares fitting is stored locally, eliminating the need for frequent recalibration and significantly improving the efficiency and consistency of multi-batch detection.

[0117] Refined edge extraction: The combination of grayscale, binarization and sub-pixel edge detection ensures a dense distribution of data points at the wafer edges, thereby improving the accuracy of circle fitting calculations.

[0118] The fitting results are highly accurate: By combining outlier removal with the least squares circle fitting method, the geometric accuracy of the fitted circle is guaranteed, and finally, highly reliable detection of the wafer center and diameter is achieved within an accuracy range of ±0.002mm.

[0119] Overall reliability of testing is improved: the optimization of the three links of calibration, testing and data processing creates a synergistic effect, making the wafer size testing in this embodiment significantly better than the traditional solution in terms of accuracy, stability and repeatability.

[0120] Example 4 is the fourth embodiment of the present invention. Based on Examples 1 to 3, this embodiment further proposes a vision-based wafer size detection device with an auxiliary verification module 5 and an optimized support method to improve the repeatability and stability of the detection results.

[0121] Device structure of Example 4:

[0122] Auxiliary verification module 5: It is connected to imaging module 1, detection module 3 and data processing module 4 respectively, and is used to verify the accuracy of wafer size detection results.

[0123] The auxiliary verification module 5 includes a rotating platform 51 and an industrial robotic arm 52.

[0124] The rotating platform 51 is used to carry the wafer to be inspected and can rotate around an axis perpendicular to the wafer plane by N angles, N≥3, while avoiding the notch of the wafer during the rotation; the accuracy error of its rotation angle is no greater than 0.1°.

[0125] The industrial robotic arm 52 is used to grasp the wafer to be inspected and drive it to translate or rotate, wherein the translation error is no greater than 1 mm and the rotation error is no greater than 0.1°.

[0126] Support mechanism: A support mechanism is provided at the support position of the wafer to be tested, which can be a three-point support structure or a planar support structure.

[0127] The three support points of the three-point support structure are evenly distributed along the same circumference with the center of the wafer as the center. The upper surface of the support points is made of flexible material to avoid causing local stress to the wafer.

[0128] The planar support structure uses vacuum adsorption to fix the wafer, with an adsorption pressure of no more than 0.05 MPa, thereby ensuring the stability and positional accuracy of the wafer during the testing process.

[0129] Camera configuration: The imaging module 1 has three area array cameras 11. The three cameras are evenly distributed along the circumference of the wafer. The field of view coverage of adjacent cameras does not overlap. The field of view of the three cameras together covers the edge contour of the wafer in three directions. The three directions are three directions evenly distributed along the center of the wafer, with an interval of 120° between adjacent directions.

[0130] Each area array camera has a resolution of ≥5 million pixels, a frame rate of ≥24fps, a pixel size of 0.0035mm*0.0035mm, and a camera magnification of 0.5x to ensure the clarity and real-time performance of edge images.

[0131] Working principle of Example 4:

[0132] During normal inspection, three area array cameras 11 synchronously acquire wafer edge images under the same lighting and calibration conditions. Combined with the calibration matrix and circle fitting algorithm, the center coordinates and diameter of the wafer are obtained.

[0133] To verify the repeatability accuracy of the detection results, this embodiment uses auxiliary verification module 5 for dynamic detection:

[0134] In the 51 mode of the rotating platform, the wafer is carried and rotated at multiple angles, avoiding the notch region with each rotation to ensure that the fitted data is not disturbed by the notch.

[0135] In robotic arm mode, the industrial robotic arm 52 drives the wafer to translate or rotate in different directions, enabling edge imaging under dynamic displacement.

[0136] These two methods allow for the acquisition of multiple sets of physical coordinate data for the wafer edge, which are then used for circle fitting calculations. Finally, the consistency and repeatability of the detection results are verified by comparing the differences in the center and diameter of the circles from multiple fitting results.

[0137] Technical effects of Example 4:

[0138] The test results are verifiable: the auxiliary verification module 5 can repeatedly collect wafer edge data at different angles and positions. By comparing and analyzing the fitting results, it ensures that the test results have high repeatability. The final output wafer diameter test results can be controlled within ±2μm, with a standard deviation of no more than 0.3μm.

[0139] Enhanced stability: Two methods, three-point support and planar vacuum support, can be flexibly selected, which can avoid deformation caused by uneven stress on the wafer, and can also achieve stable fixation of large-size wafers through vacuum adsorption, thereby improving the reliability of testing.

[0140] Comprehensive imaging coverage: Three high-resolution area array cameras 11 are evenly distributed and have complementary fields of view, which can completely cover the edge of the wafer, capture the wafer outline without blind spots, and improve the integrity and accuracy of the inspection.

[0141] Improved system adaptability: The introduction of the rotating platform 51 and the industrial robotic arm 52 enables this device to not only achieve high-precision static inspection, but also to perform repeatable verification in dynamic environments, meeting the dual requirements of high precision and high reliability in semiconductor production.

[0142] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principle of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. A vision-based wafer size inspection device, characterized in that, include: The imaging module (1) includes at least three area array cameras (11), a telecentric lens (12) adapted to each of the area array cameras (11), an adjustable slide rail (13) for adjusting the position of the camera, and a backlight (14) for providing the image. Each of the area array cameras (11) is vertically mounted above the plane of the wafer to be inspected via the adjustable slide rail (13), and the center of the field of view of each of the area array cameras (11) covers the edge area of ​​the wafer to be inspected. The telecentric lens (12) is fixedly mounted on the lens end of each of the area array cameras (11) to maintain the stability of imaging when the wafer to be inspected has a preset range of warping or slight deformation caused by support. The backlight (14) is located in the lower region between each of the area array cameras (11) and the edge of the wafer to be inspected, and the light emission direction of the backlight (14) is directly opposite to the center of the adapted telecentric lens (12). The calibration module (2) is connected to the imaging module (1) and includes a calibration plate (21) with a checkerboard pattern and a mapping matrix calculation unit (22) for calculating coordinate mapping relationships. The mapping matrix calculation unit (22) is configured as follows: Receive calibration board images captured by each of the area array cameras (11), extract the pixel coordinates of the checkerboard corner points in the calibration board images, obtain the first physical coordinates of each corner point relative to the preset origin of the calibration board (21), and calculate the mapping matrix from the pixel coordinates to the first physical coordinates of each of the area array cameras (11) based on the correspondence between the pixel coordinates and the first physical coordinates. The detection module (3) is connected to the imaging module (1), and the detection module (3) is configured as follows: After calibration, control each of the area array cameras (11) to synchronously capture wafer images of the wafer to be inspected, and perform edge extraction processing on the captured wafer images to extract sub-pixel level coordinate data of the wafer edge; The data processing module (4) is connected to the calibration module (2) and the detection module (3), and the data processing module (4) is configured as follows: Call the mapping matrix corresponding to each of the area array cameras (11) to convert each of the sub-pixel level coordinate data into wafer edge physical coordinates under the same preset physical coordinate system; A circular fitting operation is performed on the physical coordinates of all the converted wafer edges to obtain the fitting result. Based on the fitting result, the center coordinates and diameter of the wafer to be tested are calculated and output. The imaging module (1) further includes a brightness adjustment unit (15), which is electrically connected to each of the area array cameras (11) and each of the backlight sources (14); The brightness adjustment unit (15) is configured as follows: The average gray value of each wafer image is collected in real time, and the difference between the average gray values ​​of each wafer image is compared. The luminous brightness of the corresponding backlight (14) and the exposure time of the area scan camera (11) are adjusted synchronously to make the gray values ​​of the wafer images output by each area scan camera (11) consistent. The mapping matrix calculation unit (22) is further configured to: The pixel coordinates of the extracted checkerboard corner points are denoised to remove abnormal corner point coordinates caused by image noise. Based on the denoised pixel coordinates and the corresponding first physical coordinates, the 3×3 mapping matrix of each area array camera (11) is calculated using the least squares method. And when the average error of each of the mapping matrices is ≤0.001mm, the calculated mapping matrices are stored in the local storage unit, where n is the number of area array cameras (11) and n≥3; The local storage unit is used for long-term storage of each of the mapping matrices, and when the installation position of each of the area array cameras (11) has not changed, the stored mapping matrices can be directly called for multiple batches of wafer inspection without repeated calibration.

2. The vision-based wafer size inspection device according to claim 1, characterized in that: The adjustable slide rail (13) includes a focusing slide rail extending in the vertical direction and a position adjusting slide rail extending in the horizontal direction; The focusing slide rail is used to drive the corresponding area array camera (11) to move in the vertical direction to adjust the distance between the camera and the wafer to be inspected; The position adjustment slide rail is used to drive the corresponding area array camera (11) to move in the horizontal direction in order to adjust the camera's field of view coverage.

3. The vision-based wafer size inspection device according to claim 1, characterized in that: The calibration plate (21) is a rigid planar structure, and its size is not less than the maximum design size of the wafer to be tested. The checkerboard pattern of the calibration plate (21) satisfies the following: The side length accuracy error of adjacent chessboard squares is ≤ ±0.001mm, and the sharpness of the corner points of the chessboard squares is ≥90°; The calibration plate (21) can be adapted to be placed in the support position of the wafer to be tested, and after placement, the upper surface of the calibration plate (21) is coplanar with the upper surface of the wafer to be tested after placement, with a coplanarity error ≤0.005mm.

4. The vision-based wafer size inspection device according to claim 1, characterized in that: The detection module (3) is configured to extract sub-pixel level coordinate data of the wafer edge as follows: First, after the backlight (14) is turned on, the image of the wafer is already presented in a binarized distribution state. The average grayscale of the captured wafer images is then evaluated, and the exposure time of each area array camera is adjusted to ensure that the grayscale of the wafer images is consistent. Then, a subpixel edge detection algorithm is used to extract the edges of the preprocessed image to obtain the subpixel-level coordinate data of the wafer edge, and the extraction accuracy of the extracted subpixel-level coordinate data is higher than 1 / 10 pixel.

5. The vision-based wafer size inspection device according to claim 1, characterized in that: When performing circular fitting calculations, the data processing module (4) is configured as follows: First, outlier removal is performed on all converted wafer edge physical coordinates, removing isolated coordinate points that deviate from the preset edge contour; Then, the least squares circle fitting algorithm is used to fit the physical coordinates of the remaining wafer edge after outlier removal, and the center coordinates and diameter of the fitted circle are calculated. During the fitting process, the following condition must be met: the maximum distance deviation between the fitted circle and the physical coordinates of each wafer edge must be ≤0.002mm.

6. The vision-based wafer size inspection device according to claim 1, characterized in that: It also includes an auxiliary verification module (5), which is connected to the imaging module (1), the detection module (3), and the data processing module (4) respectively. The auxiliary verification module (5) includes a rotating platform (51) and an industrial robotic arm (52). The rotating platform (51) is used to carry the wafer to be tested and can rotate around an axis perpendicular to the wafer plane by N angles, where N≥3. During the rotation, it avoids the notch of the wafer and the rotation angle accuracy error is ≤0.1°. The industrial robotic arm (52) is used to grasp the wafer to be inspected and drive the wafer to be inspected to translate or rotate. The translation error is ≤1mm and the rotation error is ≤0.1°. The auxiliary verification module (5) is configured as follows: The wafer is photographed from multiple angles by a rotating platform (51) and the wafer is photographed by the industrial robotic arm (52) with dynamic displacement. Multiple sets of wafer edge physical coordinates are obtained and circle fitting is performed to form fitting results. The center coordinates and diameter differences of multiple sets of fitting results are compared to verify the repeatability of the detection results. The final output wafer diameter detection result has a fluctuation range of ≤±2μm and a standard deviation of ≤0.3μm.

7. The vision-based wafer size inspection device according to claim 1, characterized in that: The wafer to be tested is provided with a support mechanism at its support position. The support mechanism is a three-point support structure or a planar support structure. The three support points of the three-point support structure are evenly distributed along the same circumference with the center of the wafer as the center, and the upper surface of the support points is made of flexible material. The support surface of the planar support structure adopts a vacuum adsorption design, which fixes the wafer by negative pressure adsorption, and the adsorption pressure is ≤0.05MPa.

8. The vision-based wafer size inspection device according to claim 1, characterized in that: The number of the area array cameras (11) is three. The three area array cameras (11) are evenly distributed along the circumferential direction of the wafer to be inspected. The field of view coverage of two adjacent area array cameras (11) does not overlap, and the field of view of the three area array cameras (11) together cover the edge contour of the wafer in three directions. Each of the area array cameras (11) has a resolution of ≥5 million pixels and a frame rate of ≥24fps.

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