A precise mapping method for electrical interfaces of an integrated verification test system for aircraft power supply systems
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-08
- Publication Date
- 2026-08-14
AI Technical Summary
飞机供电系统电气接口信号种类繁多且特性复杂,所以不同飞机供电系统实物试验所配套的功率驱动装置、信号调理箱、激励器、测控装置基本都是非标设备,设备定制化程度很高,不同电气接口通道之间的精度差异大、一致性不高
[0016]本申请实施例提出的飞机供电系统综合验证试验系统电气接口精准映射方法、装置、介质和系统,应用于数字仿真系统向实物试验系统的电气接口映射,包括:依次利用串联线缆压降补偿算法、电压电流保护算法、闭环延迟补偿算法、固定频率采样算法处理第一仿真信号,得到第一电气仿真信号,经第一高速同步实时网络传输至功率驱动装置;依次利用信号缩比算法、通道输出特性逆向模拟算法、固定频率采样算法处理第二仿真信号,得到第二电气仿真信号,经第二高速同步实时网络传输至AO&DO板卡;依次利用通道输出特性逆向模拟算法、固定频率采样算法处理第三仿真信号,得到第三电气仿真信号,经第三高速同步实时网络传输至试验激励器/测控装置;利用AO&DO板卡处理第二电气仿真信号,得到第二电气信号和第三电气信号;利用试验激励器/测控装置的业务逻辑层处理第三电气仿真信号,得到第五电气信号;利用功率驱动装置的业务逻辑层处理第一电气仿真信号和第二电气信号,得到第一电气信号;利用信号调理箱处理第三电气信号,得到第四电气信号;将第一电气信号、第四电气信号、第五电气信号输入至实物试验系统,以驱动实物试验系统进行飞机供电系统的实物试验;其中,第二至第五电气信号均指各对应信号硬线传输的信号级信号,第一电气信号指经功率硬线传输的功率级信号,第一至第三高速同步实时网络优选包括TSN网络和反射内存光纤网络,本申请的高速同步实时网络可确保所有的虚拟信号和物理信号都能够以统一节律交互,确保综合验证试验系统的稳定性,本申请可以提高数字仿真系统与实物试验系统之间的电气接口的电气特征完整性、匹配精度和兼容性,提升飞机供电系统实物试验系统结果的有效性。
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Abstract
Description
Technical Field
[0001] This application relates to the technical field of integrated verification test of aircraft power supply systems, and particularly to a method for accurately mapping electrical interfaces of an integrated verification test system for aircraft power supply systems. Background Art
[0002] In cross-tests of virtual-real integration in various fields, the main method for mapping and interacting simulation data of virtual models and physical data of physical tests is to configure sensors to dynamically collect status information and periodically read data, and perform data interaction between the physical field and the virtual field through manual configuration and fixed network protocol transmission.
[0003] The disclosed patents and literature mainly describe the construction methods of virtual-real data interaction paths and channels. Some patents mention the basic steps of mapping interaction, including node status mapping, data acquisition and transmission, data processing and analysis, and optimization decision feedback. Data preprocessing includes data cleaning, data type conversion, and format conversion. In the virtual field, simulation and simulation of the preprocessed data are performed, including threshold adjustment, operation setting, etc., and analysis and error reporting are performed based on the processing results. However, the disclosed patents and literature do not fully consider the characteristics of electrical interfaces and do not disclose the specific mapping methods of electrical interfaces in virtual-real integration and verification.
[0004] Currently, in the physical test system of an aircraft power supply system, the basic block diagram of a typical technical method for virtual-real mapping of electrical interfaces is as Figure 1 shown. The electrical simulation data of the virtual model running in the digital simulation system needs to interact with the electrical interfaces of the physical test system through various IO boards, signal conditioning boxes, power drive devices, exciters, and measurement and control devices. However, the aircraft power supply system has its particularities. It not only has multiple voltage levels such as 115VAC, 230VAC, 28VDC, 270VDC, 540VDC, etc., but also has different power supply systems such as variable-frequency AC, constant-frequency AC, high-voltage DC, and low-voltage DC mixed to supply power to the electrical loads of the whole aircraft. The electrical interface signals of the aircraft power supply system are numerous and have complex characteristics. Therefore, the power drive devices, signal conditioning boxes, exciters, and measurement and control devices supporting different physical tests of aircraft power supply systems are basically non-standard devices, and the degree of equipment customization is very high. The accuracy differences between different electrical interface channels are large and the consistency is not high. If directly Figure 2 performing electrical interface mapping and virtual-real signal interaction according to the shown method, the mapping accuracy is low, and in the case of long-term operation, the data difference degree between the power supply system model simulation and the physical test will rapidly accumulate and spread, making the model operation state unable to match the physical part, resulting in the failure of the physical test system of the aircraft power supply system. Summary of the Invention
[0005] The main purpose of this application is to provide a precise mapping method for the electrical interface of an integrated verification test system for aircraft power supply systems. The aim is to provide a method suitable for precise mapping of the electrical interface of an integrated verification test system for aircraft power supply systems, improve the electrical characteristic integrity, matching accuracy and compatibility of the electrical interface between virtual verification tests and physical verification tests, and enhance the effectiveness of the results of the physical test system of aircraft power supply systems.
[0006] To achieve the above objectives, this application provides a method for precise mapping of electrical interfaces in an integrated verification test system for an aircraft power supply system. The method is characterized by its application to mapping electrical interfaces from a digital simulation system to a physical test system, comprising: sequentially processing a first simulation signal using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed-frequency sampling algorithm to obtain a first electrical simulation signal, which is then transmitted to a power drive device via a first high-speed synchronous real-time network; sequentially processing a second simulation signal using a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed-frequency sampling algorithm to obtain a second electrical simulation signal, which is then transmitted to an AO&DO board via a second high-speed synchronous real-time network; and sequentially processing a third simulation signal using a channel output characteristic inverse simulation algorithm and a fixed-frequency sampling algorithm to obtain a third electrical simulation signal, which is then transmitted to a test exciter / control device via a third high-speed synchronous real-time network. The power drive device includes a power amplifier, a programmable power supply, and a switching power supply. The AO&DO board processes the second electrical simulation signal to obtain a second electrical signal and a third electrical signal. The business logic layer of the test exciter / measurement and control device processes the third electrical simulation signal to obtain a fifth electrical signal. The business logic layer of the power drive device processes the first electrical simulation signal and the second electrical signal to obtain a first electrical signal. The signal conditioning box processes the third electrical signal to obtain a fourth electrical signal. The first, fourth, and fifth electrical signals are input to the physical test system to drive the physical test system to conduct a physical test of the aircraft power supply system. The second to fifth electrical signals refer to the signal level signals transmitted via hardwired connections, and the first electrical signal refers to the power level signal transmitted via power hardwired connections. The first to third high-speed synchronous real-time networks preferably include a TSN network and a reflective memory fiber optic network.
[0007] Optionally, the first simulation signal is processed sequentially using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed frequency sampling algorithm to obtain a first electrical simulation signal, which is then transmitted to the power drive device via a first high-speed synchronous real-time network. This includes: acquiring the power hard-wire impedance and load current, the model output voltage, and the load voltage; processing the first simulation signal according to the series cable voltage drop compensation algorithm to obtain a voltage drop compensation first signal, wherein the series cable voltage drop compensation algorithm is based on the sum of the model output voltage and the product of the power hard-wire impedance and the load current to obtain the voltage drop compensation first signal; and determining whether the value of the voltage drop compensation first signal exceeds the threshold of the electrical interface of the power drive device connected to the physical test system according to the voltage and current protection algorithm. If it exceeds the threshold, the voltage drop compensation is terminated. The output of the first compensation signal is adjusted; otherwise, the first voltage drop compensation signal is transmitted. The first delay time of the first voltage drop compensation signal of the series cable to the power drive device, the second delay time of the output voltage of the power drive device, the third delay time of the load current data collected by the load interface of the physical test system, and the fourth delay time of the feedback data transmitted to the digital simulation system through the network are obtained. The closed-loop delay compensation algorithm is determined according to the sum of the first delay time, the second delay time, the third delay time, and the fourth delay time. The first voltage drop compensation signal is input into the closed-loop delay compensation algorithm to obtain the first delay compensation signal. A fixed sampling time is set according to the reciprocal of the highest sampling frequency. The first delay compensation signal is output at equal time intervals according to the fixed sampling time to obtain the first electrical simulation signal.
[0008] Optionally, the step of sequentially processing the second simulation signal using a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed frequency sampling algorithm to obtain the second electrical simulation signal includes: acquiring analog quantities, discrete quantities, and PMW signals based on the second simulation signal; and sequentially processing the input analog quantities, discrete quantities, and PMW signals using a preset first mapping rule base and a channel output characteristic inverse simulation algorithm to obtain the second electrical simulation signal.
[0009] Optionally, the AO&DO board and the test exciter / measurement and control device are respectively connected to the digital simulation system, and the signal conditioning box is connected to the AO&DO board; the step of sequentially processing the input analog, discrete, and PMW signals using a preset first mapping rule library and a channel output characteristic inverse simulation algorithm to obtain the second electrical simulation signal includes: determining the first mapping rule library based on the signal mapping rules of the aircraft power supply system virtual-real fusion test electrical board; processing the input analog, discrete, and PMW signals using the first mapping rule library to obtain the simulation mapping signal; obtaining the inherent errors of the signal conditioning box, AO&DO board, and test exciter / measurement and control device through offline calibration tests; performing inverse pre-compensation on the simulation mapping signal based on their inherent errors; setting a fixed sampling time according to the reciprocal of the highest sampling frequency; and outputting the inverse pre-compensated simulation mapping signal at equal time intervals according to the fixed sampling time to obtain the second electrical simulation signal.
[0010] Optionally, the step of sequentially processing the third simulation signal using the channel output characteristic reverse simulation algorithm and the fixed frequency sampling algorithm to obtain the third electrical simulation signal includes: obtaining the inherent error through offline calibration test and performing pre-compensation using the characteristic reverse simulation algorithm to obtain the reverse compensation second signal; setting a fixed sampling time according to the reciprocal of the highest sampling frequency, and outputting the reverse compensation second signal at equal time intervals according to the fixed sampling time to obtain the third electrical simulation signal.
[0011] To achieve the above objectives, this application also provides a precise mapping method for the electrical interface of an integrated verification test system for an aircraft power supply system as described above, applied to the mapping of the electrical interface from a physical test system to a digital simulation system, comprising: a physical drive signal generation module, used to obtain a first physical drive signal, a second physical drive signal, and a third physical drive signal based on the physical test system; processing the first physical drive signal using the business logic layer of a power drive device to obtain a first physical mapping signal and a fourth physical drive signal respectively; transmitting the first physical mapping signal to a data filtering module via a first high-speed synchronous real-time network to obtain a first filtered signal; processing the second physical drive signal using a signal conditioning box to obtain a fifth physical drive signal; and processing the third physical drive signal using the business logic layer of a test exciter / measurement and control device to obtain a third physical mapping signal; wherein the first physical drive signal is a power level signal, and the second to fifth physical drive signals are all signal level signals; and a physical drive signal transmission module, used to process the input fourth and fifth physical drive signals using an AI&DI board to obtain the third physical mapping signal. The two physical mapping signals are transmitted to the data filtering module via the second high-speed synchronous real-time network to obtain the second filtered signal. The third physical drive signal is processed by the business logic layer of the test exciter / control device and transmitted to the data filtering module via the third high-speed synchronous real-time network to obtain the third filtered signal. The first filtered signal is processed by the closed-loop delay compensation algorithm to obtain the delay-compensated third signal. The delay-compensated third signal is processed by the cable voltage drop compensation algorithm to obtain the voltage drop compensation second signal. The second and third filtered signals are processed by the channel output characteristic reverse simulation algorithm to obtain the reverse-compensated second and third signals respectively. The reverse-compensated second signal is processed by the signal restoration algorithm to obtain the restored signal. A fixed sampling time is set according to the reciprocal of the highest sampling frequency. The voltage drop compensation second signal, the restored signal, and the reverse-compensated third signal are sampled according to the fixed sampling time to obtain the first to third sampled signals. The first to third sampled signals are input to the model electrical simulation signal input port of the digital simulation system to drive the digital simulation system to simulate the power supply system model.
[0012] To achieve the above objectives, this application also provides a precise mapping device for the electrical interface of an integrated verification test system for an aircraft power supply system, comprising: a simulation signal generation module, used to process a first simulation signal sequentially using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed frequency sampling algorithm to obtain a first electrical simulation signal, which is then transmitted to a power drive device via a first high-speed synchronous real-time network; a second simulation signal sequentially using a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed frequency sampling algorithm to obtain a second electrical simulation signal, which is then transmitted to an AO&DO board via a second high-speed synchronous real-time network; and a third simulation signal sequentially using a channel output characteristic inverse simulation algorithm and a fixed frequency sampling algorithm to obtain a third electrical simulation signal, which is then transmitted to a test exciter / control device via a third high-speed synchronous real-time network, wherein the power drive device includes a power amplifier, a process... The system includes a control power supply and a switching power supply; a simulation signal transmission module for processing the second electrical simulation signal using the AO&DO board to obtain the second and third electrical signals; processing the third electrical simulation signal using the business logic layer of the test exciter / measurement and control device to obtain the fifth electrical signal; processing the first electrical simulation signal and the second electrical signal using the business logic layer of the power drive device to obtain the first electrical signal; processing the third electrical signal using the signal conditioning box to obtain the fourth electrical signal; and a simulation signal processing module for inputting the first, fourth, and fifth electrical signals to the physical test system to drive the physical test system to conduct a physical test of the aircraft power supply system. The second to fifth electrical signals refer to the signal-level signals transmitted via hardwired connections, and the first electrical signal refers to the power-level signal transmitted via power hardwired connections. The high-speed synchronous real-time network includes a TSN network and a reflective memory fiber optic network.
[0013] To achieve the above objectives, this application also provides a precise mapping device for the electrical interface of an integrated verification test system for an aircraft power supply system, comprising: a physical drive signal generation module, used to obtain a first physical drive signal, a second physical drive signal, and a third physical drive signal according to a physical test system; processing the first physical drive signal using the business logic layer of a power drive device; the physical drive signal generation module, used to obtain the first physical drive signal, the second physical drive signal, and the third physical drive signal according to a physical test system; processing the first physical drive signal using the business logic layer of the power drive device to obtain a first physical mapping signal and a fourth physical drive signal respectively; transmitting the first physical mapping signal to a data filtering module via a first high-speed synchronous real-time network to obtain a first filtered signal; processing the second physical drive signal using a signal conditioning box to obtain a fifth physical drive signal; and processing the third physical drive signal using the business logic layer of a test exciter / measurement and control device to obtain a third physical mapping signal; wherein, the first physical drive signal is a power level signal, and the second to fifth physical drive signals are all signal level signals; and a physical drive signal transmission module, used to process the input fourth physical drive signal using an AI&DI board. The first physical drive signal and the second physical drive signal are processed to obtain the second physical mapping signal. This signal is then transmitted to the data filtering module via the second high-speed synchronous real-time network to obtain the second filtered signal. The third physical drive signal is processed by the business logic layer of the test exciter / control device and transmitted to the data filtering module via the third high-speed synchronous real-time network to obtain the third filtered signal. The physical drive signal simulation module processes the first filtered signal using a closed-loop delay compensation algorithm to obtain the delay-compensated third signal. It processes the delay-compensated third signal using a cable voltage drop compensation algorithm to obtain the voltage drop compensation second signal. It processes the second and third filtered signals using a channel output characteristic reverse simulation algorithm to obtain the reverse-compensated second and third signals, respectively. It processes the reverse-compensated second signal using a signal restoration algorithm to obtain the restored signal. A fixed sampling time is set according to the reciprocal of the highest sampling frequency. The voltage drop compensation second signal, the restored signal, and the reverse-compensated third signal are sampled according to the fixed sampling time to obtain the first to third sampled signals. The first to third sampled signals are input to the model electrical simulation signal input port of the digital simulation system to drive the digital simulation system to simulate the power supply system model.
[0014] To achieve the above objectives, this application also provides a computer-readable storage medium including instructions that, when executed on a computer, cause the computer to perform the precise mapping method for the electrical interface of the integrated verification test system for the aircraft power supply system provided in the above embodiments.
[0015] To achieve the above objectives, this application also provides an electronic device, which includes: at least one processor, a memory, and an input / output unit; wherein the memory is used to store a computer program, and the processor is used to call the computer program stored in the memory to execute the precise mapping method for the electrical interface of the integrated verification test system for the aircraft power supply system provided in any of the foregoing embodiments.
[0016] The method, apparatus, medium, and system for precise mapping of electrical interfaces in an integrated verification test system for aircraft power supply systems proposed in this application are applied to the mapping of electrical interfaces from a digital simulation system to a physical test system. The method includes: sequentially processing a first simulation signal using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed-frequency sampling algorithm to obtain a first electrical simulation signal, which is then transmitted to a power drive device via a first high-speed synchronous real-time network; sequentially processing a second simulation signal using a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed-frequency sampling algorithm to obtain a second electrical simulation signal, which is then transmitted to an AO&DO board via a second high-speed synchronous real-time network; sequentially processing a third simulation signal using a channel output characteristic inverse simulation algorithm and a fixed-frequency sampling algorithm to obtain a third electrical simulation signal, which is then transmitted to a test exciter / control device via a third high-speed synchronous real-time network; processing the second electrical simulation signal using the AO&DO board to obtain a second electrical signal and a third electrical signal; and finally, using the test exciter / control device... The business logic layer processes the third electrical simulation signal to obtain the fifth electrical signal; the business logic layer of the power drive device processes the first electrical simulation signal and the second electrical signal to obtain the first electrical signal; the signal conditioning box processes the third electrical signal to obtain the fourth electrical signal; the first, fourth, and fifth electrical signals are input to the physical test system to drive the physical test system to conduct a physical test of the aircraft power supply system; wherein, the second to fifth electrical signals refer to the signal level signals transmitted by corresponding signal hardwires, the first electrical signal refers to the power level signal transmitted by power hardwires, and the first to third high-speed synchronous real-time networks preferably include TSN networks and reflective memory fiber optic networks. The high-speed synchronous real-time network of this application can ensure that all virtual signals and physical signals can interact with a unified rhythm, ensuring the stability of the integrated verification test system. This application can improve the electrical characteristic integrity, matching accuracy, and compatibility of the electrical interface between the digital simulation system and the physical test system, and improve the effectiveness of the results of the physical test system of the aircraft power supply system. Attached Figure Description
[0017] Figure 1 A first flowchart illustrating an embodiment of the precise mapping method for electrical interfaces in the integrated verification test system for aircraft power supply systems of this application; Figure 2This is a basic block diagram of a virtual-real fusion cross-test provided in an embodiment of the precise mapping method for the electrical interface of the integrated verification test system for the aircraft power supply system of this application; Figure 3 This is a block diagram of precise electrical interface mapping for simulation model-driven physical experiment provided in an embodiment of the precise mapping method for electrical interface mapping of the integrated verification test system for aircraft power supply system of this application; Figure 4 A second flowchart is provided for an embodiment of the precise mapping method for electrical interfaces of the aircraft power supply system integrated verification test system of this application; Figure 5 This is a block diagram of the electrical interface precise mapping of the physical test-driven simulation model provided in an embodiment of the method for precise mapping of electrical interfaces in the integrated verification test system of the aircraft power supply system of this application.
[0018] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0019] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.
[0020] Existing technologies do not fully consider the characteristics of electrical interfaces and do not differentiate the virtual-physical mapping methods for electrical interfaces from those for other types of interfaces. Furthermore, the electrical interfaces and test equipment in aircraft power supply systems have unique characteristics. Using existing technologies will result in low mapping accuracy of electrical interfaces in virtual-physical fusion tests of aircraft power supply systems, leading to a continuous increase in data errors between the virtual and physical systems, affecting the validity of the virtual-physical fusion cross-validation results, and causing the failure of the physical test system of the aircraft power supply system.
[0021] The precise mapping method for electrical interfaces proposed in this application is specifically designed to map the characteristics of electrical interfaces, such as voltage values, current values, signal timing, signal frequency, and transient characteristic matching, under normal and abnormal operating scenarios of aircraft power supply systems, and discloses the specific operation method.
[0022] This application aims to provide a method for accurate mapping of electrical interfaces in an integrated verification test system for aircraft power supply systems, thereby improving the electrical characteristic integrity, matching accuracy, and compatibility of the electrical interfaces between virtual verification tests and physical verification tests, and enhancing the effectiveness of the results of the physical test system for aircraft power supply systems.
[0023] Reference Figure 1 and Figure 3 , Figure 1The precise mapping method for the electrical interface of the integrated verification test system for the aircraft power supply system provided in the first embodiment of this application can be executed based on an FPGA gateway or a real-time operating system (RTOS). The precise mapping method for the electrical interface of the integrated verification test system for the aircraft power supply system may include: S10. The first simulation signal is processed sequentially using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed frequency sampling algorithm to obtain a first electrical simulation signal, which is then transmitted to the power drive device via a first high-speed synchronous real-time network. The second simulation signal is processed sequentially using a signal scaling algorithm, a channel output characteristic reverse simulation algorithm, and a fixed frequency sampling algorithm to obtain a second electrical simulation signal, which is then transmitted to the AO&DO board via a second high-speed synchronous real-time network. The third simulation signal is processed sequentially using a channel output characteristic reverse simulation algorithm and a fixed frequency sampling algorithm to obtain a third electrical simulation signal, which is then transmitted to the test exciter / measurement and control device via a third high-speed synchronous real-time network. The power drive device includes a power amplifier, a programmable power supply, and a switching power supply. In one embodiment of this application, the process of processing the first simulation signal using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed frequency sampling algorithm to obtain the first electrical simulation signal may include the following: S101. Obtain the power hardwire impedance and load current, model output voltage and load voltage; S102. Process the first simulation signal according to the series cable voltage drop compensation algorithm to obtain the voltage drop compensation first signal. The series cable voltage drop compensation algorithm is to obtain the voltage drop compensation first signal based on the sum of the product of the model output voltage, the power hard wire impedance, and the load current. Specifically, the impedance Z of the power hardwire is measured. Assuming the original simulated output voltage value of the model is U1 and the load current is I, the value of the first voltage drop compensation signal sent to the power drive device after processing by the cable voltage drop compensation algorithm is U=U1+I*Z.
[0024] Clearly, under different current conditions, there will be varying degrees of voltage drop on the power hardwire connecting the power drive device to the physical test system, and the longer the cable, the greater the voltage drop, causing the voltage received by the physical test system to be lower than the model simulation output. By compensating for the voltage drop of the cable at the electrical power cross-linking interface, the model simulation output can be accurately transmitted to the physical test system.
[0025] S103. Determine whether the value of the voltage drop compensation first signal exceeds the threshold of the electrical interface of the power drive device connected to the physical test system according to the voltage and current protection algorithm. If it exceeds the threshold, terminate the output of the voltage drop compensation first signal; otherwise, continue to transmit the voltage drop compensation first signal. Specifically, the system determines whether the output value of the cable voltage drop compensation module exceeds the normal range threshold of the electrical interface of the power amplifier connected to the physical test system. If it does, the operation of the model in the digital simulation system must be stopped and the power amplifier output must be prohibited.
[0026] S103. Obtain the first delay time of the first signal for voltage drop compensation of the series cable being transmitted to the power drive device, the second delay time of the output voltage of the power drive device, the third delay time of the load current data collected by the load interface of the physical test system, and the fourth delay time of the feedback data being transmitted to the digital simulation system via the network. Determine the closed-loop delay compensation algorithm based on the sum of the first delay time, the second delay time, the third delay time, and the fourth delay time. Input the first signal for voltage drop compensation into the closed-loop delay compensation algorithm to obtain the first signal for delay compensation. It should be noted that the first signal after model processing drives the output voltage of the power drive device, and the load current extracted by the physical test system from the power drive device needs to be fed back to the model. In this data link, the network first delay time for the model simulation data to be output to the power drive device via the network through the digital simulation system is T1, the second delay time for the power drive device to respond to the simulation data and output voltage is T2, the third delay time for the physical test system to collect feedback data from the load interface is T3, and the fourth delay time for the feedback data to be transmitted to the digital simulation system via the network is T4. Therefore, the closed-loop delay time of the delay compensation first signal of this output link is Tdelay = T1 + T2 + T3 + T4. Depending on the configuration of different test systems, the closed-loop delay time is generally between a few microseconds and a few milliseconds.
[0027] Clearly, the loop delay compensation algorithm can offset the delay introduced by the power interface mapping loop, resulting in smaller simulation errors of the phase difference between voltage and current in the AC electrical interface and more accurate power factor analysis results; it also makes the simulation analysis results of the time index of control and protection functions under transient conditions such as surge, spike, and overshoot more accurate.
[0028] S105. Set a fixed sampling time based on the reciprocal of the highest sampling frequency, and output the delay compensation first signal at equal time intervals according to the fixed sampling time to obtain the first electrical simulation signal.
[0029] It is understandable that if the highest sampling frequency of the physical test system for the electrical interface is Fs (Hz), then the SampleTime attribute of all electrical output ports of the model will be set to 1 / Fs. It should be noted that all models in this application are digital simulation systems, which are built upon a real-time operating system (RTOS).
[0030] In one embodiment of this application, the process of processing the second simulation signal sequentially using a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed frequency sampling algorithm to obtain the second electrical simulation signal may include the following: The analog quantity, discrete quantity, and PMW signal are obtained based on the second simulation signal; The input analog, discrete, and PMW signals are processed sequentially using the preset first mapping rule base and the channel output characteristic reverse simulation algorithm to obtain the second electrical simulation signal.
[0031] The AO&DO board and the test exciter / control device are connected to the digital simulation system, and the signal conditioning box is connected to the AO&DO board. The process of sequentially processing the input analog, discrete, and PMW signals using the preset first mapping rule base and the channel output characteristic inverse simulation algorithm to obtain the second electrical simulation signal can include the following: Based on the signal mapping rules of the electrical board in the virtual-real fusion test of the aircraft power supply system, a first mapping rule library is determined. The first mapping rule library is used to process the input analog, discrete and PMW signals to obtain the simulation mapping signal. The inherent errors of the signal conditioning box, AO&DO board and test exciter / measurement and control device are obtained through offline calibration tests. Based on their inherent errors, the simulation mapping signal is reverse pre-compensated. A fixed sampling time is set according to the reciprocal of the highest sampling frequency. The simulation mapping signal after reverse pre-compensation is output at equal time intervals according to the fixed sampling time to obtain the second electrical simulation signal.
[0032] Specifically, the signal scaling ratio is automatically configured based on the electrical board signal mapping rule base of the aircraft power supply system virtual-real fusion test. The first mapping rule base is shown in the table below:
[0033] Clearly, the digital simulation system can utilize signal scaling algorithms to first consider the normal steady-state range of the analog output signal, and then perform scaling mapping after accounting for potential spikes in abnormal transient characteristics. This improves the completeness of the signal mapping and ensures that the virtual scene is accurately transmitted to the physical experimental system. Secondly, the conversion relationship between physical quantities such as high-voltage and ground-voltage signals and virtual Boolean state variables is established. Thirdly, the completeness of the output mapping of the differential PWM signal is considered. Finally, the discrete output of the model is 0 and 1. When the driving board outputs discrete quantities, the voltage of this discrete output is limited by the board's power supply voltage. By outputting the key discrete output quantities through analog channels and then scaling them with the analog signal, the voltage transient characteristics of the key electrical interface discrete quantities can be accurately mapped, verifying the impact of the transient characteristics of the controller on the system's operating state.
[0034] In one embodiment of this application, the process of processing the third simulation signal by sequentially using a channel output characteristic inverse simulation algorithm and a fixed frequency sampling algorithm to obtain the third electrical simulation signal may include the following: The inherent error was obtained through offline calibration experiments, and pre-compensation was performed using a characteristic inverse simulation algorithm to obtain the inverse compensation second signal. A fixed sampling time is set based on the reciprocal of the highest sampling frequency. The second inverse compensation signal is output at equal time intervals based on the fixed sampling time to obtain the third electrical simulation signal.
[0035] Specifically, adding a channel output characteristic reverse simulation algorithm after the signal scaling module and after the model port that needs to output data to the test exciter / control device can further improve the accuracy of the data.
[0036] Understandably, the reverse simulation algorithm for output characteristics is used for output channels with amplifier, conversion, and excitation circuits. After offline calibration tests to obtain the inherent error between the model output value and the actual measured value of the electrical interface at the physical test terminal, a pre-compensation algorithm is added to the model output port for correction. The pre-compensation algorithm can be implemented based on data fitting, neural network algorithms, AI intelligent algorithms, etc. The method for obtaining the inherent error of the electrical interface through offline calibration tests is as follows: Amplifier circuit channel mapping reverse simulation: By applying overvoltage, undervoltage, and normal voltage operating potential control signals used in the experiment, the actual output voltage of the output channel is measured, and the error of each channel is obtained as: Actual output voltage - Control output voltage. By applying the voltage and current to be converted, the actual output current and voltage of the output channel are measured, and the test results of each channel are compared to obtain the VI and IV curves of each channel for reverse simulation of the conversion circuit channel mapping. By applying the power supply and excitation control signals used in the experiment, the actual output voltage of the output channel is measured, and the error of each channel is obtained as: Actual output voltage - Control expected output for reverse simulation of the excitation circuit channel mapping.
[0037] S20. Process the second electrical simulation signal using the AO&DO board to obtain the second electrical signal and the third electrical signal; process the third electrical simulation signal using the business logic layer of the test exciter / measurement and control device to obtain the fifth electrical signal; process the first electrical simulation signal and the second electrical signal using the business logic layer of the power drive device to obtain the first electrical signal; process the third electrical signal using the signal conditioning box to obtain the fourth electrical signal. The low-voltage, low-current signals output by the AO&DO board need to be conditioned by a signal conditioning box into electrical simulation signals that can be directly connected to the physical device. Understandably, test exciters / control devices typically acquire the expected output of each channel and configure the channels via software or networks. Essentially, the signal conditioning box, test exciter, and control device all configure the channel electrical characteristics based on the control signals. The main implementation forms of channel configuration include amplification circuits, filtering circuits, linearization circuits, isolation circuits, conversion circuits, excitation circuits, and protection circuits. Amplification circuits amplify weak electrical simulation signals, such as mV-level voltages, to a suitable voltage. Filtering circuits remove noise or interference frequencies from the signal, retaining the effective signal. Linearization circuits correct the nonlinear output of the sensor, making it linear with the measured quantity. Isolation circuits disconnect the electrical connection between input and output, preventing interference, leakage, or high voltage damage to the equipment. Conversion circuits perform voltage-to-current, current-to-voltage, and impedance conversion. Excitation circuits provide the power supply or excitation signal required for the sensor's operation. Protection circuits are used to prevent overvoltage, overcurrent, static electricity, and other factors from damaging conditioning circuits or sensors.
[0038] Obviously, all simulation data in this application is sent to the power drive device, circuit board, test exciter, and measurement and control device connected to the physical test system via a high-speed synchronous real-time network. Specifically, these simulation data signals are first sent to the accompanying software of the power drive device, test exciter, and measurement and control device, and then the software controls the output of the relevant channels. In such software, where interactive operations are frequent and measurement and control data needs to be updated and displayed in real time, the application layer consumes a significant amount of time. The method in this application skips the original accompanying software application layer and directly controls the business logic layer based on the simulation data, which reduces the time consumed by the original accompanying software application layer and further improves the real-time performance of simulation data transmission.
[0039] It should be noted that the high-speed synchronous real-time network (such as TSN network or reflective memory fiber network) used in this application scheme for simulation data transmission has the following advantages compared with ordinary fiber optic and bus network transmission: (1) Hardware-level synchronization mechanism: Nanosecond-level timing control is achieved by using an FPGA-based gateway or real-time operating system (RTOS), which can ensure that the triggering and sampling of electrical simulation signals are strictly synchronized with the simulation step size of the virtual model; (2) Protocol-level timing alignment: Interpolation and alignment of frame timestamps of communication protocols (such as EtherCAT and PCIe) can solve the problem of physical bus delay and virtual simulation clock drift; (3) When multiple interface devices are used in large-scale power system virtual-real interaction tests, the high-speed synchronous real-time network can ensure that all virtual signals and physical signals can interact with a unified rhythm, ensuring the stability of the virtual-real interaction test system.
[0040] S30. Input the first electrical signal, the fourth electrical signal, and the fifth electrical signal to the physical test system to drive the physical test system to conduct a physical test of the aircraft power supply system; wherein, the second to fifth electrical signals all refer to the signal level signals transmitted by the corresponding signal hardwire, the first electrical signal refers to the power level signal transmitted by the power hardwire, and the high-speed synchronous real-time network includes the TSN network and the reflective memory fiber optic network.
[0041] In summary, the precise electrical interface mapping method for virtual-real fusion testing of aircraft power supply systems proposed in this application has the following advantages: it adapts to aircraft power supply systems with different voltage levels and power supply systems; it does not require upgrading the hardware configuration of existing boards, power drive devices, signal conditioning boxes, test exciters, and measurement and control devices, and can achieve precise electrical interface mapping simply by adding relevant modules to the model, making it a low-cost method; it improves the integrity of physical drive signal characteristics and mapping integrity and accuracy, reducing virtual-real fusion test errors; and it ensures precise synchronization between the physical test system and the model simulation system, reducing mapping time lag.
[0042] refer to Figure 4 and Figure 5 Another embodiment of this application also provides a method for precise mapping of electrical interfaces in an integrated verification test system for an aircraft power supply system, applied to the mapping of electrical interfaces from a physical test system to a digital simulation system. This method may include: S40. Obtain a first physical drive signal, a second physical drive signal, and a third physical drive signal from the physical testing system; process the first physical drive signal using the business logic layer of the power drive device; the physical drive signal generation module is used to obtain the first physical drive signal, the second physical drive signal, and the third physical drive signal from the physical testing system; process the first physical drive signal using the business logic layer of the power drive device to obtain a first physical mapping signal and a fourth physical drive signal respectively; transmit the first physical mapping signal to the data filtering module via a first high-speed synchronous real-time network to obtain a first filtered signal; process the second physical drive signal using a signal conditioning box to obtain a fifth physical drive signal; process the third physical drive signal using the business logic layer of the test exciter / measurement and control device to obtain a third physical mapping signal; wherein, the first physical drive signal is a power level signal, and the second to fifth physical drive signals are all signal level signals; Prior to this, this application reads and parses data from a high-speed synchronous real-time network, adding a data filtering module to the model input port to process the data, such as using wavelet transform or Kalman filtering algorithms to eliminate noise interference. This reduces the impact of signal noise from the physical test system on the accuracy of the analysis results of aircraft power supply system characteristic parameters (such as distortion spectrum) obtained from model simulation data.
[0043] Obviously, this application reads and parses data from a high-speed synchronous real-time network, adds a data filtering module to the model input port, and uses wavelet transform or Kalman filtering algorithms to eliminate noise interference. This application can reduce the impact of signal noise on the accuracy of the analysis results of aircraft power supply system characteristic parameters (such as distortion spectrum) obtained from model simulation data.
[0044] S50. The AI&DI board processes the input fourth and fifth physical drive signals to obtain the second physical mapping signal, which is then transmitted to the data filtering module via the second high-speed synchronous real-time network to obtain the second filtered signal. The business logic layer of the test exciter / measurement and control device processes the third physical drive signal, which is then transmitted to the data filtering module via the third high-speed synchronous real-time network to obtain the third filtered signal. S60. The first filtered signal is processed using a closed-loop delay compensation algorithm to obtain a delay-compensated third signal; the delay-compensated third signal is processed using a cable voltage drop compensation algorithm to obtain a voltage drop compensation second signal; the second filtered signal and the third filtered signal are processed using a channel output characteristic reverse simulation algorithm to obtain a reverse-compensated second signal and a reverse-compensated third signal respectively; the reverse-compensated second signal is processed using a signal restoration algorithm to obtain a restored signal; a fixed sampling time is set according to the reciprocal of the highest sampling frequency, and the voltage drop compensation second signal, the restored signal, and the reverse-compensated third signal are sampled according to the fixed sampling time to obtain the first to third sampled signals respectively. The first to third sampled signals are input to the model electrical simulation signal input port of the digital simulation system to drive the digital simulation system to simulate the power supply system model.
[0045] It should be noted that Real-Time Operating Systems (RTOS) can read and parse data from high-speed synchronous real-time networks. By adding data filtering algorithms to the input ports of the digital simulation system, the input signals can be filtered. Data filtering algorithms can be, for example, wavelet transform or Kalman filtering algorithms, thus eliminating noise interference. Based on this, this application can reduce the influence of signal noise on the physical test system, thereby improving the accuracy of the analysis results of aircraft power supply system characteristic parameters (such as distortion spectrum) obtained from model simulation data.
[0046] The channel output characteristic reverse simulation algorithm processes the filtered data from the input board and test exciter / control device through the channel input characteristic compensation module. For input channels with sampling circuits, linearization circuits, and conversion circuits, the algorithm performs offline calibration tests to obtain the inherent error between the actual measured value of the electrical interface at the physical test terminal and the received value at the model input port. Then, a post-compensation algorithm is added to the model input port to correct the received data from the physical test. The post-compensation algorithm can be implemented based on data fitting, neural network algorithms, AI intelligent algorithms, etc. The method for obtaining the inherent error of the electrical interface in the offline calibration test is as follows: Sampling circuit channel mapping correction: By applying control signals for overvoltage, undervoltage, and normal voltage operating points used in the test, the actual output voltage of the output channel is measured, and the error of each channel is obtained as: actual output voltage - control output voltage. Linearization circuit channel mapping correction: By applying different temperatures under the full temperature envelope of the test, the actual output voltage of the output channel is measured, and the error of each channel is obtained as: actual output voltage - expected linearized output voltage. Secondary correction of the linearization mapping parameters is then performed in the model. The conversion circuit channel mapping correction algorithm applies the voltage and current to be converted, measures the actual output current and voltage of the output channel, compares the test results of each channel, and obtains the VI and IV curves of each channel. The channel output characteristic reverse simulation algorithm can solve the problem of large accuracy differences and low consistency between electrical interface channels caused by non-standard customized amplifier circuits, conversion circuits, and excitation circuits.
[0047] Subsequently, this application uses a signal restoration algorithm to process the inversely compensated third signal to obtain the restored signal; The ratio of the sampled signal restored in the signal restoration algorithm is used to determine the restoration ratio. This ratio is automatically configured based on the signal mapping rule base of the aircraft power supply system's virtual-real fusion test electrical board. The second mapping rule base is shown in the table below:
[0048] Specifically, the digital simulation system of this application processes the power amplifier filtered data using a cable voltage drop compensation algorithm and a closed-loop delay compensation algorithm. Similarly, the cable voltage drop compensation algorithm measures the impedance Z of the power hardwire. Assuming the measured value of the input voltage after power amplifier input filtering is U1 and the load current is I, the voltage value output to the electrical port of the model via the cable voltage drop compensation module should have a step size of U = U1 + I * Z.
[0049] Similarly, the technical effects of this embodiment are similar to those of the aforementioned method embodiments, and will not be repeated here.
[0050] Another embodiment of this application provides a precise mapping device for the electrical interface of an integrated verification test system for an aircraft power supply system. This device is used to solve the same technical problems as the previous method embodiments. The device may include: a simulation signal generation module for sequentially processing a first simulation signal using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed frequency sampling algorithm to obtain a first electrical simulation signal, which is then transmitted to a power drive device via a first high-speed synchronous real-time network; a second simulation signal for sequentially processing a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed frequency sampling algorithm to obtain a second electrical simulation signal, which is then transmitted to the AO&DO board via a second high-speed synchronous real-time network; and a third simulation signal for sequentially processing a channel output characteristic inverse simulation algorithm and a fixed frequency sampling algorithm to obtain a third electrical simulation signal, which is then transmitted to the test excitation via a third high-speed synchronous real-time network. The device / measurement and control unit; the simulation signal transmission module is used to process the second electrical simulation signal using the AO&DO board to obtain the second electrical signal and the third electrical signal; the business logic layer of the test exciter / measurement and control unit processes the third electrical simulation signal to obtain the fifth electrical signal; the business logic layer of the power drive unit processes the first electrical simulation signal and the second electrical signal to obtain the first electrical signal; the signal conditioning box processes the third electrical signal to obtain the fourth electrical signal; the simulation signal processing module is used to input the first electrical signal, the fourth electrical signal, and the fifth electrical signal to the physical test system to drive the physical test system to conduct physical tests of the aircraft power supply system; wherein, the second to fifth electrical signals all refer to the signal level signals transmitted by hardwire of their respective signals, the first electrical signal refers to the power level signal transmitted by power hardwire, and the high-speed synchronous real-time network includes the TSN network and the reflective memory fiber optic network.
[0051] Based on the above method embodiments, a precise mapping device for the electrical interface of an integrated verification test system for an aircraft power supply system is provided. This device may include: a physical drive signal generation module, used to obtain a first physical drive signal, a second physical drive signal, and a third physical drive signal according to the physical test system; processing the first physical drive signal using the business logic layer of a power drive device; obtaining a first physical mapping signal and a fourth physical drive signal respectively; transmitting the first physical mapping signal to a data filtering module via a first high-speed synchronous real-time network to obtain a first filtered signal; processing the second physical drive signal using a signal conditioning box to obtain a fifth physical drive signal; and processing the third physical drive signal using the business logic layer of the test exciter / measurement and control device to obtain a third physical mapping signal; wherein the first physical drive signal is a power-level signal, and the second to fifth physical drive signals are all signal-level signals; and a physical drive signal transmission module is used to process the input fourth physical drive signal using an AI&DI board. The driving signal and the fifth physical driving signal are used to obtain the second physical mapping signal, which is transmitted to the data filtering module via the second high-speed synchronous real-time network to obtain the second filtered signal. The third physical driving signal is processed by the business logic layer of the test exciter / measurement and control device and transmitted to the data filtering module via the third high-speed synchronous real-time network to obtain the third filtered signal. The physical driving signal simulation module is used to process the first filtered signal using a closed-loop delay compensation algorithm to obtain the delay-compensated third signal. The delay-compensated third signal is processed using a cable voltage drop compensation algorithm to obtain the voltage drop compensation second signal. The second filtered signal and the third filtered signal are processed by the channel output characteristic reverse simulation algorithm to obtain the reverse-compensated second signal and the reverse-compensated third signal, respectively. The reverse-compensated second signal is processed using a signal restoration algorithm to obtain the restored signal. A fixed sampling time is set according to the reciprocal of the highest sampling frequency. The voltage drop compensation second signal, the restored signal, and the reverse-compensated third signal are sampled according to the fixed sampling time to obtain the first to third sampled signals. The first to third sampled signals are input to the model electrical simulation signal input port of the digital simulation system to drive the digital simulation system to simulate the power supply system model.
[0052] Based on the above embodiments, this application also provides a computer-readable storage medium including instructions that, when executed on a computer, enable the precise mapping method of the electrical interface of the integrated verification test system for the aircraft power supply system of any of the foregoing embodiments.
[0053] Based on the above embodiments, this application also provides an electronic device, characterized in that the electronic device includes: at least one processor, a memory, and an input / output unit; wherein, the memory is used to store a computer program, and the processor is used to call the computer program stored in the memory to execute the precise mapping method for the electrical interface of the integrated verification test system of the aircraft power supply system in any of the foregoing embodiments.
[0054] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A method for precise mapping of electrical interfaces in an integrated verification test system for an aircraft power supply system, characterized in that, Electrical interface mapping applied to digital simulation systems to physical testing systems includes: The first simulation signal is processed sequentially using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed frequency sampling algorithm to obtain a first electrical simulation signal, which is then transmitted to the power drive device via a first high-speed synchronous real-time network. The second simulation signal is processed sequentially using a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed frequency sampling algorithm to obtain a second electrical simulation signal, which is then transmitted to the AO&DO board via a second high-speed synchronous real-time network. The third simulation signal is processed sequentially using a channel output characteristic inverse simulation algorithm and a fixed frequency sampling algorithm to obtain a third electrical simulation signal, which is then transmitted to the test exciter / control device via a third high-speed synchronous real-time network. The power drive device includes a power amplifier, a programmable power supply, and a switching power supply. The second electrical simulation signal is processed using the AO&DO board to obtain the second and third electrical signals; the third electrical simulation signal is processed using the business logic layer of the test exciter / measurement and control device to obtain the fifth electrical signal; the first electrical simulation signal and the second electrical signal are processed using the business logic layer of the power drive device to obtain the first electrical signal; and the third electrical signal is processed using the signal conditioning box to obtain the fourth electrical signal. The first electrical signal, the fourth electrical signal, and the fifth electrical signal are input to the physical test system to drive the physical test system for the aircraft power supply system. The second to fifth electrical signals refer to the signal level signals transmitted by the corresponding signal hardwire, and the first electrical signal refers to the power level signal transmitted by the power hardwire. The high-speed synchronous real-time network includes the TSN network and the reflective memory fiber optic network.
2. The precise mapping method for electrical interfaces of the aircraft power supply system integrated verification test system as described in claim 1, wherein... The characteristic is that, The first simulation signal is obtained by sequentially processing the series cable voltage drop compensation algorithm, voltage and current protection algorithm, closed-loop delay compensation algorithm, and fixed frequency sampling algorithm, resulting in the first electrical simulation signal, including: Obtain the power hardwire impedance and load current, model output voltage and load voltage; The first simulation signal is processed according to the series cable voltage drop compensation algorithm to obtain the voltage drop compensation first signal. The series cable voltage drop compensation algorithm is based on the sum of the product of the model output voltage, the power hard wire impedance, and the load current to obtain the voltage drop compensation first signal. The voltage and current protection algorithm determines whether the value of the voltage drop compensation first signal exceeds the threshold of the electrical interface of the power drive device connected to the physical test system. If it does, the output of the voltage drop compensation first signal is terminated; otherwise, the voltage drop compensation first signal continues to be transmitted. The system acquires the first delay time of the first signal for voltage drop compensation of the series cable transmitted to the power drive device, the second delay time of the output voltage of the power drive device, the third delay time of the load current data collected by the load interface of the physical test system, and the fourth delay time of the feedback data transmitted to the digital simulation system via the network. Based on the sum of the first delay time, the second delay time, the third delay time, and the fourth delay time, the closed-loop delay compensation algorithm is determined. The first signal for voltage drop compensation is input into the closed-loop delay compensation algorithm to obtain the first signal for delay compensation. A fixed sampling time is set according to the reciprocal of the highest sampling frequency. The delay compensation first signal is output at equal time intervals according to the fixed sampling time to obtain the first electrical simulation signal.
3. The precise mapping method for electrical interfaces of the integrated verification test system for aircraft power supply systems as described in claim 1, characterized in that, The process of sequentially using a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed frequency sampling algorithm to process the second simulation signal to obtain the second electrical simulation signal includes: The analog quantity, discrete quantity, and PMW signal are obtained based on the second simulation signal; The input analog, discrete, and PMW signals are processed sequentially using the preset first mapping rule base and the channel output characteristic reverse simulation algorithm to obtain the second electrical simulation signal.
4. The precise mapping method for electrical interfaces of the integrated verification test system for aircraft power supply systems as described in claim 1, characterized in that, The AO&DO board and the test exciter / measurement control device are respectively connected to the digital simulation system, and the signal conditioning box is connected to the AO&DO board; The input analog quantity, discrete quantity, and PWM signal are processed sequentially using a preset first mapping rule base and a channel output characteristic reverse simulation algorithm to obtain a second electrical simulation signal, including: Based on the signal mapping rules of the electrical board in the virtual-real fusion test of the aircraft power supply system, a first mapping rule library is determined. The first mapping rule library is used to process the input analog, discrete and PMW signals to obtain the simulation mapping signal. The inherent errors of the signal conditioning box, AO&DO board and test exciter / measurement and control device are obtained through offline calibration tests. Based on their inherent errors, the simulated mapped signal is inversely pre-compensated. A fixed sampling time is set according to the reciprocal of the highest sampling frequency. The simulation mapping signal after inverse pre-compensation is output at equal time intervals according to the fixed sampling time to obtain the second electrical simulation signal.
5. The precise mapping method for electrical interfaces of the integrated verification test system for aircraft power supply systems as described in claim 1, characterized in that, The process of sequentially using the channel output characteristic reverse simulation algorithm and the fixed frequency sampling algorithm to process the third simulation signal yields the third electrical simulation signal, including: The inherent error was obtained through offline calibration experiments, and pre-compensation was performed using a characteristic inverse simulation algorithm to obtain the inverse compensation second signal. A fixed sampling time is set based on the reciprocal of the highest sampling frequency. The second inverse compensation signal is output at equal time intervals based on the fixed sampling time to obtain the third electrical simulation signal.
6. The precise mapping method for electrical interfaces of the aircraft power supply system integrated verification test system as described in any one of claims 1-5, characterized in that, Electrical interface mapping applied to physical testing systems to digital simulation systems includes: The physical test system obtains a first physical drive signal, a second physical drive signal, and a third physical drive signal. The first physical drive signal is processed by the business logic layer of the power drive device to obtain a first physical mapping signal and a fourth physical drive signal. The first physical mapping signal is transmitted to the data filtering module via a first high-speed synchronous real-time network to obtain a first filtered signal. The second physical drive signal is processed by the signal conditioning box to obtain a fifth physical drive signal. The third physical drive signal is processed by the business logic layer of the test exciter / measurement and control device to obtain a third physical mapping signal. The first physical drive signal is a power-level signal, while the second to fifth physical drive signals are all signal-level signals. The AI&DI board processes the input fourth and fifth physical drive signals to obtain the second physical mapping signal, which is then transmitted to the data filtering module via the second high-speed synchronous real-time network to obtain the second filtered signal. The business logic layer of the test exciter / control device processes the third physical drive signal, which is then transmitted to the data filtering module via the third high-speed synchronous real-time network to obtain the third filtered signal. The first filtered signal is processed using a closed-loop delay compensation algorithm to obtain a delay-compensated third signal; the delay-compensated third signal is processed using a cable voltage drop compensation algorithm to obtain a voltage drop compensation second signal; the second and third filtered signals are processed using a channel output characteristic reverse simulation algorithm to obtain a reverse-compensated second signal and a reverse-compensated third signal, respectively; the reverse-compensated second signal is processed using a signal restoration algorithm to obtain a restored signal; a fixed sampling time is set according to the reciprocal of the highest sampling frequency, and the voltage drop compensation second signal, the restored signal, and the reverse-compensated third signal are sampled according to the fixed sampling time to obtain the first to third sampled signals, which are then input to the model electrical simulation signal input port of the digital simulation system to drive the digital simulation system to simulate the power supply system model.
7. A precise mapping device for electrical interfaces of an integrated verification test system for an aircraft power supply system, characterized in that, include: The simulation signal generation module is used to process the first simulation signal sequentially using a series cable voltage drop compensation algorithm, a voltage and current protection algorithm, a closed-loop delay compensation algorithm, and a fixed frequency sampling algorithm to obtain a first electrical simulation signal, which is then transmitted to the power drive device via a first high-speed synchronous real-time network. The second simulation signal is then processed sequentially using a signal scaling algorithm, a channel output characteristic inverse simulation algorithm, and a fixed frequency sampling algorithm to obtain a second electrical simulation signal, which is then transmitted to the AO&DO board via a second high-speed synchronous real-time network. Finally, the third simulation signal is processed sequentially using a channel output characteristic inverse simulation algorithm and a fixed frequency sampling algorithm to obtain a third electrical simulation signal, which is then transmitted to the test exciter / control device via a third high-speed synchronous real-time network. The power drive device includes a power amplifier, a programmable power supply, and a switching power supply. The simulation signal transmission module is used to process the second electrical simulation signal using the AO&DO board to obtain the second electrical signal and the third electrical signal; to process the third electrical simulation signal using the business logic layer of the test exciter / measurement and control device to obtain the fifth electrical signal; to process the first electrical simulation signal and the second electrical signal using the business logic layer of the power drive device to obtain the first electrical signal; and to process the third electrical signal using the signal conditioning box to obtain the fourth electrical signal. The simulation signal processing module is used to input the first electrical signal, the fourth electrical signal, and the fifth electrical signal to the physical test system to drive the physical test system to conduct physical tests of the aircraft power supply system; wherein, the second to fifth electrical signals all refer to the signal level signals transmitted by the corresponding signal hardwire, the first electrical signal refers to the power level signal transmitted by the power hardwire, and the high-speed synchronous real-time network includes the TSN network and the reflective memory fiber optic network.
8. A precise mapping device for electrical interfaces of an integrated verification test system for an aircraft power supply system, characterized in that, include: The physical drive signal generation module is used to obtain the first physical drive signal, the second physical drive signal, and the third physical drive signal based on the physical test system; The first physical drive signal is processed by the business logic layer of the power drive device to obtain the first physical mapping signal and the fourth physical drive signal. The first physical mapping signal is transmitted to the data filtering module via the first high-speed synchronous real-time network to obtain the first filtered signal. The second physical drive signal is processed by the signal conditioning box to obtain the fifth physical drive signal. The third physical drive signal is processed by the business logic layer of the test exciter / measurement and control device to obtain the third physical mapping signal. Among them, the first physical drive signal is a power level signal, and the second to fifth physical drive signals are all signal level signals. The physical drive signal transmission module is used to process the input fourth and fifth physical drive signals using the AI&DI board to obtain the second physical mapping signal, which is then transmitted to the data filtering module via the second high-speed synchronous real-time network to obtain the second filtered signal. The third physical drive signal is processed by the business logic layer of the test exciter / measurement and control device and transmitted to the data filtering module via the third high-speed synchronous real-time network to obtain the third filtered signal. The physical drive signal simulation module is used to process the first filtered signal using a closed-loop delay compensation algorithm to obtain the delay-compensated third signal; to process the delay-compensated third signal using a cable voltage drop compensation algorithm to obtain the voltage drop compensation second signal; to process the second and third filtered signals respectively using a channel output characteristic reverse simulation algorithm to obtain the reverse-compensated second and third signals respectively; to process the reverse-compensated second signal using a signal restoration algorithm to obtain the restored signal; to set a fixed sampling time according to the reciprocal of the highest sampling frequency, to sample the voltage drop compensation second signal, the restored signal, and the reverse-compensated third signal respectively according to the fixed sampling time, to obtain the first to third sampled signals, and to input the first to third sampled signals to the model electrical simulation signal input port of the digital simulation system to drive the digital simulation system to simulate the power supply system model.
9. A computer-readable storage medium, characterized in that, It includes instructions that, when executed on a computer, cause the computer to perform the precise mapping method for the electrical interface of the integrated verification test system for the aircraft power supply system as described in any one of claims 1 to 6.
10. An electronic device, characterized in that, The electronic device includes: At least one processor, memory, and input / output unit; The memory is used to store computer programs, and the processor is used to call the computer programs stored in the memory to execute the precise mapping method for electrical interfaces of the aircraft power supply system integrated verification test system according to any one of claims 1 to 6.
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