Method and structure for reverse etching of insulating dielectric to form semi-damascus metal interconnects

Abstract

This invention proposes a method and structure for reverse etching of an insulating dielectric layer to form a semi-damascus metal interconnect. The method involves forming vias and trenches in a silicon-based insulating dielectric layer; filling the vias and trenches with cobalt to form a metal structure; using the metal structure as a self-aligned mask, mixing at least one fluorine-containing gas and at least one passivation gas, and employing plasma etching to reverse-etch the insulating dielectric layer until the metal structure is exposed, forming metal lines and obtaining a semi-damascus metal interconnect structure. During the etching process, the fluorine-containing gas is used for chemical etching of the silicon-based insulating dielectric layer, and the passivation gas is used to form a protective layer on the surface of the metal structure. This invention, through innovation in the reverse etching process logic, reduces the process flow and eliminates the transmission of hard mask alignment deviations inherent in traditional processes.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor integrated circuit manufacturing, and specifically relates to a method and structure for reverse etching of insulating dielectric to form semi-damascus metal interconnects. Background Technology

[0002] Currently, semi-damascus metal interconnect technology uses ruthenium (Ru) as the core metal material, and its patterning process focuses on the etching of the metal itself. The specific process is as follows: First, vias are etched in a SiCN / SiCO composite low-k dielectric layer. Then, a ruthenium thin film is deposited using an ALD process (covering the sidewalls, bottom, and dielectric layer surface of the vias and trenches). Next, the ruthenium thin film on the dielectric layer surface is removed by dry etching (retaining the ruthenium in the trenches and vias) to define the metal line pattern. Then, an air gap is introduced between the metal lines to reduce parasitic capacitance. Finally, self-aligned integration of the vias and the underlying circuitry is achieved using SiN spacers.

[0003] However, traditional semi-damascus processes (based on ruthenium) have significant limitations: their core logic is "etching metal while retaining the dielectric," requiring the deposition of a ruthenium film on the dielectric layer surface and within vias, followed by the use of a SiN hard mask to define the etching area, and finally etching away excess ruthenium to form metal lines. This process, due to the introduction of the hard mask, adds 3-4 additional process steps: "hard mask deposition - patterning - removal," leading to increased process complexity and equipment downtime exceeding 40%. Furthermore, alignment deviations between the hard mask and the ruthenium metal layer (>8nm) are directly transmitted to the line edges, resulting in ruthenium line edge roughness >3nm. In high-density interconnects at 3nm and below, this can easily cause signal crosstalk and abnormal parasitic capacitance. Furthermore, the etching selectivity of ruthenium with SiCN / SiCO composite low-k dielectric is insufficient (<30:1), and a hard mask must be used to avoid damage to the ruthenium metal during etching. However, the etching residue of the hard mask (>1nm) will cause distortion of the top morphology of the lines. In addition, fluorine-based etching plasma easily reacts with ruthenium to generate volatile RuF5, resulting in ruthenium layer loss >2nm and resistance increase >5%. The plasma impact during the hard mask removal process will also exacerbate the oxidation of the ruthenium surface (oxide layer thickness >1nm), further deteriorating the interconnect reliability.

[0004] As can be seen from the above, the shortcomings of the existing technology are as follows:

[0005] (1) Redundancy in process steps: Traditional processes are centered on "etching metal while retaining the medium". Due to the low selectivity ratio of ruthenium to medium (<30:1), it is necessary to rely on SiN hard masks, which adds 3-4 steps of "hard mask deposition-patterning-removal", resulting in an increase in equipment occupancy time of more than 40%. The core reason for this defect is that "etching metal" requires a third-party mask, while the reverse etching medium can eliminate redundant steps by using the metal itself as a mask.

[0006] (2) Insufficient alignment accuracy: Due to the secondary alignment transfer of "hard mask → metal layer", the alignment deviation between the hard mask and the ruthenium layer (>8nm) directly leads to a roughness >3nm, causing signal crosstalk in the 3nm process (line spacing 20-30nm). The reverse etching medium can eliminate the alignment deviation from the source by utilizing the natural positional correspondence between the metal and the previous vias and trenches.

[0007] (3) Low etching selectivity: The etching selectivity of ruthenium and SiCN / SiCO composite low-k dielectric is <30:1. It is necessary to rely on hard masks to protect ruthenium metal. However, the etching residue of hard masks (>1nm) will cause distortion of the top morphology of the lines and affect the integrity of the interconnect structure.

[0008] (4) Severe metal damage: The process of etching metals results in plasma acting directly on the metal surface. Fluorine-based etching plasma reacts with ruthenium to generate volatile RuF5, causing ruthenium layer loss >2nm and resistance increase >5%. Furthermore, the plasma impact during the hard mask removal process will exacerbate ruthenium surface oxidation (oxide layer thickness >1nm), significantly reducing interconnect reliability. Summary of the Invention

[0009] In view of the above situation, the main objective of the present invention is to provide a method for reverse etching of insulating dielectric to form semi-damascus metal interconnects, so as to solve the above-mentioned technical problems.

[0010] Through-holes and trenches are formed in the silicon-based insulating dielectric layer;

[0011] By filling through-holes and trenches with metallic cobalt, a metallic structure is formed;

[0012] Using the metal structure as a self-aligned mask, at least one fluorine-containing gas and at least one passivation gas are mixed, and the insulating dielectric layer is reverse-etched using a plasma etching process until the metal structure is exposed, forming metal lines to obtain a semi-damascus metal interconnect structure.

[0013] During the etching process, fluorine-containing gas is used to chemically etch the silicon-based insulating dielectric layer, while passivation gas is used to form a protective layer on the surface of the metal structure.

[0014] This invention also proposes a semi-damascus metal interconnect structure formed by a reverse etching process. The semi-damascus metal interconnect structure is prepared using the aforementioned reverse etching method for forming semi-damascus metal interconnects with an insulating dielectric. The semi-damascus metal interconnect structure includes:

[0015] A monolithic strip-shaped metal line and columnar through-hole connector made of electrodeposited cobalt;

[0016] The edge spacing between adjacent metal lines is 20-30nm, and the linewidth deviation is ≤5nm;

[0017] The alignment deviation between the via and the underlying structure is ≤5nm;

[0018] The interface roughness between the metal structure and the insulating dielectric layer is ≤0.5nm;

[0019] The structure has no hard mask residue and is suitable for high-density interconnects in 3nm and below processes.

[0020] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0021] 1. Replace "etching metal with metal" with "etching medium retaining metal". Utilize the high selectivity ratio of cobalt to medium (≥50:1) and use the cobalt structure as a self-aligned mask to fundamentally eliminate the entire hard mask process and solve the problem of redundant steps.

[0022] 2. Plasma with fluorine-containing gases (such as CF4, CHF3, etc.) as the main etchant is used to efficiently etch SiCO / SiCN media using fluorine radicals (generating volatile SiF4); at the same time, passivation gases (such as CHF3, C4F8) or nitrogen / hydrogen-containing gases are introduced to form a protective polymer layer on the surface of the cobalt metal mask, and by optimizing the gas ratio and process parameters, highly selective and precise reverse etching of the medium is achieved.

[0023] 3. Utilizing a one-step alignment process of "through-hole / groove → cobalt structure → reverse etching medium", since the cobalt structure only fills the previously etched through-holes and trenches, it forms a natural alignment relationship with the medium layer. During reverse etching, the cobalt is directly used as a mask, and the pattern can be defined without additional photolithography, thus solving the alignment deviation problem.

[0024] 4. The reverse etching only acts on the dielectric, and the metal surface is isolated by the protective layer. Combined with H2 / N2 plasma cleaning, the cobalt layer loss is controlled to <1nm, the resistance change rate is <2%, the surface oxidation is suppressed, and the electromigration lifetime at 330℃ is >1200h, thus improving the reliability of the interconnect structure.

[0025] 5. Since reverse etching does not require hard masks and photolithography, it reduces the "hard mask deposition-patterning-removal" and 4-6 photolithography-related processes compared to traditional processes, shortening equipment downtime by more than 40% and reducing sidewall damage rate from 8% to <1%.

[0026] 6. Reverse etching relies on the natural positional correspondence of "via / trench → cobalt structure", eliminating the transmission of alignment deviations in traditional hard mask processes. The alignment deviation is reduced from >8nm to <5nm, and the line edge roughness is optimized from >3nm to 0.4-0.6nm.

[0027] 7. During reverse etching, the protective layer reduces cobalt loss to <1nm (compared to >2nm in traditional ruthenium processes), reduces resistivity change rate to <2%, inhibits oxidation during H2 / N2 cleaning (oxide layer <0.5nm), and achieves an electromigration lifetime of >1200h at 330℃, improving reliability by 20-30%.

[0028] 8. The present invention discloses a semi-damascus metal interconnect structure formed by reverse etching process, wherein strip-shaped metal lines composed of electrodeposited cobalt are integrally formed with columnar via connectors, the edge spacing between adjacent lines is 20-30nm, the linewidth deviation is <5nm, the alignment deviation between vias and the underlying structure is <5nm, there is no hard mask residue, the interface roughness between the cobalt layer and the SiCN / SiCO composite dielectric layer is <0.5nm, and it is suitable for high-density interconnect layouts of 3nm and below process technology.

[0029] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by means of embodiments of the invention. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the structure of the second sample;

[0031] Figure 2 This is a schematic diagram of the metal structure;

[0032] Figure 3 This is a schematic diagram of the semi-damascus metal interconnect structure obtained after reverse etching.

[0033] In the figure, 1 is the SiCN / SiCO composite low-k dielectric layer; 2 is the cobalt layer. Detailed Implementation

[0034] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0035] These and other aspects of the embodiments of the present invention will become clear from the following description and accompanying drawings. In these descriptions and drawings, some specific embodiments of the present invention are specifically disclosed to illustrate some ways of implementing the principles of the embodiments of the present invention; however, it should be understood that the scope of the embodiments of the present invention is not limited thereto.

[0036] Example 1

[0037] This embodiment provides a method for reverse etching of an insulating dielectric to form a semi-damascus metal interconnect, the method comprising the following steps:

[0038] (1) In the SiCN / SiCO composite low-k dielectric layer, a via with a diameter of 20 nm (depth-to-width ratio 6:1) is formed by plasma etching.

[0039] (2) Immediately after etching, the surface of the dielectric layer is activated by NH3 plasma (time 30s, power 100W, pressure 50mTorr).

[0040] (3) Using atomic layer deposition technology, a 5 nm cobalt seed layer was deposited on the surface of the through-hole activated by NH3 plasma, with bis(cyclopentadienyl)cobalt (Co(Cp)2) as the precursor, under vacuum conditions of 150 °C and 5 mTorr, to obtain the first sample;

[0041] (4) The first sample was placed in a custom electrodeposition tank. A sulfate electrolyte system consisting of 0.2 mol / L CoSO4·7H2O, 0.1 mol / L citric acid, 1 g / L polyethylene glycol, and 0.1 g / L thiourea was used. The peak current density of 2 mA / cm² was applied at a temperature of 40°C and a pH of 3 (adjusted by H2SO4). 2 A pulsed current with a duty cycle of 30% was applied. Cobalt ions grew in a bottom-up manner under the pulsed electric field: they preferentially deposited from the bottom of the vias and trenches, gradually filling upwards as the current continued, eventually forming a void-free cobalt layer (100 nm thick), yielding the second sample (e.g., ...). Figure 1 (as shown)

[0042] (5) The second sample was etched using RIE (Cl2 / BCl3 plasma, etching rate 30-50 nm / min, 40 nm / min in this embodiment) to completely remove the excess cobalt layer on the surface of the dielectric layer, leaving only the cobalt structure in the vias and trenches, ensuring insulation between the metal lines in adjacent trenches, and obtaining the metal structure (e.g. Figure 2 (as shown)

[0043] (6) Using the metal structure as a self-aligned mask, reverse etching of the insulating medium is performed in a plasma etching apparatus. No additional photolithography is required in this step.

[0044] (7) The reverse etching process uses fluorine-containing plasma. Its core is to achieve highly selective etching of SiCO / SiCN media through the functional synergy of different gas components. A mixed gas composed of fluorine-containing gas, passivating gas, oxidizing gas and inert gas is used. In this example, the flow rate ratio of each gas is as follows: CF4 flow rate is 50 sccm, CHF3 flow rate is 20 sccm, O2 flow rate is 1 sccm and Ar flow rate is 10 sccm. In this process, fluorine-containing gas, represented by CF4, is used as the main etching agent. It dissociates in the plasma to generate highly active fluorine radicals, which react chemically with silicon in the medium to generate volatile SiF4, thereby achieving the removal of the medium.

[0045] To protect the cobalt metal structure used as a mask and improve etching selectivity, a passivation gas, represented by CHF3, is introduced. CHF3 forms a dynamic fluorocarbon polymer protective film on all surfaces. This film exhibits strong adhesion to the cobalt metal surface but weak adhesion to the SiCO / SiCN dielectric surface. Under ion bombardment, the portion of this protective film adhering to the top surface of the etched dielectric is effectively removed, while remaining on the cobalt mask surface and dielectric sidewalls. This effectively prevents damage to the cobalt metal and suppresses lateral etching. Furthermore, a small amount of O2 can be added during the process to react and remove any carbonaceous or polymeric residues, while inert gases such as Ar assist etching and regulate plasma stability through physical bombardment. Process parameters can be set as follows: RF power range of 100W, reaction chamber pressure range of 10 mTorr. The etching endpoint can be monitored in real-time using optical emission spectroscopy (OES) to detect the characteristic peaks of Si (288 nm) or C (193 nm). The etching is considered complete when the intensity decays to 10% of the initial value.

[0046] (8) After etching, H2 / N2 (1:4) plasma cleaning (150W, 25S) was used to remove the fluorocarbon polymer. The final sample had a carbon residue of <0.8 at.%, a surface roughness Ra of approximately 0.4 nm, exhibiting excellent surface quality, fully meeting the precision patterning requirements of nodes 3 nm and below, and obtaining a semi-damascus metal interconnect structure (such as...). Figure 3 (As shown).

[0047] (9) After reverse etching, the cobalt in the trenches of the semi-damascus metal interconnect structure forms strip-shaped metal lines, and the cobalt in the vias forms columnar connectors, which are integrally formed. The edge spacing of adjacent metal lines is controlled at 20-30nm, the line width deviation is <5nm, and the alignment deviation between the vias and the underlying structure is <5nm. The spacing design ensures insulation between adjacent cobalt structures, and finally forms high-density metal interconnect lines that meet the process requirements of 3nm and below.

[0048] Example 2

[0049] This embodiment provides a method for reverse etching of an insulating dielectric to form a semi-damascus metal interconnect, the method comprising the following steps:

[0050] (1) In the SiCN / SiCO composite low-k dielectric layer, a via with a diameter of 40 nm (depth-to-width ratio 7:1) is formed by plasma etching.

[0051] (2) Immediately after etching, the surface of the dielectric layer is activated by NH3 plasma (time 43s, power 150W, pressure 70mTorr).

[0052] (3) Using atomic layer deposition technology, a 11 nm cobalt seed layer was deposited on the surface of the through-hole activated by NH3 plasma, with bis(cyclopentadienyl)cobalt (Co(Cp)2) as the precursor, under vacuum conditions of 200℃ and 8 mTorr, to obtain the first sample;

[0053] (4) The first sample was placed in a custom electrodeposition tank. A sulfate electrolyte system consisting of 0.3 mol / L CoSO4·7H2O, 0.15 mol / L citric acid, 3 g / L polyethylene glycol, and 0.5 g / L thiourea was used. The peak current density of 5 mA / cm² was applied at a temperature of 45°C and a pH of 3.5 (adjusted by H2SO4). 2 A pulsed current with a duty cycle of 40% was applied. Cobalt ions grew in a bottom-up manner under the action of the pulsed electric field: they preferentially deposited from the bottom of the vias and trenches, gradually filling upwards as the current continued to act, eventually forming a void-free cobalt layer (300 nm thick), thus obtaining the second sample;

[0054] (5) The second sample is chemically mechanically polished (CMP, pressure 2-4 psi, the pressure used in this embodiment is 2 psi) to completely remove the excess cobalt layer on the surface of the dielectric layer, leaving only the cobalt structure in the through holes and trenches, ensuring insulation between the metal lines in adjacent trenches, and obtaining the metal structure;

[0055] (6) Using the metal structure as a self-aligned mask, reverse etching of the insulating medium is performed in a plasma etching apparatus. No additional photolithography is required in this step.

[0056] (7) The reverse etching process uses fluorine-containing plasma. Its core is to achieve highly selective etching of SiCO / SiCN media through the functional synergy of different gas components. A mixed gas composed of fluorine-containing gas, passivating gas, oxidizing gas and inert gas is used. In this example, the flow rate ratio of each gas is as follows: CF4 flow rate is 75 sccm, CHF3 flow rate is 35 sccm, O2 flow rate is 5 sccm and Ar flow rate is 20 sccm. In this process, fluorine-containing gas, represented by CF4, is used as the main etching agent. It dissociates in the plasma to generate highly active fluorine radicals, which react chemically with silicon in the medium to generate volatile SiF4, thereby achieving the removal of the medium.

[0057] To protect the cobalt metal structure used as a mask and improve etching selectivity, a passivation gas, represented by CHF3, is introduced. CHF3 forms a dynamic fluorocarbon polymer protective film on all surfaces. This film exhibits strong adhesion to the cobalt metal surface but weak adhesion to the SiCO / SiCN dielectric surface. Under ion bombardment, the portion of this protective film adhering to the top surface of the etched dielectric is effectively removed, while remaining on the cobalt mask surface and dielectric sidewalls. This effectively prevents damage to the cobalt metal and suppresses lateral etching. Furthermore, a small amount of O2 can be added during the process to react and remove any carbonaceous or polymeric residues, while inert gases such as Ar assist etching and regulate plasma stability through physical bombardment. Process parameters can be set as follows: RF power range of 240W, reaction chamber pressure range of 30 mTorr. The etching endpoint can be monitored in real-time using optical emission spectroscopy (OES) to detect the characteristic peaks of Si (288 nm) or C (193 nm). The etching is considered complete when the intensity decays to 10% of the initial value.

[0058] (8) After etching, H2 / N2 (1:4) plasma cleaning (150W, 25S) was used to remove the fluorocarbon polymer. The final sample had carbon residue <0.8 at.%, surface roughness Ra of about 0.5 nm, vertical etching profile, excellent overall performance, met the 3 nm node accuracy requirements, and obtained a semi-damascus metal interconnect structure.

[0059] (9) After reverse etching, the cobalt in the trenches of the semi-damascus metal interconnect structure forms strip-shaped metal lines, and the cobalt in the vias forms columnar connectors, which are integrally formed. The edge spacing of adjacent metal lines is controlled at 20-30nm, the line width deviation is <5nm, and the alignment deviation between the vias and the underlying structure is <5nm. The spacing design ensures insulation between adjacent cobalt structures, and finally forms high-density metal interconnect lines that meet the process requirements of 3nm and below.

[0060] Example 3

[0061] This embodiment provides a method for reverse etching of an insulating dielectric to form a semi-damascus metal interconnect, the method comprising the following steps:

[0062] (1) In the SiCN / SiCO composite low-k dielectric layer, a through hole with a diameter of 50 nm (depth-to-width ratio 8:1) is formed by plasma etching.

[0063] (2) Immediately after etching, the surface of the dielectric layer is activated by NH3 plasma (time 60s, power 200W, pressure 100mTorr).

[0064] (3) Using atomic layer deposition technology, a 15 nm cobalt seed layer was deposited on the surface of the through-hole activated by NH3 plasma, with bis(cyclopentadienyl)cobalt (Co(Cp)2) as the precursor, under vacuum conditions of 250 °C and 10 mTorr, to obtain the first sample;

[0065] (4) The first sample was placed in a custom electrodeposition tank. A sulfate electrolyte system consisting of 0.4 mol / L CoSO4·7H2O, 0.2 mol / L citric acid, 5 g / L polyethylene glycol, and 1 g / L thiourea was used. The peak current density of 8 mA / cm² was applied at a temperature of 50 °C and a pH of 4 (adjusted by H2SO4). 2 A pulsed current with a duty cycle of 50% was applied. Cobalt ions grew in a bottom-up manner under the action of the pulsed electric field: they preferentially deposited from the bottom of the vias and trenches, and gradually filled upwards as the current continued to act, eventually forming a void-free cobalt layer (500 nm thick), thus obtaining the second sample;

[0066] (5) The second sample is etched by RIE (Cl2 / BCl3 plasma, etching rate 30-50nm / min, 50nm / min is used in this embodiment) to completely remove the excess cobalt layer on the surface of the dielectric layer, leaving only the cobalt structure in the via and trench, ensuring insulation between the metal lines in adjacent trenches, and obtaining the metal structure;

[0067] (6) Using the metal structure as a self-aligned mask, reverse etching of the insulating medium is performed in a plasma etching apparatus. No additional photolithography is required in this step.

[0068] (7) The reverse etching process uses fluorine-containing plasma. Its core is to achieve highly selective etching of SiCO / SiCN media through the functional synergy of different gas components. A mixed gas composed of fluorine-containing gas, passivating gas, oxidizing gas and inert gas is used. In this example, the flow rate ratio of each gas is as follows: CF4 flow rate is 100 sccm, CHF3 flow rate is 50 sccm, O2 flow rate is 10 sccm and Ar flow rate is 30 sccm. In this process, fluorine-containing gas, represented by CF4, is used as the main etching agent. It dissociates in the plasma to generate highly active fluorine radicals, which react chemically with silicon in the medium to generate volatile SiF4, thereby achieving the removal of the medium.

[0069] To protect the cobalt metal structure used as a mask and improve etching selectivity, a passivation gas, represented by CHF3, is introduced. CHF3 forms a dynamic fluorocarbon polymer protective film on all surfaces. This film exhibits strong adhesion to the cobalt metal surface but weak adhesion to the SiCO / SiCN dielectric surface. Under ion bombardment, the portion of this protective film adhering to the top surface of the etched dielectric is effectively removed, while remaining on the cobalt mask surface and dielectric sidewalls. This effectively prevents damage to the cobalt metal and suppresses lateral etching. Furthermore, a small amount of O2 can be added during the process to react and remove any carbonaceous or polymeric residues, while inert gases such as Ar assist etching and regulate plasma stability through physical bombardment. Process parameters can be set as follows: RF power range of 400W, reaction chamber pressure range of 50 mTorr. The etching endpoint can be monitored in real-time using optical emission spectroscopy (OES) to detect the characteristic peaks of Si (288 nm) or C (193 nm). The etching is considered complete when the intensity decays to 10% of the initial value.

[0070] (8) After etching, H2 / N2 (1:4) plasma cleaning (150W, 25S) was used to remove the fluorocarbon polymer. Thanks to the high power and flow rate, the etching rate was fast, and the carbon residue of the final sample was <0.9 at.%, and the surface roughness Ra was maintained between 0.5-0.6 nm. While ensuring high efficiency, a high-quality interconnect structure was still obtained, meeting the 3nm node accuracy requirements, and a semi-damascus metal interconnect structure was obtained.

[0071] (9) After reverse etching, the cobalt in the trenches of the semi-damascus metal interconnect structure forms strip-shaped metal lines, and the cobalt in the vias forms columnar connectors, which are integrally formed. The edge spacing of adjacent metal lines is controlled at 20-30nm, the line width deviation is <5nm, and the alignment deviation between the vias and the underlying structure is <5nm. The spacing design ensures insulation between adjacent cobalt structures, and finally forms high-density metal interconnect lines that meet the process requirements of 3nm and below.

[0072] Example 4

[0073] This embodiment provides a method for reverse etching of an insulating dielectric to form a semi-damascus metal interconnect, the method comprising the following steps:

[0074] (1) In the SiCN / SiCO composite low-k dielectric layer, a via with a diameter of 40 nm (depth-to-width ratio 7:1) is formed by plasma etching.

[0075] (2) Immediately after etching, the surface of the dielectric layer is activated by NH3 plasma (time 43s, power 150W, pressure 70mTorr).

[0076] (3) Using atomic layer deposition technology, a 11 nm cobalt seed layer was deposited on the surface of the through-hole activated by NH3 plasma, with bis(cyclopentadienyl)cobalt (Co(Cp)2) as the precursor, under vacuum conditions of 200℃ and 8 mTorr, to obtain the first sample;

[0077] (4) The first sample was placed in a custom electrodeposition tank. A sulfate electrolyte system consisting of 0.3 mol / L CoSO4·7H2O, 0.15 mol / L citric acid, 3 g / L polyethylene glycol, and 0.5 g / L thiourea was used. The peak current density of 5 mA / cm² was applied at a temperature of 45°C and a pH of 3.5 (adjusted by H2SO4). 2 A pulsed current with a duty cycle of 40% was applied. Cobalt ions grew in a bottom-up manner under the action of the pulsed electric field: they preferentially deposited from the bottom of the vias and trenches, gradually filling upwards as the current continued to act, eventually forming a void-free cobalt layer (300 nm thick), thus obtaining the second sample;

[0078] (5) The second sample is etched by RIE (Cl2 / BCl3 plasma, etching rate 30-50nm / min, 30nm / min in this embodiment) to completely remove the excess cobalt layer on the surface of the dielectric layer, leaving only the cobalt structure in the via and trench, ensuring insulation between the metal lines in adjacent trenches, and obtaining the metal structure;

[0079] (6) Using the metal structure as a self-aligned mask, reverse etching of the insulating medium is performed in a plasma etching apparatus. No additional photolithography is required in this step.

[0080] (7) The reverse etching process uses fluorine-containing plasma. Its core is to achieve highly selective etching of SiCO / SiCN media through the functional synergy of different gas components. A mixed gas composed of fluorine-containing gas, passivating gas, and oxidizing gas is used. In this example, the flow rate ratio of each gas is as follows: CF4 flow rate is 75 sccm, CHF3 flow rate is 35 sccm, and O2 flow rate is 5 sccm. In this process, fluorine-containing gas, represented by CF4, is used as the main etching agent. It dissociates in the plasma to generate highly active fluorine radicals, which react chemically with silicon in the medium to generate volatile SiF4, thereby achieving the removal of the medium.

[0081] To protect the cobalt metal structure used as a mask and improve etching selectivity, a passivation gas, represented by CHF3, is introduced. CHF3 forms a dynamic fluorocarbon polymer protective film on all surfaces. This film exhibits strong adhesion to the cobalt metal surface but weak adhesion to the SiCO / SiCN dielectric surface. Under ion bombardment, the portion of this protective film adhering to the top surface of the etched dielectric is effectively removed, while remaining on the cobalt mask surface and dielectric sidewalls. This effectively prevents damage to the cobalt metal and suppresses lateral etching. Furthermore, a small amount of O2 can be added during the process to react and remove any carbonaceous or polymeric residues. Process parameters can be set as follows: RF power range of 240W, reaction chamber pressure range of 30 mTorr. The etching endpoint can be monitored in real-time using optical emission spectroscopy (OES) to detect the characteristic peaks of Si (288 nm) or C (193 nm). The etching is considered complete when the intensity decays to 10% of the initial value.

[0082] (8) After etching, H2 / N2 (1:4) plasma cleaning (150W, 25S) was used to remove the fluorocarbon polymer. Due to the lack of physical bombardment assistance from Ar ions, the etching process relied more on chemical reactions, but ideal results were still achieved by optimizing other parameters. The final sample had a slightly high carbon residue of <1.0 at.%, and a surface roughness Ra of about 0.6 nm, which was still within the high-performance index range and met the 3 nm node accuracy requirements, resulting in a semi-damascus metal interconnect structure.

[0083] (9) After reverse etching, the cobalt in the trenches of the semi-damascus metal interconnect structure forms strip-shaped metal lines, and the cobalt in the vias forms columnar connectors, which are integrally formed. The edge spacing of adjacent metal lines is controlled at 20-30nm, the line width deviation is <5nm, and the alignment deviation between the vias and the underlying structure is <5nm. The spacing design ensures insulation between adjacent cobalt structures, and finally forms high-density metal interconnect lines that meet the process requirements of 3nm and below.

[0084] Example 5

[0085] This embodiment provides a method for reverse etching of an insulating dielectric to form a semi-damascus metal interconnect, the method comprising the following steps:

[0086] (1) In the SiCN / SiCO composite low-k dielectric layer, a via with a diameter of 40 nm (depth-to-width ratio 7:1) is formed by plasma etching.

[0087] (2) Immediately after etching, the surface of the dielectric layer is activated by NH3 plasma (time 43 seconds, power 150W, pressure 70mTorr).

[0088] (3) Using atomic layer deposition technology, a 11 nm cobalt seed layer was deposited on the surface of the through-hole activated by NH3 plasma, with bis(cyclopentadienyl)cobalt (Co(Cp)2) as the precursor, under vacuum conditions of 200℃ and 8 mTorr, to obtain the first sample;

[0089] (4) The first sample was placed in a custom electrodeposition tank. A sulfate electrolyte system consisting of 0.3 mol / L CoSO4·7H2O, 0.15 mol / L citric acid, 3 g / L polyethylene glycol, and 0.5 g / L thiourea was used. The peak current density of 5 mA / cm² was applied at a temperature of 45°C and a pH of 3.5 (adjusted by H2SO4). 2 A pulsed current with a duty cycle of 40% was applied. Cobalt ions grew in a bottom-up manner under the action of the pulsed electric field: they preferentially deposited from the bottom of the vias and trenches, gradually filling upwards as the current continued to act, eventually forming a void-free cobalt layer (300 nm thick), thus obtaining the second sample;

[0090] (5) The second sample is chemically mechanically polished (CMP, pressure 2-4 psi, the pressure used in this embodiment is 4 psi) to completely remove the excess cobalt layer on the surface of the dielectric layer, leaving only the cobalt structure in the through holes and trenches, ensuring insulation between the metal lines in adjacent trenches, and obtaining the metal structure;

[0091] (6) Using the metal structure as a self-aligned mask, reverse etching of the insulating medium is performed in a plasma etching apparatus. No additional photolithography is required in this step.

[0092] (7) The reverse etching process uses fluorine-containing plasma. Its core is to achieve highly selective etching of SiCO / SiCN media through the functional synergy of different gas components. A mixed gas composed of fluorine-containing gas, passivating gas, and inert gas is used. In this example, the flow rate ratio of each gas is as follows: CF4 flow rate is 75 sccm, CHF3 flow rate is 35 sccm, and Ar flow rate is 20 sccm. In this process, fluorine-containing gas, represented by CF4, is used as the main etchant. It dissociates in the plasma to generate highly active fluorine radicals, which react chemically with silicon in the medium to generate volatile SiF4, thereby achieving the removal of the medium.

[0093] To protect the cobalt metal structure used as a mask and improve etching selectivity, a passivation gas, represented by CHF3, is introduced. CHF3 forms a dynamic fluorocarbon polymer protective film on all surfaces. This film exhibits strong adhesion to the cobalt metal surface but weak adhesion to the SiCO / SiCN dielectric surface. Under ion bombardment, the portion of this protective film adhering to the top surface of the etched dielectric is effectively removed, but it remains on the cobalt mask surface and dielectric sidewalls, effectively preventing damage to the cobalt metal and suppressing lateral etching. Inert gases such as Ar assist etching through physical bombardment and regulate plasma stability. Process parameters can be set as follows: RF power range of 240W, reaction chamber pressure range of 30 mTorr. The etching endpoint can be monitored in real-time using optical emission spectroscopy (OES) to detect the characteristic peaks of Si (288 nm) or C (193 nm). The etching is considered complete when the intensity decays to 10% of the initial value.

[0094] (8) After etching, H2 / N2 (1:4) plasma cleaning (150W, 25 seconds) was used to remove the fluorocarbon polymer. Due to the lack of online removal of polymer residues by O2, the load of the subsequent H2 / N2 cleaning step was slightly increased. The final sample had carbon residue <0.9 at.%, and the surface roughness Ra was relatively balanced due to the physical bombardment effect, maintaining at about 0.5 nm. This proves that even in the absence of oxidizing gas, the core scheme of this invention remains robust, meets the 3 nm node accuracy requirement, and yields a semi-damascus metal interconnect structure.

[0095] (9) After reverse etching, the cobalt in the trenches of the semi-damascus metal interconnect structure forms strip-shaped metal lines, and the cobalt in the vias forms columnar connectors, which are integrally formed. The edge spacing of adjacent metal lines is controlled at 20-30nm, the line width deviation is <5nm, and the alignment deviation between the vias and the underlying structure is <5nm. The spacing design ensures insulation between adjacent cobalt structures, and finally forms high-density metal interconnect lines that meet the process requirements of 3nm and below.

[0096] Example 6

[0097] This embodiment is based on Example 1, but with the fluorine-containing gas CF4 replaced by C2F6 (flow rate 50 sccm), the passivation gas CHF3 replaced by C4F6 (flow rate 20 sccm), the oxidizing gas O2 replaced by CO (flow rate 1 sccm), and the inert gas Ar replaced by He (flow rate 10 sccm), while the remaining process parameters (power 100 W, pressure 10 mTorr) remained unchanged. After etching, cleaning was performed using H2 / N2 plasma. Due to the use of C4F6 gas with a stronger film-forming tendency and He gas with weaker physical bombardment, the process window's dependence on the oxidizing gas CO was increased. The final sample showed a slight increase in carbon residue, <1.1 at.%, and the surface roughness Ra fluctuated slightly due to changes in ion species, remaining at 0.6 nm. The results show that the method system of this invention has a wide range of gas selection; by replacing different types of fluorine-containing, passivation, oxidizing, and inert gases, it is still possible to achieve efficient reverse etching of the medium and obtain a high-quality structure that meets the requirements of the 3nm node.

[0098] Example 7

[0099] This embodiment is based on Example 1, but replaces the single gas with a mixture of multiple gases to verify the robustness of the invention in complex gas systems. The specific proportions are as follows:

[0100] Fluorine-containing gas: C2F6 (25 sccm) and C3F8 (25 sccm) are mixed, with a total flow rate of 50 sccm.

[0101] Passivating gas: a mixture of C4F6 (10 sccm) and C4F8 (10 sccm), with a total flow rate of 20 sccm.

[0102] Oxidizing gases: a mixture of CO (0.5 sccm) and N2O (0.5 sccm), with a total flow rate of 1 sccm.

[0103] Inert gases: Ne (5 sccm) and Xe (5 sccm) were mixed at a total flow rate of 10 sccm. Other process parameters (power 100 W, pressure 10 mTorr) remained unchanged. After etching, cleaning was performed using H2 / N2 plasma. This embodiment employed a complex gas mixture containing heavier fluorocarbon gases such as C3F8 and C4F8, as well as Xe ions with higher bombardment efficiency. This combination facilitates the formation of a dense protective film and effective bottom opening at low temperature and low power. The final sample achieved excellent surface morphology, with carbon residue controlled at <0.8 at.% and surface roughness Ra improved to 0.4 nm. This result strongly demonstrates that the core idea of ​​this invention is not limited to a few specific gases, but is applicable to synergistic systems formed by mixing multiple gases, exhibiting extremely high process flexibility and optimization potential.

[0104] Specifically, the roles, selection ranges, and synergistic adjustment principles of each gas component in the reverse etching process of this invention are as follows:

[0105] I. Selection and Replacement of Gas Components

[0106] 1. Fluorine-containing gas: Its core function is to dissociate in plasma to generate highly reactive fluorine radicals, which chemically react with silicon in the silicon-based insulating dielectric layer (such as SiCO / SiCN) to generate volatile SiF4, thereby achieving chemical etching of the dielectric. To achieve this function, in addition to CF4 used in the examples, other fluorinated alkane gases can be selected, such as, but not limited to, C2F6, C3F8, CH2F2; or inorganic fluoride gases, such as, but not limited to, SF6, NF3. Its flow rate range is typically 50-100 sccm.

[0107] 2. Passivating Gas: Its core function is to dynamically form a fluorocarbon polymer protective film on all exposed surfaces (including the cobalt metal structure surface and the dielectric sidewalls). This protective film effectively resists the erosion of fluorine free radicals, but on top of the etched dielectric layer, this protective film is continuously removed due to ion bombardment, thus achieving anisotropic etching. This passivation effect is key to achieving a selectivity of over 50:1 for cobalt metal. To achieve this function, in addition to CHF3 used in the examples, other gases with lower F / C ratios and stronger film-forming capabilities can be selected, such as, but not limited to, C4F6, C4F8, and CH3F. Their flow rate range is typically 20-50 sccm.

[0108] 3. Oxidizing gas (optional): Its function is to react with carbonaceous or excessively thick polymer residues that may be generated during the etching process, converting them into volatile CO or CO2 to ensure the cleanliness of the etched surface. For this purpose, at least one of O2, CO, or N2O can be used. Adding an appropriate amount of oxidizing gas is particularly important when the passivation gas has a strong film-forming tendency. Its flow rate range is typically 1-10 sccm. As shown in Example 5, under certain process windows (e.g., when the passivation gas has a weak film-forming tendency), oxidizing gas may not be added, and etching can be completed solely through the synergistic effect of the fluorine-containing gas and the passivation gas.

[0109] 4. Inert gas (optional): Its main functions include: assisting etching through physical bombardment, especially in removing the passivation layer; diluting the reactive gas for finer control of the reaction rate; and stabilizing the plasma. For this purpose, at least one of Ar, He, Ne, or Xe can be used. Its flow rate is typically 10-30 sccm or higher, depending on the desired dilution and bombardment effect. As shown in Example 4, when the plasma itself is sufficiently stable and the ion bombardment energy is moderate, an inert gas may not be added.

[0110] II. Regarding the coordinated adjustment of process parameters

[0111] Those skilled in the art will understand that when replacing one or more of the above-mentioned gases, other process parameters should be adaptively adjusted according to the characteristics of the selected gas; this falls within the scope of conventional process optimization. For example:

[0112] If SF6, which has stronger etching properties, is used instead of CF4, the flow rate of passivation gas (such as CHF3) can be increased accordingly to maintain a high selectivity for cobalt metal, or the radio frequency power can be appropriately reduced to weaken physical bombardment.

[0113] If C4F8, which has a stronger tendency to form films, is chosen instead of CHF3, the O2 flow rate can be increased or the RF power can be increased to enhance the removal of the top polymer in order to prevent "etch stop".

[0114] In summary, the core of this invention lies in constructing a synergistic system of "chemical etching + dynamic passivation protection". Any gas combination and corresponding parameter adjustments that can achieve this function, as long as they ultimately achieve the beneficial effects of low metal loss, high-fidelity pattern transfer, and clean interface as described in this invention, should be considered to fall within the protection scope of this invention.

[0115] To objectively verify the comprehensive improvement brought about by the technical approach of this invention, this embodiment selects a traditional process (taking ruthenium metal as an example, using a "metal etching" strategy) for comparative analysis with Embodiments 1, 3, and 5 of this invention. Through quantitative evaluation, the performance differences of different technical paths are systematically revealed.

[0116] Quantitative assessment results;

[0117] In terms of process complexity, traditional processes rely on silicon nitride hard masks for pattern transfer, requiring additional critical steps such as hard mask deposition, patterning, and removal, resulting in a total of 10 process steps. Each step not only introduces equipment time and material costs but also increases the probability of process errors and defects. In contrast, the embodiments of this invention employ a "self-aligned" technique, utilizing the cobalt metal structure already filled in the vias and trenches directly as the etching mask, successfully eliminating the hard mask-related modules and reducing the number of process steps to 7, significantly improving process efficiency and reliability.

[0118] Regarding alignment accuracy, traditional processes require a secondary alignment step of "hard mask → metal layer" for pattern transfer, resulting in a cumulative deviation greater than 8 nanometers. At the 3-nanometer technology node, this deviation can easily lead to short circuits between lines or fluctuations in electrical performance. This invention utilizes a bottom-up electroplating technique to naturally align the metal pattern with the underlying dielectric structure, strictly controlling the deviation within 5 nanometers, fundamentally solving the problem of cumulative errors caused by multiple pattern transfers.

[0119] Surface roughness is another key indicator affecting the electrical performance and reliability of interconnects. Traditional processes result in surface roughness of up to 3.5 nanometers due to direct plasma etching of the metal and the transfer effect of roughness from hard mask edges. This invention achieves significant improvements in surface quality by optimizing the reverse etching process conditions: Example 1 achieved an extremely low roughness of 0.4 nanometers under mild reverse etching parameters and oxygen-assisted cleaning conditions; Example 3, although employing higher power and pressure to increase the etching rate, still maintained a surface roughness of 0.6 nanometers; Example 5, by introducing a chemical mechanical polishing process, achieved an excellent surface smoothness of 0.5 nanometers even in an oxygen-free etching environment.

[0120] Regarding etching selectivity and metal damage, conventional processes exhibit an etching selectivity ratio of less than 30:1 between ruthenium metal and low-k dielectric, resulting in a narrow process window and metal loss exceeding 2 nanometers due to direct exposure to the etching environment. This invention transforms the process strategy into "reverse etching of the dielectric," using cobalt metal as a mask and forming an effective sidewall protective layer with gases such as CHF3. This achieves high dielectric selectivity etching (>50:1) while reducing metal loss to a negligible 0.1 nanometer level, effectively ensuring the integrity and electrical performance stability of the interconnect structure.

[0121] It should be understood that although the steps in the flowcharts of the various embodiments of the present invention are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the various embodiments may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the sub-steps or stages of other steps.

[0122] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0123] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for reverse etching of insulating dielectric to form semi-damascus metal interconnects, characterized in that, The method includes the following steps: Through-holes and trenches are formed in the silicon-based insulating dielectric layer; By filling through-holes and trenches with metallic cobalt, a metallic structure is formed; Using the metal structure as a self-aligned mask, at least one fluorine-containing gas and at least one passivation gas are mixed, and the insulating dielectric layer is reverse-etched using a plasma etching process until the metal structure is exposed, forming metal lines to obtain a semi-damascus metal interconnect structure. During the etching process, fluorine-containing gas is used to chemically etch the silicon-based insulating dielectric layer, and passivation gas is used to form a protective layer on the surface of the metal structure. The silicon-based insulating dielectric layer is a SiCN / SiCO composite low-k dielectric layer; The fluorine-containing gas is selected from at least one of CF4, C2F6, C3F8, SF6, and NF3; The passivating gas is selected from at least one of CHF3, C4F6, C4F8 and CH3F.

2. The method for reverse etching of insulating dielectric to form semi-damascus metal interconnects according to claim 1, characterized in that, The flow rate of fluorine-containing gas is 50-100 sccm; the flow rate of passivation gas is 20-50 sccm.

3. The method for reverse etching of insulating dielectric to form semi-damascus metal interconnects according to any one of claims 1 to 2, characterized in that, During the mixing of at least one fluorine-containing gas and at least one passivating gas, an oxidizing gas is also introduced, wherein the oxidizing gas is selected from at least one of O2, CO and N2O, and the flow rate is 1-10 sccm.

4. The method for reverse etching of insulating dielectric to form semi-damascus metal interconnects according to claim 3, characterized in that, During the mixing process of at least one fluorine-containing gas and at least one passivating gas, an inert gas is also introduced, wherein the inert gas is selected from at least one of Ar, He, Ne and Xe, and the flow rate is 10-30 sccm.

5. The method for reverse etching of insulating dielectric to form semi-damascus metal interconnects according to claim 4, characterized in that, In plasma etching, the radio frequency power ranges from 100 to 400 W, and the reaction chamber pressure ranges from 10 to 50 mTorr. The endpoint of reverse etching is determined by monitoring the change in the characteristic peak intensity of Si or C using optical emission spectroscopy (OES).

6. The method for reverse etching of insulating dielectric to form semi-damascus metal interconnects according to claim 5, characterized in that, The process also includes an H2 / N2 plasma cleaning step after reverse etching to remove etching residues and inhibit surface oxidation.

7. The method for reverse etching of insulating dielectric to form semi-damascus metal interconnects according to claim 6, characterized in that, The specific steps for forming vias and trenches in a silicon-based insulating dielectric layer are as follows: In a silicon-based insulating dielectric layer, vias with a diameter of 20-50 nm are formed by plasma etching, and the via aspect ratio is 6-8:

1. After etching, the surface of the dielectric layer is activated by NH3 plasma for 30-60 seconds, with a power of 100-200W and a pressure of 50-100mTorr.

8. The method for reverse etching of insulating dielectric to form semi-damascus metal interconnects according to claim 7, characterized in that, The specific steps for filling through-holes and trenches with metallic cobalt to form a metallic structure are as follows: Atomic layer deposition was used to deposit a 5-15 nm cobalt seed layer on the surface of the through-hole activated by NH3 plasma, using bis(cyclopentadienyl)cobalt (Co(Cp)2) as a precursor, under vacuum conditions of 150-250℃ and 5-10 mTorr, to obtain the first sample. The first sample was placed in a custom electrodeposition tank, using a sulfate electrolyte system consisting of 0.2-0.4 mol / L CoSO4·7H2O, 0.1-0.2 mol / L citric acid, 1-5 g / L polyethylene glycol, and 0.1-1 g / L thiourea. A peak current density of 2-8 mA / cm² was applied at a temperature of 40-50℃ and a pH of 3-4. 2 Pulse current with a duty cycle of 30-50%; Cobalt ions grow from the bottom up under the action of a pulsed electric field: they preferentially deposit from the bottom of the vias and trenches, and gradually fill upwards as the current continues to act, eventually forming a cobalt layer without voids. The thickness of the cobalt layer is 100-500 nm, and the second sample is obtained. The second sample was subjected to RIE etching or chemical mechanical polishing to completely remove the excess cobalt layer on the surface of the dielectric layer, leaving only the cobalt structure in the vias and trenches, ensuring insulation between the metal lines in adjacent trenches, thus obtaining the metal structure.

9. A semi-damascus metal interconnect structure formed by a reverse etching process, characterized in that, The semi-damascus metal interconnect structure is prepared using the insulating dielectric reverse etching method for forming a semi-damascus metal interconnect as described in claim 8, and the semi-damascus metal interconnect structure comprises: A monolithic strip-shaped metal line and columnar through-hole connector made of electrodeposited cobalt; The edge spacing between adjacent metal lines is 20-30nm, and the linewidth deviation is ≤5nm; The alignment deviation between the via and the underlying structure is ≤5nm; The interface roughness between the metal structure and the insulating dielectric layer is ≤0.5nm; The structure has no hard mask residue and is suitable for high-density interconnects in 3nm and below processes.

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