An output stage circuit of a digital-to-analog converter, a digital-to-analog converter and an optical module chip
Patent Information
- Application Number
- CN202511349421.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-19
- Publication Date
- 2026-08-21
- Estimated Expiration
- 2045-09-19
AI Technical Summary
[0002]目前数模转换器的输出级电路输出的输出电流与芯片的电压源的输出电压直接相关,芯片的电压源的输出电压产生变化时,输出级电路输出的输出电流也会相应的产生变化,导致输出级电路输出的输出电流稳定性较差
[0028]本申请提供的数模转换器的输出级电路,在现有结构后增加了第二放大器,第二放大器输出再反馈回第一放大器的负输入端,使第一放大器的负输入端输入的电压与输出级电源电压无关,从而使得输出级电源电压的变化不会影响输出电流,提高了输出电流的稳定性,极大提升芯片设计的兼容性;
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Figure CN121193266B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of radio frequency communication digital-to-analog conversion technology, specifically relating to an output stage circuit of a digital-to-analog converter, a digital-to-analog converter, and an optical module chip. Background Technology
[0002] Currently, the output current of the output stage circuit of a digital-to-analog converter is directly related to the output voltage of the chip's voltage source. When the output voltage of the chip's voltage source changes, the output current of the output stage circuit will also change accordingly, resulting in poor stability of the output current of the output stage circuit. Summary of the Invention
[0003] To address the problems existing in the prior art, an output stage circuit, a digital-to-analog converter (DAC), and an optical module chip are proposed. By utilizing this output stage circuit, DAC, and optical module chip, the stability of the output current of the output stage circuit can be improved.
[0004] This application provides the following solutions.
[0005] In a first aspect, this application provides an output stage circuit for a digital-to-analog converter, including: a first amplifier, a second amplifier, and a digital potentiometer;
[0006] The positive input terminal of the first amplifier is connected to a digital potentiometer, the negative input terminal of the first amplifier is connected to the output terminal of the second amplifier, the voltage at the output terminal of the second amplifier is input to the first amplifier, and the output terminal of the first amplifier is connected to the gate of a MOSFET.
[0007] The positive and negative input terminals of the second amplifier are connected to the output stage power supply voltage through different resistors;
[0008] The drain of the MOSFET is connected to the output stage power supply voltage, and the source of the MOSFET outputs the output current.
[0009] In some possible embodiments, the output stage circuit of the digital-to-analog converter provided in this application further includes: a second resistor, a third resistor, and a fourth resistor;
[0010] The negative input terminal of the second amplifier is connected to the output stage power supply voltage through the third resistor and the first resistor;
[0011] The positive input terminal of the second amplifier is connected to the output stage power supply voltage through the second resistor, and the positive input terminal of the second amplifier is also grounded through the fourth resistor.
[0012] In some possible embodiments, the positive input terminal of the first amplifier is connected to the output terminal of the digital potentiometer, the power supply terminal of the digital potentiometer is connected to a current source, the ground terminal of the digital potentiometer is grounded, and the input terminal of the digital potentiometer is connected to a digital input word.
[0013] In some possible embodiments, the output stage circuit of the digital-to-analog converter provided in this application further includes: a first resistor;
[0014] The drain of the MOSFET is connected to the output stage power supply voltage through the first resistor. The output stage power supply voltage is greater than or equal to 1.5V and less than or equal to 2.2V.
[0015] In some possible embodiments, the output current is calculated using the following formula:
[0016]
[0017] Among them, I out For the output current, I ref R is the power supply current output by the current source. DAC This is a resistor array for a digital potentiometer, where R1 is the first resistor, R2 is the second resistor, and R4 is the fourth resistor.
[0018] In some possible embodiments, the second and fourth resistors are selected from the same type of resistor devices.
[0019] In some possible embodiments, the digital potentiometer is a resistive digital potentiometer, wherein the resistor array and the first resistor in the resistive digital potentiometer are selected from the same type of resistor devices.
[0020] In some possible embodiments, the resistor array of the resistive digital potentiometer is composed of multiple resistor elements connected in series, and the first resistor is composed of multiple resistor elements connected in parallel.
[0021] In some possible embodiments, the current source includes a first sub-current source and a second sub-current source;
[0022] The first sub-current source is connected to the power supply terminal of the digital potentiometer via a power switch;
[0023] The second sub-current source is connected to the power switch via the power sub-switch.
[0024] In some possible embodiments, a fifth resistor is also included;
[0025] The negative input terminal of the second amplifier is connected to the output terminal of the second amplifier through the fifth resistor.
[0026] Secondly, this application provides a digital-to-analog converter, which includes the output stage circuit described above.
[0027] Thirdly, this application provides an optical module chip, which includes the aforementioned digital-to-analog converter.
[0028] The output stage circuit of the digital-to-analog converter provided in this application adds a second amplifier after the existing structure. The output of the second amplifier is then fed back to the negative input terminal of the first amplifier, so that the voltage input to the negative input terminal of the first amplifier is independent of the output stage power supply voltage. This ensures that changes in the output stage power supply voltage will not affect the output current, improves the stability of the output current, and greatly enhances the compatibility of chip design.
[0029] Meanwhile, this invention uses the output stage power supply voltage PVDD, but through the design of a two-stage amplifier and resistors, the output current I... out It can be between 0-300mA, i.e., the output current I out Achieve high precision and high swing amplitude, and ensure low temperature drift and low voltage margin.
[0030] Other advantages of this application will be explained in more detail with reference to the following description and figures.
[0031] It should be understood that the above description is merely an overview of the technical solution of this application, so as to enable a clearer understanding of the technical means of this application and thus enable its implementation in accordance with the contents of the specification. To make the above and other objects, features, and advantages of this application more apparent and understandable, specific embodiments of this application are illustrated below. Attached Figure Description
[0032] By reading the detailed description of the exemplary embodiments below, those skilled in the art will understand the advantages and benefits described herein, as well as other advantages and benefits. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:
[0033] Figure 1 A schematic diagram of the output stage circuit of a conventional digital-to-analog converter provided for an embodiment of this application;
[0034] Figure 2 A schematic diagram of the output stage circuit of a digital-to-analog converter provided for an embodiment of this application;
[0035] Figure 3 A schematic diagram of a first resistor and a resistor unit of a digital potentiometer provided in an embodiment of this application;
[0036] Figure 4 An optical module chip is provided as an embodiment of this application.
[0037] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts. Detailed Implementation
[0038] Exemplary embodiments of this application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of this application are shown in the drawings, it should be understood that this application can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of this application and to fully convey the scope of this application to those skilled in the art.
[0039] In the description of embodiments of this application, it should be understood that terms such as "comprising" or "having" are intended to indicate the presence of the disclosed features, numbers, steps, actions, components, portions, or combinations thereof in this specification, and do not exclude the possibility of the presence of one or more other features, numbers, steps, actions, components, portions, or combinations thereof. The terms "first," "second," etc., are used only for ease of description to distinguish identical or similar technical features and should not be construed as indicating or implying the relative importance or number of these technical features. Thus, a feature defined by "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of embodiments of this application, unless otherwise stated, the term "multiple" means two or more.
[0040] Unless otherwise stated, " / " signifies "or," for example, A / B can mean either A or B. "And / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. For ease of description, spatial relation terms such as "below," "under," "above," and "upper" may be used here to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the accompanying drawings for devices in use or operation.
[0041] like Figure 1 As shown, the output stage circuit of a conventional digital-to-analog converter includes an amplifier. The negative input terminal of the amplifier is connected to the output stage power supply voltage PVDD through a first resistor R1, and the positive input terminal is connected to the chip voltage VDD through a digital potentiometer. The output terminal of the amplifier is connected to the gate of a MOSFET M1, and the drain of MOSFET M1 is connected to the output stage power supply voltage PVDD through the first resistor. The gate of MOSFET M1 outputs the output current. Therefore, the output current of the output stage circuit of the conventional digital-to-analog converter can be obtained.
[0042] Therefore, in traditional digital-to-analog converters, the output current of the output stage circuit is directly related to the output voltage of the chip's voltage source. When the output voltage of the chip's voltage source changes, the output current of the output stage circuit will also change accordingly, resulting in poor stability of the output current. Furthermore, this digital-to-analog converter's output stage circuit uses a chip operating voltage VDD of 3V-5.5V, leading to high power consumption.
[0043] This application provides an output stage circuit for a digital-to-analog converter (DAC) that makes the voltage input to the negative input terminal of the first amplifier AMP1 independent of the output stage power supply voltage PVDD. This ensures that changes in the output stage power supply voltage PVDD do not affect the output current, thus improving the stability of the output current. Furthermore, this DAC output stage circuit uses an output stage power supply voltage of 1.5V-2.2V, resulting in low power consumption.
[0044] It should also be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.
[0045] See Figure 2 The figure is a schematic diagram of the output stage circuit of a digital-to-analog converter provided in an embodiment of this application.
[0046] like Figure 2 As shown, the output stage circuit of the digital-to-analog converter provided in this application embodiment includes: a first amplifier AMP1, a second amplifier AMP2, and a digital potentiometer;
[0047] The positive input terminal of the first amplifier AMP1 is connected to a digital potentiometer, the negative input terminal of the first amplifier AMP1 is connected to the output terminal of the second amplifier AMP2, the voltage of the output terminal of the second amplifier AMP2 is input to the first amplifier AMP1, and the output terminal of the first amplifier AMP1 is connected to the gate of the MOS transistor M1.
[0048] The positive and negative input terminals of the second amplifier AMP2 are connected to the output stage power supply voltage through different resistors;
[0049] The drain of MOSFET M1 is connected to the output stage power supply voltage, and the source of MOSFET M1 outputs the output current.
[0050] It should be noted that the digital potentiometer in this application embodiment can be a resistive digital-to-analog converter (RDAC) or other types of digital potentiometers, and this application embodiment does not limit it.
[0051] In this embodiment, a second amplifier AMP2 is added to the existing structure. The output of the second amplifier AMP2 is then fed back to the negative input terminal of the first amplifier AMP1, so that the voltage input to the negative input terminal of the first amplifier AMP1 is independent of the output stage power supply voltage PVDD and the chip operating voltage VDD, thereby improving the stability of the output current.
[0052] In this embodiment, the positive input terminal of the first amplifier AMP1 is connected to the output terminal of the digital potentiometer, the power supply terminal of the digital potentiometer is connected to a current source, the ground terminal of the digital potentiometer is grounded, and the input terminal of the digital potentiometer is connected to the digital input word DAC_code. The digital potentiometer is used to convert the digital input word DAC_code into a potentiometer output voltage V. RDAC .
[0053] As one possible implementation, the resistor connected to the positive input terminal of the second amplifier AMP2 can convert the limited voltage margin of the digital potentiometer output into a wider voltage range, greatly improving the compatibility of the chip design. For example... Figure 2 As shown in the embodiment of this application, the output stage circuit of the digital-to-analog converter may further include: a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. The negative input terminal of the second amplifier AMP2 is connected to the output stage power supply voltage through the third resistor R3 and the first resistor. The positive input terminal of the second amplifier AMP2 is connected to the output stage power supply voltage through the second resistor R2, and the positive input terminal of the second amplifier AMP2 is also grounded through the fourth resistor R4. The negative input terminal of the second amplifier AMP2 is connected to the output terminal of the second amplifier AMP2 through the fifth resistor R5.
[0054] It should be noted that the digital potentiometer output voltage V in the embodiments of this application is... RDAC For V RDAC =V FB =I out ×R1×(R4 / R2). V FB The voltage at the negative input terminal of the first amplifier AMP1, with a limited voltage margin, requires I... out If R1 is low, the digital potentiometer R can be amplified by increasing the ratio of R4 / R2. DAC Therefore, by adjusting the ratio of the fourth resistor R4 and the second resistor R2, the limited voltage margin can be converted into a wider operating voltage range for the digital potentiometer, thus relaxing the design requirements for the digital potentiometer.
[0055] In this embodiment, the output stage circuit of the digital-to-analog converter further includes a first resistor R1. The drain of the MOSFET M1 is connected to the output stage power supply voltage through the first resistor R1. The output stage power supply voltage is greater than or equal to 1.5V and less than or equal to 2.2V.
[0056] like Figure 2 As shown, the drain voltage of MOSFET M1 is V. x1 ;
[0057] V x1 =PVDD-I out ×R1.
[0058] V FB This is the voltage at the negative input terminal of the first amplifier AMP1;
[0059]
[0060] Output current I out The calculation is performed using the following formula:
[0061]
[0062] Among them, I out For the output current, I ref R is the power supply current output by the current source. DAC This is a resistor array for a digital potentiometer, where R1 is the first resistor, R2 is the second resistor, R4 is the fourth resistor, and PVDD is the output stage power supply voltage.
[0063] As one possible implementation, in this embodiment, the second resistor R2 and the fourth resistor R4 can be selected as identical resistors, so that the ratio of the second resistor R2 to the fourth resistor R4 does not fluctuate with process corners and extreme points of high and low temperatures and high and low voltages, thus ensuring that the output current I... out It has greater stability.
[0064] In a resistive digital potentiometer, the resistor array and the first resistor R1 can be made of the same type of resistor. It should be noted that the low voltage margin requirement necessitates a sufficiently small R1 and a low output current I. out The requirements for large output swing and low on-chip power consumption necessitate R DAC Large enough that in practical applications R1 is on the order of mΩ and R DAC For resistors in the kΩ range, it is necessary to strictly use the same resistor units in series or parallel to ensure that the ratio of the two resistors does not fluctuate with process angles and extreme points of high and low temperatures and high and low pressures.
[0065] As one possible implementation method, such as Figure 3 As shown, in this embodiment of the resistive digital potentiometer, the resistor array is composed of multiple resistor units connected in series, and the first resistor R1 is composed of multiple identical resistor units connected in parallel. Thus, in this embodiment of the application, the ratio of the resistor array to the first resistor R1 of the resistive digital potentiometer does not fluctuate with process angles, high / low temperatures, or high / low voltage extreme points.
[0066] In practical applications, such as Figure 2 As shown, the current source includes at least: a first sub-current source Iref0 and a second sub-current source Iref1; the first sub-current source Iref0 is connected to the power supply terminal of the digital potentiometer via a power switch DAC_PD; the second sub-current source Iref1 is connected to the power switch via a power sub-switch IDAC_Range. In this embodiment, the power current I output by the power sub-switch IDAC_Range can be adjusted. ref This adjusts the output current I. out .
[0067] It should be noted that in this embodiment, the output stage power supply voltage PVDD is used, but through the design of a two-stage amplifier and resistors, the output current I... out It can be between 0-300mA, i.e., the output current I out Achieve high precision and high swing amplitude, and ensure low temperature drift and low voltage margin.
[0068] Furthermore, based on the principle that voltage margin = PVDD - M1 source voltage, the solution of this invention can reduce the voltage margin to less than 150mV in practical applications, which can significantly reduce the power consumption of the output stage.
[0069] In summary, this application provides an output stage circuit for a digital-to-analog converter (DAC) that makes the voltage input to the negative input terminal of the first amplifier AMP1 independent of the output stage power supply voltage PVDD. This ensures that changes in the output stage power supply voltage PVDD do not affect the output current, and the range of the output current is only related to the output current of the current source. By adjusting the magnitude of the reference current, this application can achieve a large current output swing, improving the stability and adjustability of the output current. Furthermore, the output stage circuit of this DAC uses an output stage power supply voltage of 1.5V-2.2V, and the large current is directly generated at the output stage without amplification processing; therefore, the overall power consumption of the DAC's output stage circuit is low.
[0070] This application also provides a digital-to-analog converter, which includes the above-described output stage circuit;
[0071] refer to Figure 4 This application also provides an optical module chip, which includes the aforementioned digital-to-analog converter.
[0072] While illustrative embodiments of this application have been detailed and described in the accompanying drawings and foregoing description, they should be considered illustrative rather than restrictive. It should be understood that only certain exemplary embodiments have been shown and described, and all variations and modifications intended to protect within the spirit and scope of the claimed invention are intended to be protected. It should be understood that while the use of terms such as preferred, preferred, or more preferred in the above description to indicate that such described features may be more desirable, it may not be necessary, and implementations without these features may be contemplated, for example, within the scope of the invention defined by the appended claims. When reading the claims, the use of terms such as “a,” “an,” “at least one,” or “at least a portion” is not intended to limit the claim to one item unless specifically stated otherwise in the claim. When the language “at least a portion” and / or “a portion” is used, an item may include a portion and / or the entire item unless specifically stated otherwise.
[0073] While the spirit and principles of this application have been described above with reference to several specific embodiments, it should be understood that this application is not limited to the disclosed specific embodiments, and the division of aspects does not imply that features in these aspects cannot be combined. This application is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
Claims
1. An output stage circuit for a digital-to-analog converter, characterized in that, include: First amplifier, second amplifier, and digital potentiometer; The positive input terminal of the first amplifier is connected to a digital potentiometer, the negative input terminal of the first amplifier is connected to the output terminal of the second amplifier, the voltage of the output terminal of the second amplifier is input to the first amplifier, and the output terminal of the first amplifier is connected to the gate of a MOSFET. The positive and negative input terminals of the second amplifier are connected to the output stage power supply voltage through different resistors, wherein the negative input terminal of the second amplifier is connected to the output stage power supply voltage through a third resistor and a first resistor; The source of the MOSFET outputs the output current, and the drain of the MOSFET is connected to the output stage power supply voltage through the first resistor.
2. The output stage circuit of the digital-to-analog converter according to claim 1, characterized in that, Also includes: The second and fourth resistors; The positive input terminal of the second amplifier is connected to the output stage power supply voltage through the second resistor, and the positive input terminal of the second amplifier is also grounded through the fourth resistor.
3. The output stage circuit of the digital-to-analog converter according to claim 2, characterized in that, The positive input terminal of the first amplifier is connected to the output terminal of the digital potentiometer, the power supply terminal of the digital potentiometer is connected to a current source, the ground terminal of the digital potentiometer is grounded, and the input terminal of the digital potentiometer is connected to a digital input terminal.
4. The output stage circuit of the digital-to-analog converter according to claim 3, characterized in that, The drain of the MOSFET is connected to the output stage power supply voltage through a first resistor, wherein the output stage power supply voltage is greater than or equal to 1.5V and less than or equal to 2.2V.
5. The output stage circuit of the digital-to-analog converter according to claim 4, characterized in that, The output current is calculated using the following formula: in, The output current, The power supply current output by the current source is... A resistor array for a digital potentiometer. For the first resistor, For the second resistor, This refers to the fourth resistor.
6. The output stage circuit of the digital-to-analog converter according to claim 2, characterized in that, The second resistor and the fourth resistor can be selected from the same type of resistor device.
7. The output stage circuit of the digital-to-analog converter according to claim 3, characterized in that, The digital potentiometer is a resistive digital potentiometer, and the resistor array in the resistive digital potentiometer and the first resistor are selected from the same type of resistor devices.
8. The output stage circuit of the digital-to-analog converter according to claim 7, characterized in that, The resistor array of the resistive digital potentiometer is composed of multiple resistor units connected in series, and the first resistor is composed of multiple resistor units connected in parallel.
9. The output stage circuit of the digital-to-analog converter according to claim 1, characterized in that, The current source includes at least a first sub-current source and a second sub-current source; The first sub-current source is connected to the power supply terminal of the digital potentiometer via a power switch; The second sub-current source is connected to the power switch via a power sub-switch.
10. The output stage circuit of the digital-to-analog converter according to any one of claims 1-9, characterized in that, It also includes a fifth resistor; The negative input terminal of the second amplifier is connected to the output terminal of the second amplifier through the fifth resistor.
11. A digital-to-analog converter, characterized in that, The digital-to-analog converter includes the output stage circuit as described in any one of claims 1-10.
12. An optical module chip, characterized in that, The optical module chip includes the digital-to-analog converter as described in claim 11.
Citation Information
Patent Citations
DAC compatible with voltage / current output
CN116388763A