Method, apparatus, system, and electronic device for lane timing calibration in a test machine

Abstract

This disclosure provides a channel timing calibration method, apparatus, system, and electronic device for a testing machine. The method includes: determining a reference channel and a channel under test (DUT) in the testing machine; controlling a first generated signal with the same frequency as a reference clock signal to be input to the reference channel and the DUT, outputting a reference signal through the reference channel and a DUT signal through the DUT; adjusting the first generated signal input to the DUT to make the phase deviation between the DUT signal and the reference signal meet a preset condition, obtaining a first statistical result; and determining a target compensation amount required for alignment between the DUT and the reference channel based on the first statistical result and a preset probability distribution table; wherein the preset probability distribution table is determined based on the phase relationship between the DUT and the reference channel.

Description

Technical Field

[0001] This disclosure relates to test equipment calibration technology, and in particular to a channel timing calibration method, apparatus, system and electronic equipment for a test machine. Background Technology

[0002] Test equipment is used to perform automated tests, including testing electronic components, chips, or semiconductor wafers. An automated test system typically consists of a server, controller, test equipment, network switch, hardware bus adapter card, and external devices.

[0003] The test equipment includes resource boards used to perform functional tests on the device under test (DUT). These resource boards include digital boards, analog boards, and power boards. When testing the DUT, a primary function of the digital and analog boards is to output and capture digital waveforms. Both outputting and capturing require channel-to-channel signal calibration to ensure controllable waveform transition edges and relative channel delays. This is essential to output waveforms that meet timing requirements and guarantee stable testing. Existing channel timing calibration schemes for test equipment suffer from low calibration efficiency. Summary of the Invention

[0004] To address the aforementioned technical problems, this disclosure is proposed. Embodiments of this disclosure provide a channel calibration method, apparatus, system, and electronic device for a testing machine.

[0005] According to one aspect of the present disclosure, a channel timing calibration method in a test machine is provided, comprising:

[0006] Determine the reference channel and the channel under test in the testing machine;

[0007] A first generated signal, which is in the same frequency as the reference clock signal, is input to the reference channel and the channel under test. A reference signal is output through the reference channel, and a signal under test is output through the channel under test.

[0008] By adjusting the first generated signal input to the channel under test, the phase deviation between the signal under test and the reference signal is made to meet the preset condition, and a first statistical result is obtained.

[0009] Based on the first statistical results and the preset probability distribution table, the target compensation amount required for the alignment of the tested channel with the reference channel is determined; wherein, the preset probability distribution table is determined based on the phase relationship between the tested channel and the reference channel.

[0010] Optionally, the step of adjusting the first generated signal input to the channel under test so that the phase deviation between the signal under test and the reference signal meets a preset condition to obtain a first statistical result includes:

[0011] The first generated signal is controlled to perform at least one delay operation to obtain a second generated signal, which is then input into the channel under test.

[0012] The phase deviation between the measured signal output by the measured channel and the reference signal output by the reference channel is detected to obtain the phase deviation value;

[0013] The first statistical result is obtained by analyzing the output results determined based on the phase deviation value over multiple statistical periods.

[0014] Optionally, controlling the first generated signal to perform at least one delay operation to obtain a second generated signal and input it into the channel under test includes:

[0015] By performing at least one delay operation on the reference clock signal, the first generated signal, which has the same frequency as the reference clock signal, is delayed to obtain the second generated signal, which is then input into the channel under test; or...

[0016] The second generated signal is obtained by performing at least one delay operation on the first generated signal and then input into the channel under test.

[0017] Optionally, obtaining the first statistical result based on the output result determined by the phase deviation value within multiple statistical periods includes:

[0018] If the phase deviation value is positive, the output result is determined to be a first result; if the phase deviation value is negative, the output result is determined to be a second result.

[0019] The first statistical result is determined based on the quantitative relationship between the first result and the second result within the multiple statistical periods.

[0020] Optionally, determining the target compensation amount required to align the tested channel with the reference channel based on the first statistical result and a preset probability distribution table includes:

[0021] The initial compensation amount is determined by matching the first statistical result with the preset probability distribution table.

[0022] The target compensation amount is determined based on the difference between the initial compensation amount and the phase alignment target point in the preset probability distribution table; the target compensation amount is used to perform delay processing on the channel under test so that the phase of the signal under test output by the channel under test is aligned with the phase of the reference signal output by the reference channel.

[0023] Optionally, before determining the target compensation amount required to align the tested channel with the reference channel based on the first statistical results and a preset probability distribution table, the method further includes:

[0024] The preset probability distribution table is determined based on the phase relationship between the signals output by the tested channel and the reference channel.

[0025] Optionally, determining the preset probability distribution table based on the phase relationship between the signals output by the tested channel and the reference channel includes:

[0026] A third generated signal with the same frequency as the reference clock signal is input to the reference channel and the channel under test;

[0027] Based on the detection signal output by the tested channel and the reference signal output by the reference channel, it is determined that the initial phase relationship satisfies a preset phase relationship; the preset phase relationship is that the phase of the detection signal is earlier than the phase of the reference channel.

[0028] By performing delay processing on the third generated signal input to the channel under test at least once, and recording the intermediate phase relationship corresponding to each delay processing;

[0029] The preset probability distribution table is determined based on at least one delay amount corresponding to the at least one delay processing and at least one intermediate phase relationship.

[0030] Optionally, determining the preset probability distribution table based on at least one delay amount corresponding to the at least one delay processing and at least one corresponding intermediate phase relationship includes:

[0031] Based on the at least one intermediate phase relationship, at least one comparison result value is determined;

[0032] Within at least one preset time period, at least one comparison result value is statistically analyzed within the preset time period to obtain at least one statistical probability value; each statistical probability value corresponds to one preset time period.

[0033] The preset probability distribution table is determined based on the at least one statistical probability value and the delay amount corresponding to each statistical probability value.

[0034] Optionally, determining the reference channel and the channel under test in the testing machine includes:

[0035] A preset channel in the test machine is designated as the reference channel; the test machine includes multiple signal channels and the preset channel.

[0036] The channel under test is determined from the plurality of signal channels;

[0037] The preset channel can be any signal channel or a reference clock input channel.

[0038] Optionally, it also includes:

[0039] Based on the target compensation amount, delay processing is performed on the channel under test to align the phase of the signal under test output by the channel under test with that of the reference signal output by the reference channel.

[0040] According to another aspect of the embodiments of this disclosure, a channel timing calibration device in a test machine is provided, comprising:

[0041] The channel determination module is used to determine the reference channel and the channel under test in the test machine;

[0042] The signal control module is used to control the input of a first generated signal with the same frequency as the reference clock signal to the reference channel and the channel under test, output a reference signal through the reference channel, and output a signal under test through the channel under test;

[0043] The statistical module is used to adjust the first generated signal input to the channel under test so that the phase deviation value between the measured signal and the reference signal meets a preset condition, thereby obtaining a first statistical result;

[0044] The compensation amount determination module is used to determine the target compensation amount required for the alignment of the tested channel with the reference channel based on the first statistical results and a preset probability distribution table; wherein the preset probability distribution table is determined based on the phase relationship between the tested channel and the reference channel.

[0045] Optionally, the statistics module includes:

[0046] A delay unit is used to control the first generated signal to perform at least one delay operation to obtain a second generated signal and input it into the channel under test;

[0047] A phase detection unit is used to detect the phase deviation between the measured signal output by the measured channel and the reference signal output by the reference channel, and to obtain the phase deviation value.

[0048] The result statistics unit is used to statistically analyze the output results determined based on the phase deviation value within multiple statistical periods to obtain the first statistical result.

[0049] Optionally, the delay unit includes:

[0050] A clock delay unit is configured to delay the first generated signal, which has the same frequency as the reference clock signal, by performing at least one delay operation on the reference clock signal, thereby obtaining the second generated signal and inputting it into the channel under test; or...

[0051] A waveform delay unit is used to obtain a second generated signal and input it into the channel under test by performing at least one delay operation on the first generated signal.

[0052] Optionally, the result statistics unit is specifically used to determine the output result as a first result in response to a positive phase deviation value; to determine the output result as a second result in response to a negative phase deviation value; and to determine the first statistical result based on the quantitative relationship between the first result and the second result within the plurality of statistical periods.

[0053] Optionally, the compensation amount determination module includes:

[0054] An initial compensation unit is used to determine the initial compensation amount by matching the first statistical result with the preset probability distribution table.

[0055] The remaining compensation unit is used to determine the target compensation amount based on the difference between the initial compensation amount and the phase alignment target point in the preset probability distribution table; the target compensation amount is used to perform delay processing on the channel under test so that the phase of the signal under test output by the channel under test is aligned with the phase of the reference signal output by the reference channel.

[0056] Optionally, the device further includes:

[0057] The distributed pre-storage unit is used to determine the preset probability distribution table based on the phase relationship between the signals output by the tested channel and the reference channel.

[0058] Optionally, the distributed pre-storage unit is specifically used to control a third generated signal with the same frequency as the reference clock signal to be input into the reference channel and the channel under test; to determine an initial phase relationship that satisfies a preset phase relationship based on the detection signal output by the channel under test and the reference signal output by the reference channel; the preset phase relationship is that the phase of the detection signal is earlier than the phase of the reference channel; to perform delay processing on the third generated signal input to the channel under test at least once, and to record the intermediate phase relationship corresponding to each delay processing; and to determine the preset probability distribution table based on at least one delay amount corresponding to the at least one delay processing and at least one intermediate phase relationship corresponding to the at least one delay processing.

[0059] Optionally, when the distributed pre-storage unit determines the preset probability distribution table based on at least one delay amount corresponding to the at least one delay processing and at least one intermediate phase relationship, it is used to determine at least one comparison result value based on the at least one intermediate phase relationship; to statistically analyze the at least one comparison result value within at least one preset time period to obtain at least one statistical probability value; each statistical probability value corresponds to one preset time period; and to determine the preset probability distribution table based on the at least one statistical probability value and the delay amount corresponding to each statistical probability value.

[0060] Optionally, the channel determination module is specifically used to determine a preset channel in the test machine as a reference channel; the test machine includes multiple signal channels and a preset channel; the channel under test is determined from the multiple signal channels; wherein, the preset channel is any signal channel or a reference clock input channel.

[0061] Optionally, the device further includes:

[0062] The channel alignment unit is used to perform delay processing on the channel under test based on the target compensation amount, so that the phase of the signal under test output by the channel under test is aligned with the phase of the reference signal output by the reference channel.

[0063] According to another aspect of the present disclosure, a channel timing calibration system is provided, which executes the channel timing calibration method in the test machine described in any of the above embodiments, including: a main control board, at least one type of test board, a calibration board, and a host computer; the main control board is connected to the at least one type of test board, each channel of the at least one type of test board is connected to a channel of the calibration board, and the host computer is connected to the at least one type of test board and the calibration board;

[0064] The main control board is used to provide a reference clock source;

[0065] The at least one type of test board is used to output multiple first generated signals according to the reference clock source provided by the main control board, and to perform delay processing on at least one first generated signal according to the control of the host computer.

[0066] The calibration board is used to receive the first generated signal sent by the at least one type of test board as a reference signal through a reference channel, and to receive the signal after delay processing of the first generated signal sent by the at least one type of test board as a test signal through at least one test channel. The phase deviation value between the test signal and the reference signal meets a preset condition, and statistical results are obtained and sent to the host computer.

[0067] The host computer is used to receive the statistical results output by the calibration board, obtain at least one target compensation amount according to a preset probability distribution table, and control the corresponding channel compensation of the at least one type of test board based on the at least one target compensation amount.

[0068] According to another aspect of the present disclosure, a channel timing calibration system is provided, which executes the channel timing calibration method in the test machine described in any of the above embodiments, including: a main control board, at least one type of test board, a calibration board, and a host computer; the main control board is connected to the at least one type of test board and the calibration board, each channel of the at least one type of test board is connected to a channel of the calibration board, and the host computer is connected to the at least one type of test board and the calibration board;

[0069] The main control board is used to provide a reference clock source to the at least one type of test board and the calibration board;

[0070] The at least one type of test board is used to output a plurality of first generated signals according to the reference clock source provided by the main control board, and to perform delay processing on at least one of the first generated signals according to the control of the host computer.

[0071] The calibration board is used to receive the first generated signal sent by the at least one type of test board as a reference signal through at least one test channel, perform delay processing on the signal, and use the phase deviation between the test signal and the reference signal as a preset condition to obtain statistical results and send the statistical results to the host computer.

[0072] The host computer is used to receive the statistical results output by the calibration board, obtain at least one target compensation amount according to a preset probability distribution table, and control the corresponding channel compensation of the at least one type of test board based on the at least one target compensation amount.

[0073] According to another aspect of the embodiments of this disclosure, an electronic device is provided, comprising:

[0074] Memory, used to store computer program products;

[0075] The processor is configured to execute a computer program product stored in the memory, and when the computer program product is executed, to implement the channel calibration method in the test machine described in any of the above embodiments.

[0076] According to another aspect of the present disclosure, a computer-readable storage medium is provided that stores computer program instructions thereon, which, when executed by a processor, implement the channel calibration method in the test machine described in any of the above embodiments.

[0077] According to another aspect of the present disclosure, a computer program product is provided, including computer program instructions that, when executed by a processor, implement the channel calibration method in the test machine described in any of the above embodiments.

[0078] Based on the channel timing calibration method, apparatus, system, and electronic equipment in the test machine provided in the above embodiments of this disclosure, a reference channel and a channel under test in the test machine are determined; a first generated signal with the same frequency as the reference clock signal is controlled to be input to the reference channel and the channel under test, a reference signal is output through the reference channel, and a signal under test is output through the channel under test; by adjusting the first generated signal input to the channel under test, the phase deviation value between the signal under test and the reference signal meets a preset condition, and a first statistical result is obtained; according to the first statistical result and a preset probability distribution table, the target compensation amount required for the alignment of the channel under test and the reference channel is determined. This embodiment of the disclosure achieves preliminary adjustment of the signal of the channel under test by repeatedly adjusting the first generated signal to obtain the first statistical result, and determines the target compensation amount required for the corresponding channel based on the preset probability distribution table. Since the preset probability distribution table characterizes the phase relationship between the channel under test and the reference channel, calibration based on this greatly improves the efficiency and accuracy of channel timing calibration.

[0079] The technical solutions of this disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0080] The accompanying drawings, which form part of this specification, illustrate embodiments of this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0081] This disclosure will become clearer with reference to the accompanying drawings and the following detailed description, wherein:

[0082] Figure 1 This is a schematic flowchart of a channel calibration method in a test machine provided in an exemplary embodiment of this disclosure;

[0083] Figure 2 This is a flowchart illustrating the result statistics in a channel calibration method for a tester provided in another exemplary embodiment of this disclosure;

[0084] Figure 3a This is a phase diagram illustrating how the measured signal output from the measured channel precedes the reference signal output from the reference channel in an example.

[0085] Figure 3b This is a phase diagram of the measured signal output by the measured channel in an example, which is later than the reference signal output by the reference channel.

[0086] Figure 3c This is a schematic diagram showing the phase similarity between the measured signal output from the measured channel and the reference signal output from the reference channel in an example.

[0087] Figure 4 This is a schematic flowchart illustrating the determination of compensation amount in a channel timing calibration method for a test machine provided in yet another exemplary embodiment of this disclosure;

[0088] Figure 5a This is a schematic representation of the preset probability distribution in the channel timing calibration method of the test machine provided in an exemplary embodiment of this disclosure;

[0089] Figure 5b yes Figure 5a A schematic diagram of the probability density function curves corresponding to the distribution table shown;

[0090] Figure 5c This is a schematic representation of the preset probability distribution in the channel timing calibration method of the test machine provided in another exemplary embodiment of this disclosure;

[0091] Figure 5d yes Figure 5c A schematic diagram of the probability density function curves corresponding to the distribution table shown;

[0092] Figure 5e This is a schematic representation of the preset probability distribution in the channel timing calibration method of the test machine provided in another exemplary embodiment of this disclosure;

[0093] Figure 5f yes Figure 5e A schematic diagram of the probability density function curves corresponding to the distribution table shown;

[0094] Figure 6 This is a schematic diagram of the process for establishing a preset probability distribution table in the channel timing calibration method of the test machine provided in an exemplary embodiment of this disclosure;

[0095] Figure 7 This is a schematic diagram of the structure of a channel timing calibration device in a test machine provided in an exemplary embodiment of the present disclosure;

[0096] Figure 8a This is a schematic diagram of the channel timing calibration system in a test machine provided in an exemplary embodiment of the present disclosure;

[0097] Figure 8b This is a schematic diagram of the structure of a channel timing calibration system in a test machine provided in another exemplary embodiment of this disclosure;

[0098] Figure 9 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0099] Hereinafter, exemplary embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present disclosure, and not all embodiments of the present disclosure, and it should be understood that the present disclosure is not limited to the exemplary embodiments described herein.

[0100] It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of this disclosure.

[0101] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of this disclosure are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them.

[0102] It should also be understood that in the embodiments disclosed herein, "a plurality of" may refer to two or more, and "at least one" may refer to one, two or more.

[0103] It should also be understood that any component, data or structure mentioned in the embodiments of this disclosure can generally be understood as one or more unless expressly defined or given to the contrary in the context.

[0104] Furthermore, the term "and / or" in this disclosure is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this disclosure generally indicates that the preceding and following related objects have an "or" relationship. The data referred to in this disclosure can include unstructured data such as text, images, and videos, as well as structured data.

[0105] It should also be understood that the description of the various embodiments in this disclosure emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0106] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0107] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use.

[0108] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0109] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0110] The embodiments disclosed herein can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate together with a wide range of other general-purpose or special-purpose computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments, and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, and servers include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments including any of the above systems, etc.

[0111] Electronic devices such as terminal devices, computer systems, and servers can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Typically, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in distributed cloud computing environments, where tasks are executed by remote processing devices linked through communication networks. In distributed cloud computing environments, program modules can reside on local or remote computing system storage media, including storage devices.

[0112] Application Overview

[0113] In the process of developing this disclosure, the inventors discovered that signal transmission between multiple channels of a test machine suffers from delay. How to achieve signal synchronization between multiple channels has always been a problem that test machines need to solve. Existing technologies typically use a high-precision Time-to-Digital Converter (TDC) to test the time deviation between multiple channels one by one to achieve channel calibration. However, this technical solution has at least the following problems: it requires repeatedly calling the TDC unit to measure the time deviation between channels, a process that is time-consuming. A TDC is an electronic device or circuit that converts a time interval signal into a digital signal. It is used to measure the time difference between two events (such as electrical pulses, signals, etc.) and convert it into a binary digital output, and is widely used in scenarios requiring time measurement.

[0114] Exemplary methods

[0115] Figure 1This is a schematic flowchart of a channel timing calibration method in a test machine provided in an exemplary embodiment of this disclosure. This embodiment can be applied to electronic devices, such as... Figure 1 As shown, it includes the following steps:

[0116] Step 102: Determine the reference channel and the channel under test in the test machine.

[0117] The testing machine is a core piece of equipment in the automated testing of semiconductor devices and electronic components. It comprises several digital boards and several analog boards. The core feature of the digital boards is their ability to output test stimuli and capture response signals in parallel through multiple independent signal channels, thereby achieving efficient and accurate testing of multi-pin devices (such as integrated circuits, systems-on-a-chip, wafers, etc.). Both the digital and analog boards in the testing machine include multiple channels. The core performance characteristic of the testing machine lies in the consistency of signals between channels, which directly determines the accuracy of the test results; therefore, channel timing calibration is necessary. In this embodiment, taking a digital board as an example, any channel from any digital board in the testing machine can be selected as the reference channel, and any one of the remaining channels can be used as the channel under test. Any one of the remaining channels can be a channel of any digital board other than the reference channel. Specifically, the digital board includes one control sub-board and N execution sub-boards. The N execution sub-boards are communicatively connected to the control sub-board. The control sub-board receives and parses test commands, test parameters, and test channels issued by the host computer, and then distributes them to each execution sub-board. Each execution sub-board acquires the test commands, test parameters, and test channels, and performs test items on the corresponding pins of the device under test based on the test channels. Test items may include outputting test stimuli or acquiring response signals. Based on test requirements, the output or acquisition of relevant test channel signals must be synchronized; therefore, timing calibration of the test channels of the digital board is required before testing. Of course, those skilled in the art will know that any of the remaining channels can be channels of any digital board or any analog board other than the reference channel. Depending on the test items, several digital boards and several analog boards need to output test signals or acquire signals synchronously; therefore, timing calibration of the corresponding resource boards is required before testing.

[0118] Optionally, in order to perform timing calibration on all channels, the remaining channels can be selected as the channels under test in sequence, and the following timing calibration process can be performed.

[0119] In another embodiment, a reference clock signal can be selected as the reference channel, and any channel of the digital board can be selected as the channel under test. All channels under test are calibrated with respect to the reference channel. Of course, any channel of other boards that need to be calibrated, such as analog boards, can also be selected as the channel under test.

[0120] Step 104: Control the first generated signal, which is in the same frequency as the reference clock signal, to be input into the reference channel and the channel under test. Output the reference signal through the reference channel and the signal under test through the channel under test.

[0121] In one embodiment, such as Figure 8a As shown, the testing machine includes a host computer and test boards and calibration boards connected to the host computer. The main control board is connected to the test boards, and each channel of the test boards is connected to the channel of the calibration board. The main control board is used to output a reference clock to the test boards. In this embodiment, the test boards include type A test boards, type B test boards, and type Z test boards (the number and type of test boards are not limited; test boards can include any number and any type of test boards. This embodiment is only an illustrative embodiment). Specifically, type A test boards are digital boards 1, type B test boards are digital boards 2, and type Z test boards are analog boards. Test boards can be boards with different functions or boards with the same function, which is not limited here. Taking a test board as an example of a digital board, the test board includes a waveform generation unit, a clock delay unit, and a waveform delay unit. The waveform generation unit generates a first generated signal with the same frequency as the reference clock signal. The clock delay unit, such as a phase-locked loop (PLL) circuit, a delay-locked loop (DLL) circuit, or a direct digital frequency synthesizer (DDS), can delay the reference clock signal, enabling the waveform generation unit to generate a signal with the same frequency as the reference clock. The reference clock signal is a standard periodic signal used in electronic systems to provide a time reference and synchronization reference. It is the "time scale" that ensures the coordinated operation of various modules, circuits, or devices in the system. Its core function is to ensure the timing consistency of the entire system through stable and accurate periodic pulses, avoiding functional failures caused by disordered operating rhythms of various parts. The waveform delay unit is used to delay the first generated signal output by the waveform generation unit, thereby achieving signal calibration between channels.

[0122] The calibration board includes a channel selection unit, a phase detection unit, and a statistics unit. The channel selection unit is connected to each channel of the test board in a one-to-one correspondence, and is also connected to the phase detection unit. The channel selection unit is used to selectively connect the channel output of the test board to the channel input of the phase detection unit. The phase detection unit is used to detect the phase deviation value between the measured signal and the reference signal. The statistics unit is used to receive the phase deviation value and calculate a first statistical result. Those skilled in the art will understand that since the channel selection unit of the calibration board is connected to each channel of the test board in a one-to-one correspondence, selecting any channel of the test board as the reference channel and selecting another channel as the measured channel means selecting the corresponding channel of the calibration board as both the reference channel and the measured channel. Similarly, the reverse is also true. In this embodiment, as... Figure 8aAs shown, the channel selection unit includes a channel selection input and a channel selection output, which are connected together. The channel selection input includes several terminals, such as IN_A0, IN_A1, IN_AN, IN_Z0, IN_Z1, IN_ZN, and IN_REF, for one-to-one connection with the channels of the test board. The channel selection output includes a reference output (OUT reference) and a test output (OUT test), for connection with the phase detection unit, enabling the phase detection unit to perform phase detection on the received reference signal and the test signal. In this embodiment, the channel selection input and channel selection output are connected via a selector, thereby forming a reference channel and / or a test channel, allowing any channel of the test board to selectively connect to the phase detection unit. Of course, those skilled in the art will understand that the connection between the channel selection input and channel selection output is not limited to a selector; any connector, such as a gating switch, is acceptable, as long as it can selectively connect the channel selection input and channel selection output.

[0123] In another embodiment, the main control board outputs a reference clock to the reference channel of the calibration board. The calibration board uses the reference clock as a reference signal and performs phase comparison with the test signals output from other channels under test in sequence to perform channel calibration. Figure 8b As shown, the main control board is connected to the test board and calibration board. The main control board outputs a reference clock to the IN_REF terminal of the calibration board. The IN_REF terminal is connected to the OUT reference terminal through a selector, thus the connected channel is the reference channel, and the reference clock serves as the reference signal. Any channel of any test board is connected to the channel selection unit of the calibration board, and the channel selection input terminal of the channel selection unit is connected to the OUT test terminal, thus the connected channel serves as the channel under test.

[0124] Slight parameter differences (such as delay characteristics) in the hardware links (e.g., cables, amplifiers, triggers, buffers, etc.) of different channels in a test chamber can cause time delay deviations (different arrival times for the signal to the device under test) or inconsistent edge transitions (different steepness of signal transitions) when the same excitation signal (the first generated signal) passes through different channels. Therefore, there may be a time delay deviation between the signal under test and the reference signal, requiring calibration of the signal under test. For example, the signal in channel A may be 5ns delayed compared to channel B. If not calibrated, this will cause timing errors in the multi-pin signals received by the device under test, leading to a misjudgment of device failure.

[0125] In this embodiment, the waveform generation units of the two channels are controlled to generate a first generated signal with the same frequency as the reference clock signal based on the reference clock signal, and the first generated signal is transmitted to the input reference channel and the channel under test. For example, waveform generation unit 0 generates a first generated signal and transmits it to the IN-A0 terminal of the calibration board. The IN-A0 terminal is connected to the OUT reference terminal (as the reference channel) through the channel selection unit. Waveform generation unit 1 generates a first generated signal and transmits it to the IN-A1 terminal of the calibration board. The channel IN-A1 is connected to the OUT test terminal (as the channel under test) through the channel selection unit.

[0126] Step 106: By adjusting the first generated signal input to the channel under test, the phase deviation between the signal under test and the reference signal is made to meet the preset conditions, and the first statistical result is obtained.

[0127] Optionally, the initial adjustment amount can be determined based on the time delay deviation between the measured signal and the reference signal. By performing delay processing before or after the waveform generation unit, the phase deviation value between the measured signal and the reference signal output by the two channels meets the preset condition. Optionally, the preset condition can be that the phase deviation value between the measured signal and the reference signal has both positive and negative values ​​within multiple statistical periods. The first statistical result can be determined based on the phase deviation value within multiple statistical periods.

[0128] Optionally, a delay process is performed before or after the waveform generation unit, specifically:

[0129] The reference clock signal is delayed by a clock delay unit, so that the output time of the first generated signal from the waveform generation unit is delayed; or,

[0130] The first generated signal output by the waveform generation unit is delayed by the waveform delay unit.

[0131] Step 108: Based on the first statistical results and the preset probability distribution table, determine the target compensation amount required for the alignment of the tested channel with the reference channel.

[0132] The preset probability distribution table is determined based on the phase relationship between the tested channel and the reference channel.

[0133] This embodiment stores the jitter probability density function of the phase overlap interval by pre-obtaining a preset probability distribution table. When performing channel time edge calibration, it only needs to directly call the preset probability distribution table and use a fast phase relationship scanning process to obtain the deviation value of the current phase from the optimal phase. After compensation, the optimal phase alignment point can be achieved in one step. This significantly improves the efficiency and accuracy of time edge calibration.

[0134] The channel calibration method in the test machine provided in the above embodiments of this disclosure determines a reference channel and a channel under test in the test machine; a first generated signal with the same frequency as the reference clock signal is controlled to be input to the reference channel and the channel under test, a reference signal is output through the reference channel, and a signal under test is output through the channel under test; by adjusting the first generated signal input to the channel under test, the phase deviation value between the signal under test and the reference signal meets a preset condition, and a first statistical result is obtained; based on the first statistical result and a preset probability distribution table, the target compensation amount required for the alignment of the channel under test and the reference channel is determined. This disclosure embodiment achieves preliminary adjustment of the signal of the channel under test by repeatedly adjusting the first generated signal of the channel under test and comparing the phase of the signal of the channel under test with that of the reference channel after each adjustment to obtain the phase deviation value and the first statistical result. Based on the preliminary adjustment and combined with the preset probability distribution table, the target compensation amount required for the corresponding channel is determined. Since the preset probability distribution table characterizes the phase relationship between the channel under test and the reference channel, calibration based on this greatly improves the efficiency and accuracy of channel timing calibration.

[0135] In some optional embodiments, the method provided in this embodiment may further include:

[0136] Delay processing is performed on the channel under test based on the target compensation amount to align the phase of the measured signal output by the channel under test with that of the reference signal output by the reference channel.

[0137] After determining the target compensation amount corresponding to the channel under test, the deviation value of the current phase distance between the measured signal output by the channel under test and the phase of the best matching of the reference signal output by the reference channel can be determined (corresponding to the target compensation amount). After compensating the measured signal output by the channel under test based on the target compensation amount, the optimal phase alignment between the measured signal and the reference signal can be achieved in one step without repeated scanning, which significantly improves the efficiency and accuracy of time edge calibration.

[0138] In some alternative embodiments, step 102 may include:

[0139] The preset channel in the test machine is selected as the reference channel.

[0140] The test machine includes multiple signal channels and preset channels. Optionally, any channel can be selected as the reference channel, for example, a reference clock can be used as the reference channel; or any signal channel can be used as the reference channel. In this embodiment, the preset channel is consistent with the reference channel corresponding to the preset probability distribution table (for example, the reference clock source is used as the reference channel when determining the preset probability distribution table and real-time calibration).

[0141] The channel under test is determined from multiple signal channels.

[0142] In this embodiment, calibration is required for each channel in the test machine. Each signal channel can be selected as the channel under test in sequence, and the reference clock can be used as the reference channel. Each signal channel is calibrated with the reference channel in sequence so that each channel in the test machine is aligned.

[0143] like Figure 2 As shown above, in the above Figure 1 Based on the illustrated embodiment, step 106 may include the following steps:

[0144] Step 1061: Control the first generated signal to perform at least one delay operation to obtain the second generated signal and input it into the channel under test.

[0145] Among them, after the second generated signal is input into the channel under test, the measured signal output by the channel under test has a preset phase difference with the reference signal output by the reference channel.

[0146] Optionally, in this embodiment, the host computer controls at least one type of test board to delay the first generated signal generated by the waveform generation unit. Each delay operation controls the first generated signal to be delayed by a preset delay amount (the delay amount can be time or tap). Through at least one delay, the first generated signal is repeatedly adjusted so that the phase difference between the measured signal and the reference signal is a preset phase difference. Optionally, the preset phase difference can be such that within a certain time period (e.g., within multiple detection cycles), there is a phase of the measured signal that is earlier than the phase of the reference signal, and there is also a phase of the measured signal that is later than the phase of the reference signal.

[0147] In phase detection, a "tap" specifically refers to a signal extraction point designed for phase detection, and it is usually used in conjunction with a delay line. By setting multiple taps on the delay line, signals with different delays (i.e., multi-phase signals) can be obtained from the input signal. For example, when a clock signal passes through a delay line composed of multiple cascaded delay units, the output of each delay unit can act as a tap, outputting a signal that lags behind the original clock by a certain time (corresponding to a specific phase) (such as clocks with phases of 0°, 90°, 180°, and 270°).

[0148] Step 1062: Detect the phase deviation between the measured signal output by the measured channel and the reference signal output by the reference channel, and obtain the phase deviation value.

[0149] Optionally, the phase deviation value can be used to represent the phase relationship between the measured signal and the reference signal. For example, when the phase of the measured signal is later than the phase of the reference signal, the phase deviation value is determined to be positive; when the phase of the measured signal is earlier than the phase of the reference signal, the phase deviation value is determined to be negative.

[0150] Step 1063: Statistically analyze the output results determined based on the phase deviation value within multiple statistical periods to obtain the first statistical result.

[0151] Optionally, in response to a positive phase deviation value, the output result is determined to be the first result; in response to a negative phase deviation value, the output result is determined to be the second result.

[0152] In some optional examples, the first result is a high level, which is converted to a binary expression of level 1; the second result is a low level, which is converted to a binary expression of level 0; in this embodiment, the phase deviation value can be converted into the first and / or second results in binary expression using a phase detector.

[0153] like Figure 3a As shown, the measured signal output by the measured channel is earlier than the reference signal output by the reference channel. At this time, the phase deviation value is negative, and after processing by the phase detector, the output level is 0.

[0154] like Figure 3b As shown, the measured signal output by the measured channel is later than the reference signal output by the reference channel. At this time, the phase deviation value is positive, and after processing by the phase detector, the output level is 1.

[0155] like Figure 3c As shown, within a certain time period, the measured signal output by the measured channel may be earlier than the reference signal or later than the reference signal. In this case, the phase detector does not output a fixed 0 level or 1 level. This situation corresponds to the preset phase difference situation in this embodiment. That is, based on this situation, the first result and the second result are statistically analyzed to obtain the first statistical result. Optionally, the first statistical result is determined based on the quantitative relationship between the first result and the second result within multiple statistical periods.

[0156] Optionally, the first statistical result is the proportion of the first result (level 1) in all results (including the first result and the second result). For example, if the output level is counted over 10 statistical periods, and there are 4 outputs of level 1 and 6 outputs of level 0, then the first statistical result is calculated to be 40%.

[0157] In this embodiment, by repeatedly adjusting the first generated signal corresponding to the channel under test, the measured signal and the reference signal meet the preset conditions. That is, within multiple statistical periods, there are cases where the measured signal is earlier than the reference signal and cases where the measured signal is later than the reference signal. The result output by the phase detector has both high and low levels. This indicates that the phase of the measured channel and the reference channel are relatively close, and the preliminary calibration is completed.

[0158] In some alternative embodiments, step 1061 may include:

[0159] By performing at least one delay operation on the reference clock signal, the first generated signal, which is in the same frequency as the reference clock signal, is delayed to obtain the second generated signal, which is then input into the channel under test.

[0160] Optionally, the delay operation on the reference clock signal can be achieved by inserting a clock delay unit before the waveform generation unit. The method of delaying the reference clock source includes using a delay line chip, a DDS generator for phase interpolation, a PLL phase adjustment, a DLL phase adjustment, a phase interpolation unit of Serdes, and IDelay resources of the FPGA to perform a controllable delay operation on the reference clock source.

[0161] Alternatively, a second generated signal can be obtained by performing at least one delay operation on the first generated signal generated by the waveform generation unit and input into the channel under test.

[0162] Optionally, the generated waveform can be delayed by inserting a waveform delay unit after the waveform generation unit. Since the first generated signal no longer has clock signal characteristics, there are fewer methods to delay the generated waveform compared to delaying the clock. For example, delay line chips or FPGA ODelay resources can be used to delay the generated waveform.

[0163] In this embodiment, at least one delay operation can be performed iteratively. That is, the next delay operation determines the delay amount based on the previous statistical result, so that the phase of the measured signal and the reference signal are closer after each adjustment. When the phase difference between the measured signal and the reference signal meets the preset condition, the proportion of the first result in all results within multiple statistical periods is statistically analyzed to determine the first statistical result. Based on the first statistical result, fine-tuning can be continued to achieve rapid signal alignment.

[0164] like Figure 4 As shown above, in the above Figure 1 Based on the illustrated embodiment, step 108 may include the following steps:

[0165] Step 1081: Match the first statistical result with the preset probability distribution table to determine the initial compensation amount.

[0166] In this embodiment, a preset probability distribution table stores statistical results (the proportion of high level in the output result) corresponding to different delay amounts. At this time, the delay amount corresponding to the first statistical result can be obtained by searching the preset probability distribution table according to the first statistical result, and the delay amount is used as the initial compensation amount corresponding to the channel under test.

[0167] In some optional examples, the preset probability distribution table is represented in the form of a distribution graph, for example, as shown in Figure 5. In this distribution graph, the horizontal axis is the delay amount (time, in ns) corresponding to the channel under test, and the vertical axis is the proportion of the phase detection unit outputting a high level (first result) within a specified time period.

[0168] Step 1082: Determine the target compensation amount based on the difference between the initial compensation amount and the phase alignment target point in the preset probability distribution table.

[0169] Optionally, to better calibrate the channel under test, a phase alignment target point is determined in a preset probability distribution table to align the channel under test with the reference channel. This phase alignment target point is typically selected as the point where the vertical axis (i.e., the proportion of the first result among all results) is 50%. At this point, it can be determined that the phase of the signals output by the channel under test and the reference channel is closest. By comparing the difference between the initial compensation amount and the phase alignment target point on the horizontal axis, the target compensation amount can be obtained. The target compensation amount is used to perform delay processing on the channel under test, so that the phase of the signal output by the channel under test is aligned with the phase of the reference signal output by the reference channel.

[0170] In this embodiment, by compensating the measured signal based on the target compensation amount, the measured signal can be compensated to be aligned with the reference signal, thereby achieving calibration between the measured channel and the reference channel.

[0171] In some alternative embodiments, prior to step 108, the following may also be included:

[0172] Based on the phase relationship between the signals output by the tested channel and the reference channel, a preset probability distribution table is determined.

[0173] In this embodiment, since the phase delay between channels is determined by the channel characteristics, this embodiment uses a preset probability distribution table to assess the channel characteristics. This process is time-consuming but infrequent. A single characteristic scan can be used to perform multiple inter-channel time edge calibrations. During actual channel calibration, the preset probability distribution table can be directly called, improving channel calibration efficiency. Optionally, Figure 5a This is a schematic representation of the preset probability distribution in the channel calibration method of the test machine provided in an exemplary embodiment of this disclosure. For example... Figure 5a As shown, the horizontal axis represents the delay (in time), and the vertical axis represents the proportion of high-level outputs from the phase detection unit in all results within a specified time period. In this preset probability distribution table, segment A means that the phase of the tested channel is earlier than the phase of the reference channel (e.g., as...). Figure 3a As shown), within N statistical periods, the phase detection output is 0; segment B means that the phase of the measured channel is close to the phase of the reference channel (for example, as shown). Figure 3cAs shown), due to jitter, the phase relationship between the tested channel and the reference channel changes over N statistical periods, with the phase detection outputting 0 at times and 1 at others; segment C means that the phase of the tested channel is later than the phase of the reference channel (for example, as shown). Figure 3b As shown in the figure, the phase detection output is 1 within N statistical periods. In order to obtain the characteristics of each channel in the test machine, each channel in each test machine is taken as the channel under test, and a corresponding preset probability distribution table is established. That is, the characteristics of each channel in the test machine are understood, so that the preset probability distribution table corresponding to each channel can be directly called during the real-time calibration process, thereby improving the calibration efficiency of each channel.

[0174] Based on the obtained preset probability distribution table, in order to better align each channel, it is desirable for each tested channel to be aligned with the same point of the reference channel. That is, it is necessary to determine the phase alignment target point in the preset probability distribution table. Optionally, the phase alignment target point can be based on the point with a vertical coordinate of 50% in the preset probability distribution table.

[0175] Optionally, such as Figure 5a As shown, the cumulative distribution function (CDF) curve of the jitter distribution in the phase overlap region between the tested channel and the reference channel obtained by scanning (corresponding to the preset probability distribution table in the above embodiment) is a very ideal model, that is, the jitter is uniformly distributed. Differentiating its CDF curve yields its probability density function (PDF) curve, as shown below. Figure 5b The probability density function curve shown is illustrated (the horizontal axis represents the delay, and the vertical axis represents the probability density). In addition to uniform distributions, various other distribution forms can be encountered during actual product debugging, such as Gaussian-like distributions and bimodal distributions. Figure 5c and Figure 5d This is a schematic diagram of the CDF curve (PDF curve) corresponding to an example Gaussian-like distribution; for example... Figure 5e and Figure 5f This is a schematic diagram of the CDF curve (PDF) corresponding to an example bimodal distribution.

[0176] To find the optimal phase alignment target point, it is easy to see from the probability distribution curve that the position of the 50% area between the probability density function curve and the Y-axis corresponds to the 50% point of the cumulative distribution function curve on the Y-axis, which is the center point of the jitter distribution.

[0177] By controlling the delay unit so that the reference channel and the channel under test are located at the 50% jitter distribution point, it can be ensured that the jitter is evenly distributed on both sides. The two channels achieve optimal alignment, and by recording this point as the optimal alignment target point, fast and optimal matching can be achieved during real-time calibration.

[0178] Figure 6 This is a schematic diagram illustrating the process of establishing a preset probability distribution table in the channel calibration method of a test machine provided in an exemplary embodiment of this disclosure. For example... Figure 6 As shown, it includes:

[0179] Step 601: Control the input of the third generated signal, which is in sync with the reference clock signal, into the reference channel and the channel under test.

[0180] In this embodiment, in order to establish a preset probability distribution table, any channel in the test machine can be selected as the reference channel, and all other channels can be matched and calibrated with the reference channel. By selecting one channel as the channel under test one by one, a preset probability distribution table matching each channel under test with the reference channel can be obtained.

[0181] In this embodiment, any channel in any test board is used as the reference channel, and any channel of the corresponding test board other than the reference channel and any channel of other boards can be used as the channel under test.

[0182] In another embodiment, a reference clock signal can be selected as the reference channel, any channel of any test board can be selected as the channel under test, and all channels under test can be calibrated with reference to the reference channel.

[0183] Step 602: Determine that the initial phase relationship satisfies the preset phase relationship based on the detection signal output by the tested channel and the reference signal output by the reference channel.

[0184] The preset phase relationship is that the phase of the detection signal is earlier than the phase of the reference channel. In this embodiment, the phase of the detection signal is earlier than the phase of the reference signal by delaying the input signal of the channel under test. The corresponding phase detector outputs a fixed 0 level, and the waveform relationship between the corresponding channels is as follows: Figure 3a As shown.

[0185] Step 603: Perform delay processing on the third generated signal of the input test channel at least once, and record the intermediate phase relationship corresponding to each delay processing.

[0186] Optionally, the intermediate phase relationship may include: the phase of the detection signal is earlier than the phase of the reference channel, the phase of the detection signal is similar to the phase of the reference channel, and the phase of the detection signal is later than the phase of the reference channel.

[0187] Since the initial phase relationship is that the phase of the detection signal is earlier than the phase of the reference channel, in order to obtain the complete characteristics of the channel under test, it is also necessary to obtain the delay and output level when the phase of the detection signal is close to the phase of the reference channel, as well as the delay and output level when the phase of the detection signal is later than the phase of the reference channel.

[0188] The delay processing in this embodiment can be the same as the delay processing in the above embodiments. The delay operation on the reference clock signal can be achieved by inserting a clock delay unit before the waveform generation unit; or, the generated waveform can be delayed by inserting a waveform delay unit after the waveform generation unit.

[0189] Step 604: Determine a preset probability distribution table based on at least one delay amount corresponding to at least one delay processing and at least one intermediate phase relationship.

[0190] Optionally, by performing delay processing on the third generated signal of the input test channel, the phase of the detection signal is gradually delayed, gradually transitioning from a detection signal phase earlier than the reference channel phase to a detection signal phase later than the reference channel phase (i.e., from a fixed output level of 0 to a fixed output level of 1). The delay amount and the proportion of 1 level in the output result throughout the process are recorded to obtain a preset probability distribution table (e.g., such as...). Figure 5a (As shown).

[0191] In some alternative embodiments, step 604 may include:

[0192] Determine at least one comparison result value based on at least one intermediate phase relationship.

[0193] Optionally, the intermediate phase relationship between the measured channel and the reference channel is converted by a phase detector to obtain a comparison result value. When the intermediate phase relationship indicates that the phase of the measured channel is earlier than the phase of the reference channel, the phase detector outputs a 0 level. When the intermediate phase relationship indicates that the phase of the measured channel is later than the phase of the reference channel, the phase detector outputs a 1 level.

[0194] Within at least one preset time period, at least one comparison result value is statistically analyzed within the preset time period to obtain at least one statistical probability value.

[0195] Each statistical probability value corresponds to a preset time period. In this embodiment, after each delay processing, the preset time period is maintained, and at least one comparison result value is collected within the preset time period. For example, if n comparison result values ​​are collected within the preset time period, the proportion of 1 level among the n comparison result values ​​can be determined to determine the statistical probability value corresponding to the preset time period (delay amount). For example, in the initial phase relationship, since all comparison result values ​​are 0, the corresponding statistical probability values ​​are all 0% (corresponding to...). Figure 5a (Segment A in the preset probability distribution table shown); After at least one delay, a 1 level begins to appear in the comparison result value, and the statistical probability value obtained at this time corresponds to... Figure 5a The B segment in the preset probability distribution table is shown. Further delaying this will ensure that the phase of the tested channel is always later than the phase of the reference channel. In this case, the output comparison result will be all 1 levels, and the statistical probability value will be 100% (corresponding to...). Figure 5a (Segment C in the preset probability distribution table shown).

[0196] A preset probability distribution table is determined based on at least one statistical probability value and the delay amount corresponding to each statistical probability value.

[0197] This embodiment compares the output results of the channel under test from all 0 levels to all 1 levels. By recording each statistical probability value and its corresponding delay amount during the delay process, a preset probability distribution table can be obtained to display the delay amount and phase distribution characteristics of the channel under test. By pre-storing the preset probability distribution table, the efficiency of real-time calibration is improved, and the phase of the channel under test can be quickly moved to the phase alignment target point by looking up the table, thus achieving rapid phase alignment.

[0198] Any of the image processing methods provided in this disclosure can be executed by any suitable device with data processing capabilities, including but not limited to: terminal devices and servers. Alternatively, any of the image processing methods provided in this disclosure can be executed by a processor, such as by a processor executing any of the image processing methods mentioned in this disclosure by calling corresponding instructions stored in memory. Further details will not be elaborated below.

[0199] Exemplary device

[0200] Figure 7 This is a schematic diagram of the channel calibration device in a test machine provided in an exemplary embodiment of this disclosure. Figure 7 As shown, the system provided in this embodiment includes:

[0201] The channel determination module 71 is used to determine the reference channel and the channel under test in the test machine.

[0202] The signal control module 72 is used to control the input of a first generated signal with the same frequency as the reference clock signal to the reference channel and the channel under test, output a reference signal through the reference channel, and output the signal under test through the channel under test.

[0203] The statistics module 73 is used to adjust the first generated signal input to the channel under test so that the phase deviation between the measured signal and the reference signal meets the preset conditions, and obtain the first statistical result.

[0204] The compensation amount determination module 74 is used to determine the target compensation amount required for the alignment of the tested channel with the reference channel based on the first statistical result and the preset probability distribution table.

[0205] The preset probability distribution table is determined based on the phase relationship between the tested channel and the reference channel.

[0206] The channel calibration device in the testing machine provided in the above embodiments of this disclosure determines a reference channel and a channel under test in the testing machine; controls a first generated signal with the same frequency as the reference clock signal to be input to the reference channel and the channel under test, outputs a reference signal through the reference channel, and outputs a signal under test through the channel under test; by adjusting the first generated signal input to the channel under test, the phase deviation value between the signal under test and the reference signal meets a preset condition, and a first statistical result is obtained; based on the first statistical result and a preset probability distribution table, the target compensation amount required for the alignment of the channel under test and the reference channel is determined. This embodiment of the disclosure achieves preliminary adjustment of the signal of the channel under test by repeatedly adjusting the first generated signal to obtain the first statistical result, and determines the target compensation amount required for the channel based on the preset probability distribution table. Since the preset probability distribution table characterizes the phase relationship between the channel under test and the reference channel, calibration based on this greatly improves the efficiency and accuracy of channel calibration.

[0207] In some optional embodiments, the statistics module 73 includes:

[0208] The delay unit is used to control the first generated signal to perform at least one delay operation to obtain the second generated signal and input it into the channel under test.

[0209] The phase detection unit is used to detect the phase deviation between the measured signal output by the measured channel and the reference signal output by the reference channel, and obtain the phase deviation value.

[0210] The result statistics unit is used to statistically analyze the output results determined based on the phase deviation value within multiple statistical periods to obtain the first statistical result.

[0211] Optionally, the delay unit includes:

[0212] A clock delay unit is used to delay a first generated signal with the same frequency as the reference clock signal by performing at least one delay operation on the reference clock signal, thereby obtaining a second generated signal which is then input into the channel under test; or...

[0213] The waveform delay unit is used to obtain a second generated signal and input it into the channel under test by performing at least one delay operation on the first generated signal.

[0214] Optionally, the result statistics unit is specifically used to determine the output result as the first result in response to a positive phase deviation value; to determine the output result as the second result in response to a negative phase deviation value; and to determine the first statistical result based on the quantitative relationship between the first result and the second result within multiple statistical periods.

[0215] In some optional embodiments, the compensation amount determination module 74 includes:

[0216] The initial compensation unit is used to determine the initial compensation amount by matching the first statistical result with the preset probability distribution table;

[0217] The remaining compensation unit is used to determine the target compensation amount based on the difference between the initial compensation amount and the phase alignment target point in the preset probability distribution table. The target compensation amount is used to perform delay processing on the channel under test so that the phase of the signal under test output by the channel under test is aligned with the phase of the reference signal output by the reference channel.

[0218] In some optional embodiments, the apparatus provided in this embodiment may further include:

[0219] The distributed pre-storage unit is used to determine a preset probability distribution table based on the phase relationship between the signals output by the tested channel and the reference channel.

[0220] Optionally, a distributed pre-storage unit is specifically used to control the input of a third generated signal with the same frequency as the reference clock signal into the reference channel and the channel under test; to determine that the initial phase relationship satisfies the preset phase relationship based on the detection signal output by the channel under test and the reference signal output by the reference channel; the preset phase relationship is that the phase of the detection signal is earlier than the phase of the reference channel; to perform delay processing on the third generated signal input to the channel under test at least once, and to record the intermediate phase relationship corresponding to each delay processing; and to determine a preset probability distribution table based on at least one delay amount corresponding to at least one delay processing and at least one intermediate phase relationship corresponding to it.

[0221] Optionally, when the distributed pre-storage unit determines the preset probability distribution table based on at least one delay amount corresponding to at least one delay processing and at least one intermediate phase relationship, it is used to determine at least one comparison result value based on at least one intermediate phase relationship; to statistically analyze at least one comparison result value within at least one preset time period to obtain at least one statistical probability value; each statistical probability value corresponds to a preset time period; and to determine the preset probability distribution table based on at least one statistical probability value and the delay amount corresponding to each statistical probability value.

[0222] In some optional embodiments, the channel determination module 71 is specifically used to determine a preset channel in the test machine as a reference channel; the test machine includes multiple signal channels and a preset channel; and to determine the channel under test from the multiple signal channels.

[0223] In some optional embodiments, the apparatus provided in this embodiment may further include:

[0224] The channel alignment unit is used to perform delay processing on the channel under test based on the target compensation amount, so that the phase of the measured signal output by the channel under test is aligned with the phase of the reference signal output by the reference channel.

[0225] It should be noted that the specific implementation of the channel calibration device in the test machine of this disclosure embodiment is similar to the specific implementation of the channel calibration method in the test machine of this disclosure embodiment. For details, please refer to the image processing method section. In order to reduce redundancy, it will not be described in detail.

[0226] Exemplary System

[0227] Figure 8a This is a schematic diagram of the channel calibration system in a test machine provided in an exemplary embodiment of this disclosure. Figure 8a As shown, the system provided in this embodiment includes: a main control board 81, at least one type of test board 82, a calibration board 83, and a host computer 84. The main control board 81 is connected to at least one type of test board 82, and each channel of the at least one type of test board 82 is connected to a channel of the calibration board 83. The host computer 84 is connected to at least one type of test board 82 and the calibration board 83.

[0228] The main control board 81 is used to provide a reference clock source to excite the waveform generation unit in the test board 82 to generate a first generated signal with the same frequency as the reference clock source.

[0229] At least one type of test board 82 is used to output multiple first generated signals according to the reference clock source provided by the main control board 81, and to perform delay processing on at least one first generated signal according to the control of the host computer 84. Optionally, the test board 82 includes a waveform generation unit, a clock delay unit, and a waveform delay unit; the clock delay unit is used to delay the clock signal emitted by the reference clock source according to the control of the host computer, for example: using a delay line chip, a DDS generator for phase interpolation, PLL phase adjustment, DLL phase adjustment, the phase interpolation unit of SerDes, or the IDelay resource of the FPGA to perform controllable delay operation on the reference clock source. The waveform delay unit is used to delay the waveform signal generated by the waveform generation unit according to the control of the host computer, for example, using a delay line chip or the ODelay resource of the FPGA to delay the generated waveform. Typically, the clock delay unit and the waveform delay unit choose one to perform delay processing.

[0230] The calibration board 83 receives a first generated signal from at least one type of test board 82 as a reference signal via a reference channel, and receives a delayed signal from the first generated signal from at least one type of test board 82 via at least one tested channel as the tested signal. The phase deviation between the tested signal and the reference signal meets a preset condition. Statistical results are obtained and sent to the host computer 84. Optionally, the calibration board 83 includes a channel selection unit, a phase detection unit, and a statistical unit. The channel selection unit selects a reference channel and a tested channel from multiple channels of the test machine. The phase detection unit detects the phase difference between the reference channel and the tested channel and outputs a high-level or low-level comparison result. The statistical unit performs statistical analysis on the comparison result output by the phase detection unit, obtains statistical results, and sends the statistical results to the host computer.

[0231] The host computer 84 receives the statistical results output by the calibration board 83, obtains at least one target compensation amount according to a preset probability distribution table, and controls the corresponding channel compensation of at least one type of test board 82 based on the at least one target compensation amount. Optionally, the host computer 84 receives the statistical results output by the statistical unit, and controls the corresponding clock delay unit or waveform delay unit in the corresponding test board to perform a delay operation according to the at least one target compensation amount, so as to realize the calibration between the tested channel and the reference channel.

[0232] Figure 8b This is a schematic diagram of the channel calibration system in a test machine provided in another exemplary embodiment of this disclosure. (See diagram below.) Figure 8bAs shown, the system provided in this embodiment includes: a main control board 81, at least one type of test board 82, a calibration board 83, and a host computer 84. The main control board 81 is connected to the at least one type of test board 82 and the calibration board 83, and each channel of the at least one type of test board 82 is connected to a channel of the calibration board 83. The host computer 84 is connected to the at least one type of test board 82 and the calibration board 83.

[0233] The main control board 81 is used to provide a reference clock source to at least one type of test board 82 and calibration board 83; to excite the waveform generation unit in the test board 82 to generate a first generated signal with the same frequency as the reference clock source, and to output the reference clock source to the calibration board 83 to provide a reference channel signal.

[0234] At least one type of test board 82 is used to output multiple first generated signals according to the reference clock source provided by the main control board 81, and to perform delay processing on at least one first generated signal according to the control of the host computer 84.

[0235] The calibration board 83 is used to receive the first generated signal sent by at least one type of test board through several test channels as the reference signal, perform delay processing on the signal after receiving the first generated signal sent by at least one type of test board as the test signal, and obtain the statistical results by satisfying the preset conditions between the phase deviation value between the test signal and the reference signal and sending the statistical results to the host computer.

[0236] The host computer 84 is used to receive the statistical results output by the calibration board, obtain at least one target compensation amount according to the preset probability distribution table, and control the corresponding channel compensation of the at least one type of test board based on the at least one target compensation amount.

[0237] The channel calibration system in the test machine stores a preset probability distribution table on the host computer 84. The calibration board 83 can quickly obtain the phase deviation values ​​between multiple tested channels and the reference channel, obtain statistical results, and upload the statistical results to the host computer 84. Based on the preset probability distribution table and the statistical results corresponding to each tested channel, the host computer 84 obtains the target compensation amount corresponding to each tested channel, that is, quickly performs channel compensation based on the target compensation amount, thereby quickly realizing multi-channel compensation and improving the single-channel calibration time.

[0238] Exemplary electronic devices

[0239] Below, for reference Figure 9 This describes an electronic device according to embodiments of the present disclosure. The electronic device may be either or both of a first device and a second device, or a standalone device independent of them, which may communicate with the first device and the second device to receive acquired input signals from them.

[0240] Figure 9A block diagram of an electronic device according to an embodiment of the present disclosure is shown.

[0241] like Figure 9 As shown, the electronic device includes one or more processors and memory.

[0242] A processor can be a central processing unit (CPU) or other form of processing unit with data processing and / or instruction execution capabilities, and can control other components in an electronic device to perform desired functions.

[0243] The memory can store one or more computer program products, and the memory can include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program products can be stored on the computer-readable storage medium, and the processor can run the computer program products to implement the channel calibration methods and / or other desired functions in the test machines of the various embodiments of this disclosure described above.

[0244] In one example, the electronic device may also include input devices and output devices, which are interconnected via a bus system and / or other forms of connection mechanism (not shown).

[0245] In addition, the input device may also include, for example, a keyboard, a mouse, etc.

[0246] This output device can output various information to the outside, including determined distance information, direction information, etc. The output device may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0247] Of course, for the sake of simplicity, Figure 9 Only some of the components of the electronic device relevant to this disclosure are shown, omitting components such as buses, input / output interfaces, etc. In addition, the electronic device may include any other suitable components depending on the specific application.

[0248] In addition to the methods and apparatus described above, embodiments of this disclosure may also be computer program products comprising computer program instructions that, when executed by a processor, cause the processor to perform the steps of the channel calibration methods in the test machine according to various embodiments of this disclosure as described in the foregoing portion of this specification.

[0249] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this disclosure. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on a user's computing device, partially on a user's computing device, as a standalone software package, partially on a user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0250] Furthermore, embodiments of this disclosure may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps in the channel calibration methods in the test machine according to various embodiments of this disclosure as described in the foregoing portion of this specification.

[0251] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0252] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.

[0253] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For system embodiments, since they largely correspond to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0254] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0255] The methods and apparatus of this disclosure may be implemented in many ways. For example, they may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order of steps for the methods is for illustrative purposes only, and the steps of the methods of this disclosure are not limited to the order specifically described above unless otherwise specifically stated. Furthermore, in some embodiments, this disclosure may also be implemented as a program recorded on a recording medium, the program including machine-readable instructions for implementing the methods according to this disclosure. Thus, this disclosure also covers recording media storing programs for performing the methods according to this disclosure.

[0256] It should also be noted that in the apparatus, devices, and methods of this disclosure, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions to this disclosure.

[0257] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0258] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.

Claims

1. A method of lane timing calibration in a test machine, characterized by, include: Determine the reference channel and the channel under test in the testing machine; A first generated signal, which is in the same frequency as the reference clock signal, is input to the reference channel and the channel under test. A reference signal is output through the reference channel, and a signal under test is output through the channel under test. By adjusting the first generated signal input to the channel under test, the phase deviation between the signal under test and the reference signal is made to meet the preset condition, and a first statistical result is obtained. The preset condition is that the phase deviation between the measured signal and the reference signal has both positive and negative values ​​within multiple statistical periods; In response to a positive phase deviation value, the output result is determined to be a first result; in response to a negative phase deviation value, the output result is determined to be a second result; based on the quantitative relationship between the first result and the second result within the multiple statistical periods, the first statistical result is determined. Based on the first statistical results and the preset probability distribution table, the target compensation amount required for the alignment of the tested channel with the reference channel is determined; wherein, the preset probability distribution table is determined based on the phase relationship between the tested channel and the reference channel; Determining the preset probability distribution table includes: controlling a third generated signal with the same frequency as the reference clock signal to be input into the reference channel and the channel under test; performing delay processing on the third generated signal input to the channel under test, gradually delaying the phase of the detection signal backward, gradually transitioning from the phase of the detection signal being earlier than the phase of the reference channel to the phase of the detection signal being later than the phase of the reference channel, recording the delay amount of each delay and the proportion of the number of times the phase of the channel under test is later than the phase of the reference channel within each preset delay time period, to obtain the preset probability distribution table; Determining the target compensation amount includes: matching the first statistical result with the preset probability distribution table to determine the initial compensation amount; determining the target compensation amount based on the difference between the initial compensation amount and the delay amount corresponding to the phase alignment target point in the preset probability distribution table; the phase alignment target point is the point where the first result accounts for 50% of all results.

2. The method of claim 1, wherein, The step of adjusting the first generated signal input to the channel under test to make the phase deviation between the signal under test and the reference signal meet a preset condition, and obtaining a first statistical result, includes: The first generated signal is controlled to perform at least one delay operation to obtain a second generated signal, which is then input into the channel under test. The phase deviation between the measured signal output by the measured channel and the reference signal output by the reference channel is detected to obtain the phase deviation value; The first statistical result is obtained by analyzing the output results determined based on the phase deviation value over multiple statistical periods.

3. The method of claim 2, wherein, The step of controlling the first generated signal to perform at least one delay operation to obtain a second generated signal and inputting it into the channel under test includes: By performing at least one delay operation on the reference clock signal, the first generated signal, which has the same frequency as the reference clock signal, is delayed to obtain the second generated signal, which is then input into the channel under test; or... The second generated signal is obtained by performing at least one delay operation on the first generated signal and then input into the channel under test.

4. The method according to any of claims 1 to 3, characterized in that, Before determining the target compensation amount required to align the tested channel with the reference channel based on the first statistical results and the preset probability distribution table, the method further includes: The preset probability distribution table is determined based on the phase relationship between the signals output by the tested channel and the reference channel.

5. The method of claim 4, wherein, The step of determining the preset probability distribution table based on the phase relationship between the signals output by the tested channel and the reference channel further includes: Based on the detection signal output by the tested channel and the reference signal output by the reference channel, it is determined that the initial phase relationship satisfies a preset phase relationship; the preset phase relationship is that the phase of the detection signal is earlier than the phase of the reference channel.

6. The method of claim 5, wherein, The process records the delay amount for each delay and the percentage of times the phase of the tested channel lags behind the phase of the reference channel within each preset delay time period, resulting in a preset probability distribution table, including: The intermediate phase relationship between the measured channel and the reference channel is converted by a phase detector to obtain a comparison result value; wherein, the intermediate phase relationship indicates that the phase of the measured channel is earlier or later than the phase of the reference channel, and the comparison result value represents the output level of the phase detector; Within at least one preset time period, at least one comparison result value is statistically analyzed within the preset time period to obtain at least one statistical probability value; each statistical probability value corresponds to one preset time period; the statistical probability value represents the proportion of the number of phases of the tested channel that are later than the phases of the reference channel within each preset time period of delay; The preset probability distribution table is determined based on the at least one statistical probability value and the delay amount corresponding to each statistical probability value.

7. The method of any one of claims 1-3, wherein, The determination of the reference channel and the channel under test in the testing machine includes: A preset channel in the test machine is designated as the reference channel; the test machine includes multiple signal channels and the preset channel. The channel under test is determined from the plurality of signal channels; The preset channel can be any signal channel or a reference clock input channel.

8. In a test machine, an apparatus for calibrating pass timing, comprising: include: The channel determination module is used to determine the reference channel and the channel under test in the test machine; The signal control module is used to control the input of a first generated signal with the same frequency as the reference clock signal to the reference channel and the channel under test, output a reference signal through the reference channel, and output a signal under test through the channel under test; The statistical module is used to adjust the first generated signal input to the channel under test so that the phase deviation between the signal under test and the reference signal meets a preset condition, thereby obtaining a first statistical result. The preset condition is that the phase deviation between the measured signal and the reference signal has both positive and negative values ​​within multiple statistical periods; The statistical module is specifically configured to determine the output result as a first result in response to a positive phase deviation value; determine the output result as a second result in response to a negative phase deviation value; and determine the first statistical result based on the quantitative relationship between the first result and the second result within the multiple statistical periods. The compensation amount determination module is used to determine the target compensation amount required for aligning the tested channel with the reference channel based on the first statistical results and a preset probability distribution table; wherein the preset probability distribution table is determined based on the phase relationship between the tested channel and the reference channel; Determining the preset probability distribution table includes: controlling a third generated signal with the same frequency as the reference clock signal to be input into the reference channel and the channel under test; performing delay processing on the third generated signal input to the channel under test, gradually delaying the phase of the detection signal backward, gradually transitioning from the phase of the detection signal being earlier than the phase of the reference channel to the phase of the detection signal being later than the phase of the reference channel, recording the delay amount of each delay and the proportion of the number of times the phase of the channel under test is later than the phase of the reference channel within each preset delay time period, to obtain the preset probability distribution table; The compensation amount determination module includes: An initial compensation unit is used to determine the initial compensation amount by matching the first statistical result with the preset probability distribution table. The remaining compensation unit is used to determine the target compensation amount based on the difference between the initial compensation amount and the phase alignment target point in the preset probability distribution table; the phase alignment target point is the point where the first result accounts for 50% of all results.

9. A channel timing calibration system, characterized by, The channel timing calibration method of the test machine according to any one of claims 1-7 includes: a main control board, at least one type of test board, a calibration board, and a host computer; the main control board is connected to the at least one type of test board, each channel of the at least one type of test board is connected to a channel of the calibration board, and the host computer is connected to the at least one type of test board and the calibration board; The main control board is used to provide a reference clock source; The at least one type of test board is used to output multiple first generated signals according to the reference clock source provided by the main control board, and to perform delay processing on at least one first generated signal according to the control of the host computer. The calibration board is used to receive the first generated signal sent by the at least one type of test board as a reference signal through a reference channel, and to receive the signal after delay processing of the first generated signal sent by the at least one type of test board as a test signal through at least one test channel. The phase deviation value between the test signal and the reference signal meets a preset condition, and statistical results are obtained and sent to the host computer. The host computer is used to receive the statistical results output by the calibration board, obtain at least one target compensation amount according to a preset probability distribution table, and control the corresponding channel compensation of the at least one type of test board based on the at least one target compensation amount.

10. A channel timing calibration system, characterized by, The channel timing calibration method of the test machine according to any one of claims 1-7 includes: a main control board, at least one type of test board, a calibration board, and a host computer; the main control board is connected to the at least one type of test board and the calibration board, each channel of the at least one type of test board is connected to a channel of the calibration board, and the host computer is connected to the at least one type of test board and the calibration board; The main control board is used to provide a reference clock source to the at least one type of test board and the calibration board; The at least one type of test board is used to output a plurality of first generated signals according to the reference clock source provided by the main control board, and to perform delay processing on at least one of the first generated signals according to the control of the host computer. The calibration board is used to receive the first generated signal sent by the at least one type of test board as a reference signal through at least one test channel, perform delay processing on the signal, and use the phase deviation between the test signal and the reference signal as a preset condition to obtain statistical results and send the statistical results to the host computer. The host computer is used to receive the statistical results output by the calibration board, obtain at least one target compensation amount according to a preset probability distribution table, and control the corresponding channel compensation of the at least one type of test board based on the at least one target compensation amount.

11. An electronic device, comprising: include: Memory, used to store computer program products; A processor is configured to execute a computer program product stored in the memory, wherein when the computer program product is executed, it implements the channel timing calibration method in the test machine according to any one of claims 1-7.

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