多核异构ASIC计算主板的能耗监测方法及系统
By constructing a structured feature set and aligning it with the instruction architecture, and combining it with a power consumption inference model, high-precision power consumption monitoring of multi-core heterogeneous ASIC computing motherboards was achieved. This solved the problem of weak abnormal power consumption identification capability in traditional methods and improved the efficiency of power consumption analysis and abnormal response.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN CITY MAIDIJIE ELECTRONICS TECH
- Filing Date
- 2025-09-18
- Publication Date
- 2026-07-17
AI Technical Summary
Traditional energy consumption monitoring methods for multi-core systems have a weak ability to identify abnormal power consumption in multi-core heterogeneous systems, especially in situations involving complex task scheduling, high-frequency context switching, and multi-dimensional load coupling, where it is difficult to effectively identify power consumption anomalies.
By acquiring execution data from multi-core heterogeneous ASIC computing motherboards, a structured feature set is constructed and aligned with the instruction architecture. Energy-sensitive paths and key execution segments are extracted, and encoding vectors are generated. A structured power consumption inference model is used to perform high-precision power consumption prediction modeling. Combined with aggregated analysis of core, time, and task dimensions, abnormal power consumption locations are identified.
It enables full-process, hierarchical, and refined energy consumption monitoring of multi-core heterogeneous platforms, improves power consumption analysis capabilities and anomaly response efficiency, and addresses the problem of weak anomaly power consumption identification capabilities in traditional methods.
Smart Images
Figure CN121233433B_ABST