A simulation model of a hybrid circuit without interpolation and its construction method based on accurate zero-sequence impedance

Abstract

This invention belongs to the field of power system simulation technology and discloses an interpolation-free hybrid line simulation model with accurate zero-sequence impedance and its construction method. The model includes a decoupling module, a parallel compensation module, and a series synthesis module. The decoupling module is used to make the electromagnetic propagation delay time equal to the simulation step size of the simulation program, achieving interpolation-free calculation decoupling at both ends of the line. The parallel compensation module is used to compensate for the introduced additional parallel susceptance and the phase-to-phase capacitance introduced into the original physical model of the line. The series synthesis module is used to synthesize the remaining series impedance of the line so that the total series positive-sequence impedance and zero-sequence impedance of the equivalent model match the preset target value at the fundamental frequency. This invention can provide interpolation-free calculation decoupling for short lines and accurately simulate the full sequence of network parameters, including the zero-sequence component, thus well meeting the needs of high-fidelity parallel simulation of modern distribution networks.

Description

Technical Field

[0001] This invention relates to the field of power system simulation technology, and in particular to a precise zero-sequence impedance-free interpolation-free hybrid line simulation model and its construction method. Background Technology

[0002] Electromagnetic transient (EMT) simulation is a core tool for analyzing the rapid dynamic characteristics of modern power systems. With the proliferation of inverter interface resources (IBRs) and the increasing complexity of systems, higher demands are placed on the accuracy and computational speed of EMT simulations. Parallel computing and hardware-in-the-loop (HIL) real-time simulation have become key technologies to meet these requirements.

[0003] In parallel EMT simulations, a core challenge is effective network decoupling, and transmission line models play a crucial role in this process. The Bergeron model, due to the characteristics of its traveling wave equations, can naturally decouple the two ends of the line, making it the preferred model for long-distance transmission lines. However, in distribution networks, the physical propagation delay of many lines is much smaller than the fixed simulation step size (e.g., 50 μs) in parallel or real-time simulations. In this case, the traditional Bergeron model must employ interpolation algorithms or sub-step calculations, which significantly reduces computational efficiency and may introduce numerical errors.

[0004] To address this issue, existing technologies have proposed several hybrid models. For example, some literature suggests a segmented propagation delay model, dividing the line into a delay section and a compensation section to achieve decoupling. However, these methods typically use a single mode (such as the positive-sequence mode) as a benchmark to unify the propagation delay, which leads to severe distortion of other mode parameters, particularly zero-sequence impedance. In asymmetric fault analysis (such as the most common single-phase-to-ground fault), the accuracy of zero-sequence impedance is crucial. Distortion of zero-sequence impedance severely affects the accuracy of fault analysis, consequently impacting the testing and verification of protective relays and control systems, which is unacceptable in engineering applications.

[0005] Therefore, there is an urgent need in this field for a new line simulation model that can provide computational decoupling for short lines without interpolation, and can accurately simulate the full sequence of network parameters, including zero-sequence components, to meet the needs of high-fidelity parallel simulation of modern distribution networks. Summary of the Invention

[0006] This invention provides a simulation model of a hybrid line without interpolation and a method for constructing it with accurate zero-sequence impedance, in order to solve the problems mentioned above in the prior art.

[0007] According to a first aspect of the present invention, a simulation model of a hybrid circuit without interpolation for accurate zero-sequence impedance is provided, comprising a decoupling module, a parallel compensation module, and a series synthesis module connected in series in an electromagnetic transient simulation program;

[0008] Among them, the decoupling module is used to adjust the unit length parallel capacitance parameter of the traveling wave unit in the uncoupled single-phase Begeron unit so that the electromagnetic propagation delay time is equal to the simulation step size of the simulation program, thereby realizing decoupling of the two ends of the line without interpolation calculation.

[0009] The core function of the decoupling module is to achieve computational decoupling at both ends of the line. It is a Bergeron model with modified parameters, whose propagation delay is artificially set to be equal to the simulation step size, thereby eliminating the need for interpolation.

[0010] The parallel compensation module is used to connect in parallel with the decoupling module to compensate for the additional parallel susceptance introduced by the decoupling module due to parameter modification, as well as the phase-to-phase capacitance introduced into the original physical model of the line.

[0011] The core function of the parallel compensation module is to correct the parallel parameter deviation introduced by the decoupling module. It uses lumped elements to offset the excess ground susceptance introduced by the decoupling module and to replenish the phase-to-phase capacitance of the original line.

[0012] The series synthesis module is used to connect in series with the decoupling module to synthesize the remaining series impedance of the line so that the total series positive sequence impedance and zero sequence impedance of the equivalent model match the preset target value at the fundamental frequency.

[0013] The core function of the series synthesis module is to accurately match the series impedance of the circuit. It is a carefully designed passive RL network used to make up for the series resistance and inductance that the decoupling module failed to represent, ensuring that the positive sequence and zero sequence series impedance of the entire model are completely consistent with the physical circuit at the fundamental frequency.

[0014] Furthermore, the decoupling module is built on uncoupled single-phase Bergeron units, and each phase is modeled as an independent and uncoupled circuit.

[0015] The equivalent unit length inductance of the decoupling module is determined based on the original positive sequence inductance of the line, the line length, and the correction factor, while the equivalent unit length capacitance of the decoupling module is determined based on the equivalent unit length inductance and the simulation step size.

[0016] Furthermore, the expression for the equivalent unit length inductance of the decoupling module is:

[0017] L′ b =kL1 / l

[0018] The expression for the equivalent unit length capacitance of the decoupling module is:

[0019]

[0020] In the formula, L′ bThe equivalent unit length inductance is represented by k, the correction factor is represented by L1, the original positive sequence inductance of the line is represented by l, and the line length is represented by C′. b Δt represents the equivalent unit length capacitance, and Δt represents the simulation step size.

[0021] Furthermore, the parallel compensation module includes parallel inductors and parallel capacitors;

[0022] Among them, the parallel inductor is used to compensate for the capacitive component introduced by the decoupling module that exceeds the original self-capacitance of the line to ground; the parallel capacitor is used to realize the original phase-to-phase mutual capacitance of the line.

[0023] Furthermore, the expression for the inductance value of the parallel inductor is:

[0024]

[0025] The expression for the capacitance of a parallel capacitor is:

[0026]

[0027] In the formula, ΔL represents the inductance of the parallel inductor, ω represents the system angular frequency, and ΔC... s C represents the capacitive component of the original self-capacitance to ground. m The values ​​represent the capacitance of the parallel capacitors. C1 represents the original positive-sequence capacitance of the line, and C0 represents the original zero-sequence capacitance of the line.

[0028] Furthermore, the target positive-sequence series impedance and the target zero-sequence series impedance of the series synthesis module are determined based on the original impedance parameters of the line and the impedance ratio occupied by the decoupling module.

[0029] The original impedance parameters of the line include the original positive sequence resistance, the original positive sequence inductance, the original zero sequence resistance, and the original zero sequence inductance.

[0030] Furthermore, the expression for the target positive-sequence series impedance of the series synthesis module is:

[0031] Z S1 =R1+jω(1-k)L1

[0032] The expression for the target zero-sequence series impedance of the series synthesis module is:

[0033] Z S0 =R0+jω(L0-kL1)

[0034] In the formula, Z S1 R1 represents the target positive-sequence series impedance, j represents the original positive-sequence resistance of the line, and Z represents the imaginary unit. S0 R0 represents the target zero-sequence series impedance, L0 represents the original zero-sequence resistance of the line, and L0 represents the original zero-sequence inductance of the line.

[0035] Furthermore, the series synthesis module is a two-port network consisting of a number of parallel RL branches, and the resistance and inductance parameters of each RL branch are determined according to the target positive-sequence series impedance and the target zero-sequence series impedance.

[0036] Furthermore, the series synthesis module is a two-port network, and the two-port network consists of three sets of parallel RL branches;

[0037] The first group of parallel RL branches is used to connect the same-name phase terminals of the first port and the second port respectively. The resistance value of the first group of parallel RL branches is a, and the inductance value is b.

[0038] The second set of parallel RL branches is used to connect each phase terminal of the first port and the two different phase terminals of the second port respectively. The resistance value of the second set of parallel RL branches is c, and the inductance value is d.

[0039] The third group of parallel RL branches is used to connect different phase terminals of the first port and different phase terminals of the second port respectively. The resistance value of the third group of parallel RL branches is -c and the inductance value is -d.

[0040] The expressions for resistance and inductance are:

[0041]

[0042] In the formula, R S1 R S0 Let X represent the real parts of the target positive-sequence series impedance and the target zero-sequence series impedance, respectively. S1 X S0 These represent the imaginary parts of the target positive-sequence series impedance and the target zero-sequence series impedance, respectively.

[0043] According to a second aspect of the present invention, a method for constructing a simulation model of a hybrid line without interpolation and with accurate zero-sequence impedance is provided, the method comprising the following steps:

[0044] S1. Based on the functional complementarity requirements of non-interpolation line simulation, the equivalent model of the line is divided into a series-connected decoupling module, a parallel compensation module, and a series synthesis module.

[0045] S2. Based on the original positive sequence inductance and simulation step size of the line, calculate the equivalent unit length inductance and capacitance required to make the propagation delay time equal to the simulation step size, and construct a decoupling module based on the equivalent unit length inductance and capacitance.

[0046] S3. Based on the capacitance component of the original self-capacitance to ground, the original positive sequence capacitance and zero sequence capacitance of the line, calculate the additional parallel susceptance introduced by the decoupling module and the parallel inductors and parallel capacitors required to introduce the original phase-to-phase capacitance. Construct the parallel compensation module based on the calculation results.

[0047] S4. Based on the original impedance parameters of the line and the impedance ratio occupied by the decoupling module, determine the target positive-sequence series impedance and the target zero-sequence series impedance that the series synthesis module needs to compensate, and construct a passive RL network to achieve the target positive-sequence series impedance and the target zero-sequence series impedance.

[0048] The technical solutions provided by the embodiments of the present invention may include the following beneficial effects:

[0049] 1) High precision: The interpolation-free hybrid circuit simulation model of this invention ensures that its positive-sequence and zero-sequence series impedances at the fundamental frequency are perfectly matched with the lumped parameter model used as a reference through a dedicated series synthesis section. This overcomes the fatal flaw of existing hybrid models in zero-sequence parameter distortion under asymmetric faults, and significantly improves simulation fidelity.

[0050] 2) High efficiency: By forcibly setting the propagation delay of the decoupling part to the simulation step size, the interpolation-free hybrid line simulation model of the present invention completely eliminates the dependence on the interpolation algorithm, retains the efficient computational decoupling capability of the Bergeron model, and is very suitable for parallel and real-time simulation of large-scale power grids.

[0051] 3) Practicality: The three-segment series architecture proposed in this invention has a clear functional division, separating the decoupling function from the parameter compensation function, making it easy to implement and parameterize. This model provides a practical and high-precision engineering tool for solving the problem of the difficulty in parallelizing a large number of short lines in the distribution network.

[0052] 4) The interpolation-free hybrid line simulation model of the present invention can provide computational decoupling for short lines without interpolation, and can accurately simulate the full sequence network parameters including zero-sequence components, thus well meeting the needs of high-fidelity parallel simulation of modern distribution networks.

[0053] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description

[0054] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0055] Figure 1 This is a schematic diagram illustrating a segmented representation of line series impedance according to an exemplary embodiment;

[0056] Figure 2 This is a schematic diagram of the structure of a simulation model of a hybrid circuit without interpolation, based on an exemplary embodiment.

[0057] Figure 3 This is a schematic diagram illustrating an uncoupled single-phase Bergeron (UPB) unit and its equivalent relationship with the lumped π model according to an exemplary embodiment;

[0058] Figure 4 This is a simplified system structure diagram used in Example 1;

[0059] Figure 5 This is a comparison diagram of the short-circuit current waveform of phase A under a single-phase ground fault in Example 1;

[0060] Figure 6 This is a comparison diagram of the short-circuit current waveform of phase A under a three-phase ground fault in Example 1;

[0061] Figure 7 This is a structural diagram of the improved IEEE 33-node power distribution system used in Example 2;

[0062] Figure 8 This is a comparison diagram of the phase A voltage waveform of bus 5 when a phase-to-phase fault occurs on bus 17 in Example 2;

[0063] Figure 9 This is a comparison diagram of the A-phase current waveforms of branch 0-1 when a phase-to-phase fault occurs on bus 17 in Example 2. Detailed Implementation

[0064] The following description and accompanying drawings fully illustrate specific embodiments described herein to enable those skilled in the art to practice them. Some portions and features of certain embodiments may be included in or replace portions and features of other embodiments. The scope of the embodiments herein includes the entire scope of the claims and all available equivalents thereof. The various embodiments described herein are presented in a progressive manner, with each embodiment focusing on its differences from other embodiments; similar or identical parts between embodiments can be referred to interchangeably.

[0065] The modules in the apparatus or system of this application can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0066] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0067] According to one aspect of the present invention, a simulation model of a hybrid circuit without interpolation for accurate zero-sequence impedance is provided, comprising a decoupling module, a parallel compensation module and a series synthesis module connected in series in an electromagnetic transient simulation program;

[0068] Among them, the decoupling module is a Bergeron traveling wave model unit with modified parameters. By adjusting the parallel capacitance parameter per unit length, the electromagnetic wave propagation delay time of the module is made exactly equal to the simulation step size of the simulation program, thereby realizing the decoupling of the two ends of the line without interpolation calculation.

[0069] Specifically, the decoupling module is constructed based on uncoupled single-phase Bejeron units (UPBs), where each phase is modeled as an independent and uncoupled circuit. The equivalent unit length inductance of the decoupling module is determined based on the original positive sequence inductance of the line, the line length, and a correction factor (a factor less than 1). The equivalent unit length capacitance of the decoupling module is determined based on the equivalent unit length inductance and the simulation step size to satisfy the condition that the propagation delay time equals the simulation step size.

[0070] The expression for the equivalent unit length inductance of the decoupling module is:

[0071] L′ b =kL1 / l

[0072] The expression for the equivalent unit length capacitance of the decoupling module is:

[0073]

[0074] In the formula, L′ b The equivalent unit length inductance is represented by k, the correction factor is represented by L1, the original positive sequence inductance of the line is represented by l, and the line length is represented by C′. b Δt represents the equivalent unit length capacitance, and Δt represents the simulation step size.

[0075] The parallel compensation module is a lumped parameter network connected in parallel with the decoupling module. It is used to compensate for the artificially added parallel susceptance introduced by the decoupling module due to parameter modification, and to introduce the phase-to-phase capacitance in the original physical model of the line.

[0076] Specifically, the parallel compensation module includes a parallel inductor L and a parallel capacitor C; wherein, the parallel inductor is used to compensate for the capacitive component introduced by the decoupling module that exceeds the original self-capacitance of the line to ground; and the parallel capacitor is used to realize the original phase-to-phase mutual capacitance of the line.

[0077] The expression for the inductance value of a parallel inductor is:

[0078]

[0079] The expression for the capacitance of a parallel capacitor is:

[0080]

[0081] In the formula, ΔL represents the inductance of the parallel inductor, ω represents the system angular frequency, and ΔC... s C represents the capacitive component of the original self-capacitance to ground. m The values ​​represent the capacitance of the parallel capacitors. C1 represents the original positive-sequence capacitance of the line, and C0 represents the original zero-sequence capacitance of the line.

[0082] The series synthesis module, which is a passive RL network, is connected in series with the decoupling module to synthesize the remaining series impedance of the line, so that the total series positive sequence impedance and zero sequence impedance of the equivalent model are completely matched with the preset target value at the fundamental frequency.

[0083] Specifically, the target positive-sequence series impedance and the target zero-sequence series impedance of the series synthesis module are determined based on the original impedance parameters of the line and the impedance ratio occupied by the decoupling module; wherein, the original impedance parameters of the line include the original positive-sequence resistance, the original positive-sequence inductance, the original zero-sequence resistance, and the original zero-sequence inductance of the line.

[0084] The expression for the target positive-sequence series impedance of the series synthesis module is:

[0085] Z S1 =R1+jω(1-k)L1

[0086] The expression for the target zero-sequence series impedance of the series synthesis module is:

[0087] Z S0 =R0+jω(L0-kL1)

[0088] In the formula, Z S1 R1 represents the target positive-sequence series impedance, j represents the original positive-sequence resistance of the line, and Z represents the imaginary unit. S0 R0 represents the target zero-sequence series impedance, L0 represents the original zero-sequence resistance of the line, and L0 represents the original zero-sequence inductance of the line.

[0089] Specifically, the series synthesis module is a two-port network consisting of 15 parallel RL branches, and the resistance and inductance parameters of each RL branch are determined according to the target positive-sequence series impedance and the target zero-sequence series impedance.

[0090] A method for constructing a simulation model of a hybrid line without interpolation based on precise zero-sequence impedance according to another embodiment of the present invention includes the following steps:

[0091] S1. Model structure division: Based on the functional complementarity requirements of non-interpolation line simulation, the equivalent line model is divided into a series-connected decoupling module, a parallel compensation module, and a series synthesis module.

[0092] S2. Decoupling module parameter calculation: Based on the original positive sequence inductance and simulation step size of the line, calculate the equivalent unit length inductance and capacitance required to make the propagation delay time equal to the simulation step size, and construct the decoupling module according to the equivalent unit length inductance and capacitance.

[0093] S3. Parallel compensation module parameter calculation: Based on the capacitive component of the original self-capacitance to ground, the original positive sequence capacitance and zero sequence capacitance of the line, calculate the additional parallel susceptance introduced by the decoupling module and the parallel inductors and parallel capacitors required to introduce the original phase-to-phase capacitance. Construct the parallel compensation module based on the calculation results.

[0094] S4. Calculation and Construction of Series Synthesis Module Parameters: Based on the original impedance parameters of the line and the impedance ratio occupied by the decoupling module, determine the target positive-sequence series impedance and target zero-sequence series impedance that the series synthesis module needs to compensate, and construct a passive RL network to achieve the target positive-sequence series impedance and target zero-sequence series impedance.

[0095] To facilitate understanding of the above technical solutions of the present invention, the following further describes the above technical solutions of the present invention from the perspectives of architecture and principle, as follows:

[0096] In electromagnetic transient simulation (EMTP) of power systems, accurate calculation and simulation of line parameters, especially zero-sequence parameters, are crucial. However, for users of system-level EMTP, the line parameters typically available include: line length, positive-sequence resistance, positive-sequence inductance, positive-sequence capacitance, zero-sequence resistance, zero-sequence inductance, and zero-sequence capacitance. Based on this, the simulation model in this paper uses a three-phase symmetrical matrix as its foundation, aiming to achieve decoupling of short lines while ensuring consistency between the sequence impedance and the lumped parameter model.

[0097] The Bergeron model faces significant challenges in short-circuit simulations. Due to insufficient line length, it is difficult to meet the basic assumptions of the Bergeron model. A common approach is to increase the capacitance to ground by connecting an inductor in parallel on the outside of the Bergeron model to offset the effect of the additional capacitance. This method works for positive-sequence parameters, but it is inaccurate for simulating zero-sequence parameters. Furthermore, after phase-to-mode transformation, the delay of the zero-sequence segment in the Bergeron model is inconsistent with that of the positive and negative sequences. Considering both improving computational efficiency and reducing interpolation errors, this invention cleverly configures the parameters so that the delay of the three-phase Bergeron model is exactly equal to the simulation step size.

[0098] The theoretical basis of this invention is Figure 1 The sequence impedance segmentation model shown is based on calculated segments, not segments in the actual physical sense. Figure 1 The configuration consists of two segments, A and B. Assume the phase-to-phase impedances of segments A and B are Z and Z, respectively. ma and Z mbThe impedances to ground of segments A and B are respectively Z sa and Z sb The following equation exists:

[0099]

[0100] After converting the equation to 012 order components, we get:

[0101]

[0102] Where: Z0 = Z sa +2Z ma +Z sb +2Z mb Z1 = Z2 = Z sa -Z ma +Z sb -Z mb ;

[0103] In the formula, ΔV A ΔV B ΔV C I represents the voltage difference between each phase at both ends. A I B I C Let V0, V1, and V2 represent the current of each phase, respectively; let ΔV0, ΔV1, and ΔV2 represent the voltage differences of each sequence across the terminals, respectively; let I0, I1, and I1 represent the current of each sequence, respectively; and let Z0, Z1, and Z2 represent the impedance of each sequence.

[0104] The above derivation leads to the conclusion that the line is composed of several segments connected in series. As long as the sum of the positive and zero sequences remains constant, the impedance ratio of each segment can be adjusted.

[0105] Therefore, this invention proposes an interpolation-free hybrid transmission line simulation model (HB-π-ZIM) with accurate zero-sequence impedance. The core idea is to represent a short transmission line as three functionally independent computational modules connected in series. First, to achieve efficient decoupled computation for short lines, the model adopts a segmented series architecture, with each segment optimized for specific parameter characteristics. Second, considering the importance of asymmetric fault analysis in distribution networks, the model pays particular attention to the accurate handling of zero-sequence impedance. Finally, to ensure computational efficiency, the model rationally configures parameters to ensure that the computation of the decoupled segments precisely matches the simulation step size, thereby reducing interpolation operations, lowering computational overhead, and reducing the overhead of phase-to-mode transformation.

[0106] like Figure 2As shown, the model is divided into three complementary modules: a decoupling module, a parallel compensation module, and a series synthesis module. The decoupling module sets an additional capacitance to ground to match the line delay with the simulation step size, reducing the error caused by interpolation calculation and lowering the computational complexity. The parallel compensation module introduces an inductor to ground to offset the additional capacitance, and also includes interphase capacitance to ensure the accuracy of positive and negative sequence parameters. The series synthesis module is designed as a multi-branch resistor-inductor parallel structure, thereby achieving effective coupling correction of positive and zero sequence impedance.

[0107] 1) Construction of the decoupling module:

[0108] Since the line length is finite, its natural propagation delay is usually much smaller than the simulation step size. Therefore, increasing the capacitance to ground increases the delay of the Bergeron model, making it equal to the simulation step size. In other words, the purpose of this module is to use the traveling wave characteristics of the Bergeron model to achieve computational decoupling at both ends of the line, and at the same time, to make its propagation delay exactly equal to the simulation step size by modifying the parameters, thereby avoiding interpolation.

[0109] The uncoupled single-phase Bergeron (UPB) unit was used during construction (e.g., Figure 3 The approach (as shown) is based on the idea that each phase is modeled independently, with no mutual inductance or capacitance. Module parameters are designed based on the original positive-sequence inductance of the circuit. To allow for margin in subsequent series synthesis modules, a coefficient k slightly less than 1 is introduced (e.g., k = 0.99), setting the total inductance simulated by the decoupling segments as kL1. Therefore, the equivalent inductance per unit length of this module is L. b ′=kL1 / l.

[0110] To make the propagation delay τ equal to the simulation step size Δt, the required new unit length capacitance C b ′ can be calculated using the following formula:

[0111]

[0112] Find:

[0113]

[0114] In the formula, L′ b The equivalent unit length inductance is represented by k, the correction factor is represented by L1, the original positive sequence inductance of the line is represented by l, and the line length is represented by C′. b Δt represents the equivalent unit length capacitance, and Δt represents the simulation step size.

[0115] The zero-sequence capacitance of the original line is C0, which corresponds to the self-capacitance to ground of the three-phase symmetrical line, C. s Therefore, the additional capacitance to ground required by the decoupling segment compared to the original line is:

[0116]

[0117] In the formula, C b,total Indicates the total capacitance to ground;

[0118] According to the Bergeron model theory, the characteristic impedance Z of this module c for:

[0119]

[0120] 2) Construction of the parallel compensation module:

[0121] This module is used to correct the parallel parameter deviations introduced by the decoupling module. It consists of two parts:

[0122] Compensation inductor: To offset the additional ground capacitance introduced by the decoupling module, since the decoupling segments increase the ground capacitance, a ground inductor needs to be connected in parallel to maintain the overall ground parameters. The specific calculation formula is as follows:

[0123]

[0124] ω=2πf

[0125] Where ΔL represents the inductance of the parallel inductor, ω represents the system angular frequency, and ΔC s The original self-capacitance to ground represents the capacitive component, and f represents the system frequency;

[0126] Interphase capacitance: The decoupling module uses a UPB structure and does not consider interphase capacitance. Therefore, the original interphase capacitance of the line needs to be added here. Calculation formula:

[0127]

[0128] In the formula, C m The values ​​represent the capacitance of the parallel capacitors. C1 represents the original positive-sequence capacitance of the line, and C0 represents the original zero-sequence capacitance of the line.

[0129] 3) Construction of the tandem synthesis module:

[0130] The purpose of this module is to accurately compensate for the remaining series impedance in the circuit, ensuring that the positive-sequence and zero-sequence impedances of the entire model at the fundamental frequency are completely consistent with the target values. The decoupling module itself provides a series reactance of size jωkL1 (for both positive-sequence and zero-sequence circuits). Therefore, the target sequence impedance that the series synthesis module needs to synthesize is: Z S0 =R0+jω(L0-kL1) and Z S1 =R1+jω(1-k)L1, where Z S1 R1 represents the target positive-sequence series impedance, j represents the original positive-sequence resistance of the line, and Z represents the imaginary unit.S0 R0 represents the target zero-sequence series impedance, L0 represents the original zero-sequence resistance of the line, and L0 represents the original zero-sequence inductance of the line.

[0131] To achieve the target sequence impedance in phase coordinates, a two-port passive RL network is constructed. An effective implementation is to use an equivalent circuit consisting of 15 parallel RL branches. The specific topology and parameters of this network are shown in Table 1.

[0132] Table 1. Specific topology and parameters of parallel branches in RL

[0133]

[0134]

[0135] In Table 1, parameters a, b, c, and d are calculated from the target sequence impedance:

[0136]

[0137] In the formula, R S1 R S0 These represent the target positive-sequence series impedance Z. S1 and the target zero-sequence series impedance Z S0 The real part, X S1 X S0 These represent the target positive-sequence series impedance Z. S1 and the target zero-sequence series impedance Z S0 The imaginary part;

[0138] The series combining module is a two-port network with three-phase terminals A, B, and C of the first port (I) and three-phase terminals A, B, and C of the second port (J). This network consists of the following 15 parallel RL branches:

[0139] The first group of branches consists of three branches, which are respectively connected to the same-name phase terminals of the first and second ports (IA and JA, IB and JB, IC and JC); the resistance value of each branch is a, and the inductance value is b.

[0140] The second group of branches consists of six branches, which connect each phase terminal of the first port to two different phase terminals of the second port (IA and JB, IA and JC, IB and JA, IB and JC, IC and JA, IC and JB); the resistance value of each branch is c, and the inductance value is d.

[0141] The third group of branches consists of six branches, connecting different phase terminals within the first port (IA and IB, IA and IC, IB and IC) and different phase terminals within the second port (JA and JB, JA and JC, JB and JC). Each branch has a resistance of -c and an inductance of -d. Note that c and d may be negative, but this is only for calculation purposes; the 15-branch network is passive overall, and its discretized values ​​remain stable in the simulation. In EMTP-like programs, each parallel RL branch is discretized using the trapezoidal integral method into a parallel connection of an equivalent resistance and a historical current source.

[0142] Example 1

[0143] This embodiment verifies the accuracy of the model of the present invention in a simple power system. The system structure is as follows: Figure 4 The simulation includes a 110kV power source, a 5km short transmission line, and a 60MW load. The simulation step size is set to 50μs. Line parameters (50Hz): positive sequence resistance R1 = 1.00Ω, zero sequence resistance R0 = 3.00Ω, positive sequence inductance L1 = 4.14mH, zero sequence inductance L0 = 17.98mH, and positive sequence capacitance...

[0144] C1 = 0.06μF, zero-sequence capacitance C0 = 0.03μF.

[0145] The model of this invention (labeled HB-π-ZIM), the conventional hybrid model without corrected zero-sequence impedance (labeled STDM), and the conventional lumped parameter model as a benchmark (labeled REGULAR) are compared.

[0146] Simulation Scenario 1: Single-phase ground fault

[0147] At 4.0s, a phase A ground fault is set at the end of the line, lasting for 0.3s. The phase A fault current for each model is as follows: Figure 5 As shown. From Figure 5 As can be seen, the STDM model, due to zero-sequence impedance distortion, results in a significant deviation between the calculated fault current and the reference value. In contrast, the calculation results of the HB-π-ZIM model of this invention are in high agreement with the reference value.

[0148] Simulation Scenario 2: Three-phase grounding fault

[0149] At 4.0s, a three-phase ground fault is set at the end of the line, lasting for 0.3s. The A-phase fault current for each model is as follows: Figure 6 As shown. In this symmetric fault scenario, the results of the three models are basically consistent because zero-order networks are not involved.

[0150] Conclusion: This embodiment demonstrates that the model of the present invention can accurately simulate both symmetric and asymmetric faults simultaneously, especially in asymmetric faults, and has an unparalleled accuracy advantage compared with existing hybrid models.

[0151] Example 2

[0152] This embodiment verifies the parallel computation decoupling performance of the model of this invention in an improved IEEE 33-bus distribution system. The system structure is as follows: Figure 7 As shown, the system operates at a frequency of 50Hz and a voltage of 10kV, and is connected to multiple distributed photovoltaic power sources. For parallel computing, the system is divided into three sub-regions, each simulated by a separate CPU core. The two lines connecting the region boundaries (the line between nodes 7-8 and the line between nodes 5-25) utilize the HB-π-ZIM model of this invention to achieve decoupling between regions. In contrast, the entire network is simulated serially on a single CPU core using a traditional lumped parameter model (REGULAR) as a baseline.

[0153] Simulation scenario: A two-phase short-circuit fault (A and B) is set at bus 17 at 4.0s interval, lasting 0.3s. Observe the voltage of phase A of bus 5 near the boundary. Figure 8 ) and the A-phase current of the system main circuit 0-1 branch ( Figure 9 ).

[0154] from Figure 8 and Figure 9 It can be seen that the results obtained by multi-core parallel computing using the model of this invention are almost completely consistent with the results of single-core serial computing using the benchmark model. Only at the moment of fault clearing, there is a slight transient difference in the waveform, but the steady-state value and the overall dynamic trend are completely consistent.

[0155] Conclusion: This embodiment demonstrates that when the model of the present invention is used as a boundary decoupling element for parallel computing, it can successfully achieve network partitioning and parallel acceleration while maintaining extremely high simulation accuracy. Although the model of the present invention is more complex than a single lumped π model, it is only used on a few critical boundary lines. By slightly increasing local complexity, it achieves a significant improvement in the parallel computing efficiency of the entire large-scale system, demonstrating extremely high engineering application value.

[0156] This invention is not limited to the structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this invention is limited only by the appended claims.

Claims

1. A simulation model for a hybrid circuit without interpolation and with accurate zero-sequence impedance, characterized in that, This includes decoupling modules, parallel compensation modules, and series synthesis modules connected in series in the electromagnetic transient simulation program; The decoupling module is used to adjust the parallel capacitance parameter per unit length of the traveling wave unit in the uncoupled single-phase Begeron unit so that the electromagnetic propagation delay time is equal to the simulation step size of the simulation program, thereby achieving decoupling of the two ends of the line without interpolation calculation. The parallel compensation module is used to connect in parallel with the decoupling module to compensate for the additional parallel susceptance introduced by the decoupling module due to parameter modification, as well as the phase-to-phase capacitance introduced into the original physical model of the line. The series synthesis module is used to connect in series with the decoupling module to synthesize the remaining series impedance of the line so that the total series positive sequence impedance and zero sequence impedance of the equivalent model match the preset target value at the fundamental frequency. The target positive-sequence series impedance and the target zero-sequence series impedance of the series synthesis module are determined based on the original impedance parameters of the line and the impedance ratio occupied by the decoupling module. The original impedance parameters of the line include the original positive sequence resistance, the original positive sequence inductance, the original zero sequence resistance, and the original zero sequence inductance. The expression for the target positive-sequence series impedance of the series synthesis module is: ； The expression for the target zero-sequence series impedance of the series synthesis module is: ； In the formula, Z S1 R1 represents the target positive-sequence series impedance, j represents the original positive-sequence resistance of the line, and Z represents the imaginary unit. S0 R0 represents the target zero-sequence series impedance, L0 represents the original zero-sequence resistance of the line, and L0 represents the original zero-sequence inductance of the line.

2. The simulation model of a hybrid circuit without interpolation for accurate zero-sequence impedance according to claim 1, characterized in that, The decoupling module is built based on uncoupled single-phase Begeron units, and each phase is modeled as an independent and uncoupled circuit. The equivalent unit length inductance of the decoupling module is determined based on the original positive sequence inductance of the line, the line length, and the correction factor. The equivalent unit length capacitance of the decoupling module is determined based on the equivalent unit length inductance and the simulation step size.

3. The simulation model of a hybrid circuit without interpolation for accurate zero-sequence impedance according to claim 2, characterized in that, The expression for the equivalent unit length inductance of the decoupling module is: ； The expression for the equivalent unit length capacitance of the decoupling module is: ； In the formula, Indicates the equivalent unit length inductance. This represents the correction factor. This represents the original positive sequence inductance of the circuit. Indicates the length of the line. This represents the capacitance per unit length. This indicates the simulation step size.

4. The simulation model of a hybrid circuit without interpolation for accurate zero-sequence impedance according to claim 3, characterized in that, The parallel compensation module includes a parallel inductor and a parallel capacitor; The parallel inductor is used to compensate for the capacitive component introduced by the decoupling module that exceeds the original self-capacitance to ground of the line; the parallel capacitor is used to realize the original phase-to-phase mutual capacitance of the line.

5. The simulation model of a hybrid circuit without interpolation for accurate zero-sequence impedance according to claim 4, characterized in that, The expression for the inductance value of the parallel inductor is: ； ； The expression for the capacitance value of the parallel capacitor is: ； In the formula, Indicates the inductance value of the parallel inductors. Represents the system's angular frequency. C represents the capacitive component of the original self-capacitance to ground. m The values ​​represent the capacitance of the parallel capacitors. C1 represents the original positive-sequence capacitance of the line, and C0 represents the original zero-sequence capacitance of the line.

6. The simulation model of a hybrid circuit without interpolation for accurate zero-sequence impedance according to claim 5, characterized in that, The series synthesis module is a two-port network consisting of a number of parallel RL branches, and the resistance and inductance parameters of each RL branch are determined according to the target positive-sequence series impedance and the target zero-sequence series impedance.

7. The simulation model of a hybrid circuit without interpolation for accurate zero-sequence impedance according to claim 6, characterized in that, The series synthesis module is a two-port network, and the two-port network consists of three sets of parallel RL branches; The first group of parallel RL branches is used to connect the same-name phase terminals of the first port and the second port respectively. The resistance value of the first group of parallel RL branches is a, and the inductance value is b. The second set of parallel RL branches is used to connect each phase terminal of the first port and the two different phase terminals of the second port respectively. The resistance value of the second set of parallel RL branches is c, and the inductance value is d. The third group of parallel RL branches is used to connect different phase terminals of the first port and different phase terminals of the second port respectively. The resistance value of the third group of parallel RL branches is -c and the inductance value is -d. The expressions for resistance and inductance are: ； ； ； ； In the formula, R S1 R S0 Let X represent the real parts of the target positive-sequence series impedance and the target zero-sequence series impedance, respectively. S1 X S0 These represent the imaginary parts of the target positive-sequence series impedance and the target zero-sequence series impedance, respectively.

8. The method for constructing a simulation model of a hybrid circuit with precise zero-sequence impedance without interpolation as described in any one of claims 1-7, characterized in that, The method includes the following steps: S1. Based on the functional complementarity requirements of non-interpolation line simulation, the equivalent model of the line is divided into a series-connected decoupling module, a parallel compensation module, and a series synthesis module. S2. Based on the original positive sequence inductance and simulation step size of the line, calculate the equivalent unit length inductance and capacitance required to make the propagation delay time equal to the simulation step size, and construct a decoupling module based on the equivalent unit length inductance and capacitance. S3. Based on the capacitance component of the original self-capacitance to ground, the original positive sequence capacitance and zero sequence capacitance of the line, calculate the additional parallel susceptance introduced by the decoupling module and the parallel inductors and parallel capacitors required to introduce the original phase-to-phase capacitance. Construct the parallel compensation module based on the calculation results. S4. Based on the original impedance parameters of the line and the impedance ratio occupied by the decoupling module, determine the target positive-sequence series impedance and the target zero-sequence series impedance that the series synthesis module needs to compensate, and construct a passive RL network to achieve the target positive-sequence series impedance and the target zero-sequence series impedance.

Images