Hot plug backplane bus system and communication method

Abstract

The application provides a hot-plugging backboard bus system and a communication method, which comprises a backboard bus, a master module and a slave module; the master module and the slave module are connected through the backboard bus; the master module and the slave module are integrated with FPGAs and support hot plugging on the backboard bus. The backboard provided by the application enables the master module and the plurality of slave modules to communicate uninterruptedly, and if a slave module needs to be replaced, the communication between the master module and the slave modules will not be interrupted, thereby ensuring the continuous operation of the control system.

Description

Technical Field

[0001] This invention belongs to the field of computer hardware and architecture technology, specifically relating to a hot-swappable backplane bus system and communication method. More specifically, it relates to a hot-swappable backplane bus technology. Background Technology

[0002] Currently, the mainstream master and slave modules on the market are connected and communicate data via a custom backplane bus. This backplane bus operates in a cascaded manner, and its communication technology is simple; however, neither the backplane power supply method nor the backplane communication protocol supports hot-swapping.

[0003] Therefore, if one or more slave modules malfunction, all cascaded master and slave modules need to be powered off, then disassembled and replaced before powering on again. Since the master module communicates via the backplane, the connected slave modules need to be initialized and reset before the overall module control system communication can be restored.

[0004] This operation severely impacts the sustainability of industrial control systems, especially in the field of process control. Replacing a module after a power outage will cause the industrial control system to shut down, affecting production line operations and resulting in huge losses.

[0005] Patent document CN104813300A provides a hot-swappable module, backplane, system and method for determining its connection. This solution is applied to the connector pins and power supply design of the hot-swappable module. However, it cannot solve the technical problem that replacing the module after a power outage will cause the industrial control system to shut down, affecting the production line operation and resulting in huge losses.

[0006] Patent document CN110096021A provides a hot-swap device for PLC backplanes. This solution is applied to the hot-swap of specific Ethernet modules. However, it cannot solve the technical problem that replacing the module after a power outage will cause the industrial control system to shut down, affecting the production line and resulting in huge losses.

[0007] Patent document CN117793059A discloses a method and apparatus for hot-swapping frameless plug-in card device modules. The scheme includes: a host assigning addresses to slave backplanes by periodically sending address detection signals, and obtaining the current number of slave backplanes by receiving the address detection signal returned by the last slave backplane; after receiving the returned address detection signal, the host sends configuration parameters to each slave backplane, and the slave backplane stores the configuration parameters; after a slave device is hot-plugged into the corresponding slave backplane, it obtains the current physical address by sending an address request signal to the corresponding slave backplane. While this improves the system's scalability and adaptability, it does not solve the technical problem that replacing slave modules during power outages will cause the industrial control system to shut down, affecting production line operation and resulting in significant losses.

[0008] This problem urgently needs to be solved. Summary of the Invention

[0009] In view of the deficiencies in the prior art, the purpose of this invention is to provide a hot-swappable backplane bus system and communication method.

[0010] According to the present invention, a hot-swappable backplane bus system includes: a backplane bus, a master module, and a slave module; the master module and the slave module are connected via the backplane bus; both the master module and the slave module integrate FPGA and both support hot-swapping on the backplane bus.

[0011] Preferably, when the master module is powered on, the master module can actively scan all slave modules connected to the backplane bus on the backplane module, and record and package the address information and communication data of the slave modules to achieve communication.

[0012] Preferably, the power supply lines of the backplane bus baseboard module supply power to the master module and the slave module.

[0013] Preferably, the initial parameter configuration of the slave module is stored in RAM, and the communication function is developed based on FPGA.

[0014] Preferably, the data lines between the master module and the slave module adopt the M-LVDS physical protocol, and the module body integrates an M-LVDS transceiver chip.

[0015] Preferably, the FPGA of the master module scans and records the number and type of all the slave modules using a consistent hash scan algorithm, and assigns addresses to the slave modules.

[0016] Preferably, the master module periodically collects and diagnoses data from all slave modules to obtain periodic data; the period is a preset value; when the master module detects a fault in a slave module and an operator replaces it with a new slave module, the master module writes the address of the slave module from the periodic data into the FLASH of the new slave module, and the new slave module loads the data from the FLASH into the RAM and then communicates normally.

[0017] Preferably, the method of diagnosing all data from the module includes: CRC check.

[0018] According to the present invention, a hot-swappable backplane bus communication method is provided, enabling the implementation of a hot-swappable backplane bus system, comprising:

[0019] Step S1: Instruct the master module to scan and record the data from the slave module, and send the configuration parameters to the slave module;

[0020] Step S2: Determine whether the configuration parameters can be recognized. If the result is yes, proceed to step S3; if the result is no, instruct the main module to scan and record the new data of the slave module, send the configuration parameters to the slave module, and re-execute step S2 until the determination result is yes.

[0021] Step S3: The master module periodically communicates with the slave module to determine if the module is damaged. If the result is yes, the damaged slave module is replaced and step S3 is executed again; if the result is no, the process ends.

[0022] Preferably, there is a step S0 before step S1; step S0 includes: initializing the master controller of the backplane bus.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1. The backplane provided by this invention enables the master module and multiple slave modules to communicate without interruption. If a corresponding slave module needs to be replaced, the communication between the master and slave modules will not be interrupted, thus ensuring the continuous operation of the control system.

[0025] 2. Under normal communication between the master module and the slave module, if the slave module is damaged, the master module and other normally operating slave modules will not be powered off, and only the damaged slave module will be replaced.

[0026] 3. The master module provided by this invention writes the address and communication parameters of the original damaged slave module into the replaced slave module, and then normal communication is achieved. Attached Figure Description

[0027] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0028] Figure 1 A schematic diagram of the backplane bus communication architecture between the master module and the slave module provided by the present invention;

[0029] Figure 2 A schematic diagram of the data communication architecture of the master-slave module provided by the present invention;

[0030] Figure 3 The hot-plugging flowchart of the master-slave module provided by the present invention. Detailed Implementation

[0031] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the scope of protection of the present invention.

[0032] This invention relates to a backplane bus communication method that allows for hot-swapping of slave modules without power interruption between master and slave modules, and enables rapid restoration of communication, thus maintaining continuous data exchange between input / output modules in industrial settings.

[0033] The main problem solved by this invention is to provide a backplane bus in which, upon initial power-on, the master module assigns and stores addresses to slave modules and transmits data via the backplane's data lines. Under normal communication conditions between the master and slave modules, even if a slave module fails, the master module and other normally functioning slave modules remain powered on; only the damaged slave module is replaced. The master module addresses and assigns addresses to the newly replaced slave module, initializes startup parameters, and periodically communicates data continuously, achieving hot-swappable backplane bus communication functionality.

[0034] This invention designs a hot-swappable backplane bus technology. Master and slave modules are connected via a backplane bus, which provides power to all modules and supports data transmission. Both master and slave modules integrate FPGAs. After power-on, the master module actively scans all connected slave modules on the backplane, identifying their types and channel counts, and assigning addresses and configuring communication parameters. Slave modules display status indicators to show different states. After scanning, the master module records the address information of all slave modules in RAM and packages the address information and communication data together for periodic backplane data transmission and reception, performing CRC verification on the transmitted data. The master module synchronously diagnoses potential faults based on the slave module's transmitted data and operating status, ensuring normal communication. If a slave module fails, the status indicator will alert the user. When a user replaces a slave module, the master module maintains the same address, data frame length, and other data transmitted by the previously operating slave module, ensuring unaffected normal operation. Furthermore, after fault diagnosis and assessment, the master module writes the address and communication parameters of the damaged slave module into the FLASH memory of the replaced slave module. The slave module then loads the newly configured data from FLASH into RAM and communicates normally. The overall backplane communication between the master module, the original slave module, and the replaced slave module is restored to normal. This hot-swappable technology ensures uninterrupted operation of the industrial control system and production line.

[0035] like Figure 1As shown, the master module and all slave modules are powered by the power supply lines of the baseboard module and interact with each other via the data lines of the baseboard module. The master module runs the parameter configuration and periodic data communication of all slave modules on the FPGA. After the master and slave modules save the initial configuration information to RAM, they begin periodic communication. The baseboard module is mainly responsible for power supply and the physical connection of the data lines between the master and slave modules; the initial parameter configuration of the slave modules is stored in RAM, and the communication function is developed based on the FPGA, connecting to the baseboard module via data lines to transmit data sequentially.

[0036] like Figure 2 As shown, the configuration information of both the master and slave modules is stored in RAM, and the relevant parameter information must be rescanned, allocated, and saved each time power is supplied. Figure 2 As shown, the data lines between the master and slave modules use the M-LVDS physical protocol, and the module body integrates an M-LVDS transceiver chip. With all modules correctly connected, upon initial power-on, the master module's FPGA runs a consistent hash scan algorithm to scan the number and type of all slave modules connected through the baseboard module, assigning addresses to the slave modules and obtaining their channel count and type. The master module saves the slave module addresses to RAM, encapsulates the addresses in specific communication message frames, and displays their status. The master module performs periodic data communication with the slave modules. The periodic communication data messages contain the slave module's address and type, periodic data, CRC checksums, fault diagnosis information, etc. The slave modules store the addresses assigned by the master module in RAM via the FPGA and display their own operational status and other relevant information.

[0037] like Figure 3 As shown, after the master module powers on, it scans, addresses, and saves configuration parameter information for all slave modules. After the master and slave modules are configured, they perform periodic communication, performing CRC checks on periodic data, slave module addresses, and other related data. If the scan or configuration fails, it re-scans and reconfigures, and performs periodic fault diagnosis on all data channels of the slave modules. If a slave module is detected as damaged, causing communication failure, a new slave module is replaced. After the slave module passes its power-on self-test, the master module assigns the slave module address from the periodic data to the new slave module, and the slave module saves the data to RAM. The master module and all slave modules continue periodic communication without interruption throughout the entire process, and continue to perform CRC checks and fault diagnosis on the communication data.

[0038] According to the present invention, a hot-swappable backplane bus communication method is provided, enabling the implementation of a hot-swappable backplane bus system, comprising:

[0039] Step S1: Instruct the master module to scan and record the data from the slave module, and send the configuration parameters to the slave module;

[0040] Step S2: Determine whether the configuration parameters can be recognized. If the result is yes, proceed to step S3; if the result is no, instruct the main module to scan and record the new data of the slave module, send the configuration parameters to the slave module, and re-execute step S2 until the determination result is yes.

[0041] Step S3: The master module periodically communicates with the slave module to determine if the module is damaged. If the result is yes, the damaged slave module is replaced and step S3 is executed again; if the result is no, the process ends.

[0042] Before step S1, there is step S0; step S0 includes: initializing the master controller of the backplane bus.

[0043] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A hot-swappable backplane bus system, characterized in that, include: Backplane bus, master module and slave module; The master module and the slave module are connected via the backplane bus; Both the master module and the slave module are integrated with FPGA and both support hot-swapping on the backplane bus; The main module periodically collects and diagnoses data from all slave modules to obtain periodic data; the period is a preset value. When the master module detects that the slave module has failed and the operator replaces it with a new slave module, the master module writes the address of the slave module in the periodic data into the FLASH of the new slave module. The new slave module loads the data from the FLASH into the RAM and then communicates normally. The master module actively scans all slave modules connected to the backplane module, identifies all slave module types and channel numbers, and assigns addresses and configures communication parameters for all slave modules. If a slave module fails, after fault diagnosis and judgment, the master module writes the address and communication parameters of the original damaged slave module into the FLASH of the replacement slave module. The slave module loads the newly configured data from FLASH into RAM and then communicates normally. The overall backplane communication between the master module, the original slave module, and the replacement slave module is restored to normal.

2. The hot-swappable backplane bus system according to claim 1, characterized in that, When powered on, the master module can actively scan all slave modules connected to the backplane bus and record and package the address information and communication data of the slave modules to achieve communication.

3. The hot-swappable backplane bus system according to claim 1, characterized in that, The power supply lines of the backplane bus baseboard module supply power to the master module and the slave module.

4. The hot-swappable backplane bus system according to claim 1, characterized in that, The initial parameter configuration of the slave module is stored in RAM, and the communication function is developed based on FPGA.

5. The hot-swappable backplane bus system according to claim 1, characterized in that, The data lines between the master module and the slave module adopt the M-LVDS physical protocol, and the module body integrates an M-LVDS transceiver chip.

6. The hot-swappable backplane bus system according to claim 1, characterized in that, The FPGA of the master module scans and records the number and type of all slave modules using a consistent hash scan algorithm, and assigns addresses to the slave modules.

7. The hot-swappable backplane bus system according to claim 1, characterized in that, Diagnose all data from the module in the following ways, including: CRC check.

8. A hot-swappable backplane bus communication method, implemented based on the hot-swappable backplane bus system according to any one of claims 1 to 7, characterized in that, include: Step S1: Instruct the master module to scan and record the data from the slave module, and send the configuration parameters to the slave module; Step S2: Determine whether the configuration parameters can be recognized. If the result is yes, proceed to step S3; if the result is no, instruct the main module to scan and record the new data of the slave module, send the configuration parameters to the slave module, and re-execute step S2 until the determination result is yes. Step S3: The master module periodically communicates with the slave module to determine if the module is damaged. If the result is yes, the damaged slave module is replaced, and step S3 is executed again. If the result is negative, the process ends.

9. The hot-swappable backplane bus communication method according to claim 8, characterized in that, Before step S1, there is step S0; step S0 includes: initializing the master controller of the backplane bus.

Images