A three-dimensional heterogeneous integrated digital-analog hybrid multi-channel radio frequency microsystem based on quad plastic packaging and a preparation method thereof

Abstract

The application relates to a three-dimensional heterogeneous integrated digital-analog hybrid multi-channel radio frequency microsystem based on four times of plastic packaging and a preparation method. The radio frequency microsystem comprises a multilayer circuit substrate, a first time plastic packaging body, a second time plastic packaging body, a third time plastic packaging body and a fourth time plastic packaging body. The application adopts the multiple plastic packaging technology based on the plastic packaging process to realize microsystem integration. Compared with the scheme based on the ceramic or silicon-based process technology system, the application solves the problem of the mismatch of the thermal expansion coefficient with the PCB during the board-level integration, thereby improving the product reliability and the integrated circuit scale. The application solves the problems of the large-size device that cannot be integrated in the digital-analog hybrid multi-channel radio frequency microsystem, the electromagnetic shielding problem, the thermal expansion coefficient mismatch problem, the excessively complex electric communication interconnection structure and process, the excessively high process cost and the low reliability.

Description

Technical Field

[0001] This invention relates to the field of radio frequency microsystem packaging technology, specifically to a three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding and its fabrication method. Background Technology

[0002] With the rapid development of artificial intelligence, the Internet of Things, 5G communication, and mobile consumer electronics, miniaturization, high density, high frequency and high speed, high performance, high reliability, and low cost have become the mainstream development direction of advanced packaging. However, on the one hand, semiconductor manufacturing processes are gradually approaching their physical limits, and Moore's Law is slowing down; on the other hand, for mixed-signal RF systems, which are the core components of electronic information equipment such as radar, communication, and navigation, heterogeneous integration of chips or circuits with different materials and processes is required to achieve optimal performance. Clearly, the current mainstream high-density electronic packaging technology, which uses two-dimensional planar integration—Multi-Chip Module (MCM) packaging—is no longer sufficient to meet the future development requirements of miniaturization, lightweighting, multifunctionality, and high performance of mixed-signal RF systems / electronic devices. System-in-Package (SiP), based on three-dimensional heterogeneous integration, is one of the most important and promising technologies to meet the high-density system integration needs of mixed-signal RF microsystems.

[0003] Based on traditional circuit board-level assembly such as organic multilayer substrates, LTCC substrates, HTCC substrates, and silicon-based adapter boards, the industry has made significant progress in miniaturizing radio frequency components by introducing three-dimensional micro-assembly technologies (such as Package on Package (PoP)). Depending on the substrate technology system used, existing mixed-signal radio frequency microsystems mainly fall into the following categories: (1) integration process system based on organic multilayer substrates (such as PCBs); (2) hybrid integration process system based on ceramic substrates; (3) semiconductor process system based on silicon-based adapter boards; and (4) process system based on a combination of ceramic and silicon substrates.

[0004] The current mainstream mixed-signal RF microsystem integration process has many shortcomings, as follows: (I) The simplest form of integrated circuit system based on organic multilayer substrates is a multilayer PCB board combined with a metal casing. This form has low manufacturing difficulty, but its disadvantage is the large package size, which poses a bottleneck for the design and production of complex structures, limiting its application. In addition, there are molding processes based on BT boards, ABF boards, etc. For example, Chinese patent document CN104538368 A discloses a three-dimensional stacked packaging structure based on secondary molding technology. This structure realizes the back-to-back stacking of two bare chips. However, because this structure lacks an intermediate substrate, it is only suitable for circuits with relatively few interconnect nodes and not for complex circuits. Chinese patent document CN 106997876 A discloses a three-dimensional PoP packaging technology. This technology realizes the stacking of two independently molded PoP layers, with interconnection between the two layers via PGA. It is only suitable for circuits with relatively few interconnect nodes and not for complex circuits.

[0005] (ii) Hybrid integration process system based on ceramic substrate, such as Chinese patent document CN 111785691 B which discloses a three-dimensional packaging shell structure for radio frequency microsystems. This structure forms multiple steps inside a ceramic shell, realizing the PoP stacking of multiple substrates. Chinese patent document CN108083223 A discloses a ceramic double-sided open cavity three-dimensional integration architecture. This hybrid integration process system based on ceramic substrate has the following defects: (1) Due to the mismatch of the thermal expansion coefficients of the ceramic substrate and the PCB board material, thermal stress positively correlated with the size of the ceramic structure will be generated when it is assembled with the PCB board, resulting in failure problems such as BGA solder ball deformation and pad detachment, thereby limiting the upper limit of the size of the ceramic structure. (2) Thermal stress will be generated when the ceramic substrate is co-fired, which will cause the substrate to warp and thus limit the size of the ceramic structure. (3) Considering the machinability, the size of the microcavity set in the ceramic structure for embedded components is limited, which makes it inconvenient to integrate large-size devices, such as plastic-encapsulated chips, large-capacity chip capacitors, power inductors, etc. (4) External telecommunications interconnection interface and hermetic packaging structure greatly reduce the volume utilization rate. (5) It is impossible to set up comb-shaped electromagnetic isolation walls, and it is impossible to achieve electromagnetic isolation between multiple channels on the same layer.

[0006] (iii) Semiconductor process systems based on silicon-based interposers, such as the radio frequency microsystem integration technology disclosed in Chinese patent documents CN108083223A, CN114613751 A, and CN 117202481 A, use silicon as the substrate material to micro-assemble chips and devices in micro-cavities etched on the silicon substrate, use wafer-level bonding to achieve multi-layer stacking and sealing, use through-silicon vias (TSVs) to achieve vertical interconnection between the upper and lower surfaces of each substrate, and use BGA or SMD to achieve telecommunication interconnection between each substrate. The disadvantages of the semiconductor process system based on silicon-based adapters are also obvious: (1) It requires complex steps such as silicon-based adapters, through-silicon vias (TSVs), microbumps, temporary bonding, debonding, chip-to-wafer stacking (D2W), and wafer-to-wafer stacking (W2W), which are difficult to process, have long processing cycles, low production yield, and high costs; (2) Due to the mismatch between the thermal expansion coefficient and the PCB material, the size limit of the package structure is limited when assembling with the PCB board; (3) Due to the relatively thin silicon substrate, it is impossible to integrate large-size components; (4) The structural strength is generally low.

[0007] (iv) Process systems based on the combination of ceramic and silicon substrates, such as the three-dimensional heterogeneous integrated radio frequency microsystems disclosed in Chinese patent documents CN 115910986A and CN 117038593A, include a silicon-based packaging layer and a high / low temperature co-fired ceramic packaging layer. The low-power radio frequency chip is placed on the silicon-based packaging layer, and the high-power radio frequency chip is placed on the ceramic package, with the two connected by BGA balls. Although this improves the heat dissipation problem of the product to some extent, the disadvantages of the above-mentioned silicon-based and ceramic-based systems still exist.

[0008] For mixed-signal RF circuits, the main requirements are as follows: (1) They need to integrate RF circuits, intermediate frequency circuits, analog circuits and digital circuits, etc., with complex functions, requiring a large integration scale of the package and a large upper limit of the achievable size; (2) The circuit structure is complex and there are many interconnection nodes; (3) Under the premise of integrating more functions, the volume, weight and cost should be reduced; (4) Electromagnetic compatibility issues are prominent. Functional circuits need to be divided into cavities, and the power supply decoupling circuit needs to be placed as close as possible to the chip. Some devices are large in size, such as intermediate frequency baluns and LC filters. Therefore, cavities with large dimensions in the XYZ directions and flexible structures are required; (5) In addition to the structural strength, signal integrity and thermal reliability that conventional microsystems need to consider, impedance matching and other design requirements also need to be considered.

[0009] Based on the above analysis of existing technologies, in order to achieve better overall performance of mixed-signal RF microsystems, how to design a three-dimensional heterogeneous integrated structure and process to meet the application requirements of high density, high performance and high reliability of electronic equipment systems, the existing technologies have not yet provided a solution. Summary of the Invention

[0010] To address the shortcomings of existing technologies, the present invention aims to provide a three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding and its fabrication method.

[0011] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect of the present invention, a three-dimensional heterogeneous integrated mixed-signal radio frequency microsystem based on four-stage molding is disclosed, the system comprising: A multilayer circuit board with analog and digital circuits assembled on the front and radio frequency circuits assembled on the back. The first molding compound is used to mold the radio frequency circuit assembled on the reverse side of the multilayer circuit board, and has a first metallized via or metallized groove inside. The second molding compound is used to encapsulate the analog and digital circuits assembled on the front side of the multilayer circuit board. It has a second metallized via or metallized groove inside, and analog circuits and intermediate frequency circuits are arranged on the top. The third molding compound is used to encapsulate the analog circuits and intermediate frequency circuits assembled on top of the second molding compound. It has a third metallized via or metallized groove inside and an electromagnetic shielding layer on top. The fourth encapsulation is used to encapsulate the electromagnetic shielding layer.

[0012] As a further improvement to the above solution, the multilayer circuit board adopts a MIS / HDI substrate; preferably, the multilayer circuit board adopts a MIS / HDI substrate based on a molding compound; pads and circuits are provided on both the front and back sides of the multilayer circuit board; and multilayer interconnect circuits are provided inside the multilayer circuit board.

[0013] As a further improvement to the above scheme, the analog and digital circuits include analog-digital circuit chips and passive devices.

[0014] As a further improvement to the above solution, the radio frequency circuit includes a radio frequency chip and passive components.

[0015] As a further improvement to the above solution, the bottom surface of the first molding compound is provided with a bottom pad layer for telecommunication interconnection between the radio frequency microsystem and the outside.

[0016] As a further improvement to the above solution, a top solder pad layer is provided on the top surface of the second molding compound.

[0017] As a further improvement to the above solution, the analog circuit and the intermediate frequency circuit are assembled on the top pad layer; the analog circuit and the intermediate frequency circuit include circuit chips, small and medium-sized passive devices, and large-sized passive devices or micro-modules.

[0018] As a further improvement to the above scheme, the sum of the molding thicknesses of the first molding body, the second molding body, the third molding body and the fourth molding body is in the range of 4~15mm.

[0019] In a second aspect of the present invention, a method for fabricating a three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding is disclosed, the method comprising the following steps: S1. Fabricate a multilayer circuit board and use SMT technology to mount the circuitry on the reverse side of the multilayer circuit board.

[0020] S2, First molding: Molding the reverse circuit of the multilayer circuit board obtained in step S1 to form the first molding body, and making the first metallized via or metallized groove in the first molding body to realize the interconnection between the upper and lower surfaces of the first molding body. Using RDL technology, a bottom pad layer for the radio frequency microsystem to be electrically interconnected with the outside is made on the lower surface of the first molding body. At the same time, SMT technology is used to mount the front circuit of the multilayer circuit board.

[0021] S3. Second molding: The front circuit of the multilayer circuit board is molded to form a second molding body. A second metallized via or metallized groove is made in the second molding body to realize the interconnection between the upper and lower surfaces of the second molding body. The top pad layer is made on the upper surface of the second molding body using RDL technology. At the same time, the circuit on the top pad layer is mounted using SMT technology.

[0022] S4. Third molding: The circuit on the top pad layer is molded to form a third molding body. A third metallized via or metallized groove is made in the third molding body to realize the interconnection between the upper and lower surfaces of the third molding body. An electromagnetic shielding layer is made on the upper surface of the third molding body using RDL technology.

[0023] S5. Fourth encapsulation: The electromagnetic shielding layer is encapsulated to form a fourth encapsulated body.

[0024] As a further improvement to the above scheme, the first molding body, the second molding body, the third molding body and the fourth molding body are all realized by compression molding process.

[0025] Compared with the prior art, the advantages of the present invention are: (1) The encapsulation materials used in the multiple encapsulation processes of the present invention are all epoxy resin materials. For this type of standard / general epoxy resin, its glass transition temperature (Tg) is 140 - 165 °C, and CTE(α1) < Tg is 12 - 18 ppm / °C. The commonly used FR-4 board for the whole machine PCB is an epoxy glass fiber cloth laminate, and CTE(α1) < Tg in its XY direction is 12 - 16 ppm; the CTE of copper (Cu) used for the internal circuit is about 17 ppm / °C; the CTE of the common Al2O3-HTCC material is about 7 ppm / °C, and the CTE of the AlN-HTCC material is about 4.4 ppm / °C; the CTE of the LTCC material is about 4.4 - 8 ppm / °C; the CTE of the silicon wafer is about 2.6 ppm / °C. Obviously, the CTEs of silicon, common HTCC and LTCC materials are very different from that of the commonly used PCB, while the CTE of the encapsulation material is very close to that of the commonly used PCB. Therefore, the present invention realizes microsystem integration based on the encapsulation process using the multiple encapsulation technology, with small reliability risks, and the size of the final microsystem can be made relatively large, so that more circuit functions can be integrated. The present invention realizes the electrical interconnection between the upper and lower layers of the substrate by adopting a multi-layer circuit substrate in the middle. At the same time, the electrical interconnection between other layers is also directly realized by means of vias. Compared with the forms such as PGA, BGA, solder posts or LGA required in the traditional PoP structure, this method can realize more complex electrical interconnection relationships, and the process implementation is relatively simple, and it is not easy to appear bad phenomena such as short circuit or open circuit, which can meet the requirements of complex digital-analog hybrid radio frequency circuits.

[0026] (2) In the three-dimensional heterogeneous integrated digital-analog hybrid multi-channel radio frequency microsystem based on four-time encapsulation of the present invention, since each encapsulation body can adopt a relatively thick thickness and the thickness of the encapsulation body can be set completely according to the height of the highest component, the size constraints on the packaged integrated components are less. The large-capacity decoupling capacitors of various chips can also be placed close to the chips, thereby improving the electrical characteristics of the product. In addition, electromagnetic shielding between each functional circuit can be realized by forming metallized vias or metallized grooves of various shapes in the encapsulation body. The present invention can directly integrate and package chips or integrate bare chips. And because the encapsulation body itself has good airtightness, there is no need to adopt a special airtight packaging structure, thereby improving the space utilization rate of the microsystem. The process implementation difficulty of the present invention is small, without TSV, and even the bonding process may not be required. The production cycle is short, the cost is low, and the final product is a solid encapsulation body with high structural strength and high reliability. Brief Description of the Drawings

[0027] Figure 1 Schematic diagram of the three-dimensional heterogeneous integrated digital-analog hybrid multi-channel radio frequency microsystem based on four-time encapsulation; Figure 2 This is a schematic diagram of the internal structure and composition of the first-stage encapsulated body. Figure 3 This is a schematic diagram of the bottom pad structure of the first molding compound; Figure 4 This is a schematic diagram of the internal structure and composition of the second molding compound; Figure 5 This is a schematic diagram of the top pad structure of the second molding compound; Figure 6 A schematic diagram of the internal structure and composition of the third-stage molding compound; Figure 7 This is a schematic diagram of a fabrication method for a three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding.

[0028] in: 0. Multilayer circuit board; 1. First molding compound; 11. First metallized via or metallized groove; 12. Chip inside the first molding compound; 13. Passive device inside the first molding compound; 14. Bottom pad layer; 2. Second molding compound; 21. Second metallized via or metallized groove; 22. Digital / analog circuit chip; 23. Passive device; 24. Top pad layer; 3. Third molding compound; 31. Third metallized via or metallized groove; 32. Circuit chip; 33. Small to medium-sized passive device; 34. Large-sized passive device or micro-module; 35. Top electromagnetic shielding layer; 4. Fourth molding compound. Detailed Implementation

[0029] The present invention will be further described below with reference to the accompanying drawings: This invention aims to address key issues in existing technologies: first, the reliability risks of microsystems caused by mismatched coefficients of thermal expansion; second, the limitation of integrating large-size devices due to the small size of microcavities; third, the shortcomings of traditional PoP (PoS) technology in meeting the needs of multiple interconnect nodes; and fourth, the difficulty in achieving good electromagnetic compatibility. Simultaneously, it will improve upon the current situation of weak structural strength and high production costs in existing solutions, providing a better integration solution for mixed-signal RF microsystems.

[0030] like Figures 1-6This invention illustrates a three-dimensional heterogeneous integrated mixed-signal multichannel RF microsystem based on four-stage molding. The system includes a multilayer circuit board 0, a first molding compound 1, a second molding compound 2, a third molding compound 3, and a fourth molding compound 4. The first molding compound 1 covers the reverse side of the multilayer circuit board 0, the second molding compound 2 covers the front side of the multilayer circuit board 0, the third molding compound 3 is stacked on top of the second molding compound 2, and the fourth molding compound 4 covers the top of the third molding compound 3. Each molding compound and the multilayer circuit board together constitute a three-dimensional heterogeneous integrated architecture, enabling layered packaging and collaborative operation of RF, analog, digital, and intermediate frequency circuits. The multilayer circuit board 0 can be a BT board (bismaleimide triazine), an ABF board (Ajinomoto laminate), or a MIS / HDI substrate, etc. In this embodiment, the multilayer circuit board is a MIS / HDI substrate manufactured using molding materials and compression molding processes, resulting in lower cost and higher integration. MIS / HDI substrates offer numerous advantages in semiconductor packaging, meeting requirements for ultra-high I / O density and fine pitch, improving electrical performance, and providing better signal integrity and more stable power delivery. They also enhance design freedom and integration, enabling miniaturization and thinning.

[0031] As a further improvement to the above solution, the multilayer circuit board 0 has pads and circuits on both sides, and multiple interconnect lines are arranged inside. The reverse side of the multilayer circuit board 0 is equipped with an RF circuit composed of an RF chip 11, passive components 12, etc., while the front side of the multilayer circuit board 0 is equipped with analog and digital circuits composed of a digital-analog circuit chip 22, passive components 23, etc. Since the device with the highest power consumption in this type of circuit is usually an active RF chip, such as the RF chip 11 in this embodiment, and because the RF circuit has strict requirements for impedance matching and line loss, it needs to be placed as close as possible to the mounting surface to minimize the RF line length, line loss, impedance matching, and heat dissipation. Since there are many interconnection nodes between the analog and digital circuits and the RF circuit, they need to be placed on the reverse side of the RF circuit and interconnected through the multilayer circuit board to optimize the interconnection scheme.

[0032] As a further improvement to the above solution, the first molding body 1 is used to encapsulate the radio frequency circuit assembled on the reverse side of the multilayer circuit board 0 and the metallized vias or grooves 11 that realize the interconnection of the upper and lower surfaces of the first molding body 1, and a bottom pad layer 14 for the radio frequency microsystem to make telecommunication interconnection with the outside is provided on the bottom surface of the first molding body 1.

[0033] As a further improvement to the above solution, the second molding compound 2 is used to integrally mold the analog and digital circuits assembled on the front side of the multilayer circuit board 0, as well as the metallized vias or grooves 21 that interconnect the upper and lower surfaces of the second molding compound 2, and a top pad layer 24 is provided on the top of the second molding compound 2; the top pad layer 24 is equipped with analog circuits and intermediate frequency circuits composed of circuit chips 32, small and medium-sized passive devices 33, and large-sized passive devices or micro-modules 34. As a further improvement to the above solution, the third molding compound 3 is used to integrally mold the analog circuits and intermediate frequency circuits assembled on the top pad layer 24, as well as the metallized vias or metallized grooves 31 that interconnect the upper and lower surfaces of the third molding compound, and an electromagnetic shielding layer 35 is provided on the top surface of the third molding compound 3. The fourth molding compound 4 is used to mold the top electromagnetic shielding layer 35.

[0034] This invention performs multiple molding processes on multilayer circuit boards and components assembled on them, primarily serving the following purposes: structural support, heat dissipation, protection, and providing conditions for the formation of metallized vias or slots in corresponding parts. This invention abandons the traditional approach of first mounting metal pillars or structural components and then molding, instead employing a method of first molding, followed by laser drilling and metallization to achieve metallized vias or slots. This simplifies the process and controls costs. For mixed-signal RF microsystems, due to the large number of internal interconnect nodes and relatively few external interconnect nodes, this invention uses an LGA (Large Grid Interface) approach, which is simpler than the BGA (Browser Grid Interface). By setting pads on the top surface of the second molding layer 2 (RDL) for mounting the third layer circuit, the circuit stacking function is achieved, which is simpler than the conventional PoP (Position on Panel) process. The third layer circuit is mainly used to integrate intermediate frequency or analog circuits that cannot fit in the other two layers or are very large, such as... Figure 6 Circuit chip 32 in Figure 6 (Middle is power inductor), large-size passive devices or modules 34 ( Figure 6 (The middle part is the intermediate frequency balun filter module, etc.) Because the height of the first molding compound 1 and the second molding compound 2 have a significant impact on the electrical characteristics, while the height of the third molding compound has no significant impact on the electrical characteristics, the large device is designed into the third molding compound 3.

[0035] like Figure 7 As shown, the present invention also includes a method for fabricating the above-mentioned three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding, the method comprising the following steps: S1. Fabricate a multilayer circuit board 0 and use SMT technology to mount the circuitry on the reverse side of the multilayer circuit board 0.

[0036] In step S1, a multilayer circuit board is first fabricated according to design requirements, ensuring that the pre-set pads and circuits on both sides of the multilayer circuit board form multilayer interconnections, laying the foundation for subsequent circuit assembly and signal transmission. On the reverse side of the fabricated multilayer circuit board, surface mount technology (SMT) is used to precisely mount core components such as RF chips and passive devices to the pre-set pad positions, completing the initial assembly of the RF circuit and ensuring reliable connection between components and the board. The aforementioned multilayer circuit board can use the same molding compound, or it can use a BT board or an ABF board. In this embodiment, to simplify the process and reduce costs, molding compound is used to fabricate the multilayer circuit board.

[0037] S2, First sealing S21. The reverse circuit of the multilayer circuit board 0 obtained in step S1 is encapsulated to form the first encapsulated body 1.

[0038] This invention employs injection molding or compression molding processes to uniformly coat the reverse side of the multilayer circuit board 0, fabricated in step S1, with insulating encapsulation materials such as epoxy molding compound. High-temperature curing then forms a dense first molding compound 1. The first molding compound 1 provides physical protection for sensitive circuits such as RF chips and passive devices on the reverse side of the substrate, isolating them from external moisture, dust, and mechanical impact. Furthermore, the curing of the molding compound provides a flat and stable structural base for subsequent metallization via / groove processing and RDL fabrication, preventing component displacement or damage during subsequent processes. To improve the electrical characteristics and heat dissipation of the RF microsystem, the height of the first molding compound needs to be minimized. The height of the molding compound is typically 0.1~0.2 mm higher than the height of the tallest integrated device. In this embodiment, the maximum device height Tmax integrated within the first molding compound 1 is 0.65 mm, therefore the thickness of the first molding compound 1 is controlled within the range of 0.75~0.85 mm, depending on the specific process implementation.

[0039] S22. In the first molding compound 1, a first metallized via or metallized groove 11 is made to realize the interconnection between the upper and lower surfaces of the first molding compound 1.

[0040] Preferably, the first metallized via or metallized groove 11 can be designed as a comb-shaped, closed, or other structure. On the one hand, it realizes the electrical interconnection between the upper and lower surfaces of the first molding compound. On the other hand, through the physical separation of the metallized structure, it performs functional partitioning and isolation of the radio frequency circuit on the reverse side of the multilayer circuit board, reducing electromagnetic interference within the radio frequency circuit and with other circuits.

[0041] In step S22, a first metallized via or metallized groove 11 is first processed through the upper and lower surfaces at a preset position of the first molding body 1 by laser drilling or mechanical milling. Then, a uniform and dense metal layer, usually a copper layer, is formed on the hole wall or groove wall by chemical copper plating and electroplating thickening process, so that it has the ability to conduct electricity and dissipate heat, that is, to form a metallized via or groove 11.

[0042] This invention overcomes the limitations of traditional planar interconnects by constructing vertical telecommunication channels on the upper and lower surfaces of the first molding compound 1. This provides a crucial interconnection path for signal transmission and power supply between the subsequent bottom pad layer and the circuitry on the reverse side of the substrate, solving the technical challenge of isolating the circuitry from external interfaces after molding. Furthermore, according to design requirements, it constructs as follows... Figure 2 The various shapes of first metallized vias or metallized grooves 11 shown are used to achieve electromagnetic shielding between functional circuits. Such electromagnetic shielding structures are inconvenient or even impossible to implement using conventional PCB, ceramic, and silicon-based processes, which is a significant advantage of this invention. In PCB manufacturing, similar electromagnetic shielding structures are typically fabricated through machining. However, for such slender, comb-like structures, machining is difficult due to their susceptibility to deformation or breakage. Ceramic and silicon-based processes can only achieve closed, non-comb-like structures; they are not feasible for such slender, comb-like structures and are similarly impossible to implement. Even if they were to be implemented, the excessively slender structure would lead to deformation or breakage. Therefore, such a design is not permitted in conventional processes.

[0043] S23. Using RDL technology, a bottom pad layer 14 for the radio frequency microsystem to be electrically interconnected with the outside is fabricated on the lower surface of the first molding compound 1. At the same time, SMT technology is used to mount the front circuit of the multilayer circuit board 0.

[0044] Using the lower surface of the first molding compound 1 as a substrate, the process involves leveling, surface cleaning and roughening, coating with an insulating dielectric layer, photolithography windowing, metal sputtering / electroplating, and patterning etching. A bottom pad layer 14 conforming to external interconnect standards is then fabricated on the surface of the first molding compound using RDL technology. The size and spacing of the pads can be flexibly designed according to requirements, adapting to common external package interfaces such as BGA and LGA. Internal circuit signals from the first metallized via or metallized groove 11 are precisely guided to preset pad positions via redistributed lines, forming a standardized external telecommunications interconnect interface. This ensures stable signal interaction between the microsystem and external PCB boards or devices, while avoiding the problems of long interconnect paths and high signal loss associated with traditional wire bonding. This method first levels the molding compound and then performs RDL, avoiding warping issues on the pad lead surfaces. Furthermore, the interconnection between the RDL and the internal first metallized via or metallized groove 11 improves the adhesion and reliability of the pads.

[0045] S3, Second sealing S31. The front circuit of the multilayer circuit board 0 is encapsulated to form a second encapsulated body 2.

[0046] The analog and digital circuits on the front side of the multilayer circuit board 0, which have already undergone SMT (Surface Mount Technology) assembly, are encapsulated to form a second encapsulation body 2. Using the same material as the first encapsulation, uniform coverage is achieved through injection molding or compression molding, followed by high-temperature curing to form a dense structure. The second encapsulation body 2 protects the mixed-signal circuitry on the front side from external environmental influences and provides a flat substrate for subsequent metallization vias or slots and RDL (Reverse Drilling Layer) fabrication. Together with the first encapsulation body 1, it forms a symmetrical double-layer protective structure, enhancing the overall mechanical strength.

[0047] S32. In the second molding body 2, a second metallized via or metallized groove 21 is made to realize the interconnection between the upper and lower surfaces of the second molding body.

[0048] Specifically, the second metallized via or metallized groove 21 serves to interconnect the upper and lower surfaces of the second molding compound (the front circuit of the multilayer circuit board and the top pad layer circuit). It also provides electromagnetic isolation between the analog and digital circuits on the front of the multilayer circuit board through metallization separation, avoiding cross-interference between analog and digital signals, and laying a shielding foundation for the subsequent integration of intermediate frequency circuits.

[0049] This invention employs the same laser drilling, mechanical milling, chemical copper plating, and electroplating thickening processes as in step S2 to fabricate second metallized vias or metallized trenches 21 penetrating the upper and lower surfaces of the second molding compound 2. These interconnect channels connect the circuitry on the front side of the multilayer circuit board to the top pad layer 24 on the upper surface of the second molding compound 2, enabling vertical signal transmission and providing an interconnection foundation for higher-level circuit integration. Simultaneously, they form a symmetrical design with the metallized structure of the first molding compound, ensuring balanced overall electrical performance. On one hand, the second metallized vias or metallized trenches 21 are equivalent to the BGA or PGA structures that provide electrical interconnection between layers in conventional PoP packaging, but obviously simplify the manufacturing process and avoid quality risks such as short circuits and open circuits. Furthermore, the second metallized vias or metallized trenches 21 also provide necessary physical isolation for the functional circuitry within the second molding compound 2, which is difficult to achieve in traditional PoP structures.

[0050] S33. Using RDL technology, a top pad layer 24 is fabricated on the upper surface of the second molding compound 2.

[0051] This invention fabricates a top pad layer 24 on the upper surface of the second molding compound 2 using RDL processes such as surface pretreatment, dielectric layer deposition, photolithography windowing, metal layer formation, and patterned etching. This pad layer not only serves as the signal output terminal for the internal circuitry of the second molding compound 2, but more importantly, it provides a standardized interface for the mounting of subsequent higher-level circuits (analog circuits and intermediate frequency circuits). The pad layout and spacing can be flexibly designed according to the requirements of the upper-level circuits, achieving customized integration with on-demand interconnection. The second metallized via or metallized groove 21 and the top pad layer 24 not only realize the functions of the upper substrate and substrate stacking in traditional PoP, but also greatly simplify the microsystem structure and process.

[0052] S34. Use SMT technology to mount the circuit on the top pad layer 24 of the plastic package for the second time.

[0053] Using high-precision mounting equipment, circuit chips, small-to-medium-sized passive components, large-sized passive components, or micro-modules are precisely mounted onto preset positions on the top pad layer 24, and reliable connections are achieved through reflow soldering. Step S34 realizes a hierarchical leap in circuit integration, placing lower-frequency intermediate frequency circuits and analog circuits at a higher level, forming functional partitions with the underlying RF circuits. This optimizes signal transmission paths and creates conditions for electromagnetic isolation between circuits of different frequencies. The circuits on the top pad layer 24 are mainly used to integrate circuits that have few interconnections with the circuits in the first and second plastic packages and require electromagnetic isolation, or circuits that are very large in size, or circuits that require debugging.

[0054] S4. Third molding: The circuit on the top pad layer 24 is molded to form the third molding body 3, and a third metallized via or metallized groove 31 is made in the third molding body 3 to realize the interconnection between the upper and lower surfaces of the third molding body 3. An electromagnetic shielding layer 35 is made on the upper surface of the third molding body 3 using RDL technology.

[0055] Specifically, the third metallized via or metallized groove 31 connects the circuitry of the top pad layer of the second molding compound to the internal circuitry of the third molding compound. Furthermore, it forms a stepped shielding network with the metallized structures on the first and second molding compounds, isolating the analog and intermediate frequency circuits (including large-size devices) within the third molding compound. This solves the electromagnetic crosstalk problem between multiple channels and is a key structure for achieving the four-channel isolation requirement. The electromagnetic shielding layer 35 connects to the bottom grounding structure through the third metallized via or metallized groove 31, forming a complete grounding shielding system from top to bottom. This effectively isolates external electromagnetic interference from the internal circuitry of the microsystem, prevents leakage of internal high-frequency signals, and further enhances the electromagnetic compatibility of the multi-channel circuitry.

[0056] This invention achieves vertical partitioning of circuits according to size, function, and frequency characteristics through a hierarchical structure of a second molding compound (analog-digital circuit) and a third molding compound (intermediate frequency circuit). The bottom layer (first molding compound) houses high-frequency / RF circuits, the middle layer (second molding compound) houses mixed-signal circuits, and the top layer (third molding compound) houses low-frequency / intermediate frequency circuits and larger, especially taller, analog circuits. This layout reduces crosstalk, improves system electrical characteristics, and overcomes planar area limitations, increasing integration density. Furthermore, a stepped vertical interconnect network is formed through metallized vias or slots in the third molding compound: the first molding compound interconnects the bottom layer and the substrate, the second molding compound interconnects the substrate and the middle layers, and the third molding compound interconnects the middle and top layers. This design replaces the traditional PoP (Position-on-Pack) interconnect method, meeting the demand for massive interconnect nodes in mixed-signal multi-channel RF circuits. Simultaneously, the flexible structure of metallized vias or slots achieves electromagnetic isolation between functional circuits, solving the electromagnetic compatibility problem between different circuits.

[0057] S5. Fourth encapsulation: The electromagnetic shielding layer 35 on top of the third encapsulated body 3 is encapsulated to form the fourth encapsulated body 4, thereby achieving physical protection for the electromagnetic shielding layer 35. Compared with traditional solutions, this invention eliminates the air gap between the shielding layer and the circuit. By filling with a dielectric material, it can improve the product's heat dissipation capacity and solve the problem of arcing under low pressure conditions.

[0058] Compared with the prior art, the innovation of this invention is as follows: (1) Current molding processes are mainly used for single-chip packaging or simple circuit packaging. This invention utilizes molding processes to combine double-sided integration with PoP integration, forming a new microsystem packaging structure. This invention uses vias for both internal and interlayer electrical interconnections within the multilayer circuit board, replacing conventional PoP solutions such as PGA, BGA, solder pillars, or LGA, simplifying the interconnection scheme, enhancing interconnection capabilities, and improving reliability. Based on molding materials, this invention employs multiple molding techniques to achieve microsystem integration. Compared to solutions based on ceramic or silicon-based process technologies, it solves the problem of thermal expansion coefficient mismatch between the board-level integration and the PCB, thereby improving product reliability and integrated circuit scale. Simultaneously, through a unified molding material system, it avoids the problem of thermal expansion coefficient mismatch between different materials.

[0059] (2) This invention utilizes molding compounding to embed large-size components, solving the problem that ceramic-based and silicon-based process technologies cannot embed large-size components. Simultaneously, large-capacity decoupling capacitors for various chips can be placed close to the chip, thereby improving product performance. Specifically, this invention employs a scheme of first SMT mounting, then molding compounding, and then fabricating a metallized electromagnetic shielding groove, achieving electromagnetic shielding for functional circuits. The scheme is flexible, not only achieving traditional closed electromagnetic shielding walls but also realizing... Figure 2 The comb-shaped electromagnetic shielding wall shown solves the problem of inconvenient electromagnetic shielding in ceramic-based and silicon-based process systems, and also eliminates the need for processing and mounting metal structural components in PCB solutions. Furthermore, since the aforementioned metallized electromagnetic shielding groove is directly integrated with the ground planes of the upper and lower layers, no gaps are formed, thus improving the electromagnetic shielding effect.

[0060] (3) In this invention, the radio frequency circuit is placed in the first molding layer, and the taller components and the lower frequency intermediate frequency circuit are placed in the third molding layer. The thickness of the first molding layer is reduced as much as possible, which not only improves the transmission characteristics of radio frequency signals, but also helps the product to dissipate heat.

[0061] This invention originates from the miniaturization design of a mass-produced RF front-end product, with the core objective of miniaturization without compromising electrical characteristics. The embodiments and images provided in this invention are derived from actual product design drawings. Compared to the previous generation product with the same function, the overall circuit scheme and components remain unchanged; only the integrated packaging method has been altered. The product size has been reduced from 91.7mm × 65mm × 16.45mm to 25mm × 20mm × 4.8mm, only 1 / 40th of the original size. Simultaneously, the product's assembly / packaging cost has been reduced to less than 1 / 3 of the original.

[0062] The following difficulties exist in the implementation of this invention: (1) The product circuit includes radio frequency, intermediate frequency, analog and digital circuits, and is four-channel, so the requirements for electromagnetic compatibility indicators such as isolation between channels and spurious emissions are very high. By setting electromagnetic shielding structures such as first metallized vias or metallized slots, second metallized vias or metallized slots, third metallized vias or metallized slots, and electromagnetic shielding layers, the functional circuits are physically separated to meet electromagnetic compatibility requirements.

[0063] (2) For large-sized intermediate frequency balun filter micro-modules, with dimensions ≥10mm×5.5mm×2.1mm, and other components with considerable height, such as power inductors, integrating the intermediate frequency balun filter micro-module into the first molding compound is the most reasonable approach from a signal flow perspective. However, this presents two problems: 1) The X and Y dimensions of the microsystem are too large, hindering integration; 2) The excessive height of the first molding compound severely degrades port standing wave ratios. This invention utilizes the advantage of compression molding, which allows for a molding compound thickness >5mm, to stack the intermediate frequency balun filter micro-module on the top layer, effectively solving the above two problems.

[0064] (3) Nearly 300 components need to be integrated, all of which are packaged chips and passive devices. Based on the above three characteristics, ceramic-based and silicon-based processes are simply out of reach, and the size of the double-sided integration scheme based on PCB + metal partition cannot meet the application requirements. This invention distributes these devices through three-layer stacking, reducing the size of the microsystem in the XY direction; and achieves PoP through multiple molding and metallized via technologies; The compression molding process allows for a molding thickness greater than 5 mm.

[0065] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.

Claims

1. A three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding, characterized in that, The system includes: A multilayer circuit board with analog and digital circuits assembled on the front and radio frequency circuits assembled on the back. The first molding compound is used to mold the radio frequency circuit assembled on the reverse side of the multilayer circuit board, and has a first metallized via or metallized groove inside. The second molding compound is used to encapsulate the analog and digital circuits assembled on the front side of the multilayer circuit board. It has a second metallized via or metallized groove inside, and analog circuits and intermediate frequency circuits are arranged on the top. The third molding compound is used to encapsulate the analog circuits and intermediate frequency circuits assembled on top of the second molding compound. It has a third metallized via or metallized groove inside and an electromagnetic shielding layer on top. The fourth encapsulation is used to encapsulate the electromagnetic shielding layer.

2. The three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding as described in claim 1, characterized in that, The multilayer circuit board adopts a MIS / HDI substrate; The multilayer circuit board has pads and circuits on both the front and back sides. The multilayer circuit board has multiple interconnect lines inside.

3. The three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding as described in claim 1, characterized in that, The analog and digital circuits include analog-digital circuit chips and passive devices.

4. The three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding as described in claim 1, characterized in that, The radio frequency circuit includes a radio frequency chip and passive components.

5. The three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding as described in claim 1, characterized in that, The bottom surface of the first molding compound is provided with a bottom pad layer for the radio frequency microsystem to make telecommunication interconnection with the outside.

6. The three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding as described in claim 1, characterized in that, The top surface of the second molding compound is provided with a top solder pad layer.

7. The three-dimensional heterogeneous integrated mixed-signal RF microsystem based on four-stage molding as described in claim 6, characterized in that, The analog circuit and the intermediate frequency circuit are assembled on the top pad layer; the analog circuit and the intermediate frequency circuit include circuit chips, small and medium-sized passive devices, and large-sized passive devices or micro-modules.

8. The three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding as described in claim 1, characterized in that, The sum of the thicknesses of the first, second, third, and fourth molding layers ranges from 4 to 15 mm.

9. The fabrication method of a three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding as described in claim 1, characterized in that, The method includes the following steps: S1. Fabricate a multilayer circuit board and use SMT technology to mount the circuitry on the reverse side of the multilayer circuit board. S2, First molding: Molding the reverse circuit of the multilayer circuit board obtained in step S1 to form the first molding body, and making the first metallized via or metallized groove in the first molding body to realize the interconnection between the upper and lower surfaces of the first molding body. Using RDL technology, a bottom pad layer for telecommunication interconnection between the RF microsystem and the outside is made on the lower surface of the first molding body. At the same time, SMT technology is used to mount the front circuit of the multilayer circuit board. S3. Second molding: The front circuit of the multilayer circuit board is molded to form a second molding body. A second metallized via or metallized groove is made in the second molding body to realize the interconnection between the upper and lower surfaces of the second molding body. A top pad layer is made on the upper surface of the second molding body using RDL technology. At the same time, the circuit on the top pad layer is mounted using SMT technology. S4. Third molding: Molding is performed on the circuit on the top pad layer to form a third molding body. A third metallized via or metallized groove is made in the third molding body to realize the interconnection between the upper and lower surfaces of the third molding body. An electromagnetic shielding layer is made on the upper surface of the third molding body using RDL technology. S5. Fourth encapsulation: The electromagnetic shielding layer is encapsulated to form a fourth encapsulated body.

10. The fabrication method of a three-dimensional heterogeneous integrated mixed-signal multichannel radio frequency microsystem based on four-stage molding as described in claim 9, characterized in that, The first, second, third, and fourth molding processes are all achieved using compression molding.

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