一种熔丝状态读写电路及集成芯片
By introducing an enable circuit, latch circuit, power-on reset circuit, and bias circuit into the fuse state read/write circuit, the problem of high power consumption during fuse reading is solved, and stable reading and low-power operation are achieved even when the operating voltage is not fully stable.
CN121331204BActive Publication Date: 2026-07-17SHENZHEN LIXIN SEMICON CO LTD +1
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN LIXIN SEMICON CO LTD
- Filing Date
- 2025-09-18
- Publication Date
- 2026-07-17
Smart Images
Figure CN121331204B_ABST
Abstract
本申请公开了一种熔丝状态读写电路及集成芯片，涉及集成电路技术领域。通过上电复位电路在检测到工作电源的工作电压上升至预设翻转电压时，判定工作电压已稳定，输出对应的解除复位信号至使能电路；使能电路在接收到解除复位信号时，将外部提供的读信号进行延时处理形成延时读信号；偏置电路在未接收到延时读信号之前，若检测到工作电源提供的工作电压上升至小于预设翻转电压的阈值电压时，保持为读写电路提供预设偏置电压，使得读写电路能够正常读取熔丝电路中预设熔丝的编译状态，并使锁存电路锁存当前熔丝的编译状态。基于上述电路设计，使得读写电路能够在上电复位电路完成电压判定前，稳定地完成读取工作，减少整体电路执行读操作的功耗。
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