Thin film transistor, method for manufacturing thin film transistor, and display

Abstract

The application discloses a thin film transistor, a preparation method of the thin film transistor and a display, and belongs to the technical field of thin film transistors. The thin film transistor comprises a substrate, an insulating layer arranged on one side of the substrate, an active layer arranged on the side of the insulating layer away from the substrate, a source electrode and a drain electrode arranged on the side of the active layer away from the insulating layer, and a channel region formed between the source electrode and the drain electrode. A carrier replenishing layer is located in the channel region and in contact with the active layer, and the carrier replenishing layer is spaced apart from the source electrode and the drain electrode. The material of the carrier replenishing layer comprises a metal oxide or a metal. The thin film transistor introduces the carrier replenishing layer for replenishing carriers to the active layer in the channel region, thereby significantly improving the mobility of the thin film transistor and meeting the growing demand of high-resolution displays.

Description

Technical Field

[0001] This application belongs to the field of thin-film transistor technology, and particularly relates to a thin-film transistor, a method for fabricating a thin-film transistor, and a display. Background Technology

[0002] With the rapid development of the display industry, the technical requirements for thin-film transistors (TFTs), the core driving element of displays, are becoming increasingly stringent. Amorphous silicon (a-Si) technology, with its mature process and low cost, once dominated the market, but its excessively low mobility can no longer meet the driving demands of 4K and 8K high-definition displays. Polycrystalline silicon (Poly-Si) technology boasts high mobility, but its laser annealing process, with its high equipment investment and uniformity issues, severely restricts its application in ultra-large-size panels. In contrast, TFTs exhibit significant technical advantages, with a much higher mobility than a-Si, effectively supporting the pixel response requirements of high-resolution panels. Simultaneously, it maintains the low-temperature process characteristics compatible with a-Si technology, offering advantages in large-area production and cost control.

[0003] However, with the increasing demand for high-resolution displays, how to further improve the mobility of thin-film transistors has become one of the urgent problems to be solved in this field. Summary of the Invention

[0004] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a thin-film transistor, a method for fabricating a thin-film transistor, and a display, by introducing a carrier replenishment layer to inject a large number of carriers into the channel region, significantly improving the device mobility.

[0005] In a first aspect, this application provides a thin-film transistor, comprising: Substrate; An insulating layer is disposed on one side of the substrate; An active layer is disposed on the side of the insulating layer that faces away from the substrate; The source and the drain are disposed on the side of the active layer away from the insulating layer, and a channel region is formed between the source and the drain; A carrier replenishment layer is located in the channel region and in contact with the active layer. The carrier replenishment layer is spaced apart from the source and the drain. The material of the carrier replenishment layer includes metal oxide or metal.

[0006] According to the thin-film transistor of this application, by introducing a carrier replenishment layer to replenish the active layer in the channel region, the carrier replenishment layer has high conductivity and can inject a large number of carriers into the channel region, which significantly improves the mobility of the thin-film transistor and can meet the growing demand of high-resolution displays. At the same time, the carrier replenishment layer is electrically isolated from the source and drain, which can effectively avoid the hump effect.

[0007] According to one embodiment of this application, the carrier supplementation layer is disposed on the surface of the active layer, and / or the carrier supplementation layer is disposed at the layer position where the active layer is located.

[0008] According to one embodiment of this application, the carrier replenishment layer is disposed on the surface of the active layer opposite to the insulating layer.

[0009] According to one embodiment of this application, the carrier supplementation layer is provided at at least two of the following locations: the surface of the active layer near the insulating layer, the surface of the active layer away from the insulating layer, and the layer location where the active layer is located.

[0010] According to one embodiment of this application, the thickness of the active layer is d1, the thickness of the carrier supplementation layer is d2, d2=kd1, 0<k≤3.

[0011] According to one embodiment of this application, the width of the carrier supplementation layer is smaller than the distance between the source and the drain.

[0012] According to one embodiment of this application, the material of the carrier replenishment layer is the same as the material of the source and the drain.

[0013] Secondly, this application provides a method for fabricating a thin-film transistor, the method comprising: A substrate is provided, and an insulating layer is prepared on one side of the substrate by plasma-enhanced chemical vapor deposition; An active layer is prepared by magnetron sputtering deposition on the side of the insulating layer opposite to the substrate; A source, a drain, and a carrier replenishment layer are deposited by magnetron sputtering on the side of the active layer away from the insulating layer. A channel region is formed between the source and the drain. The carrier replenishment layer is located in the channel region and is in contact with the active layer. The carrier replenishment layer is spaced apart from the source and the drain. The material of the carrier replenishment layer includes metal oxide or metal.

[0014] According to the thin-film transistor fabrication method of this application, by introducing a carrier replenishment layer to supplement the active layer in the channel region, the carrier replenishment layer has high conductivity and can inject a large number of carriers into the channel region, which significantly improves the mobility of the thin-film transistor and can meet the growing demand of high-resolution displays. At the same time, the carrier replenishment layer is electrically isolated from the source and drain, which can effectively avoid the hump effect, is compatible with existing thin-film transistor manufacturing processes, and has high practicality and scalability.

[0015] According to one embodiment of this application, the preparation of the source, drain, and carrier replenishment layer by magnetron sputtering deposition on the side of the active layer opposite to the insulating layer includes: On the side of the active layer opposite to the insulating layer, a metal oxide or metal is deposited by magnetron sputtering to prepare the source, the drain, and the carrier replenishment layer. The material of the carrier replenishment layer is the same as that of the source and the drain.

[0016] Thirdly, this application provides a display, comprising: Thin-film transistors as described in the first aspect above.

[0017] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0018] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is one of the structural schematic diagrams of the thin-film transistor provided in the embodiments of this application; Figure 2 yes Figure 1 A schematic diagram showing the relative positions of the source layer and the carrier replenishment layer; Figure 3 This is a second schematic diagram of the structure of the thin-film transistor provided in the embodiments of this application; Figure 4 yes Figure 3 A schematic diagram showing the relative positions of the source layer and the carrier replenishment layer; Figure 5 This is the third schematic diagram of the thin-film transistor structure provided in the embodiments of this application; Figure 6 yes Figure 5 A schematic diagram showing the relative positions of the source layer and the carrier replenishment layer; Figure 7 This is a schematic flowchart of the method for fabricating a thin-film transistor provided in an embodiment of this application; Figure 8This is one of the schematic diagrams of the transfer characteristic curves of the thin-film transistor provided in the embodiments of this application; Figure 9 This is the second schematic diagram of the transfer characteristic curve of the thin-film transistor provided in the embodiments of this application; Figure 10 This is the third schematic diagram of the transfer characteristic curve of the thin-film transistor provided in the embodiments of this application; Figure 11 This is the fourth schematic diagram of the transfer characteristic curve of the thin-film transistor provided in the embodiments of this application.

[0019] Figure label: Substrate 110, insulating layer 120, active layer 130, source 141, drain 142, carrier replenishment layer 150. Detailed Implementation

[0020] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0021] Metal oxide thin-film transistors (MO TFTs) have a mobility that is about 30 times higher than a-Si, which can effectively meet the pixel response requirements of high-resolution display panels. At the same time, MO TFTs also maintain the low-temperature process characteristics that are compatible with a-Si processes, giving them unique advantages in large-area production and cost control. They have become an indispensable component of active matrix (AM) displays.

[0022] This application provides a thin-film transistor that significantly improves device mobility by introducing a carrier supplement layer 150 to inject a large number of carriers into the channel region.

[0023] It should be noted that the thin-film transistor in the embodiments of this application can be an MO TFT, and the technical principle of the embodiments of this application is not limited to MO TFT, but is also applicable to thin-film transistor devices of the same type as a-Si TFT and Poly-Si TFT.

[0024] The following is for reference. Figures 1-10 This application describes a thin-film transistor, a method for fabricating a thin-film transistor, and a display, based on embodiments of the present application.

[0025] like Figure 1 As shown, the thin-film transistor of this application embodiment includes: a substrate 110, an insulating layer 120, an active layer 130, a carrier replenishment layer 150, a source 141, and a drain 142.

[0026] The substrate 110 can be a heavily doped silicon substrate, and the substrate 110 can be used as the gate in a thin film transistor.

[0027] The active layer 130 is a thin-film structure that transports charge carriers in a thin-film transistor. The conductivity of the active layer 130 is modulated by the gate voltage to realize the switching function of the thin-film transistor.

[0028] In practice, the active layer 130 may be made of semiconductor materials such as amorphous silicon and polycrystalline silicon, or semiconductor materials such as metal oxides.

[0029] The insulating layer 120 is a film structure located between the gate and the active layer 130 in a thin-film transistor. The material of the insulating layer 120 may include silicon dioxide, silicon nitride, hafnium dioxide, etc.

[0030] In this embodiment, the insulating layer 120 is disposed on one side of the substrate 110, the active layer 130 is disposed on the side of the insulating layer 120 away from the substrate 110, and the source electrode 141 and the drain electrode 142 are disposed on the side of the active layer 130 away from the insulating layer 120. That is, the insulating layer 120 and the active layer 130 are sequentially stacked on the substrate 110, and the source electrode 141 and the drain electrode 142 are prepared on the side of the active layer 130 away from the insulating layer 120.

[0031] A channel region is formed between the source 141 and the drain 142.

[0032] It is understandable that the channel region refers to the semiconductor material region between the source 141 and the drain 142 that allows current to pass through, that is, a part of the active layer 130. Under the control of the gate voltage, the channel region between the source 141 and the drain 142 can conduct current and realize the switching function.

[0033] In this embodiment, the carrier supplementation layer 150 is located in the channel region and is in contact with the active layer 130.

[0034] The carrier replenishment layer 150 is made of metal oxide or metal, and has high carrier density and high mobility, i.e., high conductivity.

[0035] It should be noted that the carrier replenishment layer 150 is a film layer that replenishes carriers to the active layer 130. Introducing a highly conductive carrier replenishment layer 150 into the thin-film transistor, the carrier replenishment layer 150 is located in the channel region. The carrier replenishment layer 150 can inject a large number of carriers into the channel region, effectively improving the mobility of the thin-film transistor.

[0036] Meanwhile, the carrier replenishment layer 150 is spaced apart from the source 141 and the drain 142, that is, the carrier replenishment layer 150 is electrically isolated from the source 141 and the drain 142, which can effectively avoid the hump effect.

[0037] In related technologies, the technical paths for improving TFT mobility mainly focus on active film layer modulation, gate dielectric layer optimization, and source / drain electrode improvement. Active film layer modulation optimizes carrier transport characteristics by adjusting the material composition ratio and adopting a stacked structure. Gate dielectric layer optimization focuses on introducing high dielectric materials to enhance gate control capability. Source / drain electrode improvement focuses on improving the contact interface quality between the electrode and the active film layer.

[0038] When the transistor device is working, by applying a forward bias voltage to the gate, the majority carriers in the active layer 130 are induced to the interface between the active layer 130 and the insulating layer 120 under the action of the electric field, forming a conductive channel in the channel region; at the same time, by applying a small bias voltage to the drain 142, the channel current can be turned on. The carrier concentration inside the active layer 130 is a key parameter that determines the device mobility, which directly affects the magnitude of the channel current, and thus determines the driving capability and image quality of the display panel.

[0039] In this embodiment, a highly conductive carrier supplement layer 150 is introduced into the thin-film transistor. The carrier supplement layer 150 is used to inject a large number of carriers into the channel region, which innovates the device structure of the thin-film transistor, rather than the traditional path of active film layer control, gate dielectric layer optimization and source drain electrode improvement. The mobility is significantly improved by optimizing the carrier concentration of the active layer 130. At the same time, since the carrier supplement layer 150 is electrically isolated from the source 141 and drain 142, the hump effect in the traditional structure can be effectively avoided.

[0040] According to the thin-film transistor provided in the embodiments of this application, by introducing a carrier supplement layer 150 to supplement the active layer 130 with carriers in the channel region, the carrier supplement layer 150 has high conductivity and can inject a large number of carriers into the channel region, which significantly improves the mobility of the thin-film transistor and can meet the growing demand of high-resolution displays. At the same time, the carrier supplement layer 150 is electrically isolated from the source 141 and the drain 142, which can effectively avoid the hump effect.

[0041] In this embodiment, carrier supplementation layers 150 with different widths, thicknesses, and conductivity can be introduced at different locations in the channel region. By coordinating multiple regions to supplement carriers to the active layer 130, the device mobility can be improved.

[0042] In some embodiments, the carrier supplementation layer 150 is disposed on the surface of the active layer 130, and / or the carrier supplementation layer 150 is disposed at the layer position where the active layer 130 is located.

[0043] In this embodiment, the surface of the active layer 130 includes the surface of the active layer 130 close to the insulating layer 120 and the surface of the active layer 130 away from the insulating layer 120.

[0044] It should be noted that the surface refers to the upper and lower planes of the film layer. The carrier supplementation layer 150 is disposed on the surface of the active layer 130, and the surface of the carrier supplementation layer 150 is in contact with the surface of the active layer 130.

[0045] For example, such as Figure 1 and Figure 2 As shown, the carrier replenishment layer 150 is disposed on the surface of the active layer 130 away from the insulating layer 120, and the lower plane of the carrier replenishment layer 150 is in contact with the upper plane of the active layer 130.

[0046] For example, such as Figure 3 and Figure 4 As shown, the carrier replenishment layer 150 is disposed on the surface of the active layer 130 near the insulating layer 120, and the upper plane of the carrier replenishment layer 150 is in contact with the lower plane of the active layer 130.

[0047] It should be noted that the carrier supplement layer 150 is disposed at the same level as the active layer 130. The carrier supplement layer 150 is located in the active layer 130, and the surface and part of the side of the carrier supplement layer 150 are in contact with the active layer 130.

[0048] For example, such as Figure 5 and Figure 6 As shown, the carrier supplement layer 150 is disposed at the same level as the active layer 130. The carrier supplement layer 150 is located in the active layer 130, and its upper plane and side plane are in contact with the active layer 130.

[0049] It should be noted that introducing carrier supplementation layers 150 at different locations in the channel region can specifically optimize carrier distribution and transport paths.

[0050] The carrier replenishment layer 150 is disposed on the surface of the active layer 130 away from the insulating layer 120, that is, the carrier replenishment layer 150 is disposed in the rear region of the channel region, which can inject more carriers into the channel region, effectively increase the carrier concentration, and significantly improve the device mobility.

[0051] The carrier supplement layer 150 is disposed on the surface of the active layer 130 near the insulating layer 120. That is, the carrier supplement layer 150 is disposed in the front region of the channel region, which can improve the carrier transport path in the channel region and thus improve the device mobility.

[0052] The carrier supplement layer 150 is located at the same level as the active layer 130, that is, the carrier supplement layer 150 is set in the middle region of the channel region. This can optimize the carrier distribution in the channel region, improve the subthreshold swing of the device, and thus improve the device mobility.

[0053] In some embodiments, the carrier replenishment layer 150 is disposed on the surface of the active layer 130 away from the insulating layer 120, which can effectively reduce the degree of negative drift of the threshold voltage of the thin film transistor.

[0054] In some embodiments, at least two of the following locations are provided: the surface of the active layer 130 near the insulating layer 120, the surface of the active layer 130 away from the insulating layer 120, and the layer location where the active layer 130 is located: a carrier supplement layer 150.

[0055] In this embodiment, a carrier supplementation layer 150 is introduced synergistically in multiple regions (i.e., at least two regions) of the thin-film transistor. Through the multi-region synergistic carrier injection mechanism, the carrier concentration in the channel region is significantly increased, the carrier distribution and transport path are optimized, and the device mobility can be greatly improved.

[0056] For example, a carrier supplementation layer 150 is provided on the surface of the active layer 130 near the insulating layer 120, and a carrier supplementation layer 150 is also provided in the hierarchical structure where the active layer 130 is located. By providing carrier supplementation layers 150 in the front and middle regions of the channel region, the carrier transport path in the channel region is improved and the carrier distribution in the channel region is optimized.

[0057] For example, the surface of the active layer 130 facing away from the insulating layer 120 is provided with a carrier supplement layer 150, and the hierarchical structure in which the active layer 130 is located is also provided with a carrier supplement layer 150. By providing carrier supplement layers 150 in the back and middle regions of the channel region, more carriers are injected into the channel region, while optimizing the carrier distribution in the channel region and coordinating the improvement of device mobility.

[0058] For example, a carrier replenishment layer 150 is provided on the surface of the active layer 130 near the insulating layer 120, and a carrier replenishment layer 150 is also provided on the surface of the active layer 130 away from the insulating layer 120. By providing carrier replenishment layers 150 in the front and back regions of the channel region, more carriers are injected into the channel region, while improving the carrier transport path in the channel region and coordinating the improvement of device mobility.

[0059] In practice, depending on the actual needs, carrier supplementation layers 150 can be introduced at different locations in the channel region. Different thicknesses, widths, and conductivity of metal oxide semiconductor materials or different work functions can be selected to prepare carrier supplementation layers 150.

[0060] It should be noted that the thickness, width, conductivity, and work function of the carrier supplementation layer 150 are positively correlated with the device performance. The larger the thickness, the wider the width, the higher the conductivity, and the lower the work function barrier of the carrier supplementation layer 150, the higher the carrier injection efficiency and the more significant the improvement effect on device mobility.

[0061] In some embodiments, the thickness of the active layer 130 is d1, the thickness of the carrier supplementation layer 150 is d2, d2=kd1, 0<k≤3.

[0062] In this embodiment, the thickness of the carrier supplementation layer 150 can be up to three times the thickness of the active layer 130.

[0063] It should be noted that the positive correlation between the thickness of the carrier supplement layer 150 and the device performance has a marginal effect. After the thickness reaches a certain level, the improvement in device performance decreases with the same increase in thickness. The maximum thickness of the carrier supplement layer 150 is set to three times the thickness of the active layer 130. Within the range of three times the thickness, the device mobility can be significantly improved by increasing the thickness of the carrier supplement layer 150.

[0064] In some embodiments, the width of the carrier supplementation layer 150 is smaller than the distance between the source 141 and the drain 142.

[0065] Understandably, the width of the carrier replenishment layer 150 is related to the device width of the thin-film transistor. The width of the carrier replenishment layer 150 can be smaller than the distance between the source 141 and the drain 142, and the carrier replenishment layer 150 maintains electrical isolation from the source 141 and the drain 142.

[0066] For example, the distance between the source 141 and the drain 142 is 500µm, and the width of the carrier supplementation layer 150 can be 100µm-300µm.

[0067] In actual implementation, for small-sized thin-film transistors, the distance between the source 141 and the drain 142 is less than 10µm. In some thin-film transistors, the distance between the source 141 and the drain 142 can reach 1µm. At this time, the width of the carrier supplementation layer 150 will also be reduced accordingly, as long as the width of the carrier supplementation layer 150 is less than the distance between the source 141 and the drain 142.

[0068] Meanwhile, the length of the carrier supplementation layer 150 is related to the device length of the thin-film transistor. For example, if the device length of the thin-film transistor is 500µm, the length of the carrier supplementation layer 150 is less than or equal to 500µm.

[0069] It should be noted that the carrier supplement layer 150 and the active layer 130 form an ohmic contact. Based on the formation of an ohmic contact, the greater the difference between the work function of the carrier supplement layer 150 and the work function of the active layer 130, the more significant the improvement in device mobility.

[0070] In some embodiments, the material of the carrier replenishment layer 150 is the same as that of the source 141 and the drain 142.

[0071] In this embodiment, using the same metal or metal oxide as the material for fabricating the carrier supplement layer 150, source 141 and drain 142 can reduce the number of process steps in device fabrication and lower the device fabrication cost.

[0072] It should be noted that highly conductive metal oxides can not only be used as electrode materials, but also form a homojunction with the active layer 130, significantly reducing the contact barrier and improving the carrier injection efficiency.

[0073] In practice, the carrier replenishment layer 150 may be made of metal oxide semiconductor materials such as indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium tungsten oxide (indium tungsten oxide), indium tungsten zinc oxide (IWZO), and indium tin oxide (ITO), and may also be made of metal materials such as aluminum (Al) and molybdenum (Mo).

[0074] The source electrode 141 and drain electrode 142 may be made of metal oxide semiconductor materials such as indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium tungsten oxide (indium tungsten oxide), indium tungsten zinc oxide (IWZO), and indium tin oxide (ITO). The source electrode 141 and drain electrode 142 may be made of metal materials such as aluminum (Al) and molybdenum (Mo).

[0075] In actual implementation, the material of the carrier supplement layer 150 can be the same as that of the active layer 130, but the conductivity characteristics of the carrier supplement layer 150 and the active layer 130 are different.

[0076] Taking IZO as an example, during the preparation of the active layer 130 using IZO, an appropriate amount of oxygen is introduced and annealing is performed. The IZO in the active layer 130 is transformed into a semiconductor material, realizing the function of switching. When preparing the carrier supplement layer 150, source 141 and drain 142 using IZO, no oxygen is introduced and no annealing is performed. The IZO maintains high conductivity and exhibits a state biased towards conductor.

[0077] This application also provides a method for fabricating a thin-film transistor, used to fabricate the thin-film transistor as described above.

[0078] like Figure 7 As shown, the fabrication method of the thin-film transistor includes steps 710, 720 and 730.

[0079] Step 710: Provide a substrate 110 and prepare an insulating layer 120 on one side of the substrate 110 by plasma-enhanced chemical vapor deposition.

[0080] The substrate 110 can be a heavily doped silicon substrate, and the substrate 110 can be used as the gate in a thin film transistor.

[0081] Plasma-enhanced chemical vapor deposition (PECVD) is a technique that uses plasma to excite reactive gases at low temperatures, causing them to undergo a chemical reaction, thereby depositing a solid thin film on the substrate surface.

[0082] In this step, an insulating layer 120 is prepared on one side of the substrate 110 by plasma-enhanced chemical vapor deposition of materials such as silicon dioxide, silicon nitride, or hafnium dioxide.

[0083] Step 720: An active layer 130 is prepared by magnetron sputtering on the side of the insulating layer 120 facing away from the substrate 110.

[0084] Among them, magnetron sputtering deposition is a physical vapor deposition technique that uses magnetic field-enhanced plasma to "sputter" atoms from the surface of a target material and deposit them onto a substrate to form a thin film.

[0085] In practice, the active layer 130 may be made of semiconductor materials such as amorphous silicon and polycrystalline silicon, or semiconductor materials such as metal oxides.

[0086] In this embodiment, the insulating layer 120 is disposed on one side of the substrate 110, and the active layer 130 is disposed on the side of the insulating layer 120 away from the substrate 110, that is, the insulating layer 120 and the active layer 130 are sequentially stacked on the substrate 110.

[0087] Step 730: On the side of the active layer 130 facing away from the insulating layer 120, a source electrode 141, a drain electrode 142, and a carrier replenishment layer 150 are prepared by magnetron sputtering deposition.

[0088] In this embodiment, a channel region is formed between the source 141 and the drain 142, the carrier replenishment layer 150 is located in the channel region and is in contact with the active layer 130, and the carrier replenishment layer 150 is spaced apart from the source 141 and the drain 142.

[0089] The carrier supplement layer 150 is made of metal oxide or metal.

[0090] The carrier replenishment layer 150 is a film layer that replenishes carriers to the active layer 130. The introduction of a highly conductive carrier replenishment layer 150 into the thin film transistor, the carrier replenishment layer 150 being located in the channel region, can inject a large number of carriers into the channel region, effectively improving the mobility of the thin film transistor.

[0091] Meanwhile, the carrier replenishment layer 150 is spaced apart from the source 141 and the drain 142, that is, the carrier replenishment layer 150 is electrically isolated from the source 141 and the drain 142, which can effectively avoid the hump effect.

[0092] In practical implementation, carrier supplementation layers 150 can be introduced at different locations in the channel region. Depending on the needs, metal oxide semiconductor materials with different thicknesses, widths, and conductivity or metal materials with different work functions can be selected. The carrier supplementation layers 150 are deposited using magnetron sputtering technology to inject a large number of carriers into the channel and improve the mobility of the device.

[0093] According to the thin-film transistor fabrication method provided in the embodiments of this application, by introducing a carrier supplement layer 150 to supplement the active layer 130 with carriers in the channel region, the carrier supplement layer 150 has high conductivity and can inject a large number of carriers into the channel region, significantly improving the mobility of the thin-film transistor, which can meet the growing demand of high-resolution displays. At the same time, the carrier supplement layer 150 is electrically isolated from the source 141 and the drain 142, which can effectively avoid the hump effect, is compatible with existing thin-film transistor manufacturing processes, and has high practicality and scalability.

[0094] In some embodiments, the source 141, drain 142, and carrier replenishment layer 150 are fabricated by magnetron sputtering deposition on the side of the active layer 130 facing away from the insulating layer 120, which may include: On the side of the active layer 130 facing away from the insulating layer 120, a metal oxide or metal is deposited by magnetron sputtering to prepare a source 141, a drain 142 and a carrier supplement layer 150. The material of the carrier supplement layer 150 is the same as that of the source 141 and the drain 142.

[0095] In practice, the carrier replenishment layer 150 may be made of metal oxide semiconductor materials such as indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium tungsten oxide (indium tungsten oxide), indium tungsten zinc oxide (IWZO), and indium tin oxide (ITO), and may also be made of metal materials such as aluminum (Al) and molybdenum (Mo).

[0096] The source electrode 141 and drain electrode 142 may be made of metal oxide semiconductor materials such as indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium tungsten oxide (indium tungsten oxide), indium tungsten zinc oxide (IWZO), and indium tin oxide (ITO). The source electrode 141 and drain electrode 142 may be made of metal materials such as aluminum (Al) and molybdenum (Mo).

[0097] In this embodiment, the same metal or metal oxide is used to prepare the source 141, drain 142 and carrier supplement layer 150 by magnetron sputtering deposition, which can reduce the process steps of device fabrication, reduce device fabrication cost, and eliminate the need to introduce additional materials or processes, and is fully compatible with existing thin-film transistor manufacturing processes.

[0098] The following detailed description is provided in conjunction with the embodiments and comparative examples. The comparative examples are the control schemes of the embodiments. The embodiments are different from the comparative examples by adding a carrier supplement layer 150. The rest of the fabrication process, size parameters, etc. are the same. The device transfer characteristic curves are tested using a semiconductor tester B1500A to analyze the changes in device mobility.

[0099] Example: Using a heavily doped silicon wafer as substrate 110, silicon dioxide is deposited on the surface of substrate 110 by PECVD to prepare an insulating layer 120 with a thickness of 100nm-200nm.

[0100] The active layer 130 is patterned using a mask and then deposited using magnetron sputtering of metal oxide semiconductor materials (IGZO, IZO, ITZO, IWO, IWZO) to prepare the active layer 130, which has a thickness of 10nm-40nm.

[0101] A carrier supplement layer 150 was prepared by magnetron sputtering deposition of IZO, with a width of 100µm-300µm, a thickness of 1nm-90nm, and a conductivity of 1S / cm-20S / cm. The carrier supplement layer 150 was located on the surface of the active layer 130 away from the insulating layer 120.

[0102] Source electrode 141 and drain electrode 142 were fabricated by magnetron sputtering using source and drain electrode masks, with the thickness of source electrode 141 and drain electrode 142 being 50nm-200nm.

[0103] After electrode deposition, the device is placed on a heating stage and annealed at 200°C for 10 minutes in an air atmosphere.

[0104] Comparative example: Using a heavily doped silicon wafer as substrate 110, silicon dioxide is deposited on the surface of substrate 110 by PECVD to prepare an insulating layer 120 with a thickness of 100nm-200nm.

[0105] The active layer 130 is patterned using a mask and then deposited using magnetron sputtering of metal oxide semiconductor materials (IGZO, IZO, ITZO, IWO, IWZO) to prepare the active layer 130, which has a thickness of 10nm-40nm.

[0106] Source electrode 141 and drain electrode 142 were fabricated by magnetron sputtering using source and drain electrode masks, with the thickness of source electrode 141 and drain electrode 142 being 50nm-200nm.

[0107] After electrode deposition, the device is placed on a heating stage and annealed at 200°C for 10 minutes in an air atmosphere.

[0108] like Figure 8 As shown in the figure, the transfer characteristic curves of the comparative examples and embodiments can be seen that after introducing a carrier supplementation layer 150 to supplement the active layer 130 with carriers in the channel region, a large number of carriers can be injected into the channel region, which significantly improves the mobility of the thin film transistor.

[0109] Based on the fact that the carrier supplementation layer 150 is located on the surface of the active layer 130 away from the insulating layer 120, it is verified that the parameters such as the thickness, width, conductivity and work function of the carrier supplementation layer 150 are positively correlated with the device performance.

[0110] like Figure 9 As shown, different thicknesses of the carrier supplementation layer 150 were set, such as 0nm, 5nm, 10nm, 30nm, 60nm, and 90nm. It can be seen that the greater the thickness, the higher the carrier injection efficiency and the more significant the improvement in device mobility.

[0111] like Figure 10 As shown, different widths of the carrier supplementation layer 150 are set, such as 100µm, 200µm, and 300µm. Here, Initial represents the comparison scale without setting the carrier supplementation layer 150. It can be seen that the wider the width, the higher the carrier injection efficiency and the more significant the improvement effect on device mobility.

[0112] like Figure 11 As shown, the argon-oxygen ratio is the core parameter for controlling the composition and performance of the thin film during reactive sputtering. The higher the argon-oxygen ratio, the higher the conductivity of the carrier replenishment layer 150. It can be seen that the higher the conductivity, the higher the carrier injection efficiency, and the more significant the improvement effect on device mobility.

[0113] In this embodiment, by introducing a highly conductive carrier supplement layer 150, an innovative device structure for thin-film transistors is achieved. While maintaining compatibility with existing processes, a significant improvement in device mobility is realized. The carrier supplement layer 150 can be located in the front, middle, and / or back regions of the channel region. At the same time, parameters such as the width, thickness, and conductivity of the carrier supplement layer 150 can be adjusted. Through multi-region synergy and parameter optimization, the channel carrier concentration is effectively increased, and a leapfrog improvement in device performance can be achieved.

[0114] This application also provides a display comprising the thin-film transistors described above.

[0115] According to the display provided in the embodiments of this application, by introducing a carrier supplement layer 150 to supplement the active layer 130 with carriers in the channel region, the carrier supplement layer 150 has high conductivity and can inject a large number of carriers into the channel region, which significantly improves the mobility of the thin film transistor and can meet the growing demand for high-resolution displays. At the same time, the carrier supplement layer 150 is electrically isolated from the source 141 and the drain 142, which can effectively avoid the hump effect.

[0116] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0117] In the description of this application, it should be understood that the terms "length", "width", "thickness", "upper", "lower", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0118] In the description of this application, "first feature" and "second feature" may include one or more of the features.

[0119] In the description of this application, "multiple" means two or more.

[0120] In the description of this application, the first feature being "above" or "below" the second feature may include the first and second features being in direct contact, or the first and second features being in contact through another feature between them.

[0121] In the description of this application, the terms "above," "over," and "on top" for the first feature and the second feature include the first feature being directly above or diagonally above the second feature, or simply indicate that the first feature is at a higher horizontal level than the second feature.

[0122] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0123] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.

Claims

1. A thin-film transistor, characterized in that, include: Substrate; An insulating layer is disposed on one side of the substrate; An active layer is disposed on the side of the insulating layer that faces away from the substrate; The source and the drain are disposed on the side of the active layer away from the insulating layer, and a channel region is formed between the source and the drain; A carrier replenishment layer is located in the channel region and in contact with the active layer. The carrier replenishment layer is spaced apart from the source and the drain. The material of the carrier replenishment layer includes metal oxide or metal. The carrier replenishment layer is disposed on the surface of the active layer, and / or the carrier replenishment layer is disposed at the level where the active layer is located; The carrier replenishment layer and the active layer form an ohmic contact; The carrier supplementation layer is provided at least two of the following locations: the surface of the active layer near the insulating layer, the surface of the active layer away from the insulating layer, and the layer location where the active layer is located.

2. The thin-film transistor according to claim 1, characterized in that, The carrier replenishment layer is disposed on the surface of the active layer opposite to the insulating layer.

3. The thin-film transistor according to claim 1, characterized in that, The thickness of the active layer is d1, and the thickness of the carrier supplement layer is d2, where d2 = kd1 and 0 < k ≤ 3.

4. The thin-film transistor according to any one of claims 1-3, characterized in that, The width of the carrier supplement layer is smaller than the distance between the source and the drain.

5. The thin-film transistor according to any one of claims 1-3, characterized in that, The carrier replenishment layer is made of the same material as the source and the drain.

6. A method for fabricating a thin-film transistor, characterized in that, include: A substrate is provided, and an insulating layer is prepared on one side of the substrate by plasma-enhanced chemical vapor deposition; An active layer is prepared by magnetron sputtering deposition on the side of the insulating layer opposite to the substrate; A source, a drain, and a carrier replenishment layer are deposited by magnetron sputtering on the side of the active layer away from the insulating layer. A channel region is formed between the source and the drain. The carrier replenishment layer is located in the channel region and is in contact with the active layer. The carrier replenishment layer is spaced apart from the source and the drain. The material of the carrier replenishment layer includes metal oxide or metal. The carrier replenishment layer is disposed on the surface of the active layer, and / or the carrier replenishment layer is disposed at the level where the active layer is located; The carrier replenishment layer and the active layer form an ohmic contact; The carrier supplementation layer is provided at least two of the following locations: the surface of the active layer near the insulating layer, the surface of the active layer away from the insulating layer, and the layer location where the active layer is located.

7. The method for fabricating a thin-film transistor according to claim 6, characterized in that, The process of fabricating a source, drain, and carrier replenishment layer by magnetron sputtering deposition on the side of the active layer opposite to the insulating layer includes: On the side of the active layer opposite to the insulating layer, a metal oxide or metal is deposited by magnetron sputtering to prepare the source, the drain, and the carrier replenishment layer. The material of the carrier replenishment layer is the same as that of the source and the drain.

8. A display, characterized in that, include: The thin-film transistor as described in any one of claims 1-5.

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