Light emitting diode package and light emitting device

Abstract

The application provides a light emitting diode package and a light emitting device. The light emitting diode package comprises a plurality of light emitting units, and a wiring layer above the light emitting units comprises a plurality of mutually spaced sub-layers. A second sub-layer is close to a first projected boundary of a second light emitting unit, a third sub-layer covers a part of the second light emitting unit, and a second projected boundary of the third sub-layer is close to a projected boundary line of the first boundary line. A part of the third sub-layer extending from the boundary of the second light emitting unit is close to a third projected boundary of the first projected boundary. A vertical distance between an arbitrary point on the third projected boundary and the first projected boundary is greater than a first vertical distance between an intersection O of the second projected boundary and a projected boundary line of the second light emitting unit and the first projected boundary. The minimum distance between the second sub-layer and the third sub-layer is increased, the area of the interval region between the two is increased, the risk of tin paste melting from the third sub-layer into the second sub-layer is reduced, and the sub-layer line interconnection is avoided.

Description

Technical Field

[0001] This invention relates to the field of semiconductor devices, and more specifically, to a light-emitting diode package and a light-emitting device. Background Technology

[0002] Light-emitting diodes (LEDs), due to their high reliability, long lifespan, and low power consumption, are widely used in various fields such as display devices, automotive lighting, and general lighting. For example, LEDs can be used as backlight sources for various display devices. To effectively protect LEDs from mechanical damage, they are often packaged, which enhances heat dissipation, improves light extraction efficiency, and optimizes beam distribution. Especially for small-sized chips like Mini / Micro LEDs, MIP (Mini / MicroLED in Package) technology packages Mini / Micro LED chips at the chip level, completing the display screen fabrication through steps such as dicing into individual devices and beam splitting and mixing. This technology has now become the mainstream packaging product.

[0003] Mini / Micro LED chips are mounted on a PCB / glass substrate with wiring or driving circuitry to form light-emitting display devices of various sizes. During the soldering process of the individual pixels, due to the narrow spacing between the red light positive electrode pad and the green light positive electrode lead-out line, some solder paste may overflow from the pad and connect with the green light line. This results in color mixing and cross-contamination in products with solder bridging when the display is lit. Summary of the Invention

[0004] In view of the defects and shortcomings of the existing small-size chip packaging technology described above, the purpose of this invention is to provide a light-emitting diode (LED) package and a light-emitting device. In the LED package, the spacing between the third sub-layer connecting the second electrode of the second light-emitting unit and the second sub-layer connecting the second electrode of the first light-emitting unit is changed. This avoids the risk of solder paste overflowing after heating and melting during the mounting process of ultra-small pitch packages, as well as wiring connection problems. This prevents issues such as color bleeding, reduced color purity, and poor color reproduction when the display panel is lit.

[0005] To achieve the above and other related objectives, the present invention provides a light-emitting diode package, comprising:

[0006] A transparent layer having a first surface and a second surface disposed opposite to each other;

[0007] Multiple light-emitting units are fixedly arranged on the first surface of the transparent layer. Each light-emitting unit includes a first electrode and a second electrode. The multiple light-emitting units include a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit arranged sequentially along a first direction.

[0008] A wiring layer is located above the light-emitting unit. The wiring layer includes multiple sub-layers spaced apart from each other: a first sub-layer connecting the first electrode of the multiple light-emitting units, a second sub-layer connecting the second electrode of the first light-emitting unit, a third sub-layer connecting the second electrode of the second light-emitting unit, and a fourth sub-layer connecting the second electrode of the third light-emitting unit.

[0009] In the projection of the plane containing the first surface, the projection boundary line of the second sub-layer near the second light-emitting unit is the first projection boundary, the projection boundary line of the portion of the third sub-layer covering the second light-emitting unit near the first boundary line is the second projection boundary, and the projection boundary line of the portion of the third sub-layer extending from the boundary of the second light-emitting unit near the first projection boundary is the third projection boundary. The second projection boundary and the projection boundary line of the second light-emitting unit have an intersection point O. The first vertical distance between the intersection point O and the first projection boundary is D1. The vertical distance between any point on the third projection boundary and the first projection boundary is greater than the first vertical distance D1.

[0010] A second aspect of the present invention provides a light-emitting device, which includes a circuit board and a plurality of light-emitting elements fixed to the circuit board, the light-emitting elements including the light-emitting diode package provided in this application, wherein the first direction and the second direction intersect.

[0011] As described above, the light-emitting diode package and light-emitting device provided by the present invention have at least the following beneficial technical effects:

[0012] The light-emitting diode (LED) package of the present invention includes a transparent layer and a plurality of light-emitting units located on a transparent first surface. A wiring layer above the light-emitting units includes a plurality of spaced sub-layers: a first sub-layer connecting a first electrode of the plurality of light-emitting units, a second sub-layer connecting a second electrode of the first light-emitting unit, a third sub-layer connecting a second electrode of a second light-emitting unit, and a fourth sub-layer connecting a second electrode of a third light-emitting unit. In the projection onto the plane containing the first surface, the projection boundary line of the second sub-layer near the second light-emitting unit is the first projection boundary; the projection boundary line of the portion of the third sub-layer covering the second light-emitting unit near the first boundary line is the second projection boundary; and the projection boundary line of the portion of the third sub-layer extending from the boundary of the second light-emitting unit near the first projection boundary is the third projection boundary. The second projection boundary and the projection boundary line of the second light-emitting unit have an intersection point O. The first vertical distance between the intersection point O and the first projection boundary is D1. The vertical distance between any point on the second projection boundary and the first projection boundary is greater than the first vertical distance D1. The aforementioned distance settings increase the minimum distance between the second and third sub-layers, thus increasing the area of ​​the gap between them. Therefore, during subsequent soldering of the LED package, the risk of solder paste melting and entering the second sub-layer from the third sub-layer is reduced, avoiding interconnection problems between adjacent sub-layer circuits. Consequently, problems such as color bleeding, reduced color purity, and decreased color reproducibility in the display panel formed by the aforementioned package can be avoided when illuminated, improving the display effect.

[0013] Alternatively, the aforementioned wiring layer can be configured to include a first wiring layer and a second wiring layer located below and above an insulating spacer layer, respectively. The first wiring layer connects to the first electrodes of each light-emitting diode, and the second wiring layer forms the aforementioned sub-layers and is connected to the first wiring layer and each second electrode via vias in the insulating spacer layer. This configuration of the wiring layer allows the second wiring layer to have a larger distribution space, thereby increasing the area of ​​the pad region formed by the second wiring layer without changing the package size. Even when the package size is further reduced, sufficient pad region area can still be provided to ensure the functional integrity and reliability of the package. Attached Figure Description

[0014] Figure 1 The diagram shown is a top view of a light-emitting element package in the prior art.

[0015] Figure 2 The diagram shown is a top view of the light-emitting diode package provided in Embodiment 1 of this application.

[0016] Figure 3 Displayed as along Figure 2 The diagram shows a cross-sectional structure of line AA.

[0017] Figure 4 Displayed as self Figure 3 The diagram shows a top view of the wiring layer towards the transparent layer.

[0018] Figure 5 The diagram shows the structure of the light-emitting unit in a diode package.

[0019] Figure 6 The diagram shown is a top view of an optional embodiment of a light-emitting diode package, and also a top view from the wiring layer to the transparent layer.

[0020] Figure 7a and Figure 7b The diagram shown is a top view of the LED package, which is an optional embodiment. It is also a top view of the structure from the wiring layer to the transparent layer.

[0021] Figure 8 This diagram shows a top view of the light-emitting diode package provided in Embodiment 2 of this application. For ease of illustration, the first insulating layer is not shown.

[0022] Figure 9 Displayed as along Figure 8 The diagram shows a cross-sectional view of line BB.

[0023] Figure 10 The diagram shown is a planar structural schematic of the light-emitting device provided in Embodiment 3 of the present invention.

[0024] Figure 11 Displayed as along Figure 10 A cross-sectional structural diagram of CC.

[0025] Figure Labels

[0026] 11. First welding area; 12. Second welding area; 13. Third welding area; 130. Connecting lines; 14. Fourth welding area.

[0027] 100. Light-emitting diode package; 101. Transparent layer; 1011. First surface; 1012. Second surface; 102. Adhesive layer; 103. Filler layer; 104. Light-emitting unit; 1041. First light-emitting unit; 1042. Second light-emitting unit; 1043. Third light-emitting unit; 104-1. First electrode; 104-2. Second electrode; 105. Wiring layer; 105'. First wiring layer; 115. First sublayer; 1151. First solder pad area; 1152. First connection. Area; 125, Second Sublayer; 1251, Second Pad Area; 1252, Second Connection Area; 135, Third Sublayer; 1351, Third Pad Area; 1352, Third Connection Area; 145, Fourth Sublayer; 1451, Fourth Pad Area; 1452, Fourth Connection Area; 155, Extension Area; 106, First Insulating Layer; 107, Pad Protective Layer; 108, Second Insulating Layer; 109, Second Wiring Layer; E1, First Projection Boundary; E2, Second Projection Boundary; E3, Third Projection Boundary;

[0028] 10401, First conductivity type semiconductor layer; 10402, Active layer; 10403, Second conductivity type semiconductor layer; 10404, Insulating protective layer;

[0029] 200, Light-emitting device; 201, Circuit board; 202, Light-emitting body; 203, Circuit layer; 204, Housing; 205, Solder pad. Detailed Implementation

[0030] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0031] like Figure 1 As shown, the existing light-emitting element package includes a red light chip R, a green light chip G, and a blue light chip B. The package's circuit layer includes: a first soldering area 11 connecting to the first electrode of the red light chip R; a second soldering area 12, a third soldering area 13, and a fourth soldering area 14 respectively connecting to the second electrodes of the red light chip R, the green light chip G, and the blue light chip B, wherein the second soldering area 12 and the third soldering area 13 are located on the same side of the package. Figure 1As shown, since the chips are arranged side by side, the third soldering area 13 also extends to the connection line 130 of the second electrode of the green light chip G. Due to the size limitation of the package, the distance W between the connection line 130 and the second soldering area 12 is limited. During the soldering process of the package, because the distance W between the second soldering area 12 and the connection line 130 is too narrow, some solder paste will overflow from the second soldering area 12 and connect with the connection line 130. When the display screen is lit, the package with solder paste connection will have color mixing and cross-coloring phenomena, affecting the display effect. To address this problem, this application provides a light-emitting diode package and a light-emitting device, which will now be described in detail through the following embodiments.

[0032] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Although the illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components, the shape, quantity, positional relationship and proportion of each component can be arbitrarily changed under the premise of realizing the technical solution of this invention, and the layout of the components may also be more complex.

[0033] Example 1

[0034] This embodiment provides a light-emitting diode package, such as Figures 2 to 4 As shown, the light-emitting diode package 100 of this embodiment includes a transparent layer 101, a plurality of light-emitting units 104, and a wiring layer 105. The transparent layer 101 has a first surface 1011 and a second surface 1012 disposed opposite to each other, and the plurality of light-emitting units 104 are disposed on the first surface 1011 of the transparent layer 101. Figure 3 As shown, an adhesive layer 102 is provided between the plurality of light-emitting units 104 and the transparent layer 101, and the adhesive layer 102 adheres and fixes the plurality of light-emitting units 104 to the transparent layer 101. The first surface 1011 side of the transparent layer 101 is used to fix the light-emitting units 104 and form each functional component, and the second surface 1012 side serves as the light-emitting side of the package.

[0035] In optional embodiments, the transparent layer 101 can be selected from inorganic light-transmitting materials such as glass, transparent ceramics, and sapphire. To facilitate use by the client while ensuring good light emission performance of the light-emitting diode, the thickness of the transparent layer 101 is preferably greater than 10 μm, specifically preferably 30 μm to 50 μm, 50 μm to 100 μm, or 100 μm to 300 μm.

[0036] Reference Figure 5 Each of the above-mentioned light-emitting units 104 includes a light-emitting epitaxial layer, an insulating protective layer 10404 located above the epitaxial layer, and an electrode formed above the insulating protective layer 10404.

[0037] Specifically, such as Figure 5As shown, the light-emitting epitaxial layer includes a first conductivity type semiconductor layer 10401, an active layer 10402, and a second conductivity type semiconductor layer 10403 stacked sequentially. The first conductivity type semiconductor layer 10401, the active layer 10402, and the second conductivity type semiconductor layer 10403 may include Ш-V nitride semiconductors, such as nitride semiconductors like Al, Ga, and In. The first conductivity type semiconductor layer 10401 may include n-type impurities (e.g., Si, Ge, Sn), and the second conductivity type semiconductor layer 10403 may include p-type impurities (e.g., Mg, Sr, Ba). It is understood that the dopants of the first conductivity type semiconductor layer 10401 and the second conductivity type semiconductor layer 10403 may also be the opposite of those described above. The active layer 10402 may include a multiple quantum well (MQW) structure, and the desired wavelength can be emitted from the active layer 10402 by adjusting the composition ratio of the nitride semiconductors. The electrodes formed on the insulating protective layer 10404 include a first electrode 104-1 and a second electrode 104-2. The first electrode 104-1 is electrically connected to the first conductivity type semiconductor layer 10401, and the second electrode 104-2 is electrically connected to the second conductivity type semiconductor layer 10403. Optionally, the light-emitting unit 104 may include structures with other optimized functions. The side of the light-emitting epitaxial layer opposite to the first electrode 104-1 and the second electrode 104-2 is the light-emitting side of the light-emitting unit 104.

[0038] In an optional embodiment, the light-emitting unit 104 mainly refers to a micron-sized light-emitting diode, with a width and length ranging from 2μm to 5μm, 5μm to 10μm, 10μm to 20μm, 20μm to 50μm, or 50μm to 100μm, and a thickness ranging from 2μm to 15μm, preferably 5μm to 10μm. In this embodiment, the light-emitting diode package 100 includes a first light-emitting unit 1041, a second light-emitting unit 1042, and a third light-emitting unit 1043. The first light-emitting unit 1041 can be a red light chip, the second light-emitting unit 1042 can be a green light chip, and the third light-emitting unit 1043 can be a blue light chip. The light-emitting units 104 are formed as RGB three-element pixels. Optionally, the thickness difference between the light-emitting units 104 is less than or equal to 5μm, which can effectively improve the transfer yield of the light-emitting units 104 onto the transparent layer 101, thereby improving the light emission effect of the package.

[0039] Refer again Figure 3The adhesive layer 102 adheres the light-emitting unit 104 to the transparent layer 101 via the light-emitting side of the self-emissive unit 104. The first electrode 104-1 and the second electrode 104-2 of each light-emitting unit 104 face away from the transparent layer 101. To avoid affecting the light emission effect of the bonded light-emitting unit 104, the adhesive layer 102 is also a transparent material layer. The adhesive layer 102 can completely cover the entire first surface 1011 of the transparent layer 101, or it can be located only in the area below the light-emitting unit 104, allowing the light-emitting unit 104 to adhere to the transparent layer 101 via the adhesive layer 102. Different light-emitting units 104 typically have different thicknesses. By setting the adhesive layer 102, the height difference of the light-emitting surfaces of each light-emitting unit 104 can be reduced, allowing the light emitted from the side of the self-emissive unit 104 to be absorbed by the filling layer 103 as much as possible, thereby improving the contrast of the light-emitting module. To ensure that the alignment accuracy of each light-emitting unit 104 is not affected, the thickness of the adhesive layer 102 is preferably 1μm to 15μm or 3μm to 10μm.

[0040] Optionally, a filling layer 103 is further provided between each light-emitting unit 104 above the adhesive layer 102. The filling layer 103 can be a light-absorbing material layer such as black glue to absorb the light radiated by each light-emitting unit 104 and prevent light crosstalk between adjacent light-emitting units 104 (e.g., color mixing or light interference). Optionally, the filling layer 103 can be a component formed by dispersing black filler components with a particle size of no more than 1 μm in transparent or translucent materials such as silicone, epoxy resin, polyimide, low-temperature glass, polysiloxane, and polysilazane. The black filler components in the filling layer 103 include, but are not limited to, carbon black, titanium nitride, iron oxide, iron(II,III) oxide, and iron powder.

[0041] The filling layer 103 covers at least 50% of the sidewall height of the light-emitting unit 104, preferably all sidewalls, to prevent color mixing or light interference between adjacent light-emitting units 104, thereby improving the contrast of the light-emitting module. Alternatively, the thickness of the filling layer 103 can be greater than the thickness of the light-emitting element 200 to prevent light interference caused by light leakage from the bottom of the light-emitting element 200. The filling layer 103 exposes the first electrode 104-1 and the second electrode 104-2 of the light-emitting unit 104.

[0042] like Figure 3 As shown, the wiring layer 105 is located above the light-emitting unit 104. Specifically, the wiring layer 105 is located above the light-emitting unit 104 and above the filling layer 103. Figures 2 to 4As shown, the wiring layer 105 includes multiple spaced-apart sublayers, specifically: a first sublayer 115 connected to the first electrode 104-1 of the first light-emitting unit 1041, the second light-emitting unit 1042, and the third light-emitting unit 1043; a second sublayer 125 connected to the second electrode 104-2 of the first light-emitting unit 1041; a third sublayer 135 connected to the second electrode 104-2 of the second light-emitting unit 1042; and a fourth sublayer 145 connected to the second electrode 104-2 of the third light-emitting unit 1043. Specifically, the first sublayer 115 partially covers the first electrode 104-1 of the first light-emitting unit 1041, for example, covering 1 / 3 to 2 / 3 of the first electrode 104-1 of the first light-emitting unit 1041. Then, it extends from the first electrode 104-1 of the first light-emitting unit 1041 to the second light-emitting unit 1042, covering the first electrode 104-1 of the second light-emitting unit 1042, and then extends to the third light-emitting unit 1043 until it covers the first electrode 104-1 of the third light-emitting unit 1043. The wiring layer 105 can also partially or completely cover the first electrodes 104-1 of the second light-emitting unit 1042 and the third light-emitting unit 1043. This wiring layer 105 can be formed by sputtering. To facilitate the subsequent distribution and design of the solder pad area, such as... Figure 2 As shown, the first light-emitting unit 1041, the second light-emitting unit 1042, and the third light-emitting unit 1043 are along the first direction (i.e., Figure 2 The first electrode 104-1 and the second electrode 104-2 of each light-emitting unit 104 are arranged sequentially at intervals along the second direction (i.e., the Y direction shown). Figure 2 The wiring layer 105 is disposed above each light-emitting unit 104 in an insulated manner (in the X direction shown). With the centerline of the package in the first direction as the boundary, the first electrodes 104-1 of the first light-emitting unit 1041 and the second light-emitting unit 1042 are located on the same side along the second direction, while the first electrode 104-1 of the third light-emitting unit 1043 is located on the opposite side along the second direction. The wiring layer 105 covers the first electrodes 104-1 of each light-emitting unit and maintains a certain distance from the second electrodes 104-2 of each light-emitting unit, especially from the second electrodes 104-2 of the second light-emitting unit 1042 and the third light-emitting unit 1043, to ensure mutual insulation from the second electrodes 104-2 of each light-emitting unit.

[0043] Each sublayer of wiring layer 105 includes a connection area and a pad area. The first sublayer 115 includes a first connection area 1152 connecting the first electrode 104-1 of the first light-emitting unit 1041, the second light-emitting unit 1042, and the third light-emitting unit 1043, and a first pad area 1151 extending from the first connection area 1152. The second sublayer 125 includes a second connection area 1252 connecting the second electrode 104-2 of the first light-emitting unit 1041, and a second pad area 1251 extending from the second connection area 1252. The third sublayer 135 includes a third connection area 1352 connecting the second electrode 104-2 of the second light-emitting unit 1042, and a third pad area 1351 extending from the third connection area 1352. The fourth sublayer 145 includes a fourth connection area 1452 connecting the second electrode 104-2 of the third light-emitting unit 1043, and a fourth pad area 1451 extending from the fourth connection area 1452.

[0044] like Figure 4 As shown, in the projection of the plane containing the first surface 1011 of the transparent layer 101, the projection boundary line of the second sub-layer 125 near the second light-emitting unit 1042 is the first projection boundary E1. The projection boundary line of the portion of the third sub-layer 135 covering the second light-emitting unit 1042 (specifically, the second electrode 104-2 of the second light-emitting unit 1042) near the first projection boundary E1 is the second projection boundary E2. The projection boundary line of the portion of the third sub-layer 135 extending from the boundary of the second light-emitting unit 1042 near the first projection boundary E1 is the third projection boundary E3. The second projection boundary E2 and the projection boundary line of the second light-emitting unit 1042 have an intersection point O. The first vertical distance between the intersection point O and the first projection boundary E1 is D1. The vertical distance between any point on the third projection boundary E3 and the first projection boundary E1 is greater than this first vertical distance D1. That is, as... Figure 4 As shown, after the third connection area 1352 extends to the edge of the second light-emitting unit 1042, it extends directly downwards to form the third solder pad area 1351 in the lower right corner area of ​​the package, i.e. Figure 4 As shown, the third projection boundary E3 of the third connection region 1352 is a smooth line segment.

[0045] In optional embodiments, such as Figure 6 As shown, the third projection boundary E3 of the third connecting area 1352 can also be formed as an arc-shaped line segment, and the vertical distance from any point on this arc-shaped line segment to the first projection boundary E1 is also less than the first vertical distance D1. In another optional embodiment, as shown... Figure 7a As shown, the third projection boundary E3 of the third connecting region 1352 can also be formed as a broken line, and the vertical distance from any point on this broken line to the first projection boundary E1 is also less than the first vertical distance D1. Figure 7bAs shown, in another optional embodiment, the third projection boundary E3 of the third connection area 1352 is also a polygonal line, wherein the projection boundary E31 near the first projection boundary E1 of the second sub-layer is parallel to the first projection boundary E1, and the distance between the projection boundary E31 and the first projection boundary E1 is also less than the first vertical distance D1. That is, as Figure 7b As shown, the intersection point Q of the projection boundary E31 and the projection boundary line of the second light-emitting unit 1042 near the first projection boundary E1 of the second sub-layer 125 is further away from the first projection boundary E1 than the intersection point O. The above-mentioned distance setting increases the design diversity of the third connection area 1352.

[0046] As will be described below, a first insulating layer 106 is formed above the wiring layer 105. Due to poor adhesion between the first insulating layer 106 and the wiring layer 105, tiny gaps or holes may appear between them. During subsequent soldering of the LED package 100, molten solder paste can easily seep into these gaps or holes, potentially causing interconnection between the second sublayer 125 and the third sublayer 135. The aforementioned arrangement of the third connection area 1352 increases the spacing between the second pad area 1251 and the third pad area 1352, correspondingly increasing the area of ​​the spacing region. Therefore, during soldering of the LED package 100, the overflow of solder paste from the second pad area 1251 to the third connection area 1352 can be avoided, preventing circuit interconnection and thus avoiding optical crosstalk, improving light emission and display effects.

[0047] Optionally, there is a minimum distance S between the intersection point O and the projected boundary line of the second sub-layer 125 (specifically, the second pad area 1251), where S ≥ D1. When the second pad area 1251 extends to cover the first light-emitting unit 1041, the minimum distance S is equal to the first vertical distance D1. In an optional embodiment, 5μm ≤ S ≤ 40μm, further, 20μm ≤ S ≤ 35μm, and even further, 25μm ≤ S ≤ 30μm, for example, it can be 25μm, 26μm, 28μm, etc. The first vertical distance D1 satisfies: 0 < D1 ≤ 50μm, further, 15μm ≤ D1 ≤ 20μm. For example, it can be 15μm, 18μm, 20μm, etc. Similarly, as... Figure 3As shown, the minimum vertical distance between the projected boundaries of the two opposite sides of the second solder pad area 1251 and the third solder pad area 1351 is the second vertical distance D2. The second vertical distance D2 satisfies: 30μm≤D2≤100μm, and further, 50μm≤D2≤70μm. For example, D2 can be 50μm, 55μm, 60μm, 65μm, 70μm, etc. This setting of the second vertical distance D2 ensures that there is sufficient spacing between the second solder pad area 1251 and the third solder pad area 1351, preventing them from being connected in series. At the same time, the setting of the second vertical distance also ensures that the second solder pad area 1251 and the third solder pad area 1351 each have sufficient welding area, ensuring the stability and reliability of the package after welding.

[0048] In optional embodiments, the wiring layer 105 can be a single-layer structure or a multi-layer structure. For example, it can be a single-layer structure formed by a single metal material or a multi-layer structure formed by multiple metal materials. The thickness of the wiring layer 105 is between 1 μm and 5 μm, for example, it can be 1.5 μm, 2 μm, 2.5 μm, etc. Further optionally, the wiring layer 105 is a bilayer structure formed by two metal materials, wherein the bottom layer, that is, the layer directly in contact with the electrode of the light-emitting unit 104, is a Ti layer, and the top layer, that is, the layer located above the bottom layer, is a Cu layer. The thickness of the bottom layer is between 100 nm and 1000 nm, and the thickness of the top layer is between 500 nm and 2000 nm.

[0049] Similarly, refer to Figures 2 to 4 The aforementioned wiring layer 105 also includes dendritic extension regions 155 extending from each solder pad area, extending to and flush with the edge of the LED package 100. Additionally, the LED package 100 includes a first insulating layer 106 covering the wiring layer 105 and forming openings in each solder pad area to expose the respective solder pad area. The first insulating layer 106 may be, for example, one or more combinations of inorganic insulating materials such as silicon oxide, silicon nitride, and silicon oxynitride, or an organic insulating material such as resin. The thickness of the first insulating layer 106 is between 2 μm and 20 μm, enabling it to adequately protect the underlying wiring layer from external moisture, impurities, etc.

[0050] like Figure 2As shown, each solder pad area is formed at one of the four corners of the LED package 100. A first insulating layer 106 is formed in the middle region of the LED package 100 between the solder pad areas, forming a cross-shaped structure. That is, the openings formed by the first insulating layer 106 in the solder pad areas create an open structure on both edges of the LED package 100 in that region. The first insulating layer 106 at the open structure completely covers the extension region 155. For example, the sidewall of the first insulating layer 106 can be flush with the sidewall of the extension region 155, or it can extend beyond the sidewall of the extension region 155. Figure 2 As shown, in the projection of the plane containing the first surface 1011, there is a distance D3 between the projected boundary line of the first insulating layer 106 at the opening and the projected boundary line of the extension region 155. This distance D3 satisfies: 0 ≤ D3 ≤ 15 μm. When D3 = 0, the sidewall of the extension region 155 is flush with the sidewall of the first insulating layer 106.

[0051] Similarly, Figure 3 As shown, to protect the solder pad area, a solder pad protection layer 107 is formed above the solder pad area to prevent defects such as oxidation and damage to the metal layer of the solder pad area. This solder pad protection layer 107 is preferably a material layer that is oxidation-resistant and has stable performance. For example, it can be an Au layer or an OSP (organic solderability protection layer). This solder pad protection layer 107 effectively protects the integrity and electrical reliability of the solder pad area of ​​the wiring layer 105, thereby improving the reliability and stability of the light-emitting diode package 100.

[0052] Example 2

[0053] This embodiment also provides a light-emitting diode package, such as Figure 8 and Figure 9 As shown, the LED package 100 of this embodiment also includes a transparent layer 101, a plurality of light-emitting units 104, and a wiring layer. The transparent layer 101 has a first surface 1011 and a second surface 1012 disposed opposite to each other, and the plurality of light-emitting units 104 are disposed on the first surface 1011 of the transparent layer 101. Figure 3 As shown, an adhesive layer 102 is provided between multiple light-emitting units 104 and the transparent layer 101, and the adhesive layer 102 adheres and fixes the multiple light-emitting units 104 to the transparent layer 101. The first surface 1011 side of the transparent layer 101 is used to fix the light-emitting units 104 and form each functional component, and the second surface 1012 side serves as the light-emitting side of the package. The similarities to Embodiment 1 will not be repeated, but the differences are:

[0054] In this embodiment, the wiring layer includes two layers: a first wiring layer 105' and a second wiring layer 109, with a second insulating layer 108 formed between the first wiring layer 105' and the second wiring layer 109. The second wiring layer 109 is formed above the light-emitting unit 104 and the filling layer 103, connecting the first electrode 104-1 of each light-emitting unit 104. Optionally, the second wiring layer 109 covers a portion of the first electrode 104-1 of the first light-emitting unit 1041.

[0055] The second insulating layer 108 covers the second wiring layer 109 or may cover the entire surface of the package in which the second wiring layer 109 is formed. A first wiring layer 105' is formed above the second insulating layer 108. The second insulating layer 108 has multiple through-holes located in the regions where the first electrode 104-1 and the second electrode 104-2 of the first light-emitting unit 1041 are located, and in the regions where the second electrode 104-2 of the second light-emitting unit 1042 and the third light-emitting unit 1043 are located. The first wiring layer 105' is connected to the second wiring layer 109 and each of the second electrodes 104-2 via the aforementioned through-holes, thereby forming sub-wiring layers above the second insulating layer 108. The arrangement of each sub-wiring layer can be referred to the description in Embodiment 1.

[0056] In optional embodiments, the first wiring layer 105' can be a single-layer structure or a multi-layer structure. For example, it can be a single-layer structure formed by a single metal material or a multi-layer structure formed by multiple metal materials. The thickness of the first wiring layer 105' is between 1 μm and 5 μm, for example, it can be 1.5 μm, 2 μm, 2.5 μm, etc. Further optionally, the first wiring layer 105' is a bilayer structure formed by two metal materials, wherein the bottom layer is a Ti layer and the top layer, i.e., the layer above the bottom layer, is a Cu layer. The thickness of the bottom layer is between 100 nm and 1000 nm, and the thickness of the top layer is between 500 nm and 2000 nm.

[0057] In an optional embodiment, the second insulating layer 108 can also be one or more of silicon oxide, silicon nitride, and silicon oxynitride. The thickness of the second insulating layer 108 is between 2 μm and 10 μm, so that the second insulating layer 108 can completely cover the second wiring layer 109 and ensure the mutual insulation requirements between the various parts of the subsequently formed first wiring layer 105'. In an optional embodiment, the upper surface of the second insulating layer 108 is formed as a flat surface to facilitate the uniform formation of the first wiring layer 105'.

[0058] like Figure 8As shown, the through holes in the second insulating layer 108 are respectively a first through hole exposing the second wiring layer 109, a second through hole, a third through hole, and a fourth through hole exposing the second electrodes 104-2 of the first light-emitting unit 1041, the second light-emitting unit 1042, and the third light-emitting unit 1043. As described above, the second wiring layer 109 covers part of the first electrode 104-1 of the first light-emitting unit 1041. In this embodiment, the first through hole is configured to expose part of the surface of the second wiring layer 109 and part of the surface of the first electrode 104-1, or the first through hole only exposes part of the surface of the first electrode 104-1. That is, as Figure 8 As shown, in the projection on the plane of the first surface 1011, the projection outline of the first through hole coincides with the projection of the first electrode 104-1 of the first light-emitting unit 1041 and a portion of the projection of the second wiring layer 109 located above the first electrode 104-1; or the projection outline of the first through hole is located within the projection range of the first electrode 104-1 of the first light-emitting unit 1041 that is not covered by the second wiring layer 109. The projection boundary of the second through hole is located within the projection range of the second electrode 104-2 of the first light-emitting unit 1041; the projection boundary of the third through hole is located within the projection range of the second electrode 104-2 of the second light-emitting unit 1042; and the projection boundary of the fourth through hole is located within the projection range of the second electrode 104-2 of the third light-emitting unit 1043. It is understood that the projection boundary of the second through hole can overlap with the projection boundary of the second electrode 104-2 of the first light-emitting unit 1041, the projection boundary of the third through hole can overlap with the projection boundary of the second electrode 104-2 of the second light-emitting unit 1042, and the projection boundary of the fourth through hole can overlap with the projection boundary of the second electrode 104-2 of the third light-emitting unit 1043.

[0059] Similarly, the second wiring layer 109 can be a single-layer structure formed of a single conductive material, or a multi-layer structure formed of multiple conductive materials. In an optional embodiment, the second wiring layer 109 is a single-layer structure formed of Cu, or it can be a double-layer structure formed by sequentially forming Ti and Cu layers, or a three- or more-layer structure formed by alternating stacking of Ti and Cu.

[0060] The first wiring layer 105' is formed on the second insulating layer 108, and the second insulating layer 108 provides insulation for the second wiring layer 109 in areas other than the first through-hole. Therefore, the first wiring layer 105' has a relatively large forming space, which allows for a more reasonable arrangement of the various sub-layers of the first wiring layer 105'. Specifically, the area ratio of each sub-layer, its relative position on the first spacer layer, and the spacing between adjacent sub-layers can be set more reasonably. This reduces the forming difficulty of the first wiring layer 105' and also facilitates the overall symmetrical arrangement of the package.

[0061] Example 3

[0062] This embodiment provides a semiconductor light-emitting device, such as... Figure 10 and Figure 11 As shown, the light-emitting device 200 includes a circuit board 201 and a plurality of light-emitting elements 202 electrically connected to the circuit board 201. In this embodiment, the light-emitting elements 202 are semiconductor light-emitting elements provided in Embodiment 1. Similarly, as... Figure 11 As shown, the circuit board 210 has several sets of pads 205. The pad area of ​​each light-emitting element 202 is electrically connected to a set of pads 205. Additionally, a circuit layer 203 is provided in the circuit board 201, and the light-emitting element 202 is electrically connected to the circuit layer 203 via the pads 205. Figure 10 and Figure 11 As shown, the light-emitting device 200 may further include a housing 204 to protect the light-emitting element from external contamination or damage, while not affecting the light emission effect of the light-emitting element. The aforementioned arrangement of the wiring layer and solder pad area of ​​the light-emitting diode package in this application increases the bonding force between the package and the solder pad, thereby improving the reliability of the device.

[0063] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A light-emitting diode package, characterized in that, include: A transparent layer having a first surface and a second surface disposed opposite to each other; Multiple light-emitting units are disposed on the first surface of the transparent layer. Each light-emitting unit includes a first electrode and a second electrode. The multiple light-emitting units include a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit arranged sequentially along a first direction. A wiring layer is located above the light-emitting unit. The wiring layer includes multiple sub-layers spaced apart from each other: a first sub-layer connecting the first electrode of the multiple light-emitting units, a second sub-layer connecting the second electrode of the first light-emitting unit, a third sub-layer connecting the second electrode of the second light-emitting unit, and a fourth sub-layer connecting the second electrode of the third light-emitting unit. In the projection of the plane containing the first surface, the projection boundary line of the second sub-layer near the second light-emitting unit is the first projection boundary, the projection boundary line of the portion of the third sub-layer covering the second light-emitting unit near the first projection boundary is the second projection boundary, and the projection boundary line of the portion of the third sub-layer extending from the boundary of the second light-emitting unit near the first projection boundary is the third projection boundary. The second projection boundary and the projection boundary line of the second light-emitting unit have an intersection point O. The first vertical distance between the intersection point O and the first projection boundary is D1. The vertical distance between any point on the third projection boundary and the first projection boundary is greater than the first vertical distance D1.

2. The light-emitting diode package according to claim 1, characterized in that, The first vertical distance D1 satisfies: 0 < D1 ≤ 50 μm.

3. The light-emitting diode package according to claim 1, characterized in that, The intersection point O has a minimum distance S between it and the projection boundary line of the second sub-layer, where S≥D1 and 5 μm≤S≤40 μm.

4. The light-emitting diode package according to claim 1, characterized in that, Each sublayer of the wiring layer includes a connection area and a pad area. The connection area connects to the light-emitting unit, and the pad area extends from the connection area. The third sublayer includes a third connection area that connects to the second electrode of the second light-emitting unit and extends outward from the boundary of the second light-emitting unit, and a third pad area that connects to the third connection area. The minimum vertical distance between the projected boundary line of the third pad area and the first projected boundary is a second vertical distance D2, where 30 μm ≤ D2 ≤ 100 μm.

5. The light-emitting diode package according to claim 1, characterized in that, The third sublayer includes a third connection region that connects to the second electrode of the second light-emitting unit and extends outward from the boundary of the second light-emitting unit, and a third pad region connected to the third connection region. The projected boundary line of the third connection region includes the second projected boundary, which is a smooth curve, a broken line, or a combination of a smooth curve and a broken line.

6. The light-emitting diode package according to claim 1, characterized in that, The first sublayer includes a first connection area and a first pad area, wherein the first connection area connects the first light-emitting unit, the second light-emitting unit and the first electrode of the third light-emitting unit.

7. The light-emitting diode package according to claim 1, characterized in that, The wiring layer also includes an extension region that extends from the pad areas of the plurality of sublayers to the edge of the light-emitting diode package.

8. The light-emitting diode package according to claim 7, characterized in that, It also includes a first insulating layer that covers the wiring layer and forms an opening in the pad area of ​​the wiring layer to expose the pad area. At the opening, the first insulating layer completely covers the extension area, and in the projection of the plane containing the first surface, there is a distance D3 between the projected boundary line of the opening and the projected boundary line of the extension area, where 0≤D3≤15 μm.

9. The light-emitting diode package according to claim 8, characterized in that, In the projection on the plane where the first surface is located, the projection of the first insulating layer is in the shape of a cross, and the projection of the solder pad area of ​​the wiring layer is located at the four corners of the cross shape.

10. The light-emitting diode package according to claim 1, characterized in that, The wiring layer includes a first wiring layer and a second wiring layer. The first wiring layer forms a plurality of mutually spaced sub-layers. The second wiring layer connects to the first electrodes of the plurality of light-emitting units. A second insulating layer is formed between the first wiring layer and the second wiring layer. A through-hole is formed in the second insulating layer. The first wiring layer is connected to the second wiring layer and the second electrode of the light-emitting unit through the through-hole.

11. The light-emitting diode package according to claim 1, characterized in that, Each sublayer of the wiring layer includes a connection area and a solder pad area. The connection area connects to the light-emitting unit, and the solder pad area extends from the connection area and forms a solder pad protection layer.

12. The light-emitting diode package according to claim 1, characterized in that, It also includes an adhesive layer located between the light-emitting unit and the transparent layer to fix the light-emitting unit to the transparent layer.

13. The light-emitting diode package according to claim 1, characterized in that, The first electrode and the second electrode of each of the light-emitting units are spaced apart in a second direction, wherein the first electrodes of the first light-emitting unit and the second light-emitting unit and the second electrode of the third light-emitting unit are located on the same side in the second direction, wherein the first direction and the second direction intersect.

14. The light-emitting diode package according to claim 1, characterized in that, The first light-emitting unit is a red light chip, the second light-emitting unit is a green light chip, and the third light-emitting unit is a blue light chip.

15. A light-emitting device, characterized in that, It includes a circuit board and a plurality of light-emitting elements fixed to the circuit board, wherein the light-emitting elements include the light-emitting diode package as described in any one of claims 1 to 14.

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