Pixel driving circuit and display device

Abstract

The application discloses a pixel driving circuit and a display device, and relates to the display field, and comprises a light-emitting driving module, a compensation module and a light-emitting module; the control end of the light-emitting driving module is connected with a calibration voltage, the output end of the light-emitting driving module is connected with the input end of the light-emitting module, the compensation end of the light-emitting driving module is connected with the detection end of the compensation module, and the input end of the compensation module is connected with the input end of the light-emitting module; the compensation module is used for detecting the first threshold drift of the light-emitting driving module in a preprocessing stage, and storing a driving compensation voltage; the light-emitting module is used for performing light-emitting operation on the basis of the driving current transmitted by the turned-on light-emitting driving module in a light-emitting stage, wherein the driving current is generated based on the driving compensation voltage and the calibration voltage, and the first threshold drift in the driving compensation voltage at least partially offsets the second threshold drift existing in the turned-on light-emitting driving module. The application solves the technical problem of display unevenness caused by threshold voltage drift.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a pixel driving circuit and display device. Background Technology

[0002] AMOLED (Active-matrix organic light-emitting diode) displays have become a core display technology for consumer electronics products such as smartphones and tablets due to their self-emissive characteristics, high contrast ratio, and wide viewing angle. As a key component of AMOLED displays, the design of the pixel driving circuit directly determines the display's brightness uniformity, grayscale accuracy, and energy efficiency.

[0003] However, in scenarios involving large-size and long-term use, conventional pixel driving circuits are prone to threshold voltage drift caused by process variations or device aging in the driving thin-film transistors. This drift can lead to the pixel driving current deviating from the preset value, resulting in uneven screen brightness. Therefore, there is currently a technical problem of display unevenness caused by threshold voltage drift. Summary of the Invention

[0004] The main objective of this application is to provide a pixel driving circuit and display device, which aims to solve the technical problem of uneven display caused by threshold voltage drift.

[0005] To achieve the above objectives, this application proposes a pixel driving circuit, which includes a light-emitting driving module, a compensation module, and a light-emitting module. The control terminal of the light-emitting driving module is connected to the calibration voltage, the output terminal of the light-emitting driving module is connected to the input terminal of the light-emitting module, the compensation terminal of the light-emitting driving module is connected to the detection terminal of the compensation module, and the input terminal of the compensation module is connected to the input terminal of the light-emitting module. The compensation module is used to detect the first threshold drift of the light-emitting driving module in the preprocessing stage and store it to form a driving compensation voltage. The light-emitting module is used to perform light-emitting operation based on the driving current input from the conducting light-emitting driving module during the light-emitting stage, wherein the driving current is generated based on the driving compensation voltage and the calibration voltage, and the first threshold drift in the driving compensation voltage is at least partially offset by the second threshold drift present in the conducting light-emitting driving module.

[0006] In one embodiment, the light-emitting driving module includes a first dual-gate transistor, and the compensation module includes a second dual-gate transistor, a first single-gate transistor, and a storage capacitor; The first control terminal of the first dual-gate transistor is connected to the first control terminal, the second control terminal, and the output terminal of the second dual-gate transistor, respectively. The second control terminal of the first dual-gate transistor is connected to the calibration voltage. The input terminal of the first dual-gate transistor is connected to the positive power supply voltage terminal via a branch power line. The input terminal of the second dual-gate transistor is connected to the negative power supply voltage terminal; The control terminal of the first single-gate transistor is connected to the scan signal terminal, the input terminal of the first single-gate transistor is connected to the data voltage terminal, and the output terminal of the first single-gate transistor is connected to the connection line between the first dual-gate transistor and the second dual-gate transistor. The storage capacitor is connected in parallel with the second dual-gate transistor.

[0007] In one embodiment, the channel length and channel width of the first dual-gate transistor and the second dual-gate transistor are the same; The dielectric layer structure of the first control terminal of the first dual-gate transistor and the second dual-gate transistor is the same.

[0008] In one embodiment, the preprocessing stage includes an initialization stage; During the initialization phase, the scan signal terminal outputs a high-level scan signal to control the first single-gate transistor to enter the conduction state and connect the first data voltage on the data voltage terminal. The initial threshold voltage of the first dual-gate transistor is calibrated based on the first data voltage and the calibration voltage; simultaneously... The first data voltage is stored in the storage capacitor.

[0009] In one embodiment, the preprocessing stage includes a writing stage; During the writing phase, the scan signal terminal outputs a low-level scan signal, and the second dual-gate transistor is shorted to form a diode structure; The first threshold drift amount of the second dual-gate transistor is written into the storage capacitor, wherein the first threshold drift amount of the second dual-gate transistor is equal to the first threshold drift amount of the first dual-gate transistor, and the first threshold drift amount and the first data voltage constitute the drive compensation voltage.

[0010] In one embodiment, the pixel driving circuit further includes an adjustment capacitor, the upper stage of which is connected to the connection point of the light-emitting module and the light-emitting driving module, and the lower stage of which is connected to the data voltage terminal. The regulating capacitor is used to adjust the control terminal voltage on the control terminal of the light-emitting driving module according to the driving voltage at the connection point during the light-emitting stage, wherein the adjusted control terminal voltage at least partially cancels out the driving voltage.

[0011] In one embodiment, during the light-emitting stage, the driving voltage at the connection point between the first dual-gate transistor and the light-emitting module is detected by the adjustment capacitor, and the control terminal voltage at the first control terminal of the first dual-gate transistor is adjusted according to the driving voltage.

[0012] In one embodiment, the light-emitting module includes a light-emitting device; The positive terminal of the light-emitting device is connected to the output terminal of the first dual-gate transistor, and the negative terminal of the light-emitting device is connected to the negative power supply voltage terminal.

[0013] In one embodiment, during the light emission stage, the scanning signal terminal outputs a high-level scanning signal to control the first single-gate transistor to enter the conduction state, and controls the first dual-gate transistor to enter the conduction state based on the drive compensation voltage on the storage capacitor. The first dual-gate transistor transmits the driving current generated based on the driving compensation voltage, the second data voltage at the data voltage terminal, and the calibration voltage to the light-emitting device. Wherein, the first threshold drift in the driving compensation voltage is at least partially offset by the conduction threshold drift present when the first dual-gate transistor is turned on, and the calibration voltage is at least partially offset by the conduction threshold voltage present when the first dual-gate transistor is turned on.

[0014] In addition, to achieve the above objectives, this application also proposes a display device, which includes a display area and a non-display area, wherein the display area includes the pixel driving circuit described above.

[0015] One or more technical solutions proposed in this application have at least the following technical effects: A pixel driving circuit is proposed, comprising an emissive driving module, a compensation module, and an emissive module. The control terminal of the emissive driving module is connected to a calibration voltage, and the output terminal of the emissive driving module is connected to the input terminal of the emissive module. The emissive driving module is used to detect a first threshold drift during the preprocessing stage and store it to form a driving compensation voltage. During the emissive stage, the emissive module performs an emissive operation based on the driving current input from the conducting emissive driving module. The driving current is generated based on the driving compensation voltage and the calibration voltage, and the first threshold drift in the driving compensation voltage at least partially cancels out the second threshold drift present in the conducting emissive driving module.

[0016] In this application, the compensation module detects the initial threshold voltage deviation, i.e., the first threshold drift, in real time and stores the detected first threshold drift in the form of a driving compensation voltage. After entering the light emission stage, the light emission module generates a driving current based on the stored driving compensation voltage and calibration voltage. The first threshold drift in the driving compensation voltage and the second threshold drift that actually exist in the light emission stage are superimposed in reverse, thereby offsetting the influence of threshold drift on the driving current to a certain extent, thus solving the technical problem of uneven display caused by threshold voltage drift. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the pixel driving circuit module of this application; Figure 2 This is a schematic diagram of a feasible structure of the pixel driving circuit of this application; Figure 3 This is a timing diagram of an example of the pixel driving circuit in this application; Figure 4 This is a schematic diagram of the current path of the pixel driving circuit in this application during the initialization phase. Figure 5 This is a schematic diagram of the pixel driving circuit of this application, including the adjusting capacitor. Figure 6 This is a schematic diagram of the current path of the pixel driving circuit in the light-emitting stage of this application. Figure 7 This is a timing diagram of another example of the pixel driving circuit in this application.

[0020] Explanation of icon numbers: 10. Compensation module; 20. Light-emitting module; 30. Light-emitting driver module; Q1, First dual-gate transistor; Q2, Second dual-gate transistor; Q3, First single-gate transistor; C1, Storage capacitor; OLED, Light-emitting device; C2, Adjustment capacitor; VDD, positive power supply voltage; Vss, negative power supply voltage; Calibration voltage; Scan signal; Data voltage; A connection point.

[0021] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0022] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0023] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0024] The main solution of this application embodiment is as follows: a pixel driving circuit is proposed, which includes a light-emitting driving module, a compensation module, and a light-emitting module; the control terminal of the light-emitting driving module is connected to a calibration voltage, the output terminal of the light-emitting driving module is connected to the input terminal of the light-emitting module, the compensation terminal of the light-emitting driving module is connected to the detection terminal of the compensation module, and the input terminal of the compensation module is connected to the input terminal of the light-emitting module; the compensation module is used to detect a first threshold drift of the light-emitting driving module in the preprocessing stage and store it to form a driving compensation voltage; the light-emitting module is used to perform a light-emitting operation based on the driving current transmitted from the conducting light-emitting driving module in the light-emitting stage, wherein the driving current is generated based on the driving compensation voltage and the calibration voltage, and the first threshold drift in the driving compensation voltage is at least partially canceled out by the second threshold drift present in the conducting light-emitting driving module. The pixel driving circuit also includes an adjustment capacitor, the upper stage of which is connected to the connection point between the light-emitting module and the light-emitting driving module, and the lower stage of which is connected to the data voltage terminal. The adjustment capacitor is used to adjust the control terminal voltage on the control terminal of the light-emitting driving module according to the driving voltage at the connection point during the light-emitting stage, wherein the adjusted control terminal voltage at least partially cancels out the driving voltage.

[0025] Conventional pixel driving circuits face the following challenges under long-term use and the trend towards larger screen sizes: ① Threshold voltage drift caused by process deviations or device aging in the driving thin-film transistors (TFTs) leads to deviations in the pixel driving current from the preset value, resulting in uneven screen brightness; ② Inherent differences in TFT mobility cause deviations in output current under the same data voltage, leading to grayscale display distortion; ③ In large-size displays, the voltage drop effect caused by power line resistance further exacerbates driving voltage fluctuations, resulting in regional brightness differences. Although improved solutions such as 4T1C and 5T3C have been adopted to introduce compensation circuits to alleviate single interference factors, they can only solve single problems and cannot achieve comprehensive compensation. Therefore, there is an urgent need for a pixel driving solution that can collaboratively solve the problem of failing to improve display accuracy under multiple interference factors.

[0026] This application provides a solution in which the compensation module detects the initial threshold voltage deviation, i.e., the first threshold drift, and stores the detected first threshold drift in the form of a driving compensation voltage. After entering the light emission stage, the light emission module generates a driving current based on the stored driving compensation voltage and the calibration voltage. The first threshold drift in the driving compensation voltage and the second threshold drift that actually exist in the light emission stage are superimposed in reverse, thereby offsetting the effect of threshold drift on the driving current to a certain extent. The pixel driving circuit also includes an adjustment capacitor. During the light-emitting process, the adjustment capacitor can monitor the driving voltage at the connection point between the light-emitting driving module and the light-emitting module in real time. The adjustment capacitor can dynamically adjust the control terminal voltage of the light-emitting driving module, so that the data voltage transmitted to the light-emitting module through the compensation module is not affected by the transistor mobility difference when the light-emitting driving module is turned on, ensuring the grayscale accuracy of the display. At the same time, when the power line voltage drop causes the driving voltage to fluctuate, because the adjustment amplitude of the control terminal voltage is proportional to the deviation of the driving current and opposite in polarity, the voltage drop effect component in the driving current is offset by the reverse correction. That is, the dynamic adjustment based on the adjustment capacitor can not only avoid the driving current fluctuation caused by transistor mobility, but also compensate for the dynamic voltage drop of the power supply caused by the voltage drop effect. Through the closed-loop collaborative mechanism of the power generation driving module, compensation module, light-emitting module and adjustment capacitor, under the dual action of timing control and dynamic feedback, the interference of various factors such as threshold drift, mobility difference and voltage drop effect on the display effect is systematically suppressed. This allows the display device formed based on the pixel driving circuit proposed in this application to effectively improve the display accuracy and display uniformity.

[0027] It should be noted that the executing entity in this embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, or mobile phone, or an electronic device or display device capable of performing the above functions. The following description uses a display device as an example to illustrate this embodiment and the subsequent embodiments.

[0028] Based on this, embodiments of this application provide a pixel driving circuit, referring to... Figure 1 , Figure 1 This is a schematic diagram of the pixel driving circuit module of this application.

[0029] The pixel driving circuit includes a compensation module 10, a light-emitting module 20, and a light-emitting driving module 30; the control terminal of the compensation module 10 is connected to a calibration voltage. The output terminal of the light-emitting driving module 30 is connected to the input terminal of the light-emitting module 20, the compensation terminal of the light-emitting driving module 30 is connected to the detection terminal of the compensation module 10, and the input terminal of the compensation module 10 is connected to the input terminal of the light-emitting module 20. The compensation module 10 is used to detect the first threshold drift of the light-emitting driving module 30 during the preprocessing stage and store it to form a driving compensation voltage; the light-emitting module 20 is used to perform light emission operation based on the driving current input from the conducting light-emitting driving module 30 during the light emission stage, wherein the driving current is based on the driving compensation voltage and the calibration voltage. The generation of the first threshold drift in the driving compensation voltage is at least partially offset by the second threshold drift present in the conducting light-emitting driving module 30.

[0030] The pixel driving circuit proposed in this embodiment can be divided into three modules: compensation module 10, light emission module 20, and light emission driving module 30.

[0031] The compensation module 10 and the light-emitting driving module 30 operate before the light-emitting module 20 drives the pixels to emit light. They control the pixel driving circuit to enter the preprocessing stage first. In the preprocessing stage, they first detect the first threshold drift amount that affects the generated driving current in the pixel driving circuit. When the existence of the first threshold drift amount is detected, it is stored in the form of driving compensation voltage.

[0032] After the preprocessing stage is completed, the stored drive compensation voltage controls the light-emitting driver module 30 to enter the conducting state. This conduction operation is based on the stored drive compensation voltage, so the first threshold drift in the drive compensation voltage flows into the light-emitting driver module 30, and the output of the light-emitting driver module 30 becomes the drive current that drives the light-emitting module to emit light.

[0033] During the process of generating and outputting driving current through the light-emitting driving module 30, if there are device process deviations or device aging problems in the compensation module 10, there will be threshold voltage drift, i.e., second threshold drift. Therefore, the light-emitting driving module 30 is turned on by controlling the driving compensation voltage containing the first threshold drift, so that the first threshold drift in the driving compensation voltage can cancel the second threshold drift, thereby eliminating the influence of the existing threshold drift on the generated driving current to a certain extent, and avoiding uneven brightness of the display screen caused by the driving current deviating from the preset driving current due to the second threshold drift.

[0034] In this embodiment, the compensation module detects the initial threshold voltage deviation, i.e., the first threshold drift, in real time and stores the detected first threshold drift in the form of a driving compensation voltage. After entering the light emission stage, the light emission module generates a driving current based on the stored driving compensation voltage and calibration voltage. The first threshold drift in the driving compensation voltage and the second threshold drift that actually exist in the light emission stage are superimposed in reverse, thereby offsetting the influence of threshold drift on the driving current to a certain extent, thus solving the technical problem of uneven display caused by threshold voltage drift.

[0035] Regarding a feasible structure for compensation module 10, see reference. Figure 2 As shown, and combined with as Figure 3 The timing diagrams of the various stages involved in the pixel driving circuit shown are explained. Figure 3 In this diagram, T1 is the initialization stage, T2 is the writing stage, and T3 is the light emission stage.

[0036] Among them, according to Figure 3 It can be seen that the calibration voltage It is in an output state at all stages. In the preprocessing stage, the calibration voltage is... This is used to directly apply to the second control terminal of the first dual-gate transistor Q1 to establish a strong inversion layer; during the write phase, the storage voltage in the storage capacitor C1 is compared with the calibration voltage. Coupling forms an equivalent negative feedback; while in the light-emitting stage, the calibration voltage... Maintain the back channel potential of the first dual-gate transistor Q1 to suppress the drain-induced barrier reduction effect.

[0037] In this embodiment, the light-emitting driving module 30 includes a first dual-gate transistor Q1, and the compensation module 10 includes a second dual-gate transistor Q2, a first single-gate transistor Q3, and a storage capacitor C1. The first control terminal of the first dual-gate transistor Q1 is connected to the first control terminal, the second control terminal, and the output terminal of the second dual-gate transistor Q2, respectively, and the second control terminal of the first dual-gate transistor Q1 is connected to a calibration voltage. The input terminal of the first dual-gate transistor Q1 is connected to the positive power supply voltage terminal via a branch power supply line; the input terminal of the second dual-gate transistor Q2 is connected to the negative power supply voltage terminal; the control terminal of the first single-gate transistor Q3 is connected to the scan signal terminal, the input terminal of the first single-gate transistor Q3 is connected to the data voltage terminal, and the output terminal of the first single-gate transistor Q3 is connected to the connection line between the first dual-gate transistor Q1 and the second dual-gate transistor Q2; the storage capacitor C1 is connected in parallel with the second dual-gate transistor Q2. It should be noted that the first control terminal of the dual-gate transistor is the top gate, and the second control terminal is the bottom gate.

[0038] As can be seen, the compensation module 10 and the light-emitting driving module 30 in this embodiment are composed of three transistors and a storage capacitor C1. The level state of the first single-gate transistor Q3 is transmitted through the scan signal Scan, so that the transistor and the storage capacitor C1 form different paths at different stages, thereby solving the problem of different display problems caused by multiple factors.

[0039] In this embodiment, the input terminal of the first dual-gate transistor Q1 is connected to the positive power supply voltage terminal via a branch power line. That is, this embodiment adopts a distributed power line design, which divides the traditional centralized power line that runs through the entire display panel into multiple independent branch power lines. Each branch power line supplies power to a smaller display area, thereby reducing the current load and resistance value on each branch power line and achieving an exponential reduction in voltage drop efficiency.

[0040] It should be noted that the channel length and channel width of the first dual-gate transistor Q1 and the second dual-gate transistor Q2 are the same; the dielectric layer structure of the first control terminal of the first dual-gate transistor Q1 and the second dual-gate transistor Q2 is the same.

[0041] In this embodiment, by setting the first dual-gate transistor Q1 and the second dual-gate transistor Q2 to be mirror-symmetrical, and by manufacturing the first dual-gate transistor Q1 and the second dual-gate transistor Q2 with the same dimensions, i.e., the same channel length, channel width, and dielectric layer structure of the first control terminal, the first dual-gate transistor Q1 and the second dual-gate transistor Q2 are physically matched. Therefore, their threshold drift values ​​will be highly consistent. And according to... Figure 2 The circuit diagram shown indicates that the threshold voltage change on the second dual-gate transistor Q2 can directly reflect the threshold voltage drift of the first dual-gate transistor Q1.

[0042] According to Figure 3 As can be seen, the preprocessing stage includes the initialization stage and the writing stage.

[0043] During the initialization phase, the scan signal terminal outputs a high-level scan signal Scan, controlling the first single-gate transistor Q3 to enter the conduction state and connecting the first data voltage on the data voltage terminal; based on the first data voltage and the calibration voltage... The initial threshold voltage of the first dual-gate transistor Q1 is calibrated; at the same time, the first data voltage is stored in the storage capacitor C1.

[0044] Combination Figure 4 The circuit path structure shown is explained.

[0045] according to Figure 4 As indicated by the arrow, when the scanning signal Scan is output at a high level, the first single-gate transistor Q3 will enter the conducting state based on the high-level scanning signal Scan. At this time, the first single-gate transistor Q3 starts to connect to the first data voltage on the data voltage terminal, so the output state of the data voltage terminal is high. However, the first dual-gate transistor Q1 is not turned on at this time, so it fails to generate the driving current to drive the light-emitting device OLED to emit light. At this time, the light-emitting device OLED is in a low-level state, and the negative power supply voltage terminal, as the negative power supply voltage Vss, is always in a low-level state at each stage.

[0046] According to the circuit structure, the first data voltage is divided into two paths. The first path is input to the first control terminal of the first dual-gate transistor Q1, while the second control terminal of the first dual-gate transistor Q1 is connected to the calibration voltage. At this time, the first data voltage on the first control terminal and the calibration voltage on the second control terminal A superimposed electric field is formed, forcing the first dual-gate transistor Q1 to operate in the deep linear region. At this time, the channel current of the first dual-gate transistor Q1 can be expressed as Equation 1: ————Formula 1 in, For channel current, For mobility, The capacitance per unit area of ​​the dielectric layer of the first dual-gate transistor Q1, The ratio of the channel width to the channel length of the first dual-gate transistor Q1, This is the gate voltage (i.e., the control terminal voltage). For the initial threshold voltage, This is the drain-source voltage (i.e., the input-output voltage). It can be seen that when a calibration voltage is applied to the second control terminal... At that time, its electric field direction is superimposed with the electric field of the first control terminal, and the channel carrier concentration is changed through capacitive coupling. Therefore, this embodiment can change the channel carrier concentration by adjusting the calibration voltage. The voltage value is adjusted to initialize the initial threshold voltage, allowing it to be adjusted to a preset operating voltage value, thereby eliminating the initial threshold voltage present in the first dual-gate transistor Q1. That is, after initialization, the threshold voltage of the first dual-gate transistor Q1 is locked, and the drive current of the first dual-gate transistor Q1 is determined by the data voltage Data at the data voltage terminal.

[0047] The second path directly feeds into the storage capacitor C1 for storing the first data voltage.

[0048] During the writing phase, the scan signal terminal outputs a low-level scan signal Scan, and the second dual-gate transistor Q2 is shorted to form a diode structure; the first threshold drift of the second dual-gate transistor Q2 is written to the storage capacitor C1, wherein the first threshold drift of the second dual-gate transistor Q2 is equal to the first threshold drift of the first dual-gate transistor Q1, and the first threshold drift and the first data voltage constitute the driving compensation voltage.

[0049] After the initial threshold voltage of the first dual-gate transistor Q1 is adjusted during the initialization phase, the scan signal terminal will switch to a low level, controlling the first single-gate transistor Q3 to enter the cutoff state. At this time, the first single-gate transistor Q3 stops the input of the data voltage Data, so the output state of the data voltage terminal is low. At the same time, the first dual-gate transistor Q1 is not turned on, and the light-emitting device OLED is still in a low-level state.

[0050] according to Figure 2 It can be seen that the first and second control terminals of the second dual-gate transistor Q2 are connected to the output terminal, that is, the control terminal of the second dual-gate transistor Q2 is short-circuited with the output terminal. At this time, the second dual-gate transistor Q2 forms a diode structure and operates in the saturation region. Its conduction degree is directly limited by its own threshold voltage. When the current on the negative power supply voltage terminal flows through the second dual-gate transistor Q2, the conduction threshold of the second dual-gate transistor Q2 will limit the upper limit of the charging voltage of the storage capacitor C1, so that the storage voltage value of the storage capacitor C1 is equal to the first threshold drift of the second dual-gate transistor Q2.

[0051] Since the physical structures of the second dual-gate transistor Q2 and the first dual-gate transistor Q1 are completely identical, the threshold voltage of the second dual-gate transistor Q2 and the threshold voltage of the first dual-gate transistor Q1 drift synchronously during aging, temperature changes or process deviations. That is, the first threshold drift of the two is always consistent. Therefore, the storage capacitor C1 is equivalent to storing the first threshold drift of the first dual-gate transistor Q1.

[0052] In this embodiment, the second dual-gate transistor Q2 is configured to be a mirror sensor of the first dual-gate transistor Q1 through physical symmetry. During the writing phase, the first threshold drift of the first dual-gate transistor Q1 is converted into the storage voltage of the storage capacitor C1. In this way, in the subsequent driving phase, the influence of the threshold drift on the driving current is offset at the circuit level through voltage superposition.

[0053] Furthermore, referring to Figure 5 The pixel driving circuit also includes an adjustment capacitor C2, the upper stage of which is connected to the connection point A of the light-emitting module 20 and the light-emitting driving module 30, and the lower stage of which is connected to the data voltage terminal. The regulating capacitor C2 is used to adjust the control terminal voltage on the control terminal of the light-emitting driving module 30 according to the driving voltage at the connection point A during the light-emitting stage, wherein the adjusted control terminal voltage at least partially cancels out the driving voltage.

[0054] During the light-emitting stage, the driving voltage at the connection point A between the first dual-gate transistor Q1 and the light-emitting module 20 is detected by the regulating capacitor C2, and the control terminal voltage at the first control terminal of the first dual-gate transistor is adjusted according to the driving voltage.

[0055] When the adjusting capacitor is operating the light-emitting module 20, it can detect the driving voltage at the connection point A between the light-emitting driving module and the light-emitting module 20 in real time. By judging whether there is a fluctuation in the driving voltage, it can determine whether there is a difference in transistor mobility and a power supply voltage drop in the compensation module 10 in the current conduction state. Because the difference in transistor mobility will cause the driving current at the connection point A to fluctuate, and the power supply voltage drop will cause the driving voltage at the connection point A to drop, by judging the fluctuation of the driving voltage, the difference in transistor mobility and the power supply voltage drop can be indirectly detected. Based on the driving voltage, the control terminal voltage at the control terminal of the light-emitting driving module 30 is dynamically adjusted to suppress the current fluctuation at the control terminal caused by the transistor mobility of the light-emitting driving module 30, and thus the reduction in display grayscale accuracy caused by the driving voltage fluctuation. At the same time, the dynamic adjustment of the control terminal voltage can also compensate for the drop in driving voltage caused by the power supply voltage drop in real time, avoiding the problem of poor display uniformity caused by the lower driving voltage of a certain display area due to the power supply voltage drop pulling down the driving voltage.

[0056] In other words, by designing a pixel driving circuit that includes the compensation module 10, the light-emitting module 20, the light-emitting driving module 30, and the adjusting capacitor as described above, this embodiment can systematically suppress the interference of various factors such as threshold drift, mobility difference, and voltage drop effect on the display effect, thus avoiding the problem that conventional pixel driving circuits can only solve one abnormal factor and fail to effectively improve the display effect.

[0057] Let's further explain using Formula 2.

[0058] ————Formula 2 in, This represents the voltage change between the gate (i.e., the first control terminal) and the source (i.e., the output terminal) of the first dual-gate transistor Q1. This represents the voltage fluctuation at the positive power supply terminal. The voltage divider ratio is determined by the capacitance ratio of the storage capacitor C1 and the regulating capacitor C2. It can be seen that when the power supply voltage fluctuates, the voltage fluctuation is transmitted to the first control terminal of the first dual-gate transistor Q1 through the voltage divider coupling of the storage capacitor C1 and the regulating capacitor C2, thereby changing the control terminal voltage.

[0059] When the voltage at the positive power supply voltage terminal drops due to line resistance, the power supply voltage transmitted from the input terminal of the first dual-gate transistor Q1 to the output terminal will also drop accordingly. That is, the driving voltage at the connection point A between the first dual-gate transistor Q1 and the light-emitting device OLED will also drop accordingly. Because the upper plate of the regulating capacitor C2 is connected to the positive terminal of the OLED light-emitting device, and the lower plate is connected to the data voltage terminal, according to the principle of charge conservation, the amount of charge in the regulating capacitor C2 needs to be kept constant. Therefore, when the driving voltage at connection point A decreases, the charge on the upper plate side of the regulating capacitor C2 will decrease. Since the lower plate side is connected to the data voltage terminal, a fixed value has been written from the data voltage terminal during the light-emitting stage. Therefore, the decrease in driving voltage will be coupled to the first control terminal of the first dual-gate transistor Q1 through the regulating capacitor C2, so that the control terminal voltage on the first control terminal decreases synchronously, but the decrease is less than the power supply voltage fluctuation on the positive power supply voltage terminal, thereby suppressing the gate-source voltage change of the first dual-gate transistor Q1 and maintaining the stability of its effective gate voltage, thereby stabilizing the output driving current. Combined with the distributed power line design mentioned above, the regional brightness difference of the panel caused by the voltage drop effect can be significantly reduced.

[0060] according to Figure 2 As can be seen, the light-emitting module 20 in this embodiment includes a light-emitting device OLED; the positive terminal of the light-emitting device OLED is connected to the output terminal of the first dual-gate transistor Q1, and the negative terminal of the light-emitting device OLED is connected to the negative power supply voltage terminal.

[0061] Combination Figure 3 It can be seen that during the light-emitting stage, the scanning signal terminal outputs a high-level scanning signal Scan, controlling the first single-gate transistor Q3 to enter the conducting state, and based on the drive compensation voltage on the storage capacitor C1, controlling the first dual-gate transistor Q1 to enter the conducting state; through the first dual-gate transistor Q1, the second data voltage and calibration voltage based on the drive compensation voltage and the data voltage terminal are transmitted. The generated driving current is fed into the OLED light-emitting device; wherein, the first threshold drift in the driving compensation voltage at least partially cancels out the conduction threshold drift present when the first dual-gate transistor Q1 is turned on, and the calibration voltage It at least partially cancels out the turn-on threshold voltage present when the first dual-gate transistor Q1 is turned on.

[0062] After the write phase is completed, combined with Figure 6The circuit path structure is illustrated below. As indicated by the arrows, the level at the scan signal terminal jumps to a high level again, controlling the first single-gate transistor Q3 to enter the conduction state. Since the storage capacitor C1 has been charged to the drive compensation voltage during the writing phase, the drive compensation voltage on the storage capacitor C1 and the second data voltage at the data voltage terminal are transmitted together to the first control terminal of the first dual-gate transistor Q1, resulting in a high-level output state at the data voltage terminal. Simultaneously, the second control terminal of the first dual-gate transistor Q1 is also connected to a calibration voltage. The first dual-gate transistor Q1 is controlled to enter the conducting state, and it begins to output driving current to drive the light-emitting device OLED. Therefore, the light-emitting device OLED is in a high-level state, and the equivalent gate voltage of the first dual-gate transistor Q1 at this time is Equation 3: ————Formula 3 in, Indicates equivalent gate voltage, This indicates the voltage value transmitted from storage capacitor C1 to the first dual-gate transistor Q1. For voltage calibration, This represents the sum of the turn-on threshold voltage and the second threshold drift when the first dual-gate transistor Q1 is turned on. For dual-gate coupling coefficient, This indicates the second data voltage.

[0063] As can be seen from the above, , ,in, Indicates the driving compensation voltage, Indicates the first data voltage, This indicates the first threshold drift amount. Indicates the turn-on threshold voltage, This represents the second threshold drift amount. Substituting this formula into Formula 3, we obtain Formula 4 as shown below: ————Formula 4 Because the calibration voltage was already set during the initialization phase. Adjustments are made to make it able to cancel out the threshold voltage present when the first dual-gate transistor Q1 is turned on. Therefore, during the driving phase, the conduction threshold voltage present when the first dual-gate transistor Q1 is turned on can be matched with the calibration voltage connected to its second control terminal. They cancel each other out. Furthermore, since the first threshold drift in the driving compensation voltage is the threshold drift of the first dual-gate transistor Q1 stored by the second dual-gate transistor Q2, when the first dual-gate transistor Q1 enters the conduction phase during the driving phase, based on its commonality with the second dual-gate transistor Q2, its second threshold drift must be equal to the first threshold drift when the second dual-gate transistor Q2 is turned on. Therefore, the second threshold drift present when the first dual-gate transistor Q1 is turned on can cancel out the first threshold drift.

[0064] After the above cancellation steps, it can be seen that the equivalent gate voltage after the cancellation operation is related to the first data voltage and the second data voltage, but not to the threshold voltage. Therefore, in the driving stage of this embodiment, the driving current output by the first dual-gate transistor Q1 is only affected by the data voltage Data, effectively avoiding display abnormalities caused by the threshold voltage.

[0065] It should be noted that because the above stages are performed sequentially in each frame, the calibration voltage... It can be adjusted in real time according to the threshold voltage in different frames. The first threshold drift stored in the storage capacitor C1 is also stored in real time according to the device conditions of the second dual-gate transistor Q2 in different frames. Therefore, the calibration voltage in each frame is... Both can effectively cancel the conduction threshold voltage, and the first threshold drift in each frame can also effectively cancel the second threshold drift. Therefore, the compensation module 10 proposed in this embodiment can also improve the cancellation accuracy of the threshold voltage and threshold drift.

[0066] To further explain, according to Figure 2 As can be seen from the structure shown, the pixel driving circuit proposed in this embodiment is a 3T2C structure. Compared with traditional 4T1C, 5T3C and other solutions, it greatly reduces the number of components, especially the number of transistors, which not only greatly reduces the production cost, but also reduces the complexity of the production process.

[0067] Furthermore, it can be combined with Figure 7 and Figure 3 illustrate, Figure 7 The diagram shows a time series plot where VDD experiences an IR drop. For example, due to the IR drop, VDD decreases in stage T3. Figure 3 This is a timing diagram showing that there is no IR drop in VDD. Figure 7 and Figure 3 As can be seen, regardless of whether there is an IR drop in VDD, the current of the OLED remains almost unchanged, which shows that this embodiment can significantly improve the uniformity of display brightness and the stability of image quality.

[0068] This application also provides a display device, which includes a display area and a non-display area, wherein the display area includes the pixel driving circuit described above.

[0069] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A pixel driving circuit, characterized in that, The pixel driving circuit includes a light-emitting driving module, a compensation module, and a light-emitting module; The control terminal of the light-emitting driving module is connected to the calibration voltage, the output terminal of the light-emitting driving module is connected to the input terminal of the light-emitting module, the compensation terminal of the light-emitting driving module is connected to the detection terminal of the compensation module, and the input terminal of the compensation module is connected to the input terminal of the light-emitting module. The compensation module is used to detect the first threshold drift of the light-emitting driving module in the preprocessing stage and store it to form a driving compensation voltage. The light-emitting module is used to perform light-emitting operation based on the driving current input from the conducting light-emitting driving module during the light-emitting stage, wherein the driving current is generated based on the driving compensation voltage and the calibration voltage, and the first threshold drift in the driving compensation voltage is at least partially offset by the second threshold drift present in the conducting light-emitting driving module. The light-emitting driving module includes a first dual-gate transistor, and the compensation module includes a second dual-gate transistor, a first single-gate transistor, and a storage capacitor. The first control terminal of the first dual-gate transistor is connected to the first control terminal, the second control terminal, and the output terminal of the second dual-gate transistor, respectively. The second control terminal of the first dual-gate transistor is connected to the calibration voltage. The input terminal of the first dual-gate transistor is connected to the positive power supply voltage terminal via a branch power line. The input terminal of the second dual-gate transistor is connected to the negative power supply voltage terminal; The control terminal of the first single-gate transistor is connected to the scan signal terminal, the input terminal of the first single-gate transistor is connected to the data voltage terminal, and the output terminal of the first single-gate transistor is connected to the connection line between the first dual-gate transistor and the second dual-gate transistor. The storage capacitor is connected in parallel with the second dual-gate transistor; The channel length and channel width of the first dual-gate transistor and the second dual-gate transistor are the same; The dielectric layer structure of the first control terminal of the first dual-gate transistor and the second dual-gate transistor is the same.

2. The pixel driving circuit as described in claim 1, characterized in that, The preprocessing stage includes an initialization stage; During the initialization phase, the scan signal terminal outputs a high-level scan signal to control the first single-gate transistor to enter the conduction state and connect the first data voltage on the data voltage terminal. The initial threshold voltage of the first dual-gate transistor is calibrated based on the first data voltage and the calibration voltage; simultaneously... The first data voltage is stored in the storage capacitor.

3. The pixel driving circuit as described in claim 2, characterized in that, The preprocessing stage includes a writing stage; During the writing phase, the scan signal terminal outputs a low-level scan signal, and the second dual-gate transistor is shorted to form a diode structure; The first threshold drift amount of the second dual-gate transistor is written into the storage capacitor, wherein the first threshold drift amount of the second dual-gate transistor is equal to the first threshold drift amount of the first dual-gate transistor, and the first threshold drift amount and the first data voltage constitute the drive compensation voltage.

4. The pixel driving circuit as described in claim 1, characterized in that, The pixel driving circuit also includes an adjustment capacitor, the upper stage of which is connected to the connection point of the light-emitting module and the light-emitting driving module, and the lower stage of which is connected to the data voltage terminal. The regulating capacitor is used to adjust the control terminal voltage on the control terminal of the light-emitting driving module according to the driving voltage at the connection point during the light-emitting stage, wherein the adjusted control terminal voltage at least partially cancels out the driving voltage.

5. The pixel driving circuit as described in claim 4, characterized in that, During the light-emitting stage, the driving voltage at the connection point between the first dual-gate transistor and the light-emitting module is detected by the adjustment capacitor, and the control terminal voltage at the first control terminal of the first dual-gate transistor is adjusted according to the driving voltage.

6. The pixel driving circuit as described in claim 1, characterized in that, The light-emitting module includes a light-emitting device; The positive terminal of the light-emitting device is connected to the output terminal of the first dual-gate transistor, and the negative terminal of the light-emitting device is connected to the negative power supply voltage terminal.

7. The pixel driving circuit as described in claim 6, characterized in that, During the light-emitting stage, the scanning signal terminal outputs a high-level scanning signal to control the first single-gate transistor to enter the conducting state, and controls the first dual-gate transistor to enter the conducting state based on the driving compensation voltage on the storage capacitor. The first dual-gate transistor transmits the driving current generated based on the driving compensation voltage, the second data voltage at the data voltage terminal, and the calibration voltage to the light-emitting device. Wherein, the first threshold drift in the driving compensation voltage is at least partially offset by the conduction threshold drift present when the first dual-gate transistor is turned on, and the calibration voltage is at least partially offset by the conduction threshold voltage present when the first dual-gate transistor is turned on.

8. A display device, characterized in that, The display device includes a display area and a non-display area, wherein the display area includes a pixel driving circuit as described in any one of claims 1 to 7.

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