eFuse read / write circuit and its simulation method, adjustable reference current source, chip
By designing a sensitive amplifier in the eFuse read/write circuit to identify the difference between the data voltage and the reference voltage, the problem of resistance drift in the eFuse memory cell after hot-break programming was solved, thus improving the reliability and yield of the eFuse memory array.
CN121354639BActive Publication Date: 2026-07-17BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY CO LTD +2
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY CO LTD
- Filing Date
- 2025-09-08
- Publication Date
- 2026-07-17
AI Technical Summary
Technical Problem
Existing eFuse memory cells are prone to resistor drift and induction failure after hot-break programming, making it difficult for the read circuit to correctly identify the stored data, thus affecting reliability and yield.
Method used
An eFuse read/write circuit was designed, including an eFuse storage array, a programming control unit, a read control unit, a reference unit, and a sensitive amplifier. The sensitive amplifier identifies the difference between the data voltage and the reference voltage under resistance deviation conditions, ensuring the accuracy of data reading.
Benefits of technology
This improves the reliability and yield of eFuse storage arrays, ensuring that stored data can be correctly identified and read even under resistance deviations.
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Smart Images
Figure CN121354639B_ABST
Abstract
This invention discloses an eFuse read / write circuit and its simulation method, an adjustable reference current source, and a chip. The eFuse read / write circuit includes: an eFuse memory array for storing data; a programming control unit for programming the eFuse memory array to write data to it based on the bit control signal of the bit line control terminal when the programming control signal at the programming control terminal is valid; a read control unit for reading data from the eFuse memory array based on the bit control signal and outputting a corresponding data voltage when the read control signal at the read control terminal is valid; a reference unit for outputting a reference voltage when the read control signal is valid; and a sensitive amplifier for comparing the data voltage and the reference voltage when both the enable control signal and the read control signal at the enable control terminal are valid, and outputting data corresponding to the data voltage based on the comparison result. This circuit can read the correct data from the eFuse memory array.
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