Access management apparatus and method for storage devices

Abstract

The present disclosure provides an access management device and method for a storage device. The device and method utilize a task waiting linked list to maintain the execution order of commands with overlapping logical block address ranges. The task waiting linked list is essentially a modified singly linked list with less hardware resource overhead, and the hardware resource overhead does not increase with the number of commands processed in parallel when the number of received host commands is large.

Description

Technical Field

[0001] This disclosure relates to the field of storage technology, and more specifically, to an access management apparatus and method for storage devices. Background Technology

[0002] A storage system typically consists of a host and one or more storage devices. The host device can issue various logical block-related host commands to the storage devices to manage the data within them. Logical block-related host commands use LBA (Logic Block Address) and NLB (Number of Logic Blocks) to describe a contiguous range of logical block addresses (LBA Range) and perform read operations on data within that range. In certain scenarios, the logical block address ranges in these commands may overlap.

[0003] To ensure the atomicity of host command execution related to logical blocks, for the three command combinations of read & write, write & read, and write & write, it is necessary to block the execution of commands with overlapping logical address ranges during the execution of the previous command, putting them in a waiting state. The command is then allowed to continue execution only after the previous command has finished. If multiple read and write commands are blocked simultaneously, these blocked read and write commands should be guaranteed to execute in a specific order. Summary of the Invention

[0004] In view of this, the present disclosure provides an access management apparatus and method for storage devices to solve the technical problems existing in the prior art.

[0005] According to a first aspect of this disclosure, an access management apparatus for a storage device is provided, comprising:

[0006] The task scheduling management module is used to receive host commands associated with logical block addresses, call the LRT controller to check the host commands, and add the identifiers of host commands with overlapping logical block addresses to the tail of the task waiting list based on the feedback results.

[0007] The LRT controller is used to compare whether the logical block address range associated with the host command overlaps with the existing logical block address range in the logical block address range table, and provide the feedback result. At the same time, it adds relevant information of the host command to the logical block address range. The relevant information includes the logical block address range of the host command, whether the status of the host command is valid, and whether the host command has an overlapping logical block address range.

[0008] The task scheduling and management module assigns host commands that do not have overlapping logical block address ranges to other components for execution, and changes the status of the executed host commands from valid to invalid.

[0009] The task scheduling management module is further configured to periodically scan the task waiting list from beginning to end using a scanning pointer, and for each host command scanned, call the LRT controller to compare the logical block address range of the host command with the logical block address ranges of host commands with overlapping logical block addresses preceding the host command and the logical block address ranges of host commands with non-overlapping logical block address ranges that are currently being executed, update whether the host command has overlapping logical block address ranges based on the comparison results, and delete the identifier of the host command with non-overlapping logical block address ranges from the task waiting list. The task scheduling management module uses the timing relationship reflected by the task waiting list to determine the host commands preceding the current host command.

[0010] In some embodiments, the task scheduling management module further updates one or more of the head pointer, tail pointer, and scan pointer of the task waiting list according to the operation on the task waiting list, wherein the host command preceding the host command is a host command defined by the range between the head pointer and the scan pointer.

[0011] In some embodiments, the relevant information of the host command also includes a flip flag, and the task scheduling management module also maintains a scan flag, wherein both the scan flag and the flip flag are derived from a first value and a second value.

[0012] In some embodiments, when adding a new operation, the task scheduling management module sets the flip flag in the relevant information of host commands with overlapping logical block address ranges to the current value of the scan flag, and sets the flip flag in the relevant information of host commands without overlapping logical block address ranges to the first value.

[0013] The task scheduling and management module also flips the flip mark in the relevant information of the host command indicated by the scan pointer from the current value to another value other than the current value as the scan pointer moves, and flips the scan mark from the current value to another value other than the current value when the scan pointer jumps from the tail pointer to the head pointer.

[0014] In some embodiments, the host commands defined by the range between the header pointer and the scan pointer within the logical block address range table are obtained through the following steps:

[0015] The host command that has an overlapping logical block address range with the current value of the flip flag and the current value of the scan flag is retrieved from the logical block address range table is the corresponding host command.

[0016] In some embodiments, the task scheduling management module obtains the host command defined by the range between the header pointer and the scan pointer within the logical block address range table through the following steps:

[0017] Read the identifier of each host command between the header pointer and the scan pointer; and

[0018] The corresponding host command is obtained by searching the logical block address range table based on the identifier of each host command.

[0019] In some embodiments, the LRT controller performs in parallel the operation of comparing whether the logical block address range associated with the host command overlaps with an existing logical block address range in the logical block address range table.

[0020] In some embodiments, when the task scheduling management module calls the LRT controller for comparison, if the current host command and the existing logical block address range in the logical block address range table overlap, the comparison is stopped.

[0021] In some embodiments, the task waiting list is implemented using a fixed number of hardware storage units, including: assigning the index address of a free hardware storage unit to the host command to be stored as its identifier, and storing the index address of the next host command linked to the host command in the free hardware storage unit.

[0022] According to a second aspect of this disclosure, a memory controller is provided, including the access management device described above.

[0023] According to a third aspect of this disclosure, a storage device is provided, including a storage medium and the memory controller described above.

[0024] According to a fourth aspect of this disclosure, a method is provided for checking whether a host command has overlapping logical block address ranges, wherein a host device sends a host command to a storage device, the method comprising:

[0025] The relevant information of the received host command is stored in the logical block address range table. The relevant information includes the logical block address range of the host command, whether the status of the host command is valid, and whether the host command has overlapping logical block address ranges.

[0026] The identifiers of received host commands with overlapping logical block address ranges are stored in a task waiting list, wherein the linking relationship of each node in the task waiting list reflects the timing relationship of the corresponding host commands.

[0027] The task waiting list is periodically scanned from beginning to end. For each host command scanned, the logical block address range of the host command is compared with the logical block address ranges of host commands that have overlapping logical block addresses and the logical block address ranges of host commands that are currently being executed and do not have overlapping logical block address ranges. The relevant information of the host command is updated according to the comparison results, and the identifiers of host commands that do not have overlapping logical block address ranges are deleted from the task waiting list. The host commands that precede the current host command are determined by the timing relationship reflected in the task waiting list.

[0028] In some embodiments, the method further includes: updating one or more of the head pointer, tail pointer, and scan pointer of the task waiting list according to the operation on the task waiting list, wherein the host command preceding the host command is a host command defined by the range between the head pointer and the scan pointer.

[0029] In some embodiments, the relevant information further includes a flip mark, and the method further includes maintaining a scan mark, wherein both the scan mark and the flip mark are derived from a first value and a second value.

[0030] In some embodiments, the method further includes: setting the flip flag of the information related to host commands with overlapping logical block address ranges to equal the current value of the scan flag, and setting the flip flag of the information related to host commands without overlapping logical block address ranges to a first value;

[0031] As the scan pointer moves, the flip mark in the relevant information of the host command indicated by the scan pointer is flipped from its current value to another value other than the current value, and when the scan pointer jumps from the tail pointer to the head pointer, the scan mark is flipped from its current value to another value other than the current value.

[0032] The access management device proposed in this disclosure utilizes a task wait list to maintain the execution order of commands with overlapping logical block address ranges. The task wait list is essentially a modified singly linked list, resulting in low hardware resource overhead. Even when the number of received host commands is large, the hardware resource overhead does not increase with the number of commands processed in parallel. Furthermore, this disclosure can stop the check and terminate the check task early when it detects an overlap between the current host command and an existing logical block address range in the logical block address range table, thus achieving high execution efficiency. Attached Figure Description

[0033] The above and other objects, features and advantages of this disclosure will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0034] Figure 1 A schematic block diagram of the storage system is shown.

[0035] Figure 2 This is a schematic diagram of the structure of an access management device for a storage device provided in an embodiment of this disclosure;

[0036] Figure 3 A schematic diagram of an exemplary task waiting list is provided;

[0037] Figure 4 This is an example diagram of the linked list design provided in the embodiments of this disclosure;

[0038] Figure 5 This is a flowchart of an access management method for a storage device provided in an embodiment of this disclosure. Detailed Implementation

[0039] The present disclosure is described below based on embodiments, and many specific details of the disclosure are described herein to provide a clearer understanding of the disclosure. However, as those skilled in the art will understand, the disclosure may be implemented without following these specific details, and the disclosure is not limited to these embodiments. To avoid obscuring the substance of the disclosure, well-known methods, processes, flows, chip devices, and chip circuits are not described in detail.

[0040] Similar reference numerals are used in the various figures. Furthermore, those skilled in the art should understand that the figures provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0041] Figure 1A schematic block diagram of a storage system is shown. Storage system 100 may include host device 110 (e.g., host computer) 110 and storage device 120. Host device 110 may issue host commands related to logical block addresses to storage device 120, causing storage device 120 to manage host data stored therein according to the commands. For example, host device 110 may be communicatively connected to storage device 120 (e.g., via a storage interface) and may issue various commands (e.g., READ, WRITE, UNMAP, REASSIGNBLOCK, TRIM, etc.) and associated one or more LBAs or LBA ranges to storage device 120. Storage device 120 may store, update, and / or otherwise manage host data in one or more logical blocks associated with one or more LBAs or LBA ranges. Once a command is executed, storage device 120 may transmit a response to host device 110, indicating that the command has been successfully completed.

[0042] Host device 110 may include processor 111 and memory 112. Processor 111 may be a general-purpose processor, such as the central processing unit (CPU) core of host device 110. Memory 112 may be considered as high-performance main memory of host device 110. For example, in some embodiments, memory 112 may be volatile memory, such as dynamic random access memory (DRAM); however, this disclosure is not limited thereto, and memory 112 may also be or include any suitable high-performance main memory. For example, in other embodiments, memory 112 may be a relatively high-performance non-volatile memory, such as NAND flash memory, phase-change memory (PCM), resistive RAM, spin-transfer torque RAM (STTRAM), any suitable memory based on PCM technology, memristor technology, and / or resistive random access memory (ReRAM).

[0043] Storage device 120 is an auxiliary storage device that persistently stores data accessible by host device 110. In this case, storage device 120 may be a relatively slow storage device compared to memory 112. For example, in some embodiments, storage device 120 is an auxiliary storage device of host device 110, such as a solid-state drive (SSD); however, this disclosure is not limited thereto, and in other embodiments, storage device 120 may include (or may be) any suitable storage device, such as magnetic storage devices (e.g., hard disk drives (HDDs), etc.), optical storage devices (e.g., Blu-ray disc drives, optical disc (CD) drives, digital versatile optical disc (DVD) drives, etc.), other types of flash memory devices (e.g., USB flash drives, etc.).

[0044] The host device 110 and the storage device 120 can communicate via the storage interface 130. For example, the host device 110 issues commands to the storage device 120 through the storage interface 130, and the storage device 120 provides feedback on command execution through the storage interface 130. This disclosure does not limit the type of storage interface 130; for example, it can be one of Small Computer System Interface (SCSI), Non-Volatile Memory Express (NVMe), Peripheral Component Interconnect Express (PCIe), Remote Direct Memory Access over Ethernet (RDMA), Serial Advanced Technology Attachment (SATA), Fibre Channel, Serial Attached SCSI (SAS), and NVMe over Fibre (NVME-oF).

[0045] Storage device 120 may include storage controller 121 and storage medium 122. Storage controller 121 may be connected to storage interface 130, and through storage interface 130 receive host commands from host device 110 and feed back the execution results of the commands to host device 110. Each command contains a continuous logical block address range (LBA range), which is represented by the starting address of the logical block (SLBA) and the number of logical blocks (NLB).

[0046] Referring to the background art, during the execution of the previous host command, it is necessary to block the execution of commands with overlapping logical address ranges, wait for the previous command to finish executing, and then allow the current command to execute. If multiple blocked host commands exist simultaneously, these blocked host commands should be guaranteed to execute in their original timing. To this end, embodiments of this disclosure provide an access management device disposed in a memory controller to accomplish the above functions.

[0047] like Figure 2 As shown, the access management device 200 includes a host command pipeline 203, a task scheduling management module 201, a task waiting list 202, an LRT controller 205, and a logical block address range table 206.

[0048] The host command pipeline 203 receives host commands issued by the host in a pipelined manner, parses and processes these commands, and forwards the host commands associated with the logical block address to the task scheduling and management module 201.

[0049] The task scheduling management module 201 receives host commands associated with logical block addresses from the host command pipeline 203, calls the LRT controller 205 to check the host commands, and adds the identifiers of host commands with overlapping logical block addresses to the tail of the task waiting list 202 based on the feedback results.

[0050] The LRT controller 205 includes a logical block address overlap checking module 2052, which checks the logical block address range of a host command to see if it overlaps with any existing logical block address ranges in the logical block address range table 206. The module provides feedback to the task scheduling management module 201 and adds relevant information about the host command to the logical block address range. This information includes the logical block address range of the host command, whether the host command is valid, and whether the host command has overlapping logical block address ranges. The logical block address range of a host command can be represented by the starting logical block address and the number of logical blocks. When a host command has overlapping logical block address ranges, it must wait for all preceding host commands that overlap with it to complete before it can execute normally. When a host command is added to the logical block address range table 206, its status is valid; when the host command is completed, its status becomes invalid.

[0051] The logical block address overlap checking module 2052 can be implemented using hardware resources, and its efficiency can be improved through pipelined grouping parallel checking. For example, multiple logical address ranges in the logical block address range table 206 can be divided into multiple groups, and a pipelined grouping parallel checking method can be used to compare a logical block address range to be checked with one or more logical address ranges in multiple groups to improve the checking speed. The number of groups is determined by specific design requirements and constraints, such as the maximum number of commands that can be executed in parallel in the storage device, hardware resource limitations, etc. During the parallel comparison process, if an overlap has been found in the previous checks, the checking task can be terminated early, without having to complete all the checking pipelines.

[0052] LRT controller 205 releases (or allows) host commands that do not have overlapping logical block address ranges (i.e., 2051 in the figure) so that task scheduling management module 201 can assign host commands that do not have overlapping logical block address ranges to other components for execution and change the status of the executed host commands from valid to invalid.

[0053] The task scheduling management module 201 also uses a scanning pointer to periodically scan the task waiting list 202 from beginning to end. For each host command scanned, the LRT controller 205 is invoked to compare the host command with the host commands in the logical block address range table 206 that meet the first condition. If there is no overlap, the relevant information of the host command in the logical block address range table 206 is modified to a non-overlapping logical block address range, and the corresponding host command identifier is deleted from the task waiting list 202. To manage the task waiting list 202, the task scheduling management module 201 can maintain three pointers: a head pointer, a tail pointer, and a scanning pointer, and update one or more of these three pointers according to the operation on the task waiting list 202. Moreover, the host commands in the logical block address range table 206 that meet the first condition include: host commands in the task waiting list within the logical block address range table 206 that are limited by the range between the head pointer and the scanning pointer, and host commands that do not have overlapping logical block address ranges and are in a valid state.

[0054] In some embodiments, the task scheduling management module 201 includes an arbitration circuit for determining the command processing sequence of the host command pipeline 203 and the task waiting list 202.

[0055] In some embodiments, the LRT controller 205 also retrieves tasks related to logical block address ranges from the software task queue (SWTQ) 204, executes tasks such as writing logical block address ranges to the logical block address range table 206, releasing logical block address ranges, performing logical block address range overlap checks, and rewriting logical block address range attributes, and returns the task execution results to the software task queue. For example, if the software wants to prevent the execution of host commands issued by the host that overlap with one or more logical block address ranges, it can issue a task to write logical block address ranges through the software task queue, writing one or more logical block address ranges into the logical block address range. When the task scheduling management module 201 calls the LRT controller 205 to check the logical block address ranges in the command, the one or more logical block address ranges written by the software can be compared with the logical block address ranges in the command. This function can be used to implement the TRIM function in the storage system.

[0056] In some embodiments, the logical block address range table 206 is designed as shown in Table 1.

[0057] Table 1

[0058]

[0059] Based on Table 1, when a new record of a host command is added to the logical block address range table 206, the VLD of the record is set to 1 (valid). At the same time, if the host command has an overlapping logical block address range with other host commands, the ACTIVE of the record is set to 0 (wait). If the host command does not have an overlapping logical block address range with other host commands, the ACTIVE of the record is set to 1 (active). After the host command is executed, the VLD of the record is set to 0 (invalid). If, as the host commands preceding the host command are executed one by one, the logical block address range of the host command and other host commands changes from overlapping to non-overlapping, the ACTIVE of the record is modified to 1 (active).

[0060] Referring to Table 1, Figure 3 A schematic diagram of an exemplary task waiting list is provided. As shown in the diagram, each node includes an ID to identify the host command and a NEXT pointer to point to the next node. HEAD and TAIL point to the head and tail of the list, respectively, and SCAN points to the current node. Figure 3 Given the linked list design, the phrase "comparing the current host command with the host command corresponding to the range of task wait linked lists defined by the head pointer and scan pointer within the logical block address range table" above means: reading the ID of each node (including SCAN and HEAD) between HEAD and SCAN, and then... Figure 2 The logical block address range of each command is obtained from the logical block address range table 206, and the logical block address range of the command corresponding to SCAN is compared with the logical block address range of the other commands.

[0061] However, in order to save the hardware storage space required by the task waiting list 202, in some other embodiments, the task waiting list is implemented with a fixed number of hardware storage units, each of which has a unique index address. For each received host command, the system allocates the index address of a free hardware storage unit to it and stores the index address of the next host command linked to the host command in that free hardware storage unit. Figure 4 This is an example of this embodiment. The left side is the index address of each hardware storage unit, and the right side indicates that the index address of the next node is stored in the corresponding hardware storage unit.

[0062] Furthermore, the index address of the same host command in the task waiting list 202 is the same as its index address in the logical block address range table 206. Therefore, the relevant information of the host command can be obtained from the logical block address range table 206 according to the current position of the scan pointer, thus saving the hardware storage space required for the logical block address range table 206.

[0063] In other embodiments, the logical block address range table 206 is designed as shown in Table 2.

[0064] Table 2

[0065]

[0066] Table 2 adds a ROLL field compared to Table 1. This field simplifies the comparison operation of the LRT controller 205. Additionally, the task scheduling management module 201 needs to maintain a scan flag (SCANFLAG), which can be stored in a register. Both the ROLL field and the scan flag (SCANFLAG) are derived from a first value P1 (e.g., 1) and a second value P0 (e.g., 0). The initial value of the scan flag (SCANFLAG) can be set to either P1 or P0; we will now explain it using P1 as the initial value. Furthermore, the processing of other fields in Table 2 can be found in the description of Table 1 above.

[0067] Whenever a new record of a host command is added to the logical block address range table 206, the ROLL flag for the information of host commands with overlapping logical block address ranges is set to the current value of the SCANFLAG flag, and the ROLL flag for the information of host commands with non-overlapping logical block address ranges is set to P1.

[0068] When the scan pointer moves on the linked list, at each new node, the logical block address range of the host command in the logical block address range table 206 corresponding to the new node is compared with the logical block address range of the host command in the logical block address range table 206 that is limited by the range of the head pointer and the scan pointer. The host command limited by the range of the head pointer and the scan pointer satisfies the following condition (1):

[0069] ACTIVE==0 && ROLL! = SCANFLAG (1)

[0070] Among them, condition (1) is satisfied when the current value of the ROLL flip flag is opposite to the current value of the SCANFLAG scan flag and is a host command with overlapping addresses.

[0071] At the same time, the logical block address range of the host command in the logical block address range table 206 corresponding to the new node is compared with the logical block address range of the host command that satisfies the following condition (2):

[0072] ACTIVE==1 && ROLL==P1&& VLD==1 (2)

[0073] Among them, the host command that satisfies condition (2) is the host command that is currently being executed.

[0074] When the logical block address range of the host command in the logical block address range table 206 corresponding to the new node does not have an overlapping logical block address range with the host command under conditions (1) and (2), the host command is deleted from the task waiting list 202, and the ACTIVE of the host command in the logical block address range table 206 is changed to 1; after each node is scanned, regardless of whether there is an overlapping logical block address range, the ROLL flip flag of each host command in the logical block address range table 206, which is defined by the range of the head pointer and the scan pointer, is flipped to another value other than the current value (i.e., P0 is flipped to P1, and P1 is flipped to P0), and when the scan pointer jumps from the tail pointer to the head pointer, the current value of the scan flag SCANFLAG is flipped to another value (i.e., P0 is flipped to P1, and P1 is flipped to P0). This design is beneficial for the hardware execution unit to perform comparison operations in batches.

[0075] In an alternative embodiment, the task waiting list in this disclosure can be implemented as two singly linked lists. Specifically, two singly linked lists, SLL1 and SLL2, are used to store all commands preceding the current command and other commands, respectively. Overall, SLL1 and SLL2 are implemented using a ping-pong operation. Figure 2 The modified singly linked list demonstrates the functionality of the following: Initially, SCANFLAG1 is P0, and the host command identifier is inserted at the end of SLL1. When an overlap is detected between the command pointed to by the head pointer of SLL1 and an existing logical block address range in the logical block address range table, the task scheduling management module removes this command from SLL1 and inserts it at the end of SLL2. Simultaneously, the ROLL flag of the command pointed to by the head pointer is flipped (P0 flips to P1, P1 flips to P0). If no overlap is detected between the command pointed to by the head pointer of SLL1 and an existing logical block address range in the logical block address range table, the task scheduling management module removes this command from SLL1, marks it as P1, and changes it to an active state, allowing it to continue normal execution. After all commands in SLL1 are removed, SCANFLAG1 will also flip to 1. Then, the functions of SLL1 and SLL2 are swapped. The host command identifier is inserted from the end of SLL2, and the task scheduling management module also starts from the head pointer position of SLL2 to check whether the command it points to has overlapping logical block address ranges with existing logical block address ranges in the logical block address range table. In this way, the execution order of commands with overlapping logical block address ranges is maintained through two singly linked lists.

[0076] Accordingly, embodiments of this disclosure also provide an access management method for storage devices, such as... Figure 5 As shown, it includes the following steps.

[0077] In step S510, the relevant information of the received host command is stored in the logical block address range table. The relevant information includes the logical block address range of the host command, whether the status of the host command is valid, and whether the host command has overlapping logical block address ranges.

[0078] In step S520, the identifiers of received host commands with overlapping logical block address ranges are stored in a task waiting list, wherein the linking relationship of each node in the task waiting list reflects the timing relationship of the corresponding host commands.

[0079] In step S530, the task waiting list is periodically scanned from beginning to end. For each host command scanned, the logical block address range of the host command is compared with the logical block address ranges of host commands with overlapping logical block addresses that preceded the host command, as well as the logical block address ranges of host commands with non-overlapping logical block address ranges that are currently being executed. The relevant information of the host command is updated according to the comparison results, and the identifiers of host commands with non-overlapping logical block address ranges are deleted from the task waiting list. The host commands preceding the current host command are determined using the timing relationship reflected in the task waiting list.

[0080] In a further embodiment, when an operation on the task waiting list is performed, one or more of the head pointer, tail pointer, and scan pointer of the task waiting list are updated accordingly. Then, the host command preceding the host command defined by the scan pointer is located by the range between the head pointer and the scan pointer.

[0081] In a further embodiment, the host command information stored in the table structure also includes a flip flag, and the system also maintains a scan flag SCANFLAG. Both the scan flag SCANFLAG and the flip flag are taken from a first value and a second value. When data is added to the table structure, the flip flag of the host command information with overlapping logical block address ranges is set to equal the current value of the scan flag, and the flip flag of the host command information without overlapping logical block address ranges is set to the first value. Furthermore, when scanning the waiting list, as the scan pointer moves, the flip flag in the host command information indicated by the scan pointer is flipped from the current value to another value other than the current value. When the scan pointer jumps from the tail pointer to the head pointer, the scan flag is flipped from the current value to another value other than the current value.

[0082] It should be understood that the embodiments of the method correspond to the embodiments of the apparatus described above, and therefore are described herein in a relatively simplified manner.

[0083] In summary, the beneficial effects of the apparatus and method provided in this disclosure are that using a linked list-based wait queue to maintain the execution order of commands with overlapping logical block address ranges can reduce hardware resource overhead and lower product costs.

[0084] As described above, these embodiments of the present disclosure do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the present disclosure, thereby enabling those skilled in the art to make good use of the present disclosure and modifications based on it.

Claims

1. An access management device for a storage device, comprising: The task scheduling management module is used to receive host commands associated with logical block addresses, call the LRT controller to check the host commands, and add the identifiers of host commands with overlapping logical block addresses to the tail of the task waiting list based on the feedback results. The LRT controller is used to compare whether the logical block address range associated with the host command overlaps with the existing logical block address range in the logical block address range table, and provide the feedback result. At the same time, it adds relevant information of the host command to the logical block address range. The relevant information includes the logical block address range of the host command, whether the status of the host command is valid, and whether the host command has an overlapping logical block address range. The task scheduling and management module assigns host commands that do not have overlapping logical block address ranges to other components for execution, and changes the status of the executed host commands from valid to invalid. The task scheduling management module is further configured to periodically scan the task waiting list from beginning to end using a scanning pointer, and for each host command scanned, call the LRT controller to compare the logical block address range of the host command with the logical block address ranges of host commands with overlapping logical block addresses preceding the host command and the logical block address ranges of host commands with non-overlapping logical block address ranges that are currently being executed. Based on the comparison results, update whether the host command has overlapping logical block address ranges, and delete the identifier of the host command with non-overlapping logical block address ranges from the task waiting list. The task scheduling management module uses the timing relationship reflected by the task waiting list to determine the host commands preceding the current host command.

2. The access management device according to claim 1, wherein, The task scheduling management module also updates one or more of the head pointer, tail pointer, and scan pointer of the task waiting list according to the operation on the task waiting list. The host command preceding the host command is the host command defined by the range between the head pointer and the scan pointer.

3. The access management device according to claim 2, wherein, The relevant information of the host command also includes a flip flag, and the task scheduling management module also maintains a scan flag. Both the scan flag and the flip flag are taken from a first value and a second value.

4. In the access management device according to claim 3, when adding a new operation, the task scheduling management module sets the flip flag in the relevant information of host commands with overlapping logical block address ranges to the current value of the scan flag, and sets the flip flag in the relevant information of host commands without overlapping logical block address ranges to the first value. The task scheduling and management module also flips the flip flag in the relevant information of the host command indicated by the scan pointer from the current value to another value other than the current value as the scan pointer moves. Furthermore, when the scan pointer jumps from the tail pointer to the head pointer, the scan flag is flipped from the current value to another value other than the current value.

5. The access management device according to claim 3 or 4, wherein, The task scheduling management module obtains the host commands defined by the range between the header pointer and the scan pointer within the logical block address range table through the following steps: The host command that has an overlapping logical block address range with the current value of the flip flag and the current value of the scan flag is retrieved from the logical block address range table is the corresponding host command.

6. The access management device according to claim 2, wherein, The task scheduling management module obtains the host commands defined by the range between the header pointer and the scan pointer within the logical block address range table through the following steps: Read the identifier of each host command between the header pointer and the scan pointer; as well as The corresponding host command is obtained by searching the logical block address range table based on the identifier of each host command.

7. The access management device according to claim 1, wherein, The LRT controller performs the operation in parallel to compare whether the logical block address range associated with the host command overlaps with the existing logical block address range in the logical block address range table.

8. The access management device according to claim 1, wherein, When the task scheduling management module calls the LRT controller for comparison, if the host command and a logical block address range in the logical block address range table overlap, the comparison is stopped.

9. The access management device according to any one of claims 1 to 4, wherein, The task waiting list is implemented using a fixed number of hardware storage units, including: assigning the index address of a free hardware storage unit to the host command to be stored as its identifier, and storing the index address of the next host command linked to the host command in the free hardware storage unit.

10. A memory controller comprising the access management apparatus according to any one of claims 1 to 9.

11. A storage device comprising a storage medium and a memory controller as claimed in claim 10.

12. A method for access management of a storage device, wherein a host device sends a host command to the storage device, the method comprising: The relevant information of the received host command is stored in the logical block address range table. The relevant information includes the logical block address range of the host command, whether the status of the host command is valid, and whether the host command has overlapping logical block address ranges. The identifiers of received host commands with overlapping logical block address ranges are stored in a task waiting list, wherein the linking relationship of each node in the task waiting list reflects the timing relationship of the corresponding host commands. The task waiting list is periodically scanned from beginning to end. For each host command scanned, the logical block address range of the host command is compared with the logical block address ranges of host commands that have overlapping logical block addresses and the logical block address ranges of host commands that are currently being executed and do not have overlapping logical block address ranges. The relevant information of the host command is updated according to the comparison results, and the identifiers of host commands that do not have overlapping logical block address ranges are deleted from the task waiting list. The host commands that precede the current host command are determined by the timing relationship reflected in the task waiting list.

13. The access management method according to claim 12, further comprising: Based on the operation on the task waiting list, update one or more of the head pointer, tail pointer, and scan pointer of the task waiting list accordingly, wherein the host command preceding the host command is a host command defined by the range between the head pointer and the scan pointer.

14. The access management method according to claim 13, wherein, The relevant information also includes a flip mark, and the method further includes maintaining a scan mark, wherein both the scan mark and the flip mark are derived from a first value and a second value.

15. The access management method according to claim 14, further comprising: The flip flag for host commands with overlapping logical block address ranges is set to equal the current value of the scan flag, and the flip flag for host commands with non-overlapping logical block address ranges is set to a first value. As the scan pointer moves, the flip mark in the relevant information of the host command indicated by the scan pointer is flipped from its current value to another value other than the current value, and when the scan pointer jumps from the tail pointer to the head pointer, the scan mark is flipped from its current value to another value other than the current value.

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