Wafer scratch three-dimensional topography repair process based on dfg 8560 single shaft fine grinding mode
Patent Information
- Application Number
- CN202511816710.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-04
- Publication Date
- 2026-09-08
- Estimated Expiration
- 2045-12-04
AI Technical Summary
尽管该设备在定位精度与过程反馈方面具有优势,但其核心仍聚焦于常规磨削或边缘修整场景,并未提出针对晶圆背面重划伤缺陷的专用修复策略
[0034] Defect repair success rate > 98.5%,
Smart Images

Figure CN121374375B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor manufacturing technology, specifically relating to a wafer re-scrubbing three-dimensional morphology repair process based on the DFG 8560 uniaxial fine grinding mode. Background Technology
[0002] In the back-end processes of semiconductor manufacturing, wafer backside thinning is a key step in achieving device thinning, improving thermal management performance, and supporting advanced packaging. Wafer recycling, as an important part of the circular economy, requires surface defect repair and thickness reconstruction of used wafers to meet the stringent standards of modern production lines regarding material flatness, surface roughness, and subsurface integrity. Among these, severe scratches, a type of deep, irregularly contoured macroscopic surface defect, account for approximately 15% of incoming wafers. Their presence not only affects the stability of subsequent lamination, grinding, and polishing processes but can also induce crack propagation or lead to device failure. Therefore, efficient and low-damage repair methods are urgently needed.
[0003] However, mainstream grinding equipment such as the DISCO DFG 8560 generally adopts a fixed two-stage process of "rough grinding + fine grinding." This mode performs well when processing uniform surfaces, but it reveals significant limitations when dealing with localized, severe scratches. To completely remove deep scratches, traditional processes are forced to increase the overall rough grinding removal amount, which not only causes unnecessary material waste but also introduces a deeper subsurface damage layer due to the large particle size and strong cutting force of the rough grinding wheel, significantly increasing the burden on subsequent polishing. In addition, even if some equipment has high-precision motion control or online thickness detection capabilities, its process logic is still limited to global uniform thinning, lacking a perception and response mechanism for the three-dimensional morphology of scratches (including depth, width, and edge steepness), and cannot achieve adaptive repair of defective areas in a single operation.
[0004] A search revealed a wafer thinning and polishing device with publication number CN114473822B, published on July 5, 2022. This patent provides an integrated device combining adhesive application, transportation, and thinning / polishing functions. Its thinning unit includes a coarse grinding disc and a fine grinding disc, which can sequentially perform coarse and fine grinding on the wafer, with thickness monitored by a laser rangefinder. However, this solution still uses a traditional fixed two-stage "coarse then fine" process, without differentiated treatment for locally severe scratches on the wafer surface. When facing deep scratches, to ensure complete defect removal, the overall coarse grinding removal amount must be increased, leading to unnecessary material loss and deepening of the subsurface damage layer. It cannot achieve adaptive repair of the three-dimensional morphology of the severely scratched area, and it is difficult to balance efficiency and surface quality.
[0005] A search revealed a wafer processing equipment patent with publication number CN114454024B, published on April 25, 2023. This patent proposes a wafer grinding system with a high-precision XYZ linear motion module, multi-turn rotary table capability, and online 3D displacement detection. It supports grinding force monitoring and real-time error compensation, and is suitable for high-precision edge grinding and centering control. While this equipment has advantages in positioning accuracy and process feedback, its core focus remains on conventional grinding or edge trimming scenarios, and it does not propose a dedicated repair strategy for re-scratched defects on the back side of the wafer. In particular, it lacks a closed-loop mechanism for identifying, responding to, and repairing the three-dimensional morphology (such as depth, width, and contour) of scratches based on single-axis fine grinding mode. Therefore, it cannot achieve efficient repair of re-scratched defects by dynamically adjusting fine grinding parameters without introducing deep damage during rough grinding.
[0006] Therefore, there is an urgent need for a new process that can skip the rough grinding stage and directly perform three-dimensional morphology adaptation repair of heavily scratched wafers based on fine grinding. This process should be able to precisely remove scratch protrusions and smoothly transition the surrounding area by optimizing fine grinding parameters (such as grinding wheel grit size, spindle and table speed matching, cooling conditions, etc.) without introducing additional mechanical damage, thereby significantly improving the surface quality and yield of regenerated wafers while shortening the processing cycle. Summary of the Invention
[0007] The purpose of this invention is to provide a wafer re-scrubbing three-dimensional morphology repair process based on the DFG 8560 single-axis fine grinding mode. By integrating three unique technical features, namely "skipping the traditional rough grinding stage", "staged fine grinding strategy" and "cooling system optimization", and combining mathematical modeling and control algorithms of key process parameters, it effectively solves the technical bottlenecks of deep subsurface damage, low processing efficiency and poor surface continuity in existing regeneration processes.
[0008] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0009] A wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode includes the following specific steps:
[0010] Step 1: Defect Detection and Assessment
[0011] The automated optical inspection system identifies the state of severe scratches on the wafer surface. This system is equipped with a high-resolution camera and a structured light source, enabling it to acquire three-dimensional topographic data of the wafer surface. Based on this data, a preset algorithm automatically identifies scratches with a depth of 3–8 μm, a width of 50–200 μm, and an asymmetric, steep edge profile. These scratches are then marked as target defects requiring three-dimensional topographic repair. The algorithm first calculates the depth and width of the scratch based on the three-dimensional topographic data. Secondly, it quantifies the 'asymmetric, steep feature' by calculating the difference in slope gradient between the left and right sides of the scratch profile. When this difference exceeds a preset threshold K, the scratch is determined to be a target defect requiring repair.
[0012] Step 2: Process Parameter Optimization and Algorithm Modeling
[0013] Based on the three-dimensional morphological characteristics of the heavy scratch defect, an optimized combination of process parameters suitable for uniaxial precision grinding was set, and the following core technological innovations were introduced:
[0014] (1) Skipping the traditional coarse grinding stage: The conventional two-stage process of "coarse grinding + fine grinding" is abandoned, and a high-precision fine grinding unit is directly used to treat severe scratches, avoiding deep subsurface damage introduced by coarse grinding. This strategy is based on the following material removal constraints:
[0015] , where 6μm≤T remove ≤12μm, where D scratch To measure the maximum scratch depth, = 2-4μm is a safety margin to ensure that defects are completely eliminated while minimizing material loss.
[0016] (2) Staged Grinding Strategy: The grinding process is divided into three dynamically controlled stages, each using a different combination of spindle / table speeds to achieve a gradual repair process from rapid passivation to smooth transition to ultra-smooth final grinding. The running time and speed matching for each stage are controlled by the following formula:
[0017] ,where,(R(t) = (N spindle , N table The numbers ) represent the spindle speed and table speed at time t (unit: rpm). The total grinding time T is... total ≤ 135s.
[0018] (3) Cooling system optimization: High-purity ultrapure water (resistivity > 18 MΩ·cm, pH = 6.8-7.2) is used as the cooling medium, and is precisely covered by a nozzle at an incident angle of 35°-45° to form a stable liquid film in the grinding wheel-wafer contact area. Local temperature rise ▽T local satisfy:
[0019] ,in Here, c is the frictional heat power, c is the specific heat capacity, and ρ is the density. = 4-6L / min is the water flow rate, to ensure that warping caused by thermal stress is effectively suppressed.
[0020] The grinding tool uses a ceramic-bonded diamond grinding wheel with a grit size of 8000 (average abrasive grain size 2μm, bond hardness H grade), and the grinding wheel linear speed v s Controlled within 18–25 m / s, satisfying:
[0021] (D: Grinding wheel diameter, in mm)
[0022] Spindle speed to table speed ratio Controlled within the range of 0.6–1.3; when D scratch When the thickness is > 5μm, it is preferable to use η=1800 / 1950≈0.923 to form a high-density spiral superposition trajectory and improve the local material removal efficiency.
[0023] Step 3: Perform single-axis precision grinding
[0024] The wafer to be processed is securely fixed on the worktable of the DISCO DFG 8560 grinding machine. The corresponding stage parameters are loaded according to the aforementioned algorithm model, and a single continuous fine grinding operation is initiated. The grinding pressure is controlled in a constant force mode, dynamically maintained at 30–50 kPa to ensure uniform contact pressure and prevent ripples or over-grinding.
[0025] Step 4: Repair Quality Verification
[0026] (1) Surface morphology inspection: The repair area is scanned using a white light interferometer. Requirements:
[0027] Surface roughness R a < 0.5nm,
[0028] The height difference Δh between the scratched area and the surrounding area is less than 1 nm.
[0029] Edge slope change rate ,
[0030] (2) Subsurface damage assessment: The depth d of the subsurface damage layer was observed by cross-sectional transmission electron microscopy (TEM). sub <50nm, no dislocation network or microcrack propagation, reducing speed by more than 60% compared to traditional processes.
[0031] (3) Process stability verification: This process was performed on 100 consecutive wafers with severe scratches, and the results showed that:
[0032] Single-piece processing time ≤135s (35.7% shorter than the traditional 210s)
[0033] The total amount of material removed was reduced by 40%.
[0034] Defect repair success rate > 98.5%,
[0035] The average polishing time for regenerated wafers is reduced by 35%.
[0036] Overall yield ≥ 97%
[0037] This process is applicable to 200mm or 300mm silicon-based regenerated wafers, especially for cases where localized severe scratches occur after multiple uses. No additional rough grinding equipment is required; high-precision repair can be completed using only the existing fine grinding unit of the DFG 8560, achieving in-depth utilization of equipment functions and simplification of the process.
[0038] Compared with existing technologies, this invention integrates three innovative features—"skipping rough grinding," "staged fine grinding," and "algorithmic control of the cooling system"—into a single-axis fine grinding platform for the first time. By establishing a quantitative control model for material removal, rotational speed sequence, and thermal management, it achieves efficient, low-damage, and highly continuous repair of the three-dimensional morphology of re-scratched surfaces. Experiments show that the repaired surface roughness Ra < 0.5 nm, subsurface damage < 50 nm, processing time ≤ 135 s, and significantly improved material utilization. This process is fully compatible with existing DFG 8560 equipment, possesses outstanding industrialization value, and provides a new paradigm for semiconductor regenerated wafer manufacturing that combines precision, efficiency, and economy. Attached Figure Description
[0039] Figure 1 This is a schematic diagram of the overall technical solution architecture of the wafer re-scrubbing three-dimensional morphology repair process based on the DFG 8560 single-axis fine grinding mode proposed in this invention.
[0040] Figure 2 This is a schematic diagram of the core principle framework of the present invention, which skips the traditional coarse grinding stage and combines a staged fine grinding strategy with cooling system optimization.
[0041] Figure 3 This is a logical flowchart of the phased refining strategy in this invention;
[0042] Figure 4 This is a schematic diagram of the multi-level interaction relationship and data flow of the cooling system optimization and thermal management control algorithm in this invention. Detailed Implementation
[0043] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments.
[0044] Currently, in the back-end processes of semiconductor manufacturing, wafer backside thinning is a key step in achieving device thinning, improving thermal management performance, and supporting advanced packaging. Wafer remanufacturing, as an important part of the circular economy, requires surface defect repair and thickness reconstruction of used wafers to meet the stringent standards of modern production lines regarding material flatness, surface roughness, and subsurface integrity. Among these, deep scratches, a type of macroscopic surface defect with a large depth and irregular contour, account for approximately 15% of incoming wafers. Their presence not only affects the stability of subsequent lamination, grinding, and polishing processes but may also induce crack propagation or lead to device failure. Therefore, efficient and low-damage repair methods are urgently needed. To address these technical problems, this invention proposes a method that integrates three major technical features: "skipping the traditional rough grinding stage," "a staged fine grinding strategy," and "cooling system optimization." Combined with mathematical modeling and control algorithms for key process parameters, this effectively solves the technical bottlenecks in existing remanufacturing processes, such as deep subsurface damage, low processing efficiency, and poor surface continuity. This method is applied to a three-dimensional morphology repair process for wafer scratches based on the DFG 8560 single-axis fine grinding mode.
[0045] Reference Appendix Figure 1 The overall technical architecture of the wafer re-scratching three-dimensional morphology repair process based on the DFG 8560 single-axis fine grinding mode proposed in this invention includes a defect detection and evaluation module, a process parameter optimization and algorithm modeling module, a single-axis fine grinding execution module, and a repair quality verification module. These modules work collaboratively to form a closed-loop control process, ensuring efficient and high-precision repair of the re-scratched area through dynamic adjustment of fine grinding parameters while avoiding the introduction of additional mechanical damage.
[0046] In the above-mentioned wafer re-scratching three-dimensional morphology repair process based on the DFG 8560 single-axis fine grinding mode, step (1) involves identifying the re-scratching defect state on the wafer surface using an automated optical inspection system. This automated optical inspection system is equipped with a high-resolution camera and a structured light source, capable of acquiring three-dimensional morphology data of the wafer surface. Based on this three-dimensional morphology data, a preset algorithm automatically identifies scratches with a depth of 3–8 μm, a width of 50–200 μm, and an asymmetrical, steep edge profile. These scratches are then marked as target defects requiring three-dimensional morphology repair, and their position coordinates and maximum depth D are recorded. scratch Based on the contour morphology features, the algorithm first calculates the depth and width of the scratch based on the three-dimensional topography data; secondly, it quantifies the 'asymmetric steep feature' by calculating the difference in slope gradient between the left and right sides of the scratch contour. When the difference is greater than a preset threshold K, the scratch is determined to be a target defect that needs to be repaired.
[0047] In the above-mentioned wafer re-scratching three-dimensional morphology repair process based on the DFG 8560 single-axis fine grinding mode, step (2) sets an optimized combination of process parameters suitable for single-axis fine grinding operations, targeting the three-dimensional morphological characteristics of the re-scratching defect. This step is the core of the present invention, which includes three strongly related technical sub-features that must be implemented simultaneously to achieve the expected technical effect.
[0048] Specifically, the first sub-feature in step (2) is skipping the traditional coarse grinding stage. This strategy abandons the conventional two-stage process of "coarse grinding + fine grinding" and directly uses a high-precision fine grinding unit to treat severe scratches, thereby avoiding deep subsurface damage caused by the large particle size and strong cutting force of the coarse grinding wheel. The implementation of this strategy strictly follows the material removal constraint, namely the total removal thickness T. remove The maximum scratch depth D was measured scratch Together with the safety margin ΔT, it is determined, and its mathematical expression is:
[0049] , where 6μm≤T remove ≤12μm, where D scratch The depth of the scratch is accurately measured using a contact profilometer or white light interferometer at the defect location marked in step (1); ΔT is set to 2-4 μm to compensate for measurement errors and ensure that the bottom of the scratch is completely removed. For example, if the maximum depth of a certain scratch is measured to be 7.2 μm, then T remove The depth can be set to 9.5 μm, which satisfies the constraints while minimizing unnecessary material loss. This strategy allows the entire repair process to be completed within the fine grinding unit, making full use of the existing high-precision motion control capabilities of the DFG 8560 equipment, eliminating the need to start the coarse grinding unit and significantly simplifying the process flow.
[0050] Specifically, the second sub-feature in step (2) is a phased fine grinding strategy. This strategy divides the fine grinding process into three dynamically controlled stages, each stage using a different combination of spindle / table speeds to achieve a gradual repair process from rapid passivation to smooth transition to ultra-smooth final grinding.
[0051] Reference Appendix Figure 3 The logic flowchart clearly illustrates the timing division and parameter switching logic of the three stages. The running time and speed matching of each stage are precisely controlled by the following formula:
[0052] ,where,(R(t) = (N spindle , N table The numbers ) represent the spindle speed and table speed at time t (unit: rpm). The total grinding time T is... total≤ 135s. The first stage (0-30s) employs a high spindle speed and a relatively low table speed (2100 / 1800 rpm) to create high linear velocity and high cutting frequency, aiming to quickly remove scratched protrusions and achieve initial passivation. The second stage (30-90s) reduces the spindle speed and increases the table speed (1600 / 2000 rpm) to increase the relative motion trajectory density, smoothing the rough surface formed in the first stage and eliminating ripples. The third stage (90-135s) further reduces the spindle speed to 1300 rpm while increasing the table speed to 2100 rpm. At this point, the spindle-to-table speed ratio η drops to approximately 0.619, forming an extremely dense spiral superimposed trajectory. Combined with extremely fine abrasive grains, this achieves ultra-smooth final grinding, ensuring a high degree of continuity between the repaired area and the surrounding substrate. This three-stage strategy, through precise timing control, decomposes a single fine grinding process into a functionally defined micro-operation sequence, resolving the contradiction between efficiency and surface quality that traditional single-parameter fine grinding cannot simultaneously address.
[0053] Specifically, the third sub-feature in step (2) is cooling system optimization. (See attached document.) Figure 4 This multi-level interaction and data flow diagram reveals the feedback mechanism between cooling medium parameters, thermodynamic models, and equipment control units. This invention uses high-purity ultrapure water as the cooling medium, with a resistivity greater than 18 MΩ·cm and a pH value controlled within the range of 6.8–7.2 to minimize ion contamination. Cooling water is precisely sprayed through a dedicated nozzle at an incident angle of 35°–45° to cover the grinding wheel-wafer contact area, forming a stable and continuous liquid film that effectively isolates frictional heat and washes away grinding debris. Local temperature rise ΔT local Strictly controlled, it must meet the following thermal management control algorithm:
[0054] ,in, ρ is the frictional heat power, determined by grinding pressure, relative speed, and material properties; c is the specific heat capacity of water, taken as 4186 J / (kg·K); ρ is the density of water, taken as 1000 kg / m³; Q flow The water flow rate is set within the range of 4–6 L / min. ambient For ambient temperature, T inlet This refers to the cooling water inlet temperature. It can be monitored in real-time or preset by Q. friction and dynamically adjust Q flow This ensures that the local temperature rise in the contact area remains below 5°C, thereby effectively suppressing wafer warping caused by thermal stress and guaranteeing the geometric fidelity of the repaired morphology.
[0055] Furthermore, the grinding tool employs a ceramic-bonded diamond grinding wheel with a grit size of 8000, an average abrasive grain size of 2μm, and a bond hardness of H. The grinding wheel linear velocity v_s is controlled within a safe and efficient range of 18–25 m / s, and its calculation formula is as follows: (D: Grinding wheel diameter, in mm), Spindle speed to table speed ratio Controlled within the range of 0.6–1.3; when D scratch When the thickness is > 5μm, the preferred ratio is η=1800 / 1950≈0.923. This specific ratio can form a high-density, complete spiral superposition trajectory in the scratched area, which can significantly improve the efficiency of local material removal and ensure that deep scratches are completely repaired.
[0056] In the above-mentioned wafer re-scrubbing three-dimensional morphology repair process based on the DFG 8560 uniaxial fine grinding mode, step (3) involves performing uniaxial fine grinding. (See attached document) Figure 2 The core principle framework diagram integrates three major elements: skipping rough grinding, staged fine grinding, and cooling optimization. The wafer to be processed, evaluated and marked in step (1), is firmly fixed to the worktable of the DISCO DFG 8560 grinding equipment by vacuum adsorption or wax bonding, ensuring no displacement or vibration during the entire 135 s fine grinding process. The equipment control system automatically loads the spindle speed, worktable speed, grinding time, and cooling water flow parameters corresponding to the three stages based on the algorithm model generated in step (2). A one-time continuous fine grinding operation is started, during which the grinding pressure adopts a constant force control mode, dynamically maintained within the set range of 30–50 kPa by a highly responsive pneumatic or electric actuator. This constant force control ensures that the pressure on the contact surface between the grinding wheel and the wafer is evenly distributed, preventing over-grinding or the generation of new ripple defects due to excessive local pressure, while avoiding incomplete repair due to insufficient pressure.
[0057] In the above-mentioned wafer re-scratching three-dimensional morphology repair process based on the DFG 8560 single-axis fine grinding mode, step (4) is the repair quality verification. This step includes a three-dimensional quantitative evaluation. First, surface morphology detection is performed, and a white light interferometer is used to perform high-resolution scanning of the repair area. The detection results must meet three hard indicators: surface roughness Ra < 0.5 nm, height difference Δh between the scratched area and the surrounding untreated area < 1 nm, and slope change rate of the repair area edge. These three indicators collectively ensure the ultra-smoothness, high continuity, and smooth transition of the repaired surface. Secondly, subsurface damage assessment is performed by preparing cross-sectional samples using focused ion beam (FIB) and observing them using transmission electron microscopy (TEM). The assessment criterion is the subsurface damage layer depth d. subThe depth is less than 50 nm, and there is no dislocation network or microcrack propagation within this depth range. Experimental data shows that compared with the traditional "coarse grinding + fine grinding" process, the subsurface damage depth is reduced by more than 60%. Finally, the process stability was verified by implementing this repair process on 100 consecutive 200 mm or 300 mm silicon-based regenerated wafers with typical severe scratches. Statistical results show that the processing time per wafer is no more than 135 s, which is 35.7% shorter than the traditional 210 s process; the total amount of material removed is reduced by an average of 40%; the defect repair success rate is higher than 98.5%; the polishing time required for the regenerated wafer to enter the subsequent polishing process is reduced by an average of 35%; and the final overall yield reaches 97% or higher. These data fully demonstrate the comprehensive advantages of this process in terms of efficiency, economy, and reliability.
[0058] To further illustrate the practical application of this invention, a specific application example is constructed. A 300 mm diameter regenerated silicon wafer is selected, and its back side has a typical heavy scratch after use. After inspection in step (1), its maximum depth D is... scratch The diameter is 6.8 μm and the width is 120 μm. Based on the algorithm model in step (2), T is calculated. remove = 6.8 + 3.2 = 10.0 μm. A ceramic-bonded diamond grinding wheel with a grit size of 8000 (D = 300 mm) is selected, and the cooling water flow rate Q is set. flow The flow rate was 5 L / min, and the pH was 7.0. In step (3), the equipment performed a three-stage fine grinding according to a preset program: the first 30 seconds were run at 2100 / 1800 rpm, the middle 60 seconds were switched to 1600 / 2000 rpm, and the final 45 seconds were completed at 1300 / 2100 rpm, with a constant pressure of 40 kPa throughout. After the processing was completed, as verified in step (4), the white light interferometer scan showed that the repair area Ra=0.42 nm, Δh=0.8 nm. =0.042μm / μm; TEM observations show d sub =42 nm, no microcracks; the entire processing time was 132 s. This example fully demonstrates the entire process of this invention from defect identification to high-quality repair, with all technical features working synergistically to achieve the expected technical effect.
[0059] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.
Claims
1. A wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode, characterized in that: The specific steps include the following: Step 1: Defect detection and assessment. The automated optical inspection system is used to identify the state of severe scratches on the wafer surface. The automated optical inspection system is equipped with a high-resolution camera and a structured light source, which can acquire three-dimensional morphological data of the wafer surface. Based on the three-dimensional topography data, a preset algorithm automatically identifies scratches with a depth of 3–8 μm, a width of 50–200 μm, and an asymmetrical and steep edge profile, and marks them as target defects that need to be repaired in three-dimensional topography. Step 2: Process parameter optimization. Based on the three-dimensional morphological characteristics of the heavy scratch defects, an optimized combination of process parameters suitable for single-axis precision grinding is set. The grinding tool uses a ceramic-bonded diamond grinding wheel with a grit size of 8000. By adjusting the speed ratio between the spindle and the worktable, the spacing between adjacent grinding tracks formed by the grinding wheel in the heavy scratch area is less than 1 / 5 of the scratch width, thereby forming a grinding track that can completely cover and densely intersect, so as to achieve a progressive and smooth removal of the scratch protruding edge. The cooling system uses ultrapure water as the cooling medium, with the water flow rate controlled at 4 to 6 liters per minute and the water temperature maintained in the range of 20 to 23 degrees Celsius, to ensure the thermal stability of the grinding area and effectively flush away and remove grinding debris. Step 3: Perform single-axis fine grinding. Securely fix the wafer to be processed on the worktable of the DFG 8560 grinding equipment. Skip the traditional rough grinding stage and directly use the fine grinding wheel under the above-mentioned optimized process parameters to perform a one-time continuous grinding operation on the back of the wafer. The grinding process continues until the heavy scratch defects are completely eliminated and the surface roughness reaches the preset standard to obtain a flat surface that meets the requirements of the regeneration process. The grinding process is carried out in stages. In the initial stage, the spindle speed is 2100 rpm and the table speed is 1800 rpm for 30 seconds. In the middle stage, the spindle speed is adjusted to 1600 rpm and the table speed is 2000 rpm for 60 seconds. In the final stage, the spindle speed is 1300 rpm and the table speed is 2100 rpm for 45 seconds. The total grinding time is controlled within 135 seconds.
2. The wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode according to claim 1, characterized in that: The depth of the severe scratches ranges from 3 to 8 micrometers, and the width ranges from 50 to 200 micrometers, with an asymmetrical and steep edge profile.
3. The wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode according to claim 1, characterized in that: The ceramic-bonded diamond grinding wheel with a particle size of 8000 has an average abrasive size of 2 micrometers, a bond hardness of H grade, and a grinding wheel linear speed controlled between 18 and 25 meters per second.
4. The wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode according to claim 1, characterized in that: The ratio of the spindle speed to the table speed is controlled within the range of 0.6 to 1.3; when the depth of the heavy scratch is greater than 5 micrometers, the spindle speed is 1800 rpm and the table speed is 1950 rpm.
5. The wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode according to claim 1, characterized in that: The ultrapure water has a resistivity greater than 18 megohm-cm and a pH value controlled between 6.8 and 7.
2. The coolant nozzle is aimed at the contact area between the grinding wheel and the wafer at an angle of 35 to 45 degrees.
6. The wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode according to claim 1, characterized in that: The total removal amount of the single-axis fine grinding is controlled between 6 and 12 micrometers, and the grinding pressure is dynamically maintained between 30 and 50 kPa, using a constant force control mode.
7. The wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode according to claim 1, characterized in that: It also includes a surface quality inspection step after grinding, which uses a white light interferometer to perform a three-dimensional morphological scan of the repaired area. The requirements are that the surface roughness Ra after repair is less than 0.5 nanometers, the height difference between the scratched area and the surrounding area is less than 1 nanometer, and the edge slope change rate is less than 0.05 micrometers per micrometer.
8. The wafer re-scrubbing three-dimensional morphology repair process based on DFG 8560 uniaxial fine grinding mode according to claim 1, characterized in that: It also includes a subsurface damage layer assessment step, which uses a cross-sectional transmission electron microscope to observe the subsurface structure of the polished wafer. The subsurface damage layer depth is required to be less than 50 nanometers, with no obvious dislocation network or microcrack extension.
Citation Information
Patent Citations
Wafer processing equipment
CN114454024B
A wafer thinning and polishing device
CN114473822B
High-efficiency nano-precision reducing method for semiconductor wafer
CN102407483A
Multi-section high-flatness wafer cutting method
CN120565501A