Method and device for determining host working mode, program product and storage medium

Abstract

The application discloses a host working mode determination method and device, a program product and a storage medium, and is applied to a host. The working mode of the host supports being configured as an addressing mode or a non-addressing mode. The method comprises the following steps: a first instruction is sent to N nodes included in P loops, so as to detect the address registration state of the N nodes; M first nodes are determined from the N nodes based on the address registration state of the N nodes; and the target working mode of the host is determined based on the M first nodes. Through the application, the problem that the working mode actually required by the host supporting being configured as the addressing mode and the non-addressing mode cannot be determined in the related art is solved, and the effect that the working mode actually required by the host supporting being configured as the addressing mode and the non-addressing mode can be determined is achieved.

Description

Technical Field

[0001] This application relates to the field of alarm device technology, and more specifically, to a method and apparatus for determining the working mode of a host, a program product, and a storage medium. Background Technology

[0002] In an alarm system, the host, as the core control unit, must be able to determine its operating mode in order to effectively manage the nodes connected to it. In related technologies, the host's operating mode can only be configured as either addressed mode or non-addressed mode; it is impossible for the host to support both addressed and non-addressed modes simultaneously.

[0003] Therefore, it can be seen that there is a technical problem in the relevant technology that is unable to determine the actual working mode required by a host that supports both addressing mode and non-addressing mode.

[0004] There is currently no effective solution to the aforementioned problems in the relevant technologies. Summary of the Invention

[0005] This application provides a method, apparatus, program product, and storage medium for determining a host operating mode, in order to at least solve the technical problem in the related art of being unable to determine the actual operating mode that a host needs to use, which supports both being configured in addressing mode and being configured in non-addressing mode.

[0006] According to one aspect of the embodiments of this application, a method for determining a host operating mode is provided, applied to a host, wherein the host operating mode can be configured as an addressing mode or a non-addressing mode. The method includes: sending a first instruction to N nodes included in P loops to detect the address registration status of the N nodes, wherein the loop is a line pre-set in the host for communication between the controller and the nodes located on the loop, the address registration status is used to indicate whether the address of the node is registered in the host, P is a natural number greater than or equal to 1, and N is a natural number greater than or equal to 1; determining M first nodes from the N nodes based on the address registration status of the N nodes, wherein the addresses of all M first nodes are registered in the host, and M is less than or equal to N; determining a target operating mode of the host based on the M first nodes, wherein in the addressing mode, a second node in an abnormal state among the M first nodes transmits first abnormal information of the second node to the controller through a protocol, and in the non-addressing mode, the controller determines the second abnormal information of the third node by detecting the current information of the first loop including the third node in an abnormal state.

[0007] In an exemplary embodiment, before sending the first instruction to the N nodes included in the P loops, the method further includes: sending a second instruction to the N nodes to detect the node status of the N nodes; receiving a first response message returned by a fourth node in response to the second instruction, wherein the N nodes include the fourth node, and the first response message indicates that the fourth node is allowed to respond to the instruction of the controller; and triggering the operation of sending the first instruction to the N nodes based on the first response message.

[0008] In one exemplary embodiment, sending a first instruction to N nodes included in P loops includes at least one of the following: sending the first instruction to N nodes when the host starts up; sending the first instruction to P N nodes at a preset period; sending the first instruction to N nodes when the number of nodes in P loops changes; and sending the first instruction to N nodes when the operating mode is detected to switch according to a preset switching method.

[0009] In one exemplary embodiment, the method further includes: registering the addresses of the M first nodes to the host in the following manner: disconnecting the connection between the controller and the other circuits of the P circuits (excluding the target circuit), wherein the target circuit is any one of the P circuits; registering the address of a fifth node in the host, wherein the fifth node is a node in the target circuit that has not registered an address in the host, and the M first nodes include the fifth node; and restoring the connection between the controller and the other circuits of the P circuits (excluding the target circuit).

[0010] In one exemplary embodiment, determining M first nodes from the N nodes based on the address registration status of the N nodes includes: upon receiving a second response message sent by one or more of the N nodes, determining the node that sent the second response message as the first node, thus obtaining M first nodes, wherein the second response message includes the address code of the node that sent the second response message.

[0011] In an exemplary embodiment, determining the target operating mode of the host based on M of the first nodes includes: determining the target operating mode as the addressing mode when M equals N; and determining the target operating mode as the non-addressing mode when M equals 0.

[0012] In an exemplary embodiment, after determining the target operating mode of the host based on the M first nodes, the method further includes at least one of the following: when the current operating mode of the host is the addressing mode and the target operating mode is the non-addressing mode, switching the operating mode of the host from the addressing mode to the non-addressing mode; when the current operating mode of the host is the non-addressing mode and the target operating mode is the addressing mode, switching the operating mode of the host from the non-addressing mode to the addressing mode; and when it is determined that the current operating mode of the host is consistent with the target operating mode, maintaining the current operating mode of the host unchanged.

[0013] In an exemplary embodiment, switching the operating mode of the host from the addressing mode to the non-addressing mode includes: controlling a first circuit to shut down, wherein the first circuit is used to identify and locate the addresses of M first nodes, and the first circuit is connected to P loops; controlling P second circuits to turn on, wherein the second circuits are used to identify the regions where N nodes are located, and the P second circuits are connected to the P loops in a one-to-one correspondence; and when it is determined that the first circuit is shut down and all P second circuits are turned on, switching the operating mode from the addressing mode to the non-addressing mode.

[0014] In an exemplary embodiment, switching the operating mode of the host from the non-addressing mode to the addressing mode includes: controlling P second circuits to shut down, wherein the second circuits are used to identify the regions where N nodes are located, and the P second circuits are connected to P loops in a one-to-one correspondence; controlling a first circuit to turn on, wherein the first circuit is used to identify and locate the addresses of M first nodes, and the first circuit is connected to the P loops; and when it is determined that the first circuit is on and all P second circuits are off, switching the operating mode from the non-addressing mode to the addressing mode.

[0015] In an exemplary embodiment, after determining M first nodes from the N nodes based on their address registration status, the method further includes: performing an anomaly investigation operation on the host when M is less than N and M is greater than 0.

[0016] According to another aspect of the embodiments of this application, a controller is also provided, comprising: a sending module, configured to send a first instruction to N nodes included in P loops to detect the address registration status of the N nodes, wherein the loops are lines pre-set in a host for communication between the controller and nodes located on the loops, the address registration status is used to indicate whether the address of the node is registered in the host, the host's operating mode supports being configured to addressing mode or non-addressing mode, P is a natural number greater than or equal to 1, and N is a natural number greater than or equal to 1; a first determining module, configured to determine based on N The address registration status of the aforementioned nodes is used to determine M first nodes from the N aforementioned nodes, wherein the addresses of the M aforementioned first nodes are all registered to the aforementioned host, and the M is less than or equal to the aforementioned N; the second determining module is used to determine the target operating mode of the aforementioned host based on the M aforementioned first nodes, wherein in the aforementioned addressing mode, the second node in an abnormal state among the M aforementioned first nodes transmits the first abnormal information of the second node to the aforementioned controller through a protocol, and in the aforementioned non-addressing mode, the aforementioned controller determines the second abnormal information of the third node by detecting the current information of the first circuit including the third node in an abnormal state.

[0017] According to another aspect of the embodiments of this application, a host is also provided, including a first circuit, P second circuits, a third circuit, and a controller as described above, wherein the first circuit is used to transmit first abnormal information of the second node to the controller via a protocol when the operating mode of the host is the addressing mode; the second circuit is used to detect the current information of the first circuit to determine the second abnormal information under the control of the controller when the operating mode of the host is the non-addressing mode, wherein the first circuit is a circuit connected to the second circuit; and the third circuit is used to control the operation of the host.

[0018] In one exemplary embodiment, the first circuit is connected to P of the aforementioned loops, and the number of the second circuits is P, with each of the P second circuits corresponding to one of the P aforementioned loops.

[0019] According to another aspect of the embodiments of this application, a computer-readable storage medium is also provided, wherein a computer program is stored therein, wherein the computer program is configured to perform the steps in any of the above method embodiments when executed by a processor.

[0020] According to another aspect of the embodiments of this application, a computer program product or computer program is provided, the computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, causing the computer device to perform the steps in any of the method embodiments described above.

[0021] According to another aspect of the embodiments of this application, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to perform the steps of any of the above method embodiments through the computer program.

[0022] This application sends a first instruction to N nodes in P loops to identify M first nodes among the N nodes that have registered addresses with the host. Based on these M first nodes, it determines the target operating mode of the host, which supports both addressing and non-addressing modes. By filtering the address registration status of the N nodes to identify and control the M first nodes that can be recognized by the host, it lays the foundation for determining the host's target operating mode. Determining the host's target operating mode based on the M first nodes allows the host to determine the actual operating mode it should be configured for based on the actual configuration of the field equipment. This provides a method for determining the host's operating mode for hosts that support both addressing and non-addressing modes. Therefore, it solves the problem in related technologies where it is impossible to determine the actual operating mode required by a host that supports both addressing and non-addressing modes, achieving the technical effect of being able to determine the actual operating mode required by a host that supports both addressing and non-addressing modes. Attached Figure Description

[0023] Figure 1 This is a schematic diagram illustrating an application scenario of a method for determining a host operating mode according to an embodiment of this application;

[0024] Figure 2 This is a flowchart illustrating a method for determining a host operating mode according to an embodiment of this application;

[0025] Figure 3 This is a host structure block according to an embodiment of the present application. Figure 1 ;

[0026] Figure 4 This is a structural block diagram of a host in a fire alarm system according to an embodiment of this application;

[0027] Figure 5 This is a host structure block according to an embodiment of the present application. Figure 2;

[0028] Figure 6 This is a flowchart illustrating a method for determining the operating mode of a host in a fire alarm system according to an embodiment of this application.

[0029] Figure 7 This is a structural block diagram of a controller according to an embodiment of this application;

[0030] Figure 8 This is a computer system architecture block diagram for implementing an electronic device according to an embodiment of this application. Detailed Implementation

[0031] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0032] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0033] According to one aspect of the embodiments of this application, a method for determining a host operating mode is provided. Optionally, in this embodiment, the above-described method for determining a host operating mode may be applied, but is not limited to, to... Figure 1 The hardware environment shown includes terminal device 102 and server 104. Server 104 can be connected to terminal device 102 via a network and can be used to provide services (e.g., application services, etc.) to terminal device 102 or clients installed on terminal device 102. A database can be set up on server 104 or independently of server 104 to provide data storage services for server 104.

[0034] The aforementioned network may include, but is not limited to, at least one of the following: wired network and wireless network. The aforementioned wired network may include, but is not limited to, at least one of the following: wide area network (WAN), metropolitan area network (MAN), and local area network (LAN). The aforementioned wireless network may include, but is not limited to, at least one of the following: Wireless Fidelity (WIFI) and Bluetooth. Terminal device 102 may be, but is not limited to, a personal computer (PC), mobile phone, tablet computer, etc. Server 104 may be, but is not limited to, a cloud server, server cluster, or other server types.

[0035] The method for determining the host operating mode according to an embodiment of this application can be executed by the server 104 or by the terminal device 102. Alternatively, the method for determining the host operating mode according to this embodiment can be executed by the controller on the terminal device 102.

[0036] Taking the method for determining the host working mode in this embodiment, executed by terminal device 102 (server 104), as an example, Figure 2 This is a flowchart illustrating a method for determining a host operating mode according to an embodiment of this application, as shown below. Figure 2 As shown, the process of this method may include the following steps:

[0037] Step S202: Send a first instruction to N nodes included in P loops to detect the address registration status of N nodes, wherein the loop is a line pre-set in the host for communication between the controller and the nodes located on the loop, the address registration status is used to indicate whether the address of the node is registered in the host, P is a natural number greater than or equal to 1, and N is a natural number greater than or equal to 1.

[0038] Optionally, the application scenarios of the solution in this embodiment include, but are not limited to, fire alarm scenarios and smoke alarm scenarios that require the use of alarm systems, such as fire alarm systems in large commercial and office buildings.

[0039] Optionally, the host in this embodiment can automatically determine whether it is running in addressing mode or non-addressing mode according to the actual configuration of the nodes. The number of loops required in the host and the number of nodes included in the loops can be determined based on the actual situation.

[0040] Optionally, when the host in this embodiment is in addressing mode, the controller in the host communicates with N nodes via a two-bus communication circuit. Each node has a unique address code, and the controller can accurately identify and control each independent node.

[0041] Optionally, when the host operates in non-addressable mode in this embodiment, the controller in the host can monitor the node status by detecting changes in current in the loop. Each loop is considered a partition, and the N nodes in non-addressable mode may not have corresponding address codes. When any node in the loop triggers an alarm, the controller only knows that an alarm has occurred in that partition, and there is no need to manage each node individually.

[0042] Optionally, the P loops in this embodiment are one or more lines pre-set in the host to communicate with the controller, which can connect nodes in different partitions.

[0043] Optionally, in this embodiment, the first instruction is a command sent by the controller to each loop node to detect whether the node's address has been registered in the host. The first instruction includes, but is not limited to, a registration command. The first instruction is used to check whether the node's address has been registered in the host, that is, the first instruction is used to detect whether the node is an addressing node.

[0044] Step S204: Based on the address registration status of the N nodes, determine M first nodes from the N nodes, wherein the addresses of the M first nodes have been registered to the host, and M is less than or equal to N.

[0045] Optionally, the address registration status in this embodiment is used to indicate whether the node has successfully registered its address with the host, and is key information for determining the node type (i.e., whether the node is an addressing node or a non-addressing node).

[0046] Optionally, in this embodiment, the first node refers to those nodes whose addresses have been successfully registered to the host.

[0047] Optionally, the first node in this embodiment can also be called an addressing node. An addressing node in addressing mode can also be used as a non-addressing node. That is, although the host's working mode is configured to addressing mode, when displaying the alarm information of the node on the interface in actual use, we do not care about the specific address of the node, but only care about the area where the node is located.

[0048] Step S206: Determine the target operating mode of the host based on the M first nodes. In the addressing mode, the second node in an abnormal state among the M first nodes transmits the first abnormal information of the second node through a protocol. In the non-addressing mode, the second abnormal information of the third node is determined by detecting the current information of the first circuit of the third node in an abnormal state.

[0049] Optionally, the target operating mode in this embodiment is the operating mode determined by the host based on the number of registered nodes, which aims to optimize system performance, reduce costs, and improve operational efficiency.

[0050] Through the above steps, a first instruction is sent to N nodes in P loops to identify M first nodes among the N nodes that have registered addresses with the host. Based on these M first nodes, the target operating mode of the host, which supports both addressing and non-addressing modes, is determined. The M first nodes that can be recognized and controlled by the host are filtered based on the address registration status of the N nodes, laying the foundation for determining the host's target operating mode in the next step. Determining the host's target operating mode based on the M first nodes allows the host to determine the actual operating mode it should be configured for based on the actual configuration of the field equipment. This provides a method for determining the host's operating mode for hosts that support both addressing and non-addressing modes. Therefore, it solves the problem in related technologies where it is impossible to determine the actual operating mode required by a host that supports both addressing and non-addressing modes, achieving the technical effect of being able to determine the actual operating mode required by a host that supports both addressing and non-addressing modes.

[0051] In an exemplary embodiment, before sending the first instruction to the N nodes included in the P loops, the method further includes: sending a second instruction to the N nodes to detect the node status of the N nodes; receiving a first response message returned by a fourth node in response to the second instruction, wherein the N nodes include the fourth node, and the first response message indicates that the fourth node is allowed to respond to the instruction of the controller; and triggering the operation of sending the first instruction to the N nodes based on the first response message.

[0052] Optionally, the second instruction in this embodiment is an instruction issued by the controller to test the status of the node and confirm whether the node can respond to the communication request of the controller. The second instruction includes, but is not limited to, inspection commands.

[0053] Optionally, the fourth node in this embodiment is any one of the N nodes, which is the node that can receive and respond when the controller sends the second instruction, that is, the node that indicates that its own status is normal through the first response message.

[0054] Optionally, in this embodiment, the first response message is the response returned by the fourth node after receiving the second instruction, which includes node status confirmation information, proving that the node is capable of receiving and processing the controller's instructions.

[0055] Through the above steps, before sending the first command, a second command is sent to all nodes to confirm the nodes' online status and their responsiveness to controller commands. This mechanism of the second command and the first response message provides the host with a flexible and intelligent method for node status detection. It can preemptively exclude inactive or faulty nodes, ensuring that subsequent commands are sent only to valid nodes, thus improving system response efficiency and reliability.

[0056] In one exemplary embodiment, sending a first instruction to N nodes included in P loops includes at least one of the following: sending the first instruction to N nodes when the host starts up; sending the first instruction to P N nodes at a preset period; sending the first instruction to N nodes when the number of nodes in P loops changes; and sending the first instruction to N nodes when the operating mode is detected to switch according to a preset switching method.

[0057] Optionally, in this embodiment, "host startup" refers to the initial stage of the host power-on or restart process. At this time, the host has not yet been fully initialized and needs to undergo a series of self-tests and status verification steps to ensure that all components are operating correctly.

[0058] Optionally, the preset period in this embodiment is an action that the host performs periodically according to a predefined time interval, such as a periodic check every 2 hours, weekly, or monthly. The preset period can be a time interval for periodically updating node status information, ensuring that the host can continuously monitor environmental changes and device health.

[0059] Optionally, in this embodiment, the change in the number of nodes refers to the addition or removal of nodes in the host, such as the addition of a new device or the removal of a certain device.

[0060] Optionally, the working mode in this embodiment can be switched according to a preset switching method, including but not limited to the function of the user manually switching the working mode according to actual needs.

[0061] Through the above steps, the host can send a first command to the nodes upon startup, reaching a preset cycle, a change in the number of nodes, or a preset switch in the working mode. This ensures that the host maintains efficient and stable monitoring capabilities regardless of startup, operation, device changes, or mode switching, guaranteeing the real-time nature and accuracy of node information.

[0062] In one exemplary embodiment, the method further includes: registering the addresses of the M first nodes to the host in the following manner: disconnecting the connection between the controller and the other circuits of the P circuits (excluding the target circuit), wherein the target circuit is any one of the P circuits; registering the address of a fifth node in the host, wherein the fifth node is a node in the target circuit that has not registered an address in the host, and the M first nodes include the fifth node; and restoring the connection between the controller and the other circuits of the P circuits (excluding the target circuit).

[0063] Optionally, in this embodiment, M of the M first nodes represents the known number of nodes registered in the host. A first node is a node in the host that can be addressed and precisely located, and is capable of detailed communication with the controller.

[0064] Optionally, in this embodiment, the fifth node is a node that has not yet registered an address with the host and is located in the target loop. During the registration process, the fifth node will be assigned a unique address and have a corresponding address code for subsequent addressing communication and state management.

[0065] Optionally, in this embodiment, the controller is responsible for advanced functions such as communication with nodes, status monitoring, and mode switching.

[0066] Alternatively, in this embodiment, the node address can be manually configured by the user based on actual needs, and then the form containing the node and its address can be imported into the host.

[0067] Optionally, when the nodes in this embodiment are addressable nodes and are applied in addressing mode according to the addressing method, the addresses of the addressable nodes can be registered as follows: A host has 8 loops, and it is generally stipulated that each loop can connect a maximum of 32 points (where numbers 0 and 255 are not used, totaling numbers 1 to 254). Strictly divided, partition 1 has address codes 1 to 31; partition 2 has address codes 32 to 63, ..., partition 8 has address codes 224 to 255; compliant debugging personnel can encode according to the address codes and partition correspondence rules; or they can choose not to encode according to the corresponding partition address rules. For ease of management, each partition is required to have a maximum of 32 connected nodes, but this can be adjusted according to actual conditions, such as a larger partition and a smaller partition, as long as the full load of the connected devices in each partition does not exceed the requirements of that loop, allowing for flexible application. After the host registers all the addressable nodes, it can query the address and location information of the devices corresponding to the nodes in each partition on the host. As long as a fire alarm occurs at a certain addressing node in a certain partition, it will be reported to the host via the two-bus protocol. The host can quickly locate the fire alarm device based on the address and location information.

[0068] Optionally, when the node in this embodiment is an addressable node and is used in addressable mode as a non-addressable method, the address of the addressable node can be registered as follows: This method involves the debugging personnel treating the addressable mode as a non-addressable mode. That is, the devices installed on-site are not coded and are still divided into partitions, but the partitions are equipped with addressable nodes. Then, during host registration, the addressable nodes can be automatically assigned addresses. Because a single-channel two-bus circuit is used, but there are 8 loops, during automatic address assignment and registration, the outputs of other partitions are first turned off, and then only partition 1 is turned on. Devices in partition 1 are automatically assigned addresses starting from address 1. This continues until all devices in partition 1 are registered. Assuming there are m devices, the last device's address is m. Then partition 1 is turned off, and only partition 2 is turned on, starting from address m+1 for automatic address assignment and registration. This process continues until the eighth partition is automatically assigned an address. This allows each partition's devices to be registered and automatically assigned addresses. The host can then query the number of devices in each partition and the address range of that partition, realizing the non-addressable usage of the addressable node. Similarly, for ease of management, each partition is required to have a maximum of 32 connected nodes. However, this can be adjusted based on actual conditions, such as one partition being larger than another, as long as the full load of the devices connected to the partition does not exceed the requirements of the loop, allowing for flexible application. In this case, the host only focuses on the partition concept, unlike the more precise method described above. As long as a fire alarm occurs on an addressable node under that partition, it is reported to the host via the two-bus protocol. The host determines the partition number of the device based on the address and displays the fire alarm for that partition.

[0069] Optionally, when the node in this embodiment is a non-addressable node, the address of the non-addressable node can be registered as follows: the installation of the non-addressable node device must strictly adhere to the installation requirement of no more than 32 points per loop. This is because non-addressable devices feed back signals based on current. When the number of connected nodes is too large, power-on surges or the sum of static power consumption may cause false detection signals from the host. In non-addressable mode, when a partition node has an abnormal current signal, the non-addressable detection circuit of that partition will detect the abnormal current signal of that partition, while other partitions are unaffected, and the host reports a fire alarm information for that partition.

[0070] By following the steps described above, other loops are disconnected one by one, unregistered nodes in the target loop are registered individually, and then connections to other loops are restored. This isolation method ensures individual registration of each loop node, avoiding registration errors caused by inter-loop interference, enhancing the accuracy and controllability of the registration process, and further supporting subsequent non-addressing applications of addressed nodes in addressing mode.

[0071] In one exemplary embodiment, determining M first nodes from the N nodes based on the address registration status of the N nodes includes: upon receiving a second response message sent by one or more of the N nodes, determining the node that sent the second response message as the first node, thus obtaining M first nodes, wherein the second response message includes the address code of the node that sent the second response message.

[0072] Optionally, in this embodiment, the second response message is a response containing specific information returned by a node after the controller sends a second instruction to N nodes. The second response message typically includes the node's address code to confirm the node's identity and location.

[0073] Optionally, in this embodiment, the address code is a unique identifier for each node in addressing mode, and each node has a uniquely assigned address.

[0074] By following the steps above, the number of first nodes can be determined based on the number of second response messages received, which facilitates further determination of the host's target operating mode.

[0075] In an exemplary embodiment, determining the target operating mode of the host based on M of the first nodes includes: determining the target operating mode as the addressing mode when M equals N; and determining the target operating mode as the non-addressing mode when M equals 0.

[0076] Optionally, in this embodiment, M represents the number of first nodes that have registered and are able to respond normally on the host, while N represents the total number of all nodes in the actual deployment of the host. M equals N, meaning that all expected nodes have successfully registered and are online. M equals 0, indicating that no node has successfully registered on the host, meaning there may be no addressable nodes in the system. In this case, the host needs to switch to non-addressable mode.

[0077] Optionally, the target working mode in this embodiment is the working mode determined by the host based on the current node's registration status and online status, specifically it can be an addressing mode or a non-addressing mode.

[0078] Through the above steps, when the number of registered nodes equals the number of nodes actually connected to the host, the host's target operating mode is determined to be addressing mode; when the number of registered nodes is zero, the host's target operating mode is determined to be non-addressing mode. This allows the host to automatically adapt to the presence of both addressing and non-addressing nodes in the host and determine the corresponding target operating mode without manual intervention, thus improving the system's adaptability and flexibility.

[0079] In an exemplary embodiment, after determining the target operating mode of the host based on the M first nodes, the method further includes at least one of the following: when the current operating mode of the host is the addressing mode and the target operating mode is the non-addressing mode, switching the operating mode of the host from the addressing mode to the non-addressing mode; when the current operating mode of the host is the non-addressing mode and the target operating mode is the addressing mode, switching the operating mode of the host from the non-addressing mode to the addressing mode; and when it is determined that the current operating mode of the host is consistent with the target operating mode, maintaining the current operating mode of the host unchanged.

[0080] Optionally, the host's operating mode in this embodiment refers to the mode in which the host is currently running. It can be an addressing mode (detailed location and management of each node) or a non-addressing mode (monitoring by partition or loop without considering the precise location of each node).

[0081] For example, a large hospital overseas deployed a fire alarm system that supports both addressed and non-addressed modes and has the function of automatically detecting and adjusting the operating mode. During routine maintenance of the hospital's fire alarm system at night, an engineer's misoperation caused all addressed nodes (M first nodes) to briefly go offline. The system detected that M equals 0 (all addressed nodes failed to respond) and automatically determined that the current target operating mode should be non-addressed mode. Since the system was currently in addressed mode, it automatically switched to non-addressed mode to ensure that fire alarms could still be detected even if addressed nodes failed. Although it could not pinpoint individual devices, it could respond promptly to fire situations within a zone.

[0082] For example, a large overseas hospital deployed a fire alarm system that supports both addressed and non-addressed modes and has the function of automatically detecting and adjusting the operating mode. After a system restart, the hospital's fire alarm system detected that all non-addressed nodes were in normal condition, but no response was detected from any addressed nodes. The system automatically determined the target operating mode to be non-addressed mode. However, as hospital operations resumed, addressed nodes gradually came online, and the system confirmed that M equals N (all expected addressed nodes are online and registered). At this point, the target operating mode should be addressed mode. The system automatically detected this change and switched the current operating mode from non-addressed mode to addressed mode, restoring precise monitoring and management of each node.

[0083] For example, a large hospital overseas deployed a fire alarm system that supports both addressed and non-addressed modes and has the function of automatically detecting and adjusting the operating mode. During operation, the hospital's fire alarm system periodically checks the node status. If the number of the M first nodes (addressed nodes) remains unchanged and matches the current operating mode (assuming it is addressed mode), the system will not need to switch modes and will continue to operate in the current addressed mode.

[0084] Through the above steps, based on the determination of the target working mode and the host's current working mode, the host's working mode is automatically switched, such as from addressing mode to non-addressing mode, and vice versa; if the current mode is consistent with the target mode, it remains unchanged. The host can automatically adjust its working mode according to the matching of the current node's registration status and the target working mode. The host can provide corresponding monitoring capabilities and response efficiency in a timely manner, while reducing system false alarms or monitoring vulnerabilities caused by mode mismatch, reducing the need for manual configuration, and improving user experience and system management convenience.

[0085] In an exemplary embodiment, switching the operating mode of the host from the addressing mode to the non-addressing mode includes: controlling a first circuit to shut down, wherein the first circuit is used to identify and locate the addresses of M first nodes, and the first circuit is connected to P loops; controlling P second circuits to turn on, wherein the second circuits are used to identify the regions where N nodes are located, and the P second circuits are connected to the P loops in a one-to-one correspondence; and when it is determined that the first circuit is shut down and all P second circuits are turned on, switching the operating mode from the addressing mode to the non-addressing mode.

[0086] Optionally, the first circuit in this embodiment is a circuit in the host for communicating with the addressing nodes (corresponding to the above M first nodes), and the first circuit includes, but is not limited to, a two-bus communication circuit.

[0087] Optionally, the second circuit in this embodiment is mainly used for monitoring non-addressable nodes (a portion of the aforementioned N nodes), with a particular emphasis on identifying the specific area where the node is located, rather than the precise location of a single node. Each second circuit is connected one-to-one with a loop in the system to monitor current changes in that loop, thereby determining whether an anomaly has occurred. The second circuit includes, but is not limited to, non-addressable detection circuits.

[0088] For example, in the fire alarm system of a high-rise office building overseas, the system supports both addressed and non-addressed modes and is equipped with advanced functionality that allows dynamic switching between these two modes. During nighttime maintenance, the fire alarm system automatically detected that M equals 0, meaning no validly registered addressed nodes are online, thus determining that the addressed mode cannot operate normally. The system then shuts down the first circuit and simultaneously activates P second circuits, switching the host's operating mode from addressed mode to non-addressed mode, continuing to provide basic fire alarm services.

[0089] By following the steps above, the first circuit used by the host in addressing mode is shut down, and the second circuit used by the host in non-addressing mode is turned on, thus completing the switch of the host's operating mode from addressing mode to non-addressing mode. When addressing functionality is not required, resource utilization is optimized and energy consumption is reduced, while ensuring the normal operation of the monitoring function of non-addressing nodes, adapting to the needs of different application scenarios.

[0090] In an exemplary embodiment, switching the operating mode of the host from the non-addressing mode to the addressing mode includes: controlling P second circuits to shut down, wherein the second circuits are used to identify the regions where N nodes are located, and the P second circuits are connected to P loops in a one-to-one correspondence; controlling a first circuit to turn on, wherein the first circuit is used to identify and locate the addresses of M first nodes, and the first circuit is connected to the P loops; and when it is determined that the first circuit is on and all P second circuits are off, switching the operating mode from the non-addressing mode to the addressing mode.

[0091] For example, in a fire alarm system of a large overseas shopping mall, the system supports both addressed and non-addressed modes to meet fire alarm needs under different circumstances. Before the mall opened for business the next day, the system conducted a comprehensive node review and registration process, finding that all addressed nodes (i.e., the M first nodes mentioned above) had re-entered the network and successfully registered. At this point, the system automatically shuts down the second circuit to avoid unnecessary current monitoring in addressed mode, while simultaneously activating the first circuit to restore addressed communication with all M first nodes. Once it is confirmed that the first circuit is activated and all second circuits are deactivated, the system switches its operating mode from non-addressed mode to addressed mode.

[0092] By following the steps above, the second circuit used by the host in non-addressing mode is shut down, and the first circuit used by the host in addressing mode is turned on, thus completing the switch of the host's operating mode from non-addressing mode to addressing mode. This ensures that the host can respond quickly when addressing functions are required, improving the system's versatility and adaptability.

[0093] In an exemplary embodiment, after determining M first nodes from the N nodes based on their address registration status, the method further includes: performing an anomaly investigation operation on the host when M is less than N and M is greater than 0.

[0094] Optionally, the anomaly troubleshooting operation in this embodiment refers to a series of operations performed by the system to identify and resolve the registration failure problem when the host detects that M is less than N but M is greater than 0, i.e., some addressing nodes have failed to register successfully. These operations include, but are not limited to, resending the registration command, checking the communication line, updating the node database, generating a fault report, or instructing debugging personnel to perform anomaly troubleshooting operations.

[0095] Through the above steps, when the number of registered nodes is less than the total number of nodes but not zero, the host will display an error message for troubleshooting. This provides an effective feedback mechanism for host configuration errors or node failures, which not only helps the host recover to its optimal operating state but also ensures that the host can quickly locate the problem and take appropriate measures to repair it when encountering node failures, thereby improving the overall stability, security, and monitoring efficiency of the host.

[0096] According to another aspect of the embodiments of this application, a host is also provided, including a first circuit, P second circuits, a third circuit, and a controller as described below, wherein the first circuit is used to transmit first abnormal information of the second node to the controller via a protocol when the operating mode of the host is the addressing mode; the second circuit is used to detect the current information of the first loop to determine the second abnormal information under the control of the controller when the operating mode of the host is the non-addressing mode, wherein the first loop is a loop connected to the second circuit; and the third circuit is used to control the operation of the host.

[0097] Figure 3 This is a host structure block according to an embodiment of the present application. Figure 1 ,like Figure 3As shown, the host includes: a first circuit 31, P second circuits 32, a third circuit 33, and a controller 34. The first circuit 31 is used to transmit, when the host's operating mode is the addressing mode, the first abnormality information of a second node in an abnormal state among M first nodes to the controller via a protocol. The M first nodes are nodes determined from N nodes based on the address registration status of N nodes. The addresses of all M first nodes are registered in the host. The N nodes are nodes included in P loops, which are pre-set in the host for communication between the controller and the controller located at... The circuit 32 is used for communication between nodes on the circuit, where P is a natural number greater than or equal to 1, N is a natural number greater than or equal to 1, and M is less than or equal to N; the second circuit 32 is used to support the controller in determining the second abnormal information of the third node by detecting the current information of the first circuit including the third node in an abnormal state when the host's operating mode is the non-addressing mode, where the first circuit is a circuit connected to the second circuit; the third circuit 33 is used to control the operation of the host; and the controller 34 is used to implement any of the steps of the host operating mode determination method.

[0098] Optionally, the host in this embodiment can automatically identify and select addressing or non-addressing working mode according to the characteristics of the node, including but not limited to the host of a fire alarm system and the host of a smoke alarm.

[0099] Optionally, the first circuit in this embodiment is a circuit for transmitting information via a protocol in addressing mode. When the host's operating mode is addressing mode, the first circuit can detect and identify a second node in an abnormal state among the M registered addresses of the first node, and transmit the first abnormal information of the second node (such as detailed information such as equipment failure or fire alarm) to the controller. In practical use, the first circuit can also be referred to as a two-bus communication circuit.

[0100] Optionally, the first circuit included in the host in this embodiment can be one or more circuits, and the staff can design it flexibly according to the actual situation.

[0101] Optionally, in this embodiment, the P second circuits are P independent circuits integrated in the host, and each second circuit is connected to a loop. When the host's operating mode is non-addressable, the second circuits enable the controller to determine the second abnormal information of the third node by detecting the current information in the first loop connected to the second circuit. Since the N nodes do not have their own address codes when the host's operating mode is non-addressable, the second circuits identify whether the nodes included in the corresponding loop have malfunctioned by detecting current fluctuations or abnormalities.

[0102] Optionally, the third circuit in this embodiment is a circuit responsible for controlling the overall operating status of the host. The third circuit includes, but is not limited to, a power supply circuit, a key detection circuit, a display circuit, etc. In actual use, the operator can configure one or more third circuits based on actual usage needs.

[0103] Optionally, the controller in this embodiment can intelligently determine and switch the host's working mode based on the node's address registration status, and is also responsible for handling abnormal information uploaded by the first circuit and the second circuit.

[0104] Optionally, Figure 4 This is a structural block diagram of a host in a fire alarm system according to an embodiment of this application, such as... Figure 4 As shown, the host includes: a two-bus communication module 41, a multi-loop non-addressing detection module 42, other application modules 43, and a microcontroller module 44. The two-bus communication module 41 includes the first circuit, the multi-loop non-addressing detection module 42 includes P second circuits, the other application module 43 includes the third circuit, and the microcontroller module 44 is equivalent to the microcontroller module. The two-bus communication module 41 is used to transmit the first abnormal information of the second node in an abnormal state among M first nodes to the microcontroller module via a protocol when the host's operating mode is the addressing mode. The M first nodes are nodes determined from N nodes based on the address registration status of N nodes. The addresses of all M first nodes are registered to the host. A node is a node included in P loops. Each loop is a pre-installed line in the host computer for communication between the microcontroller module and the node located on the loop. P is a natural number greater than or equal to 1, N is a natural number greater than or equal to 1, and M is less than or equal to N. The multi-loop non-addressing detection module 42 is used to support the microcontroller module in determining the second abnormal information of the third node by detecting the current information of the first loop, which includes the third node in an abnormal state, when the host computer's operating mode is the non-addressing mode. The first loop is a loop connected to the second circuit. The other application module 43 is used to control the operation of the host computer. The microcontroller module 44 is used to implement any of the steps of the host computer operating mode determination method.

[0105] Through the above steps, a host computer was designed, comprising a first circuit, P second circuits, a third circuit, and a controller. This host computer can be configured to operate in either addressable or non-addressable mode. In addressable mode, the controller accurately acquires node anomaly information through the first circuit. In non-addressable mode, the second circuit detects loop current changes to indirectly determine the abnormal state of nodes in the partition. The design of the third circuit ensures the normal operation of the host computer. This host computer design can automatically select the most suitable operating mode based on the characteristics of the nodes actually configured on-site. This solves the problem in related technologies where the host computer's operating mode can only be configured in addressable or non-addressable mode, achieving the technical effect of supporting both addressable and non-addressable modes. This allows users to reduce the number of host computers purchased and lower costs.

[0106] In one exemplary embodiment, the first circuit in the host is connected to P of the aforementioned loops, and the number of the second circuits is P, with each of the P second circuits corresponding to one of the P aforementioned loops.

[0107] Optionally, Figure 5 This is a host structure block according to an embodiment of the present application. Figure 2 ,like Figure 5 As shown, the host includes: a two-bus communication circuit 51 (equivalent to the first circuit mentioned above), a multi-loop addressing detection module 52, other application circuits 53 (equivalent to the third circuit mentioned above), and a controller 54. The two-bus communication circuit 51 is connected to P loops, and the multi-loop addressing detection module 52 includes P non-addressing detection circuits (corresponding to the P second circuits mentioned above). The P non-addressing detection circuits are connected to the P loops mentioned above in a one-to-one correspondence.

[0108] Optionally, in Figure 5 In the host shown, when P loops are connected to the two-bus communication circuit, the N nodes included in the P loops can be called addressing nodes.

[0109] Optionally, in Figure 5 In the host shown, when the P loops are connected one-to-one with the P non-addressing detection circuits included in the multi-loop addressing detection module, the N nodes included in the P loops can be called non-addressing nodes.

[0110] Optionally, Figure 5The two-bus communication circuit 51 in the host shown is used to transmit, via protocol, the first abnormality information of a second node in an abnormal state among M first nodes to the controller when the host's operating mode is the addressing mode. The M first nodes are nodes determined from N nodes based on their address registration status. The addresses of all M first nodes are registered in the host. The N nodes are nodes included in P loops, which are pre-set lines in the host for communication between the controller and nodes located on the loops. P is greater than or equal to... The above-mentioned N is a natural number greater than or equal to 1, and the above-mentioned M is less than or equal to the above-mentioned N; the non-addressing detection circuit included in the above-mentioned multi-loop addressing detection module 52 is used to support the controller in determining the second abnormal information of the third node by detecting the current information of the first loop of the third node in an abnormal state when the working mode of the above-mentioned host is the above-mentioned non-addressing mode, wherein the first loop is a loop connected to the second circuit; the above-mentioned other application circuit 53 is used to control the operation of the above-mentioned host; the above-mentioned controller 54 is used to implement any of the steps of the above-mentioned host working mode determination method.

[0111] Optionally, Figure 5 In actual use, the host shown may have a total of 8 loops (i.e., P=8 above). Each loop can be connected to a maximum of 32 addressable nodes or 32 non-addressable nodes (i.e., the maximum value of N above = 8 × 32 = 256). Among them, the addressable nodes and non-addressable nodes in the 8 loops cannot be mixed. That is, the 8 loops can only be connected to addressable nodes or only to non-addressable nodes.

[0112] Through the above steps, the host only contains one dual-bus communication circuit, meaning that the eight loops in the host share this single dual-bus communication circuit, which reduces the hardware cost of the host. Each of the eight loops in the host has its corresponding non-addressing detection circuit, which can detect the status of the non-addressing nodes included in its respective loop. Figure 5 The host is designed in the form shown, so that the host includes both a two-bus communication circuit that can realize protocol communication with the addressing node and a non-addressing detection circuit that can be connected to the non-addressing node, thus realizing the function of the host being able to connect to both addressing and non-addressing nodes.

[0113] The following explanation, with reference to optional examples, illustrates a method for determining a host operating mode in an embodiment of this application. Figure 6 This is a flowchart illustrating a method for determining the operating mode of a host in a fire alarm system according to an embodiment of this application. Figure 6As shown, in this optional example, the host's operating mode can be configured as either addressing mode or non-addressing mode, and the process for determining the host's operating mode may include the following steps:

[0114] Step S602: With the loop device and loop access normal, the staff can confirm the loop device connected to the node in the loop and the number of loops included in the host according to actual needs, to ensure that the physical connection of all hardware devices is correct and all devices are in a normal working state. Here, the loop is a line pre-set in the host for communication between the controller and the node located on the loop.

[0115] Step S604: Power on the host. The host is connected to the power supply and begins the startup process, preparing for the subsequent determination of the host's working mode.

[0116] Step S606: The host is in addressing mode by default. After powering on, the host enters addressing mode by default. The controller is ready to communicate with the node through the two-bus communication module to detect and confirm the existence of the node.

[0117] Step S608: The controller sends an inspection command (corresponding to the second instruction mentioned above) to the N nodes included in the P loops and waits for the response from the N nodes. If a node in the loop responds to the inspection command (i.e., the controller receives the first response message sent by the node included in the loop), step S610 is executed. If no node in the loop responds to the inspection command (i.e., the controller does not receive the first response message sent by the node included in the loop), step S618 is executed. Here, N and P are both natural numbers greater than or equal to 1.

[0118] Step S610: The controller sends a registration command (corresponding to the first instruction above) to N nodes to detect the address registration status of the N nodes, wherein the address registration status is used to indicate whether the node's address is registered in the host.

[0119] In step S612, the controller determines whether the number of registered nodes and the number of connected nodes are consistent based on the second response message sent by one or more of the N nodes. If they are consistent, step S614 is executed; if they are inconsistent, step S616 is executed.

[0120] Step S614: The controller determines that the target operating mode of the host is addressing mode;

[0121] Step S616: Maintain addressing mode and prompt the debugging personnel with an exception to instruct them to perform an exception troubleshooting operation on the host. After the exception node in the host is determined to be handled, proceed to step S608.

[0122] Step S618: If no node in the loop responds to the inspection command (i.e., the controller does not receive the first response message sent by the node included in the loop), it indicates that the number of registered nodes in the host is 0, and the controller determines that the target working mode of the host is non-addressing mode.

[0123] In step S620, the controller shuts down the two-bus communication circuit (corresponding to the first circuit mentioned above);

[0124] In step S622, the controller controls the P non-addressable detection circuits (corresponding to the P second circuits mentioned above) to turn on, and the host's working mode is switched to non-addressable mode, in preparation to identify the state of the non-addressable node by detecting the current change in the detection loop.

[0125] In this optional example, the controller issues inspection commands via a two-wire bus circuit. When the controller detects a node inspection response in a loop, it again uses a registration command to verify whether the number of registered nodes matches the actual number of connected nodes. This method can determine whether non-addressable nodes or addressable nodes are mistakenly connected in each loop. When the host registers a node via the registration command, it indicates that there is an addressable node in the loop. If the number matches the actual number of connected nodes, the host continues to maintain addressable mode. If the number of registered nodes does not match the actual number of connected nodes, the on-site commissioning personnel, based on the host's prompts, determine the loop problem. After checking the loop devices connected to the nodes, they reconfirm the host's operating mode. If the host registers 0 nodes, the host shuts down the two-wire bus communication circuit, opens the non-addressable detection circuit of each loop, and switches the host to non-addressable mode. By sending inspection commands and analyzing node responses, the system automatically identifies the types of nodes operating in the system and can flexibly switch between addressed and non-addressed modes. When no addressed node response is detected, the process seamlessly switches to non-addressed mode, saving energy, reducing hardware load, and ensuring system integrity and effectiveness in different application scenarios. Through automated detection and intelligent mode switching, the system can adapt to mixed environments of addressed and non-addressed nodes, solving the problem in related technologies where it's impossible to determine the actual operating mode required by a host that can be configured in both addressed and non-addressed modes. This significantly improves the deployment efficiency, operational stability, and user-friendliness of the alarm system, while reducing maintenance costs and enhancing overall system performance and market competitiveness.

[0126] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0127] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as read-only memory (ROM) / random access memory (RAM), magnetic disk, optical disk), and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0128] According to another aspect of the embodiments of this application, a host operating mode determination apparatus is also provided. This host operating mode determination apparatus can be used to implement the host operating mode determination method provided in the above embodiments, and will not be repeated hereafter. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0129] Figure 7 This is a structural block diagram of a controller according to an embodiment of this application, such as... Figure 7 As shown, the controller includes:

[0130] The sending module 72 is used to send a first instruction to N nodes included in P loops to detect the address registration status of the N nodes. The loop is a line pre-set in the host for communication between the controller and the nodes located on the loop. The address registration status is used to indicate whether the address of the node is registered in the host. P is a natural number greater than or equal to 1, and N is a natural number greater than or equal to 1.

[0131] The first determining module 74 is used to determine M first nodes from the N nodes based on the address registration status of the N nodes, wherein the addresses of the M first nodes have been registered to the host, and M is less than or equal to N.

[0132] The second determining module 76 is used to determine the target operating mode of the host based on the M first nodes, wherein, in the addressing mode, the second node in an abnormal state among the M first nodes transmits the first abnormal information of the second node through a protocol, and in the non-addressing mode, the second abnormal information of the third node is determined by detecting the current information of the first circuit including the third node in an abnormal state.

[0133] It should be noted that the sending module 72 in this embodiment can be used to perform the above step S202, the first determining module 74 in this embodiment can be used to perform the above step S204, and the second determining module 76 in this embodiment can be used to perform the above step S206.

[0134] Optionally, the controller in this embodiment can be the one described above. Figure 3 The controller in the host shown can also be a controller independent of the host.

[0135] Optionally, in this embodiment, where the controller is independent of the host, the controller establishes communication with the host via physical lines or wireless communication. The controller and host are connected through a dedicated communication port or network interface to ensure secure data transmission and real-time performance. In addressing mode, the controller actively exchanges addressing information with the host and addressing nodes via a sending module, including but not limited to node address registration requests, address confirmation information, and fault status reports. When the host operates in non-addressing mode, the controller senses the node status by detecting changes in the current in the loops within the host. In this independent control architecture, the controller, as an independent entity with core functions of intelligent decision-making, addressing detection, and status monitoring, can not only effectively manage nodes in addressing mode but also detect node status through current information in non-addressing mode.

[0136] The embodiments provided in this application utilize a controller to send a first instruction to N nodes in P loops, identifying M first nodes among the N nodes that have registered addresses with the host. Based on these M first nodes, a target operating mode for the host is determined, supporting both addressing and non-addressing configurations. The M first nodes, which can be recognized and controlled by the host, are filtered based on their address registration status, laying the foundation for determining the host's target operating mode. Determining the host's target operating mode based on the M first nodes allows the host to determine the correct operating mode to be configured according to the actual configuration of the field equipment. This provides a method for determining the host's operating mode for hosts that support both addressing and non-addressing configurations. Therefore, it solves the problem in related technologies where it is impossible to determine the actual operating mode required by a host that supports both addressing and non-addressing configurations, achieving the effect of being able to determine the actual operating mode required by a host that supports both addressing and non-addressing configurations.

[0137] In an exemplary embodiment, the sending module 72 is further configured to send a second instruction to the N nodes included in the P loops before sending the first instruction to detect the node status of the N nodes; receive a first response message returned by a fourth node in response to the second instruction, wherein the N nodes include the fourth node, and the first response message indicates that the fourth node is allowed to respond to the instruction of the controller; and trigger the operation of sending the first instruction to the N nodes based on the first response message.

[0138] In an exemplary embodiment, the sending module 72 is further configured to send a first instruction to N nodes included in the P loops; send the first instruction to N nodes when the host starts up; send the first instruction to the P and N nodes according to a preset period; send the first instruction to N nodes when the number of nodes in the P loops changes; and send the first instruction to N nodes when the operating mode is detected to switch according to a preset switching method.

[0139] In an exemplary embodiment, the sending module 72 is further configured to register the addresses of the M first nodes to the host in the following manner: disconnecting the connection between the controller and the other circuits of the P circuits (excluding the target circuit), wherein the target circuit is any one of the P circuits; registering the address of a fifth node in the host, wherein the fifth node is a node in the target circuit that has not registered an address in the host, and the M first nodes include the fifth node; and restoring the connection between the controller and the other circuits of the P circuits (excluding the target circuit).

[0140] In an exemplary embodiment, the first determining module 74 is further configured to, upon receiving a second response message sent by one or more of the N nodes, determine the node that sent the second response message as the first node, thereby obtaining M first nodes, wherein the second response message includes the address code of the node that sent the second response message.

[0141] In an exemplary embodiment, the second determining module 76 is further configured to determine the target operating mode as the addressing mode when M equals N, and to determine the target operating mode as the non-addressing mode when M equals 0.

[0142] In an exemplary embodiment, the second determining module 76 is further configured to: switch the operating mode of the host from the addressing mode to the non-addressing mode when the current operating mode of the host is the addressing mode and the target operating mode is the non-addressing mode; switch the operating mode of the host from the non-addressing mode to the addressing mode when the current operating mode of the host is the non-addressing mode and the target operating mode is the addressing mode; and maintain the current operating mode of the host unchanged when it is determined that the current operating mode of the host is consistent with the target operating mode.

[0143] In an exemplary embodiment, the second determining module 76 is further configured to control the first circuit to be turned off, wherein the first circuit is used to identify and locate the addresses of M first nodes, and the first circuit is connected to P loops; control the P second circuits to be turned on, wherein the second circuits are used to identify the regions where N nodes are located, and the P second circuits are connected to the P loops in a one-to-one correspondence; when it is determined that the first circuit is turned off and all P second circuits are turned on, the operating mode is switched from the addressing mode to the non-addressing mode.

[0144] In an exemplary embodiment, the second determining module 76 is further configured to control P second circuits to shut down, wherein the second circuits are used to identify the regions where N nodes are located, and the P second circuits are connected to P loops in a one-to-one correspondence; control the first circuit to turn on, wherein the first circuit is used to identify and locate the addresses of M first nodes, and the first circuit is connected to P loops; and when it is determined that the first circuit is turned on and all P second circuits are turned off, the operating mode is switched from the non-addressing mode to the addressing mode.

[0145] In an exemplary embodiment, the first determining module 74 is further configured to determine M first nodes from the N nodes based on the address registration status of the N nodes, and then perform an anomaly investigation operation on the host if M is less than N and M is greater than 0.

[0146] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0147] According to another aspect of the embodiments of this application, a computer-readable storage medium is provided, the computer-readable storage medium including a stored program, wherein the program executes the steps in any of the above method embodiments when it is run.

[0148] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as USB flash drives, ROMs, RAMs, portable hard drives, magnetic disks, or optical disks.

[0149] According to another aspect of the embodiments of this application, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor is configured to perform the steps of any of the method embodiments described above via the computer program. In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0150] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0151] According to another aspect of the embodiments of this application, a computer program product is also provided, comprising a computer program / instructions containing program code for performing the methods shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via a communication section 809, and / or installed from a removable medium 811. When the computer program is executed by a central processing unit 801, it performs various functions provided in the embodiments of this application. The sequence numbers of the embodiments of this application above are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0152] Figure 8 This is a computer system architecture block diagram of an electronic device according to an embodiment of this application. For example... Figure 8 As shown, the computer system 800 includes a central processing unit (CPU) 801, which can determine the data stored in ROM (corresponding to...). Figure 8 The program is stored in the read-only memory (802) or loaded from the storage section 808 into the RAM (corresponding to the read-only memory 802). Figure 8 The system executes various appropriate actions and processes by storing programs in the random access memory (RAM) 803. The RAM 803 also stores various programs and data required for system operation. The central processing unit 801, the read-only memory 802, and the RAM 803 are interconnected via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0153] The following components are connected to the I / O interface (corresponding to) Figure 8 The input / output interface 805 includes: an input section 806 including a keyboard, mouse, etc.; an output section 807 including a cathode ray tube (CRT), liquid crystal display (LCD), and speakers, etc.; a storage section 808 including a hard disk, etc.; and a communication section 809 including a network interface card, such as a local area network card or modem, etc. The communication section 809 performs communication processing via a network such as the Internet. A drive 88 is also connected to the input / output interface 805 as needed. A removable medium 811, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on the drive 810 as needed so that computer programs read from it can be installed into the storage section 808 as needed.

[0154] Specifically, according to embodiments of this application, the processes described in the various method flowcharts can be implemented as computer software programs. For example, embodiments of this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 809, and / or installed from removable medium 811. When the computer program is executed by central processing unit 801, it performs various functions defined in the system of this application.

[0155] It should be noted that, Figure 8 The computer system 800 of the electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of this application.

[0156] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those described herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0157] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A method for determining the operating mode of a host computer, characterized in that, Applied to a host, wherein the host's operating mode can be configured to be either addressable or non-addressable, the method includes: A first instruction is sent to N nodes included in P loops to detect the address registration status of the N nodes, wherein the loop is a line pre-set in the host for communication between the controller and the nodes located on the loop, the address registration status is used to indicate whether the address of the node is registered in the host, P is a natural number greater than or equal to 1, and N is a natural number greater than or equal to 1. Based on the address registration status of N nodes, M first nodes are determined from the N nodes, wherein the addresses of the M first nodes have been registered with the host, and M is less than or equal to N; The target operating mode of the host is determined based on M first nodes. In the addressing mode, a second node in an abnormal state among the M first nodes transmits the first abnormal information of the second node to the controller through a protocol. In the non-addressing mode, the controller determines the second abnormal information of the third node by detecting the current information of the first loop including the third node in an abnormal state.

2. The method according to claim 1, characterized in that, Before sending the first instruction to the N nodes included in the P loops, the method further includes: Send a second instruction to the N nodes to detect the node status of the N nodes; Receive a first response message returned by the fourth node in response to the second instruction, wherein the fourth node is included among the N nodes, and the first response message is used to indicate that the fourth node is allowed to respond to the instruction of the controller; Based on the first response message, the operation of sending the first instruction to N nodes is triggered.

3. The method according to claim 1, characterized in that, Send a first instruction to N nodes included in P loops, including at least one of the following: When the host starts up, the first instruction is sent to N of the nodes; The first instruction is sent to P and N nodes according to a preset period; When the number of nodes in the P loops changes, the first instruction is sent to the N nodes; When the operating mode is detected to switch according to a preset switching method, the first instruction is sent to N nodes.

4. The method according to claim 1, characterized in that, The method further includes: registering the addresses of M of the first nodes to the host in the following manner: Disconnect the controller from all P loops except the target loop, where the target loop is any one of the P loops; Register the address of the fifth node in the host, wherein the fifth node is a node in the target loop that has not registered an address in the host, and the M first nodes include the fifth node; Reconnect the P loops, excluding the target loop, to the controller.

5. The method according to claim 1, characterized in that, Based on the address registration status of the N nodes, M first nodes are determined from the N nodes, including: Upon receiving a second response message from one or more of the N nodes, the node that sent the second response message is identified as the first node, resulting in M ​​first nodes, wherein the second response message includes the address code of the node that sent the second response message.

6. The method according to claim 1, characterized in that, Determining the target operating mode of the host based on M of the first nodes includes: When M equals N, the target operating mode is determined to be the addressing mode; When M equals 0, the target operating mode is determined to be the non-addressing mode.

7. The method according to claim 1, characterized in that, After determining the target operating mode of the host based on M of the first nodes, the method further includes at least one of the following: If the current operating mode of the host is the addressing mode and the target operating mode is the non-addressing mode, the operating mode of the host is switched from the addressing mode to the non-addressing mode. If the current operating mode of the host is the non-addressing mode and the target operating mode is the addressing mode, the operating mode of the host is switched from the non-addressing mode to the addressing mode. If it is determined that the current operating mode of the host is consistent with the target operating mode, the current operating mode of the host shall be maintained unchanged.

8. The method according to claim 7, characterized in that, Switching the host's operating mode from the addressing mode to the non-addressing mode includes: The first circuit is controlled to shut down, wherein the first circuit is used to identify and locate the addresses of M first nodes, and the first circuit is connected to P loops; Control the activation of P second circuits, wherein the second circuits are used to identify the regions where N nodes are located, and the P second circuits are connected one-to-one with the P loops; When it is determined that the first circuit is off and all P second circuits are on, the operating mode is switched from the addressing mode to the non-addressing mode.

9. The method according to claim 1, characterized in that, After determining M first nodes from the N nodes based on their address registration status, the method further includes: If M is less than N and M is greater than 0, perform an anomaly investigation operation on the host.

10. A controller, characterized in that, include: A sending module is used to send a first instruction to N nodes included in P loops to detect the address registration status of the N nodes, wherein the loop is a line pre-set in the host for communication between the controller and the nodes located on the loop, the address registration status is used to indicate whether the address of the node is registered in the host, the host's operating mode can be configured to be addressing mode or non-addressing mode, P is a natural number greater than or equal to 1, and N is a natural number greater than or equal to 1; The first determining module is used to determine M first nodes from the N nodes based on the address registration status of the N nodes, wherein the addresses of the M first nodes have all been registered to the host, and M is less than or equal to N; The second determining module is used to determine the target operating mode of the host based on the M first nodes, wherein, in the addressing mode, the second node in an abnormal state among the M first nodes transmits the first abnormal information of the second node to the controller through a protocol, and in the non-addressing mode, the controller determines the second abnormal information of the third node by detecting the current information of the first loop including the third node in an abnormal state.

11. A host computer, characterized in that, It includes a first circuit, P second circuits, a third circuit, and, as claimed in claim 10, a controller, wherein... The first circuit is used to transmit the first abnormal information of the second node to the controller via a protocol when the host's operating mode is the addressing mode; The second circuit is used to detect the current information of the first circuit to determine the second abnormal information under the control of the controller when the host's operating mode is the non-addressing mode, wherein the first circuit is a circuit connected to the second circuit. The third circuit is used to control the operation of the host computer.

12. The host computer according to claim 11, characterized in that, The first circuit is connected to P loops, and the number of second circuits is P, with each of the P second circuits corresponding to one of the P loops.

13. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method described in any one of claims 1 to 9.

14. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 9.

15. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 9.

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