A temperature quantization method, temperature sensor, device and medium

Abstract

The application discloses a temperature quantization method, a temperature sensor, a device and a medium, and belongs to the technical field of temperature sensor. BE ; the base-emitter voltage of a triode of the temperature sensor is represented as V BE ; on the basis of the differential output voltage, voltage differences between base-emitter voltages under different current biases are accumulated, and the differential output voltage is accumulated and updated until the number of times that the accumulated and updated differential output voltage is greater than zero and less than zero in an accumulation period meets a preset cycle condition; on the basis of the accumulated and updated differential output voltage, subtraction update of V BE is performed, and on the basis of the differential output voltage after the subtraction update, the accumulated update is performed again until the sum of the first number of times of the subtraction update and the second number of times of the accumulated update reaches a preset number of times; and the temperature is quantized according to the first number of times and the second number of times.

Description

Technical Field

[0001] This invention relates to the field of temperature sensor technology, and in particular to a temperature quantification method, temperature sensor, device, and medium. Background Technology

[0002] Mainstream temperature sensors generally use silicon-based temperature sensors, that is, they use a transistor integrated inside the chip to sense temperature. The base-emitter voltage generated by the transistor under a fixed current bias ( This is a voltage quantity that is negatively correlated with temperature, generated under two different current biases. difference ( Let be a voltage quantity that is positively correlated with temperature, and the following equation holds:

[0003] ;

[0004] in, As the bandgap reference voltage, since The temperature coefficient is negative, while Δ The temperature coefficient is positive, therefore, by adjusting the value of α, the following can be achieved: The temperature coefficient is 0, that is It can be considered as a constant term.

[0005] Traditional temperature sensors use The aforementioned characteristics of the transistor will cause different outputs under different current biases. The temperature can be quantified by converting the input into the Sigma-Delta analog-to-digital converter integrated within the sensor.

[0006] At typical CMOS process nodes, the operating voltage range of traditional sensor structures should generally satisfy a supply voltage VDD > 1.8V. However, traditional temperature sensors, operating in high or low temperature environments, place demands on the output range of the operational amplifier in the integrator of the Sigma-Delta analog-to-digital converter and the operating voltage range of the chip. If the operating voltage range of the chip is too low, resulting in an insufficient output range for the operational amplifier in the integrator, the operational amplifier's output will be distorted, leading to errors in the final output of the temperature sensor.

[0007] Therefore, how to relax the limitations of the output range of the operational amplifier in the integrator so that the temperature sensor can work normally in a lower voltage range has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0008] The purpose of this invention is to provide a temperature quantization method, temperature sensor, device, and medium to relax the limitation of the output range of the operational amplifier in the integrator, so that the temperature sensor can operate normally at a lower voltage range.

[0009] To achieve the above objectives, the present invention provides the following technical solution:

[0010] A temperature quantization method includes: setting the initial differential output voltage of the temperature sensor to -0.5V. BE Among them, V BE This represents the base-emitter voltage of the transistor in the temperature sensor. Based on the differential output voltage, the voltage difference between the base-emitter voltages under different current biases is accumulated, and the differential output voltage is updated by accumulation until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period meets a preset loop condition. Based on the accumulated and updated differential output voltage, a decrement of V is performed. BE The subtraction update is performed, and the cumulative update is performed again based on the differential output voltage after the subtraction update, until the sum of the first number of subtraction updates and the second number of cumulative updates reaches a preset number; the preset loop condition makes the difference between the differential output voltage after the subtraction update and the initial differential output voltage less than a preset threshold; the temperature is quantized according to the first number and the second number.

[0011] In one optional embodiment of this application, the step of accumulating the voltage difference between the base and emitter voltages under different current biases based on the differential output voltage, and accumulating and updating the differential output voltage until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period satisfies a preset loop condition, includes: for any accumulation period, performing an addition of ΔV based on the differential output voltage. BE The first cumulative update yields the differential output voltage after the first cumulative update, until the differential output voltage after the first cumulative update is greater than zero; where, ΔV BE Indicates the voltage difference; determines the number of times the differential output voltage is less than zero after the first accumulation update within the accumulation period; and adds ΔV based on the differential output voltage after the first accumulation update. BE The second cumulative update is used to obtain the differential output voltage after the second cumulative update, until the number of times the differential output voltage after the first cumulative update and the second cumulative update is greater than zero and the number of times it is less than zero within the accumulation period.

[0012] In one optional embodiment of this application, the step of accumulating the voltage difference between the base and emitter voltages under different current biases based on the differential output voltage, and accumulating and updating the differential output voltage until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period satisfies a preset loop condition, includes: for the Kth accumulation period, determining the third time in the (K-1)th accumulation and update period that the accumulated and updated differential output voltage is greater than zero; where K is an integer greater than 0; and based on the differential output voltage updated by subtraction, performing an addition of ΔV. BE The first cumulative update continues until the differential output voltage after the first cumulative update is greater than zero; where, ΔV BE Indicates the voltage difference; determines the fourth time within the Kth accumulation cycle that the differential output voltage is less than zero after the first accumulation update; and adds ΔV based on the differential output voltage after the first accumulation update. BE The second cumulative update obtains the differential output voltage after the second cumulative update in the Kth cumulative cycle, until the fifth time the differential output voltage is greater than zero in the Kth cumulative cycle is a preset multiple of the sum of the third and fourth times.

[0013] In one optional embodiment of this application, the multiple relationship between the fifth number and the sum of the third and fourth numbers is expressed by the following formula:

[0014] ;

[0015] in, Indicates the fifth time; This indicates the third number; This indicates the fourth time.

[0016] In one optional embodiment of this application, the quantification of temperature based on the first number and the second number is achieved by the following formula:

[0017] ;

[0018] Where α represents the proportionality coefficient; Q represents the voltage difference; P represents the first number of subtraction updates; and P represents the second number of accumulation updates. It is positively correlated with temperature.

[0019] Compared with existing technologies, the temperature quantization method provided by this invention sets the initial differential output voltage of the temperature sensor to -0.5V. BE Among them, V BEThis represents the base-emitter voltage of the transistor in the temperature sensor. Based on the differential output voltage, the voltage difference between the base-emitter voltages under different current biases is accumulated, and the differential output voltage is updated by accumulation until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period meets a preset loop condition. Based on the accumulated and updated differential output voltage, a decrement of V is performed. BE The subtraction update is performed, and the cumulative update is performed again based on the differential output voltage after the subtraction update, until the sum of the first number of subtraction updates and the second number of cumulative updates reaches a preset number; the preset loop condition makes the difference between the differential output voltage after the subtraction update and the initial differential output voltage less than a preset threshold; the temperature is quantized according to the first number and the second number.

[0020] This method, by setting the initial differential output voltage and the various accumulation periods and subtraction updates of the differential output voltage, enables the extreme value of the differential output voltage during the temperature quantization counting process to be approximately -0.5 V. BE and 0.5 V BE While keeping other circuit modules unchanged, this invention significantly reduces the requirements of the chip's power supply voltage on the output range of the operational amplifier in the integrator, allowing the chip to operate at a lower VDD voltage range. The invention also provides a temperature sensor, comprising: a transistor and a Sigma-Delta analog-to-digital converter; wherein the transistor is used to generate the base-emitter voltage and the voltage difference between the base-emitter voltages under different current biases; and the Sigma-Delta analog-to-digital converter is used to execute the temperature quantization method.

[0021] Compared with the prior art, the beneficial effects of the temperature sensor provided by the present invention are the same as those of the temperature quantization method described in the above technical solutions, and will not be repeated here.

[0022] The present invention also provides an electronic device including the temperature sensor described above.

[0023] Compared with the prior art, the beneficial effects of the electronic device provided by the present invention are the same as those of the temperature sensor described in the above technical solution, and will not be repeated here.

[0024] The present invention also provides a computer storage medium storing instructions that, when executed, implement the above-described temperature quantization method.

[0025] Compared with the prior art, the beneficial effects of the computer storage medium provided by the present invention are the same as those of the temperature quantization method described in the above technical solutions, and will not be repeated here. Attached Figure Description

[0026] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0027] Figure 1 A flowchart illustrating the temperature quantization logic of a temperature sensor in the prior art, provided for embodiments of this application.

[0028] Figure 2 The diagram shows the counting and waveform of the integrator of a conventional temperature sensor provided in the embodiments of this application.

[0029] Figure 3 This is a schematic diagram illustrating the variation trend of the upper and lower limit voltage of the integral output with temperature, as provided in the embodiments of this application.

[0030] Figure 4 A flowchart of the temperature quantification method provided in the embodiments of this application.

[0031] Figure 5 A logic flowchart of a temperature quantization method is provided for embodiments of this application.

[0032] Figure 6 A schematic diagram of the integrator waveform for the temperature quantization method provided in this application embodiment. Detailed Implementation

[0033] To facilitate a clear description of the technical solutions in the embodiments of the present invention, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. For example, the first threshold and the second threshold are merely used to distinguish different thresholds and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that the terms "first" and "second" are not necessarily different.

[0034] It should be noted that in this invention, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0035] In this invention, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c, where a, b, and c can be single or multiple.

[0036] Mainstream temperature sensors generally use silicon-based temperature sensors, that is, they use a transistor integrated inside the chip to sense temperature. The base-emitter voltage generated by the transistor under a fixed current bias ( This is a voltage quantity that is negatively correlated with temperature, generated under two different current biases. difference ( Let be a voltage quantity that is positively correlated with temperature, and the following formula (1) holds:

[0037] (1);

[0038] in, As the bandgap reference voltage, since The temperature coefficient is negative, while The temperature coefficient is positive, therefore, by adjusting... The value can achieve The temperature coefficient is 0, that is It can be considered as a constant term.

[0039] Traditional temperature sensors use The aforementioned characteristics of the transistor will cause different outputs under different current biases. The temperature can be quantified by converting the input into the Sigma-Delta analog-to-digital converter integrated within the sensor.

[0040] Please refer to Figure 1 , Figure 1 A flowchart illustrating the temperature quantization logic of a temperature sensor in the prior art, provided for embodiments of this application.

[0041] Figure 1In this context, s represents the output of the internal integrator of the Sigma-Delta analog-to-digital converter; bs represents the comparison result of the integrator's output s with 0 by the internal comparator of the ADC. If s > 0, then bs = 1; if s ≤ 0, then bs = 0. A counter for the ADC conversion cycle; This is a bitstream counter with bs=1.

[0042] Specifically, such as Figure 1 As shown, the working logic of a traditional temperature sensor is as follows.

[0043] start.

[0044] S1, let s=0, bs=0. , .

[0045] S2, Determine Is it equal to the preset value M?

[0046] like If not equal to M, then execute S2; if If it equals M, then execute S9.

[0047] S3, determine if bs is equal to 0.

[0048] If bs equals 0, then execute S4; if bs does not equal 1, then execute S5 (if bs does not equal 0, then bs is 1).

[0049] S4, let .

[0050] S5, let .

[0051] After updating s via S4 or S5, further execute S6.

[0052] S6, determine if s is greater than 0.

[0053] If s is greater than 0, then proceed to S7; if s is less than or equal to 0, then proceed to S8.

[0054] S7, let bs equal 1. S8, let bs equal 0. .

[0055] via S7 or S8 to bs and After the update, S9 is executed.

[0056] S9, let .

[0057] After updating S1 via S9, return to execute S2.

[0058] S10, Output The value N.

[0059] Finish.

[0060] For further details, please refer to... Figure 2 , Figure 2 The diagram shows the counting and waveform of the integrator of a conventional temperature sensor provided in the embodiments of this application.

[0061] like Figure 2 As shown, the output of a traditional integrator The upper and lower limits are fixed, respectively. and S1 to S8 constitute a conversion cycle. For any conversion cycle, if bs of the previous conversion cycle is 1, then the integrator executes within that conversion cycle. If bs was 0 in the previous conversion cycle, then the integrator will execute in this conversion cycle. Due to this negative feedback mechanism, the integrator's output s will always approach 0.

[0062] When the number of conversion cycles of the integrator reaches the preset number (i.e., when...) When M equals 0, the Sigma-Delta analog-to-digital converter stops working. The count result N for bs equal to 1 is the final quantization result of temperature by the Sigma-Delta analog-to-digital converter.

[0063] If we assume that the Sigma-Delta analog-to-digital converter completes its conversion in the Mth cycle, the integrator's output... If the value is 0, then the following formulas (2) to (5) hold true.

[0064] (2);

[0065] (3);

[0066] (4);

[0067] (5);

[0068] Since M is a preset constant value It is a constant term, and Since it is positively correlated with temperature, the output N of the Sigma-Delta analog-to-digital converter is also positively correlated with temperature, and is thus used to represent the quantization of temperature.

[0069] For further details, please refer to... Figure 3 , Figure 3 This is a schematic diagram illustrating the variation trend of the upper and lower limit voltage of the integral output with temperature, as provided in the embodiments of this application.

[0070] like Figure 3 As shown, when the temperature sensor operates at high or low temperatures, The value of s may reach a maximum or minimum, which places requirements on the output range of the operational amplifier in the integrator and the operating voltage domain of the chip. If the operating voltage domain of the chip is too low, resulting in an excessively small output range for the operational amplifier in the integrator, the output of the operational amplifier will be distorted when s reaches its maximum or minimum value, leading to errors in the final output of the temperature sensor. Therefore, under typical CMOS process nodes, the operating voltage domain of traditional sensor structures should typically satisfy a power supply voltage VDD > 1.8V.

[0071] Therefore, how to relax the limitation on the output range of the operational amplifier in the integrator so that the temperature sensor can work normally in a voltage range as low as 1V has become a technical problem that urgently needs to be solved by those skilled in the art.

[0072] To address the aforementioned technical problems, this application provides a temperature quantification method, apparatus, device, and medium, which will be described in detail in the following embodiments.

[0073] This application first provides a method for quantifying temperature; please refer to... Figure 4 , Figure 4 A flowchart of the temperature quantification method provided in the embodiments of this application.

[0074] like Figure 4 As shown, the temperature quantification method includes the following steps S401 to S104.

[0075] S401, set the initial differential output voltage of the temperature sensor to -0.5V. BE Among them, V BE This represents the base-emitter voltage of the transistor in the temperature sensor.

[0076] S402, based on the differential output voltage, the voltage difference between the base-emitter voltage under different current biases is accumulated to update the differential output voltage until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period meets the preset cycle condition.

[0077] S403, based on the accumulated and updated differential output voltage, performs a subtraction of V. BEThe subtraction update is performed, and the cumulative update is performed again based on the differential output voltage after the subtraction update, until the sum of the first number of subtraction updates and the second number of cumulative updates reaches a preset number; the preset loop condition makes the difference between the differential output voltage after the subtraction update and the initial differential output voltage less than a preset threshold.

[0078] S404, quantify the temperature based on the first number and the second number.

[0079] In one optional embodiment of this application, the cumulative update can be implemented in the following manner as S4021 to S4023.

[0080] S4021, For any accumulation period, perform an addition of ΔV based on the differential output voltage. BE The first cumulative update yields the differential output voltage after the first cumulative update, until the differential output voltage after the first cumulative update is greater than zero; where, ΔV BE This represents the voltage difference.

[0081] S4022, determine the number of times the differential output voltage is less than zero after the first accumulation update is performed within the accumulation period.

[0082] S4023, perform ΔV addition based on the first accumulated and updated differential output voltage. BE The second cumulative update is used to obtain the differential output voltage after the second cumulative update, until the number of times the differential output voltage after the first cumulative update and the second cumulative update is greater than zero and the number of times it is less than zero within the accumulation period.

[0083] That is, for each accumulation cycle, the addition of ΔV is repeated. BE The differential output voltage is cumulatively updated, and the number of times it is positive and negative after each cumulative update is recorded, until the number of times the differential output voltage is positive after the cumulative update is the same as the number of times the differential output voltage is negative.

[0084] In another optional embodiment of this application, S4021 to S4023 can be executed only during the first cumulative update, that is, when K=0, S4021 to S4023 are executed. After the subtraction update shown in S403 is executed, the cumulative update can also be executed through S4031 to S4034.

[0085] S4031, for the Kth accumulation cycle, determine the third number of times the differential output voltage after the accumulation update is greater than zero in the (K-1)th accumulation update cycle; where K is an integer greater than 0.

[0086] S4032, based on the differential output voltage updated by subtraction, performs the addition of ΔV. BE The first cumulative update continues until the differential output voltage after the first cumulative update is greater than zero; where, ΔV BE This represents the voltage difference.

[0087] S4033, determine the fourth number of times the differential output voltage is less than zero after the first accumulation update is performed within the Kth accumulation cycle.

[0088] S4034, perform ΔV addition based on the first accumulated and updated differential output voltage. BE The second cumulative update obtains the differential output voltage after the second cumulative update in the Kth cumulative cycle, until the fifth time the differential output voltage is greater than zero in the Kth cumulative cycle is a preset multiple of the sum of the third and fourth times.

[0089] The relationship between the fifth number and the sum of the third and fourth numbers is expressed by the following formula (6):

[0090] (6);

[0091] in, Indicates the fifth time; This indicates the third number; This indicates the fourth time.

[0092] To facilitate understanding of the temperature quantization process described in S401 to S404 above in this application, please refer to... Figure 5 , Figure 5 A logic flowchart of a temperature quantization method is provided for embodiments of this application.

[0093] Specifically, Figure 5 In the logic flowchart of the temperature quantization method shown, the above-mentioned methods S4021 to S4023 are used in the first accumulation cycle, and the above-mentioned methods S4031 to S4034 are used in subsequent accumulation cycles.

[0094] like Figure 5 As shown, the logic flow of the temperature quantification method includes the following S5-1 to S5-17.

[0095] start:

[0096] S5-1, Let... and set , , , , , , .

[0097] Where s represents the differential output voltage of the integrator of the Sigma-Delta analog-to-digital converter (ADC) of the temperature sensor; bs represents the comparison result between s and 0 of the comparator output of the Sigma-Delta ADC; if s > 0, then bs equals 1, otherwise it is 0; cnt1 is the conversion cycle counter of the Sigma-Delta ADC, used to record the total number of times the integrator performs accumulation and subtraction calculations; cnt2 is used to record the number of times the integrator performs accumulation calculations; cnt3 is used to record the number of times the integrator performs subtraction calculations; cnt P,K Used to record the number of times the integrator performs accumulation calculations when bs equals 1 in the Kth cycle (i.e., the number of times the differential output voltage s is greater than 0 during the first and second accumulation updates in the Kth accumulation update cycle); cnt N,K This is used to record the number of times the integrator performs the accumulation calculation when bs equals 0 in the Kth cycle (i.e., the number of times the differential output voltage s is less than 0 during the first and second accumulation updates in the Kth accumulation update cycle).

[0098] S5-2, Update , , , .

[0099] S5-3, Judgment Is it greater than 0?

[0100] If s is less than or equal to 0, then return to execute S5-2.

[0101] If s is greater than 0, then execute S5-4 as follows;

[0102] S5-4, let .

[0103] S5-5, Update , , , .

[0104] S5-6, Judgment Is it equal to .

[0105] like Not equal to If so, then return to execute S5-5.

[0106] The above S5-1 to S5-6 are used to represent the first cumulative update cycle. At the beginning of the first cycle, the integrator is forcibly decremented. , , After that, the integrator began to accumulate continuously. This completes the first cumulative update and records the number of cumulative updates until... , (The number of accumulations is the same as the number of times s is less than 0 after accumulation); then continue accumulating. This is done to complete the first cumulative update and record the number of cumulative updates, until the number of times s is less than 0 and greater than 0 is the same in two cumulative update processes (i.e., cnt). P,K =cnt N,K ).

[0107] like equal Then S5-7 will be executed further.

[0108] S5-7, Update .

[0109] That is, after the first cumulative update cycle ends, the cycle number K increases by 1.

[0110] S5-8, Update , , .

[0111] S5-9, Update , , , .

[0112] S5-10, Judgment Is it equal to the preset value M?

[0113] like If it is not equal to M, then proceed to S5-11.

[0114] like If it equals M, then proceed to S5-17.

[0115] S5-11, Judgment Is it greater than 0?

[0116] like If the value is less than or equal to 0, then execute S5-12.

[0117] like If the value is greater than 0, then execute S5-13.

[0118] S5-12, Order Then return to execute S5-9.

[0119] S5-13, Order .

[0120] S5-14, Update ; ; ; .

[0121] S5-15, Judgment Is it equal to the preset value M?

[0122] like If it is not equal to M, then proceed to S5-16.

[0123] like If it equals M, then proceed to S5-17.

[0124] S5-16, Judgment Is it equal to .

[0125] like equal If so, then return to execute S5-7.

[0126] like Not equal to If so, then return to execute S5-14.

[0127] S5-17, Output The count value P and The count value Q.

[0128] Finish.

[0129] S5-8 to S5-17 above refer to the integrator's forced execution after an accumulation update cycle ends. This completes the subtraction update. Then, the cumulative update process, similar to S5-1 to S5-6, is repeated until... equal Return to execute S5-7, and enter the next loop until... The final output is equal to the preset value M. The count value P and The count value Q is used as the final conversion result of the integrator for temperature.

[0130] Similarly, assuming When the output s of the integrator is exactly 0 when it equals the preset value M, the following formulas (7) and (8) hold true.

[0131] (7);

[0132] (8);

[0133] Substitute the above formula into the calculation results of the traditional temperature sensor, and then complete the quantification of temperature through the following formula (9).

[0134] (9);

[0135] Where Q represents the first number of subtraction updates; P represents the second number of accumulation updates; This represents the proportionality coefficient.

[0136] For further details, please refer to... Figure 6 , Figure 6 A schematic diagram of the integrator waveform for the temperature quantization method provided in this application embodiment.

[0137] like Figure 6 As shown, the process of cnt1 equaling 0~8 corresponds to the waveform of the first accumulation cycle of the integrator (i.e., K=0), and its termination condition is... The processes of cnt1 equaling 9~20 and cnt1 equaling 21~30 correspond to the waveforms of the second accumulation cycle (i.e., K=1) and the third accumulation cycle (i.e., K=2) of the integrator, respectively. The termination condition is... .

[0138] according to Figure 6 It can be seen that during each accumulation cycle, the integrator s increases from its minimum value to 0 and from 0 to its maximum value, and the addition is performed. The number of accumulations is approximately equal. Therefore, the absolute values ​​of the maximum and minimum values ​​of s in each cycle are approximately equal, with their absolute values ​​being approximately equal to... Compared with traditional temperature sensors, the maximum and minimum values ​​of s are reduced by 50%. Under the premise that other circuit modules remain unchanged, the requirements of the chip's power supply voltage on the output range of the operational amplifier in the integrator are greatly reduced, allowing the chip to operate at a lower VDD voltage range. In actual circuit design, the temperature quantization method provided in this application embodiment can make the chip's operating VDD voltage range as low as 1.0V.

[0139] In summary, the temperature quantization method provided in this application sets the initial differential output voltage of the temperature sensor to -0.5V. BE Among them, V BE This represents the base-emitter voltage of the transistor in the temperature sensor. Based on the differential output voltage, the voltage difference between the base-emitter voltages under different current biases is accumulated, and the differential output voltage is updated by accumulation until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period meets a preset loop condition. Based on the accumulated and updated differential output voltage, a decrement of V is performed. BEThe subtraction update is performed, and the cumulative update is performed again based on the differential output voltage after the subtraction update, until the sum of the first number of subtraction updates and the second number of cumulative updates reaches a preset number; the preset loop condition makes the difference between the differential output voltage after the subtraction update and the initial differential output voltage less than a preset threshold; the temperature is quantized according to the first number and the second number.

[0140] This method, by setting the initial differential output voltage and the various accumulation periods and subtraction updates of the differential output voltage, enables the extreme value of the differential output voltage during the temperature quantization counting process to be approximately -0.5 V. BE and 0.5 V BE Without changing other circuit modules, the requirements of the chip's power supply voltage on the output range of the operational amplifier in the integrator are greatly reduced, allowing the chip to operate at a lower VDD voltage range.

[0141] This application also provides a temperature sensor, which includes a transistor and a Sigma-Delta analog-to-digital converter; wherein the transistor is used to generate the base-emitter voltage and the voltage difference between the base-emitter voltage under different current biases; and the Sigma-Delta analog-to-digital converter is used to execute the temperature quantization method provided in the above method embodiment.

[0142] This application also provides an electronic device including the aforementioned temperature sensor. In one optional embodiment, the electronic device can be any dedicated device or multifunctional integrated device with temperature acquisition function, such as a smart bracelet, watch, home appliance, environmental monitor, or fitness tracker. This application does not impose any limitations on this.

[0143] Furthermore, embodiments of this application may also be storage media storing a computer program thereon, the computer program being executed by a processor of the steps in the temperature quantization method of various embodiments of this application.

[0144] For the foregoing method embodiments, in order to simplify the description, they are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, because according to this application, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0145] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For apparatus embodiments, since they are basically similar to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0146] The steps in the methods of the various embodiments of this application can be adjusted, merged, or deleted in order according to actual needs, and the technical features described in each embodiment can be replaced or combined.

[0147] The modules and sub-modules in the apparatus and terminal in the various embodiments of this application can be merged, divided, and deleted according to actual needs.

[0148] It should be understood that the disclosed terminals, devices, and methods can be implemented in other ways, given the several embodiments provided in this application. For example, the terminal embodiments described above are merely illustrative. For instance, the division of modules or sub-modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple sub-modules or modules may be combined or integrated into another module, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or modules, and may be electrical, mechanical, or other forms.

[0149] The modules or submodules described as separate components may or may not be physically separate. The components that constitute a module or submodule may or may not be physical modules or submodules; that is, they may be located in one place or distributed across multiple network modules or submodules. Some or all of the modules or submodules can be selected to achieve the purpose of this embodiment's solution, depending on actual needs.

[0150] Furthermore, the functional modules or sub-modules in the various embodiments of this application can be integrated into one processing module, or each module or sub-module can exist physically separately, or two or more modules or sub-modules can be integrated into one module. The integrated modules or sub-modules described above can be implemented in hardware or in the form of software functional modules or sub-modules.

[0151] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0152] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software unit executed by a processor, or a combination of both. The software unit can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0153] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0154] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for quantifying temperature, characterized in that, include: Set the initial differential output voltage of the temperature sensor to -0.5V. BE ; Among them, V BE This represents the base-emitter voltage of the transistor in the temperature sensor. Based on the differential output voltage, the voltage difference between the base and emitter voltages under different current biases is accumulated to update the differential output voltage until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period meets the preset cycle condition. Based on the accumulated and updated differential output voltage, perform a subtraction of V. BE The subtraction update is performed, and the cumulative update is performed again based on the differential output voltage after the subtraction update, until the sum of the first number of subtraction updates and the second number of cumulative updates reaches a preset number; the preset loop condition makes the difference between the differential output voltage after the subtraction update and the initial differential output voltage less than a preset threshold. The temperature is quantified based on the first and second counts; The differential output voltage is updated by accumulating the voltage difference between the base and emitter voltages under different current biases, based on the differential output voltage, until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period meets a preset loop condition, including: For any accumulation period, an addition of ΔV is performed based on the differential output voltage. BE The first cumulative update yields the differential output voltage after the first cumulative update, until the differential output voltage after the first cumulative update is greater than zero; where, ΔV BE This represents the voltage difference; Determine the number of times the differential output voltage is less than zero after the first accumulation update is performed within the accumulation period; Based on the differential output voltage updated by the first accumulation, an addition of ΔV is performed. BE The second cumulative update is used to obtain the differential output voltage after the second cumulative update, until the number of times the differential output voltage after the first cumulative update and the second cumulative update is greater than zero and the number of times it is less than zero within the accumulation period; The differential output voltage is updated by accumulating the voltage difference between the base and emitter voltages under different current biases, based on the differential output voltage, until the number of times the accumulated and updated differential output voltage is greater than zero and less than zero within the accumulation period meets a preset loop condition, including: For the Kth accumulation cycle, determine the third time in the (K-1)th accumulation update cycle that the differential output voltage after the accumulation update is greater than zero; where K is an integer greater than 0. Based on the differential output voltage updated by subtraction, perform the addition of ΔV. BE The first cumulative update continues until the differential output voltage after the first cumulative update is greater than zero; where, ΔV BE This represents the voltage difference; Determine the fourth number of times the differential output voltage is less than zero after the first accumulation update is performed within the Kth accumulation cycle; Based on the differential output voltage updated by the first accumulation, an addition of ΔV is performed. BE The second cumulative update obtains the differential output voltage after the second cumulative update in the Kth cumulative cycle, until the fifth time the differential output voltage is greater than zero in the Kth cumulative cycle is a preset multiple of the sum of the third and fourth times.

2. The method according to claim 1, characterized in that, The relationship between the fifth degree and the sum of the third and fourth degrees is expressed by the following formula: ； in, Indicates the fifth time; This indicates the third number; This indicates the fourth time.

3. The method according to claim 1, characterized in that, The quantification of temperature based on the first and second counts is achieved using the following formula: ； Where α represents the proportionality coefficient; Q represents the voltage difference; P represents the first number of subtraction updates; and P represents the second number of accumulation updates. It is positively correlated with temperature.

4. A temperature sensor, characterized in that, include: Transistors, Sigma-Delta analog-to-digital converters; The transistor is used to generate the base-emitter voltage and the voltage difference between the base-emitter voltage under different current biases; The Sigma-Delta analog-to-digital converter is used to perform the temperature quantization method according to any one of claims 1-3.

5. An electronic device, characterized in that, Including the temperature sensor as described in claim 4.

6. A computer storage medium, characterized in that, The computer storage medium stores instructions that, when executed, implement the temperature quantization method according to any one of claims 1-3.

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