Method for detecting facch signal in satellite communication system and facch receiver

Abstract

The application discloses a kind of detection method and FACCH receiver of FACCH signal in satellite communication system, belong to satellite communication field, the method includes: receiving the burst signal N of FACCH channel, after processing burst signal N, obtain the soft bit information corresponding to the burst signal N;The soft bit information corresponding to burst signal N is sent to single burst buffer buffer area and multi-burst buffer buffer area respectively;The soft bit information corresponding to the burst signal N received this time in single burst buffer buffer area is decoded, and the decoding result is CRC checked, and if CRC check is correct, then output decoding result;When judging the decoding result CRC check error of single burst buffer buffer area, the soft bit information of continuous 4 frames stored in multi-burst buffer buffer area is decoded, and the decoding result is CRC checked, and if CRC check is correct, then output decoding result.The detection method FACCH receiver of the application can be effectively adapted to the scene of network side only sending 1 burst and arbitrary FACCH TTI boundary.

Description

Technical Field

[0001] This invention relates to the field of satellite communication technology, specifically to a method for detecting FACCH signals in a satellite communication system and a receiver. Background Technology

[0002] GMR (GEO-Mobile Radio Interface, the European satellite communication standard) was developed under the leadership of the European Telecommunications Standards Institute (ETSI). It evolved from the GSM technology framework and was designed specifically for GEO (Geostationary Orbit) satellites. In its early stages, it focused on voice calls and low-speed data services (such as SMS) and was applied to systems such as Thuraya (Middle East) and TerreStar (North America).

[0003] The FACCH (Fast Associated Control Channel) is one of the channel types specified in the GMR-1 (GEO-Mobile Radio Interface-1) protocol. It is a control channel used in mobile communication systems, primarily for the rapid transmission of control information, such as handover commands, during calls. When a mobile station needs to perform emergency operations such as handover, the system temporarily borrows the service channel to transmit FACCH information to ensure communication continuity and stability. Closely associated with the service channel, it can quickly transmit critical control commands without interrupting voice or data transmission, ensuring effective communication between the mobile station and the base station.

[0004] The FACCH signal is modulated using π / 4-DBPSK (Differential Binary Phase Shift Keying) and pulse-shaped using a root-raised cosine filter with a roll-off factor of 0.35.

[0005] like Figure 1 As shown, the FACCH bits are first attached via CRC (Cyclic Redundancy Check), then processed by a 1 / 4 convolutional code to generate four bit streams. These four bit streams are then interleaved, scrambled, and burst-formed, ultimately forming four bursts that are transmitted within four consecutive frames. The existing technology has the following problems:

[0006] (1) In the current network scenario, the network side may not transmit all four bursts in order to save resources. In extreme cases, only one burst may be transmitted. If no special processing is done for this scenario, it will inevitably have a serious impact on the decoding performance of the receiver, resulting in performance loss.

[0007] (2) In addition, as can be seen from the above, one FACCH TTI contains 4 frames (bursts), but the boundaries of TTI (Transmission Time Interval) may be uncertain. If the TTI boundaries are incorrect, that is, the 4 frames used do not belong to the same FACCH TTI, this will inevitably cause performance loss.

[0008] refer to Figure 2 As shown, existing FACCH receivers demodulate, descramble, and deinterleave four consecutive bursts separately, then use the deinterleaved results of the four bursts together for Viterbi decoding, and finally perform CRC verification to obtain the original bits. Therefore, it is clear that existing technologies do not provide corresponding solutions to the two problems mentioned above. Summary of the Invention

[0009] The purpose of this invention is to provide a method for detecting FACCH signals in a satellite communication system, which is effectively adaptable to scenarios where only one burst is transmitted by the network side and arbitrary FACCH TTI boundaries.

[0010] To achieve the above objectives, the present invention provides a technical solution:

[0011] A method for detecting FACCH signals in a satellite communication system, comprising:

[0012] S1, Receive burst signal N from FACCH channel, process burst signal N to obtain soft bit information corresponding to burst signal N;

[0013] S2, the soft bit information corresponding to the burst signal N is sent to the single burst buffer and the multi-burst buffer respectively, wherein the multi-burst buffer is a circular buffer, and the soft bit information in the buffer is processed according to the first-in-first-out principle;

[0014] S3, decode the soft bit information corresponding to the burst signal N received in the single burst buffer, and then perform CRC check on the decoding result. If the CRC check is correct, output the decoding result; if the CRC check is incorrect, proceed to step S4.

[0015] S4, the multi-burst buffer stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to the burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of the other burst signals is shifted forward by one position in sequence. The last position is filled by the soft bit information of the latest received burst signal N, forming the soft bit information of four new burst signals.

[0016] If the CRC check of the decoding result of the single burst buffer is found to be incorrect, the soft bit information of the four new burst signals in the multi-burst buffer is decoded, and then the decoding result is checked by CRC. If the check is correct, the decoding result is output.

[0017] Furthermore, in S1, the burst signal N is sequentially demodulated, deinterleaved, and descrambled to generate corresponding soft bit information.

[0018] Furthermore, in S3 and S4, the soft bit information of the single-burst buffer and the multi-burst buffer is decoded using Viterbi decoding.

[0019] Furthermore, the single burst buffer first performs a zero-padding operation on the soft bit information corresponding to the received single burst signal N, so that the data length meets the soft bit information length of 4 burst signals, and then performs Viterbi decoding on the data after the zero-padding operation.

[0020] Furthermore, the zero-padding operation based on the soft bit information of this burst signal includes:

[0021] The soft bit information corresponding to the current burst signal N is used as the first, second, third, and fourth burst signals in the transmission data interval TTI, respectively, and zero-padding is performed. Then, Viterbi decoding and CRC verification are performed respectively.

[0022] Furthermore, in S4, the four consecutive frames of soft bit information stored in the multi-burst buffer before receiving the burst signal N include: soft bit information of burst signal N-4, soft bit information of burst signal N-3, soft bit information of burst signal N-2, and soft bit information of burst signal N-1.

[0023] Upon receiving the soft bit information corresponding to the burst signal N, the soft bit information of the earliest burst signal N-4 is removed, and the soft bit information of other burst signals is shifted forward by one bit in sequence. The last position is filled by the soft bit information corresponding to burst signal N, forming a new set of four consecutive frames of soft bit information. Then, Viterbi decoding is performed on the new set of four consecutive frames of soft bit information.

[0024] This invention provides another technical solution:

[0025] A FACCH receiver includes: a FACCH burst signal receiving and processing device, a single burst decoding device, and a multi-burst decoding device, wherein...

[0026] The FACCH burst signal receiving and processing device is used to receive burst signal N of the FACCH channel, and to process the burst signal N to obtain the soft bit information corresponding to the burst signal N.

[0027] The single-burst decoding device is used to receive the soft bit information corresponding to the burst signal N and decode it, perform CRC check on the decoding result, and output the decoding result if the CRC check is correct; if the CRC check is incorrect, it switches to the multi-burst decoding device.

[0028] The multi-burst decoding device stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to the burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of the other burst signals is shifted forward by one bit. The soft bit information of the latest received burst signal N fills the last position, forming the soft bit information of four new burst signals.

[0029] When the CRC check of the decoding result of the single burst decoding device fails, the multi-burst decoding device decodes the soft bit information of the new four burst signals, performs CRC check on the decoding result, and outputs the decoding result after the check is correct.

[0030] Furthermore, the FACCH burst signal receiving and processing device sequentially demodulates, deinterleaves, and descrambles the burst signal N to generate corresponding soft bit information.

[0031] Furthermore, the single-burst decoding device includes: a single-burst buffer, a first decoding module, and a first CRC check module.

[0032] The single burst buffer receives the soft bit information corresponding to the current burst signal N, and performs a zero-padding operation based on the soft bit information of the current burst signal so that the data length meets the soft bit information length of 4 burst signals.

[0033] The first decoding module performs Viterbi decoding on the data after the zero-padding operation;

[0034] The first CRC check module performs CRC check on the decoding result. If the CRC check is correct, the decoding result is output; if the CRC check is incorrect, the module switches to the multi-burst decoding device.

[0035] Furthermore, the multi-burst decoding device includes: a multi-burst buffer, a second decoding module, and a second CRC check module.

[0036] The multi-burst buffer stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to the burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of the other burst signals is shifted forward by one position. The soft bit information of the latest received burst signal N fills the last position, forming the soft bit information of four new burst signals.

[0037] The second decoding module performs Viterbi decoding on the soft bit information of the four new burst signals in the multi-burst buffer;

[0038] The second CRC check module performs a CRC check on the decoding result. If the CRC check is correct, the decoding result is output.

[0039] Compared with the prior art, the beneficial effects of the present invention are:

[0040] The FACCH signal detection method in the satellite communication system of the present invention can effectively adapt to scenarios where only one burst is transmitted by the network side and arbitrary FACCH TTI boundaries during the FACCH reception process in the GMR system.

[0041] (1) The present invention decodes the soft bit information of four consecutive burst signals while also decoding the soft bit information of a single burst signal, thus making it applicable to scenarios where only one burst signal is sent on the network side.

[0042] (2) The present invention utilizes a circular buffer to adapt to arbitrary FACCH TTI boundaries, thereby improving the robustness of FACCH reception.

[0043] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0044] Figure 1 A schematic diagram of the coding, modulation, and burst formation process of FACCH in a GMR system;

[0045] Figure 2 This is a schematic diagram of the receiver structure for a FACCH in the prior art;

[0046] Figure 3 This is a flowchart of the FACCH signal detection method in the satellite communication system of the present invention;

[0047] Figure 4 This is a schematic diagram of the receiver structure of the FACCH of the present invention. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0049] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0050] This invention provides a method for detecting FACCH signals and a FACCH receiver in a satellite communication system. It can decode the soft bit information of four consecutive burst signals simultaneously, as well as the soft bit information of a single burst signal, thus making it suitable for scenarios where the network side only transmits one burst. Furthermore, by setting a circular buffer, it can adapt to arbitrary FACCH TTI boundaries.

[0051] Reference Figure 3 As shown, this disclosure provides a method for detecting FACCH signals in a satellite communication system, including the following steps:

[0052] S1 receives the burst signal N from the FACCH channel, processes the burst signal N, and obtains the soft bit information corresponding to the burst signal N.

[0053] In this step, the burst signal N is sequentially demodulated, deinterleaved, and descrambled to generate the soft bit information corresponding to the burst signal N. Because each burst contains complete original bit information for FACCH, decoding can be performed correctly using only one burst.

[0054] S2 sends the soft bit information corresponding to the burst signal N to the single burst buffer and the multi-burst buffer, respectively.

[0055] This invention sets up two buffers: a single-burst buffer and a multi-burst buffer.

[0056] A single burst buffer only carries the soft bit information carried by the current burst signal.

[0057] The multi-burst buffer is a circular buffer that stores the soft bit information of four consecutive FACCH burst signals. The multi-burst buffer processes the soft bit information in the buffer according to the first-in, first-out principle.

[0058] S3: Decode the soft bit information corresponding to the current burst signal N received in the single burst buffer, and then perform a CRC check on the decoding result. If the CRC check is correct, output the decoding result; if the CRC check is incorrect, proceed to step S4. That is, when the soft bit information of a single burst signal is successfully decoded, decoding stops and the decoding result is directly output. When the soft bit information of a single burst signal fails to be decoded, switch to the multi-burst buffer and use a circular buffer to decode the soft bit information of 4 consecutive frames.

[0059] It should be noted that the soft bit information of the single burst buffer is decoded using Viterbi decoding.

[0060] When decoding the soft bit information of a single burst signal, the Viterbi input data length needs to be the data length of the soft bit information of four burst signals, but the soft bit information data length of a single burst signal is insufficient. In this case, zeros are padded based on the soft bit information of this burst before it is input into the Viterbi decoder.

[0061] Specifically, for the soft bit information corresponding to the received single burst signal N, the single burst buffer first performs a zero-padding operation based on the soft bit information of this burst signal so that the data length meets the soft bit information length of 4 burst signals.

[0062] Specifically, the soft bit information corresponding to the current burst signal N is used as the first, second, third, and fourth burst signals in the transmission data interval TTI, respectively, and zero-padding is performed. Then, Viterbi decoding and CRC verification are performed respectively.

[0063] The specific process of padding with zeros is explained below.

[0064] If the soft packet of a burst signal is bk (k=0,1,....95) and the padded-with-zeros sequence is ck (k=0,1,...,383), then:

[0065] 1) The soft bit information corresponding to the current burst signal N is used as the first burst signal in the Transmission Data Interval (TTI) and padded with zeros as follows:

[0066] Ck=bk(k=0,1,...,95)

[0067] Ck=0(k=96,97,383)

[0068] 2) The soft bit information corresponding to the current burst signal N is used as the second burst signal in the Transmission Data Interval (TTI) and padded with zeros as follows:

[0069] Ck=0(k=0,1,...,95)

[0070] Ck=b(k-96)(k=96,97,...,191)

[0071] Ck=0(k=192,193,...,383)

[0072] 3) The soft bit information corresponding to the current burst signal N is used as the 3rd or 4th burst signal in the transmission data interval TTI and padded with 0, in a similar way.

[0073] S4, the multi-burst buffer stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of other burst signals is shifted forward by one bit. The soft bit information of the latest received burst signal N fills the last position, forming the soft bit information of four new burst signals.

[0074] If the CRC check of the decoding result of the single burst buffer is found to be incorrect, the soft bit information of the four new burst signals in the multi-burst buffer is decoded, and then the decoding result is checked by CRC. If the check is correct, the decoding result is output.

[0075] In an embodiment of the present invention, the soft bit information of the multi-burst buffer is decoded using Viterbi decoding.

[0076] Specifically, the four consecutive frames of soft bit information stored in the multi-burst buffer before receiving burst signal N include: soft bit information of burst signal N-4, soft bit information of burst signal N-3, soft bit information of burst signal N-2, and soft bit information of burst signal N-1.

[0077] Upon receiving the soft bit information corresponding to burst signal N, the soft bit information of the earliest burst signal N-4 is discarded. The soft bit information of other burst signals is shifted forward by one bit, and the last position is filled by the soft bit information corresponding to burst signal N, forming a new set of four consecutive frames of soft bit information. Then, Viterbi decoding is performed on the new set of four consecutive frames of soft bit information.

[0078] That is, when the soft bit information of burst signal N is received, the soft bit information of burst signal N-4 is removed, burst signal N-3 replaces the position of burst signal N-4, burst signal N-2 replaces the position of burst signal N-3, burst signal N-1 replaces the position of burst signal N-2, and burst signal N replaces the position of burst signal N-1.

[0079] This invention first uses the soft bit information in a single burst buffer for decoding. If the CRC check is successful, the decoding result is directly output. If the CRC check fails, the system switches to the soft bit information in a multi-burst buffer for Viterbi decoding and CRC check. If the CRC check is successful, the final decoding result uses the decoding result from the multi-burst buffer. If the CRC check in the multi-burst buffer fails, it indicates that the FACCH decoding has failed, and no repeated check is performed.

[0080] This invention utilizes the characteristics of the circular buffer in the multi-burst buffer to adapt to arbitrary FACCHTTI boundaries, providing robustness for FACCH reception.

[0081] Reference Figure 4 As shown in the embodiments of this disclosure, a FACCH receiver is also provided, including: a FACCH burst signal receiving and processing device 100, a single burst decoding device 200, and a multi-burst decoding device 300.

[0082] Specifically, the FACCH burst signal receiving and processing device 100 is used to receive the burst signal N of the FACCH channel, process the burst signal N to obtain the soft bit information corresponding to the burst signal N.

[0083] The FACCH burst signal receiving and processing device 100 performs demodulation, deinterleaving and descrambling processing on the burst signal N in sequence to generate corresponding soft bit information.

[0084] The single-burst decoding device 200 is used to receive the soft bit information corresponding to the burst signal N and decode it. It performs CRC check on the decoding result. If the CRC check is correct, it outputs the decoding result; if the CRC check is incorrect, it switches to the multi-burst decoding device 300.

[0085] Specifically, the single-burst decoding device 200 includes: a single-burst buffer 210, a first decoding module 220, and a first CRC check module 230.

[0086] The single-burst buffer 210 receives the soft bit information corresponding to the current burst signal N, and performs zero-padding based on the soft bit information of the current burst signal to ensure that the data length meets the soft bit information length of 4 burst signals. Specifically, the soft bit information corresponding to the current burst signal N is used as the 1st, 2nd, 3rd, and 4th burst signals in the Transmission Data Interval (TTI) and zero-padding is performed on them respectively.

[0087] The first decoding module 220 performs Viterbi decoding on the data after the zero-padding operation.

[0088] The first CRC check module 230 performs CRC check on the decoding result. If the CRC check is correct, the decoding result is output; if the CRC check is incorrect, the system switches to the multi-burst decoding device 300.

[0089] The multi-burst decoding device 300 stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of the other burst signals is shifted forward by one bit. The soft bit information of the latest received burst signal N is used to fill the last position, forming the soft bit information of four new burst signals.

[0090] When the CRC check of the decoding result of the single burst decoder 200 fails, the multi-burst decoder 300 decodes the soft bit information of the new four burst signals, performs CRC check on the decoding result, and outputs the decoding result after the check is correct.

[0091] Specifically, the multi-burst decoding device 300 includes: a multi-burst buffer 310, a second decoding module 320, and a second CRC check module 330.

[0092] The multi-burst buffer 310 is a circular buffer that stores the soft bit information of four consecutive FACCH burst signals. The multi-burst buffer processes the soft bit information in the buffer according to the first-in, first-out principle.

[0093] The multi-burst buffer 310 stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of the other burst signals is shifted forward by one bit. The soft bit information of the latest received burst signal N fills the last position, forming the soft bit information of four new burst signals.

[0094] The second decoding module 320 performs Viterbi decoding on the soft bit information of the four new burst signals in the multi-burst buffer 310.

[0095] The second CRC check module 330 performs CRC check on the decoding result. If the CRC check is correct, the decoding result is output.

[0096] By utilizing the circular buffer characteristics of the multi-burst buffer 310, it can adapt to arbitrary FACCH TTI boundaries, providing robustness for FACCH reception.

[0097] In the description of this invention, it should be understood that the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing this invention and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.

[0098] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0099] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A method for detecting FACCH signals in a satellite communication system, characterized in that, Includes the following steps: S1, Receive burst signal N from FACCH channel, process burst signal N to obtain soft bit information corresponding to burst signal N; S2, the soft bit information corresponding to the burst signal N is sent to the single burst buffer and the multi-burst buffer respectively, wherein the multi-burst buffer is a circular buffer, and the soft bit information in the buffer is processed according to the first-in-first-out principle; S3, perform Viterbi decoding on the soft bit information corresponding to the current burst signal N received by the single burst buffer, and then perform CRC check on the decoding result. If the CRC check is correct, output the decoding result; if the CRC check is incorrect, proceed to step S4; wherein, for the soft bit information corresponding to the received single burst signal N, the single burst buffer first performs a 0-padding operation on the soft bit information of the current burst signal so that the data length meets the soft bit information length of 4 burst signals, and then performs Viterbi decoding on the data after the 0-padding operation; S4, the multi-burst buffer stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to the burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of the other burst signals is shifted forward by one position in sequence. The last position is filled by the soft bit information of the latest received burst signal N, forming the soft bit information of four new burst signals. The soft bit information of the four new burst signals in the multi-burst buffer is Viterbi decoded, and then the decoding result is checked by CRC. If the check is correct, the decoding result is output. If the CRC check of the multi-burst buffer fails, it means that the FACCH decoding has failed, and no repeated check is performed.

2. The method for detecting FACCH signals in a satellite communication system according to claim 1, characterized in that, In S1, the burst signal N is sequentially demodulated, deinterleaved, and descrambled to generate corresponding soft bit information.

3. The method for detecting FACCH signals in a satellite communication system according to claim 1, characterized in that, The operation of padding zeros with soft bits based on the current burst signal includes: The soft bit information corresponding to the current burst signal N is used as the first, second, third, and fourth burst signals in the transmission data interval TTI, respectively, and zero-padding is performed. Then, Viterbi decoding and CRC verification are performed respectively.

4. The method for detecting FACCH signals in a satellite communication system according to claim 1, characterized in that, In S4, the four consecutive frames of soft bit information stored in the multi-burst buffer before receiving the burst signal N include: soft bit information of burst signal N-4, soft bit information of burst signal N-3, soft bit information of burst signal N-, and soft bit information of burst signal N-1. When the soft bit information corresponding to the burst signal N is received, the soft bit information of the earliest burst signal N-4 is removed, and the soft bit information of other burst signals is shifted forward by one position in sequence. The last position is filled by the soft bit information corresponding to the burst signal N, forming a new set of 4 consecutive frames of soft bit information. Then, Viterbi decoding is performed on the soft bit information of the new four consecutive frames.

5. A FACCH receiver, characterized in that, include: FACCH burst signal receiving and processing device, single burst decoding device, and multi-burst decoding device, among which... The FACCH burst signal receiving and processing device is used to receive burst signal N of the FACCH channel, and to process the burst signal N to obtain the soft bit information corresponding to the burst signal N. The single-burst decoding device is used to receive the soft bit information corresponding to the burst signal N and perform Viterbi decoding, and to perform CRC verification on the decoding result. If the CRC verification is correct, the decoding result is output; if the CRC verification is incorrect, the device switches to the multi-burst decoding device. The single-burst decoding device includes: a single-burst buffer, a first decoding module, and a first CRC verification module. The single burst buffer receives the soft bit information corresponding to the current burst signal N, and performs a zero-padding operation based on the soft bit information of the current burst signal so that the data length meets the soft bit information length of 4 burst signals. The first decoding module performs Viterbi decoding on the data after the zero-padding operation; The first CRC check module performs CRC check on the decoding result. If the CRC check is correct, the decoding result is output; if the CRC check is incorrect, the module switches to the multi-burst decoding device. The multi-burst decoding device stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to the burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of the other burst signals is shifted forward by one bit. The soft bit information of the latest received burst signal N fills the last position, forming the soft bit information of four new burst signals. The multi-burst decoding device performs Viterbi decoding on the soft bit information of the four new burst signals, performs CRC check on the decoding result, and outputs the decoding result if the check is correct. If the CRC check of the multi-burst buffer fails, it indicates that the FACCH decoding has failed, and no repeated check is performed. The multi-burst decoding device includes: a multi-burst buffer, a second decoding module, and a second CRC check module. The multi-burst buffer stores the soft bit information of four consecutive burst signals in the order of reception time. When the soft bit information corresponding to the burst signal N is received, the soft bit information of the earliest burst signal is removed, and the soft bit information of the other burst signals is shifted forward by one position. The soft bit information of the latest received burst signal N fills the last position, forming the soft bit information of four new burst signals. The second decoding module performs Viterbi decoding on the soft bit information of the four new burst signals in the multi-burst buffer; The second CRC check module performs a CRC check on the decoding result. If the CRC check is correct, the decoding result is output.

6. The receiver for FACCH according to claim 5, characterized in that, The FACCH burst signal receiving and processing device performs demodulation, deinterleaving and descrambling processes on the burst signal N in sequence to generate corresponding soft bit information.

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