Processing unit, resolution reconstruction method and resolution reconstruction system

Abstract

The application relates to a processing unit, a resolution reconstruction method and a resolution reconstruction system. The processing unit is used for determining a driving mode of a second display panel according to first display data of a first display panel; when the driving mode of the second display panel is a high refresh rate mode, performing linear interpolation on the first display data by using an up-sampling algorithm to obtain second display data; and transmitting the second display data to a driving circuit of the second display panel for processing to obtain target display data used for driving the second display panel to display, wherein a target time delay exists between a second target scanning pulse and a first target scanning pulse, and the target time delay is determined based on a total number of sub-pixels and a refresh frequency of the second display panel in the high refresh rate mode. The application can improve the problem of strong picture sawtooth feeling, optimize the adaptation between different resolutions, thereby improving the quality of resolution reconstruction and optimizing the display effect.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a processing unit, a resolution reconstruction method, and a resolution reconstruction system. Background Technology

[0002] In related technologies, to achieve low-cost frequency conversion, the drive system employs a conversion processor (i.e., a scaler processor) and a driver to process the display data. For example, the raw 2K1K@480Hz display data input to the signal source transmitter can be further transmitted to the conversion processor. After receiving the raw display data, the conversion processor can transmit the 2K1K@480Hz display data to the corresponding driver. After recognizing the display data transmitted by the processor, the driver uses its internal data register to perform horizontal copying (repeat) of the 2K1K@480Hz display data, thereby obtaining 4K1K@480Hz display data. Simultaneously, the drive timing of the Gate On Array (GOA) is set, and vertical copying and expansion are performed to expand the display data to 4K2K@480Hz for display on the display panel.

[0003] However, because the copying process of the data register causes the display data to expand horizontally, and the driving timing of the gate drive unit causes the display data to expand vertically, the display effect is copied and expanded from Full High Definition (FHD) to Ultra High Definition (UHD), resulting in a strong jagged edge when displaying images such as curves, text, and lines. Summary of the Invention

[0004] In view of this, this application proposes a processing unit, a resolution reconstruction method, and a resolution reconstruction system, which can improve the problem of strong jagged edges in the image, optimize the adaptation between different resolutions, thereby improving the quality of resolution reconstruction and optimizing the display effect.

[0005] According to one aspect of this application, a processing unit is provided, the processing unit being connected to a first display panel and a second display panel, the first display panel and the second display panel having different resolutions, the processing unit being configured to: determine a driving mode of the second display panel based on first display data of the first display panel; when the driving mode of the second display panel is a high refresh rate mode, linearly interpolate the first display data using an upsampling algorithm to obtain second display data; transmit the second display data to a driving circuit of the second display panel for processing to obtain target display data for driving the display of the second display panel, the target display data including a first target scan signal of a first row of sub-pixels in a scan group and a second target scan signal of a second row of sub-pixels, the first target scan signal having a first target scan pulse, the second target scan signal having a second target scan pulse, a target delay between the second target scan pulse and the first target scan pulse, the target delay being determined based on the total number of rows of the plurality of sub-pixels of the second display panel and the refresh rate of the second display panel in the high refresh rate mode.

[0006] According to another aspect of this application, a resolution reconstruction method is provided, the resolution reconstruction method being applied to a processing unit connected to a first display panel and a second display panel, the first display panel and the second display panel having different resolutions, the resolution reconstruction method comprising: determining a driving mode of the second display panel based on first display data of the first display panel; when the driving mode of the second display panel is a high refresh rate mode, linearly interpolating the first display data using an upsampling algorithm to obtain second display data; transmitting the second display data to a driving circuit of the second display panel for processing to obtain target display data for driving the display of the second display panel, the target display data including a first target scan signal of adjacent first row sub-pixels in a scan group and a second target scan signal of second row sub-pixels, the first target scan signal having a first target scan pulse, the second target scan signal having a second target scan pulse, a target delay between the second target scan pulse and the first target scan pulse, the target delay being determined based on the total number of rows of the plurality of sub-pixels of the second display panel and the refresh frequency of the second display panel in the high refresh rate mode.

[0007] According to another aspect of this application, a resolution reconstruction system is provided, the resolution reconstruction system including a processing unit, a first display panel and a second display panel connected to the processing unit, the first display panel and the second display panel having different resolutions.

[0008] By determining the driving mode of the second display panel based on the first display data of the first display panel, and then using an upsampling algorithm to linearly interpolate the first display data to obtain the second display data when the driving mode of the second display panel is a high refresh rate mode, the second display data is obtained. Finally, the second display data is transmitted to the driving circuit of the second display panel for processing to obtain the target display data used to drive the display of the second display panel. The second target scanning pulse and the first target scanning pulse have a target delay determined based on the total number of rows of multiple sub-pixels and the refresh frequency of the second display panel in the high refresh rate mode. This application can improve the problem of strong jagged edges in the picture, optimize the adaptation between different resolutions, thereby improving the quality of resolution reconstruction and optimizing the display effect. Attached Figure Description

[0009] Figure 1 A schematic diagram illustrating the driving architecture of a display panel in the relevant technology is shown.

[0010] Figure 2 A block diagram of the driving system according to an embodiment of this application is shown.

[0011] Figure 3 A block diagram illustrating the application of the processing unit in an embodiment of this application is shown.

[0012] Figure 4 A schematic diagram showing the clock signal timing of the second display panel according to an embodiment of this application is provided.

[0013] Figure 5 A flowchart illustrating a resolution reconstruction method according to an embodiment of this application is shown. Detailed Implementation

[0014] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, many other embodiments obtained by those skilled in the art without creative effort are all within the scope of protection of this application.

[0015] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0016] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0017] The following disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various implementations and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials. In some instances, methods, means, elements, and circuits well known to those skilled in the art are not described in detail in order to highlight the main points of this application.

[0018] Figure 1 A schematic diagram illustrating the driving architecture of a display panel in the relevant technology is shown. (For example...) Figure 1As shown, in related technologies, to achieve low-cost frequency conversion, the drive system employs a conversion processor and a driver to process the display data. For example, the raw 2K1K@480Hz display data input to the signal source transmitter can be further transmitted to the conversion processor. After receiving the raw display data, the conversion processor can transmit the 2K1K@480Hz display data to the corresponding driver. After recognizing the display data transmitted by the processor, the driver uses its internal data register to perform horizontal copying of the 2K1K@480Hz display data to obtain 4K1K@480Hz display data. Simultaneously, the drive timing of the gate drive unit is set, and vertical copying and expansion are performed to expand the display data to 4K2K@480Hz for display on the display panel.

[0019] However, because the copying process of the data register expands the display data horizontally, and the driving timing of the gate drive unit expands the display data vertically, the display effect expands from full HD copying to ultra HD, resulting in a strong jagged edge when displaying images such as arcs, text, and lines.

[0020] In view of this, this application proposes a processing unit connected to a first display panel and a second display panel, wherein the first display panel and the second display panel have different resolutions. The processing unit is configured to: determine the driving mode of the second display panel based on the first display data of the first display panel; when the driving mode of the second display panel is a high refresh rate mode, linearly interpolate the first display data using an upsampling algorithm to obtain second display data; transmit the second display data to the driving circuit of the second display panel for processing to obtain target display data for driving the display of the second display panel, wherein the target display data includes a first target scan signal of a first row of sub-pixels in a scan group and a second target scan signal of a second row of sub-pixels, wherein the first target scan signal has a first target scan pulse, the second target scan signal has a second target scan pulse, and there is a target delay between the second target scan pulse and the first target scan pulse, wherein the target delay is determined based on the total number of rows of the multiple sub-pixels of the second display panel and the refresh rate of the second display panel in the high refresh rate mode.

[0021] Figure 2 A block diagram of a driving system according to an embodiment of this application is shown. Figure 2As shown, the driving system of this application includes a processing unit, a first display panel 200, and a second display panel 100. The processing unit is electrically connected to the first display panel 200 and the second display panel 100. The first display panel 200 includes a first display area and a first non-display area, and the second display panel 100 includes a second display area and a second non-display area.

[0022] The number of sub-pixels in the first display area differs from the number of sub-pixels in the second display area; that is, the resolutions of the first display panel 200 and the second display panel 100 are different. For example, the resolution of the first display panel 200 could be 2K1K, in which case there would be 1920 sub-pixels in the horizontal direction in the first display area. 3 = 5760 pixels, with 1080 vertical sub-pixels; the second display panel 100 can have a 4K2K resolution, in which case there are 3840 horizontal sub-pixels in the second display area. 3 = 11520, and there are a total of 2160 sub-pixels in the vertical direction.

[0023] The first display data may include multiple first data signals and multiple first scan signals for driving the first display panel 200. Optionally, each first scan signal is used to open a sub-pixel in a corresponding row in the first display area, so that each sub-pixel in the corresponding row writes the corresponding first data signal.

[0024] The processing unit may be a conversion processor, which is used to convert the resolution of the first display panel so that the resolution of the first display panel is adapted to the resolution of the second display panel.

[0025] Furthermore, the processing unit determines the driving mode of the second display panel based on the first display data of the first display panel in the following manner: receiving the first display data from the driving circuit of the first display panel; determining whether the refresh frequency of the first display data is within a preset frequency range; if the refresh frequency of the first display data is within the preset frequency range, controlling the display mode of the second display panel to be a standard mode; if the refresh frequency of the first display data is outside the preset frequency range, controlling the display mode of the second display panel to be a high refresh rate mode.

[0026] For example, the preset frequency range can be (0, 300Hz). When the refresh rate of the first display panel is 240Hz, the refresh rate of the first display data is within the preset frequency range, and the display mode of the second display panel is controlled to be standard mode; when the refresh rate of the first display panel is 480Hz, the refresh rate of the first display data is outside the preset frequency range, and the display mode of the second display panel is controlled to be high refresh rate mode. It is understood that the preset frequency range can be set as needed, and this application does not limit it in this regard.

[0027] In the standard mode, the refresh rate of the second display panel can be the same as that of the first display panel. In this mode, the first display data can be processed by a conversion processor for Picture Quality (PQ) optimization before being output to the second display panel for display. In the standard mode, the resolution of the second display panel can be the same as that of the first display panel.

[0028] Furthermore, when the driving mode of the second display panel is a high refresh rate mode, the processing unit uses an upsampling algorithm to linearly interpolate the first display data to obtain the second display data in the following manner: when the display mode of the display panel is a high refresh rate mode, the processing unit uses an upsampling algorithm to linearly interpolate multiple data signals of the first display data in the horizontal direction to obtain the second display data, wherein the amount of the second display data in the horizontal direction is at least twice the amount of the first display data in the horizontal direction.

[0029] Figure 3 This is a block diagram illustrating the application of the processing unit in an embodiment of this application. For example... Figure 3 As shown, the processing unit may include an upsampling module 1401 and an image quality optimization module 1402. The upsampling module 1401 is connected to the image quality optimization module 1402. The upsampling module 1401 is used to perform linear interpolation on the first display data to obtain the second display data. The image quality optimization module 1402 is used to perform image quality optimization processing on the second display data, such as contrast and color processing, and output the image quality optimized second display data to the driving circuit of the second display panel.

[0030] like Figure 3As shown, the second display panel 100 of this application includes a second display area 110, which includes sub-pixels PX, multiple scan lines GL1 to GLn, and multiple data lines DL1 to DLm intersecting the scan lines GL1 to GLn, wherein n and m are natural numbers greater than 2. The multiple scan lines GL1 to GLn are connected to the gate driving unit 120, and the multiple data lines DL1 to DLm are connected to the data driver 130. Although in Figure 3 Only one of the multiple subpixels PX is shown in the image, but the second display area 110 may include multiple subpixels PX. Each subpixel of the multiple subpixels PX is connected to a corresponding scan line among multiple scan lines GL1 to GLn and a corresponding data line among multiple data lines DL1 to DLm.

[0031] The gate driving unit 120 generates a scan signal and outputs the scan signal to multiple scan lines GL1 to GLn based on the gate control signal received from the processing unit 140 and multiple clock signals received.

[0032] The data driver 130 generates grayscale voltage based on the data control signal received from the processing unit 140 and the data signal DATA provided by the processing unit 140. The data driver 130 outputs grayscale voltage to multiple data lines DL1 to DLm, thereby causing each sub-pixel to emit light.

[0033] The processing unit 140 can receive image data and control signals from an external graphics control unit. The processing unit 140 receives image data and control signals and outputs data signals DATA to be provided to the data driver 130 and scan control signals to be provided to the gate drive unit 120.

[0034] The upsampling module 1401 employs an upsampling algorithm belonging to Super Resolution (SR) processing technology. There are various linear interpolation methods. For example, bilinear interpolation can be used to interpolate multiple data signals in the horizontal direction of the first display data, thereby doubling the number of horizontal data signals in the first display data and achieving the effect of increasing the horizontal resolution. By using linear interpolation to upsample the first display data, the quality of the display data can be improved while simultaneously increasing the resolution.

[0035] For example, the first display data is 2K1K@480Hz, which means that the resolution of the first display panel is 2K1K, and there are a total of 1920 sub-pixels in the horizontal direction. =3 = 5760, with 1080 sub-pixels in the vertical direction. The refresh rate of the first display panel is 480Hz. Assuming the first row of sub-pixels on the first display panel is open, a total of 5760 data signals need to be written to the first row of sub-pixels. After processing by the upsampling module 1401, the amount of data in the horizontal direction of the first display data doubles, becoming the second display data. The second display data has a total of 5760 in the horizontal direction. 2 = 11520 data signals. When the first row of sub-pixels on the second display panel is turned on, it can provide data signals to 11520 sub-pixels. That is to say, the resolution corresponding to the first display data changes from 2K1K to 4K2K corresponding to the second display data.

[0036] The second display data may include multiple second data signals and multiple second scan signals for driving the second display panel. Optionally, each second scan signal is used to open a sub-pixel of a corresponding row in the second display area, so that each sub-pixel of the corresponding row writes the corresponding second data signal.

[0037] It should be noted that the driving circuit 201 of the first display panel can be a first driving circuit, and the driving circuit 101 of the second display panel can be a second driving circuit. Both the first and second driving circuits can include a data driver and a gate driving unit. Specifically, the driving circuit of the first display panel may include a first data driver and a first gate driving unit, and the driving circuit of the second display panel may include a second data driver and a second gate driving unit. Both the second data driver and the second gate driving unit can be electrically connected to the processing unit.

[0038] Furthermore, the driving circuit of the second display panel is a second driving circuit, and the target display data includes multiple target scanning signals. The processing unit transmits the second display data to the driving circuit of the second display panel for processing in the following manner to obtain target display data for driving the second display panel to display: transmitting multiple second scanning signals of the second display data to the gate driving unit of the second driving circuit to generate multiple target scanning signals, and the multiple target scanning signals are used to scan each row of sub-pixels of the second display panel.

[0039] Multiple target scanning signals can be grouped. Optionally, every two adjacent target scanning signals form a scanning group. In this application, other numbers of target scanning signals can also be grouped together, such as every four adjacent target scanning signals forming a scanning group; this application is not limited to this. Since every two adjacent target scanning signals form a scanning group, this is the smallest group, and the following description uses a scanning group of every two adjacent target scanning signals as an example.

[0040] Furthermore, the processing unit transmits multiple second scan signals of the second display data to the gate driving unit of the second driving circuit in the following manner to generate multiple target scan signals: selecting one of the second scan signals of the second display data as the first target scan signal in a scan group of the target display data; delaying the first target scan signal according to the target time delay to obtain the second target scan signal in a scan group of the target display data.

[0041] In one embodiment, each second scan signal of the second display data can serve as a first target scan signal in a scan group of the target display data. Then, based on the first target scan signal, a second target scan signal with a target time delay is generated, thereby expanding a single second scan signal of the second display data into a scan group of the target display data. Thus, the total number of target scan signals of the target display data is several times the total number of second scan signals of the second display data. For example, the total number of target scan signals of the target display data is twice the total number of second scan signals of the second display data, thereby enabling the opening of each row of sub-pixels of the second display panel.

[0042] Optionally, the first display panel has 1080 sub-pixels in the vertical direction, requiring 1080 scan signals for scanning; the second display panel has 2160 sub-pixels in the vertical direction, requiring 2160 scan signals for scanning. After expanding a single second scan signal of the second display data into a scan group of the target display data according to the target delay, the total number of target scan signals for the target display data is expanded to 2160, thereby enabling scanning of 2160 rows of sub-pixels of the second display panel.

[0043] In one embodiment, the scan voltage of the first target scan signal of adjacent first row sub-pixels and the scan voltage of the second target scan signal of the second row sub-pixels in a scan group of the target display data are the same. That is, when expanding a single second scan signal of the second display data into a scan group of the target display data, the scan voltage of the single second scan signal of the second display data can be directly copied as the scan voltage of the second target scan signal.

[0044] Figure 4 A schematic diagram illustrating the clock signal timing of the second display panel according to an embodiment of this application is shown. Figure 4 The clock signals CK1-CK8 can be input to the gate drive circuit of the second display panel to generate multiple scan signals. Since the phase of the clock signals is synchronized with the phase of the scan signals, therefore... Figure 4 The clock signal in the signal can reflect the phase of the corresponding scan signal. For example, the first clock signal CK1 can be used to generate the first target scan signal of the first row of sub-pixels of the second display panel, the second clock signal CK2 can be used to generate the second target scan signal of the second row of sub-pixels of the second display panel, the third clock signal CK3 can be used to generate the first target scan signal of the third row of sub-pixels of the second display panel, the fourth clock signal CK4 can be used to generate the second target scan signal of the fourth row of sub-pixels of the second display panel, and so on.

[0045] In the first scan group, the first target scan signal of the first row of sub-pixels has a first target scan pulse, the second target scan signal of the second row of sub-pixels has a second target scan pulse, and there is a target delay between the second target scan pulse and the first target scan pulse. The target delay is determined based on the total number of rows of the plurality of sub-pixels of the second display panel and the refresh frequency of the second display panel in the high refresh rate mode.

[0046] In one embodiment, the target latency is 0.5H. See also Figure 4 The first clock pulse of the second clock signal CK2 is delayed by 0.5H relative to the first clock pulse of the first clock signal CK1. Correspondingly, the second target scan signal of the second row of sub-pixels is delayed by 0.5H relative to the first target scan signal of the first row of sub-pixels. The first clock pulse of the fourth clock signal CK4 is delayed by 0.5H relative to the first clock pulse of the third clock signal CK3. Correspondingly, the second target scan signal of the fourth row of sub-pixels is delayed by 0.5H relative to the first target scan signal of the third row of sub-pixels.

[0047] Wherein, 1H satisfies the following relationship: 1H = 1 / (Total number of sub-pixels in one frame × Refresh rate) In the above relationship, the total number of rows of sub-pixels within a frame can be the total number of rows of sub-pixels on the second display panel, and the refresh rate can be the refresh frequency of the second display panel in the high refresh rate mode.

[0048] Because two adjacent rows of sub-pixels in a scan group are opened simultaneously, and the second target scan signal of the even-numbered row is delayed relative to the first target scan signal of the odd-numbered row, the display content of the even-numbered row will be displayed incorrectly as follows: D n =(D n-1 +D n+1 ) / 2 Among them, D n D represents the grayscale of the row display data for the nth sub-pixel. n-1 D represents the grayscale of the row display data for the (n-1)th sub-pixel. n+1 This represents the grayscale of the row display data for the (n+1)th subpixel. Ultimately, the second display panel will be expanded to display a 4K2K@480Hz image due to interpolation.

[0049] In one embodiment, when the second target scan signal is active in a scan group of the target display data, the sub-pixel row corresponding to the second scan signal is not written to the target data signal. For example, as Figure 3 As shown, when the second target scan signal causes the sub-pixels of the second row to open, the sub-pixels of the second row do not need to write the target data signal; when the second target scan signal causes the sub-pixels of the fourth row to open, the sub-pixels of the fourth row also do not need to write the target data signal.

[0050] In one embodiment, when the second target scan signal is active in a scan group of the target display data, the sub-pixel row corresponding to the second scan signal is written with the same target data signal as the sub-pixel row corresponding to the first target scan signal in the same scan group. The copying operation of the target data signal corresponding to the same scan group can be completed by the processing unit.

[0051] It should be noted that dual-line gate (DLG) technology can be used to replicate the target data signal corresponding to the same scan group. DLG refers to a driving method in which two rows of gate lines are simultaneously turned on during scanning to receive the same display data. Unlike the traditional DLG method, in a scan group of this application, there is a target time delay between the second target scan pulse and the first target scan pulse.

[0052] Figure 5 A flowchart illustrating a resolution reconstruction method according to an embodiment of this application is provided. The following will be combined with... Figure 5 Describe the specific process of the resolution reconstruction method. For example... Figure 5As shown, the resolution reconstruction method includes: Step S1: Determine the driving mode of the second display panel based on the first display data of the first display panel; In one embodiment, if the refresh frequency of the first display data is within a preset frequency range, the display mode of the second display panel is controlled to be a standard mode; if the refresh frequency of the first display data is outside the preset frequency range, the display mode of the second display panel is controlled to be a high refresh rate mode.

[0053] Step S2: When the driving mode of the second display panel is high refresh rate mode, the first display data is linearly interpolated using an upsampling algorithm to obtain the second display data; In one embodiment, when the display panel is in a high refresh rate mode, an upsampling algorithm is used to linearly interpolate multiple data signals of the first display data in the horizontal direction to obtain second display data. The amount of data in the second display data in the horizontal direction is at least twice the amount of data in the first display data in the horizontal direction.

[0054] Step S3: The second display data is transmitted to the driving circuit of the second display panel for processing to obtain target display data for driving the second display panel to display. The target display data includes a first target scan signal of a first row of sub-pixels in a scan group and a second target scan signal of a second row of sub-pixels. The first target scan signal has a first target scan pulse, and the second target scan signal has a second target scan pulse. There is a target delay between the second target scan pulse and the first target scan pulse. The target delay is determined based on the total number of rows of the multiple sub-pixels of the second display panel and the refresh rate of the second display panel in the high refresh rate mode.

[0055] In one embodiment, each second scan signal of the second display data can serve as a first target scan signal in a scan group of the target display data. Then, based on the first target scan signal, a second target scan signal with a target time delay is generated, thereby expanding a single second scan signal of the second display data into a scan group of the target display data. Thus, the total number of target scan signals of the target display data is several times the total number of second scan signals of the second display data. For example, the total number of target scan signals of the target display data is twice the total number of second scan signals of the second display data, thereby enabling the opening of each row of sub-pixels of the second display panel.

[0056] It is understood that this application does not limit other parts of the processing unit. Specific details regarding the resolution reconstruction method can be found in the description of the processing unit, and will not be repeated here.

[0057] In summary, this embodiment determines the driving mode of the second display panel based on the first display data of the first display panel. Then, when the driving mode of the second display panel is a high refresh rate mode, it uses an upsampling algorithm to linearly interpolate the first display data to obtain the second display data. Finally, the second display data is transmitted to the driving circuit of the second display panel for processing to obtain the target display data used to drive the display of the second display panel. The second target scanning pulse and the first target scanning pulse have a target delay determined based on the total number of rows of multiple sub-pixels and the refresh frequency of the second display panel in the high refresh rate mode. This can improve the problem of strong jagged edges in the picture, optimize the adaptation between different resolutions, thereby improving the quality of resolution reconstruction and optimizing the display effect.

[0058] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0059] This application may have other various embodiments. Without departing from the spirit and essential points of this application, those skilled in the art can make various corresponding changes and modifications based on this application, but these corresponding changes and modifications should all fall within the protection scope of the appended claims.

Claims

1. A processing unit, characterized in that, The processing unit is connected to a first display panel and a second display panel, the first display panel and the second display panel having different resolutions, and the processing unit is used for: The driving mode of the second display panel is determined based on the first display data of the first display panel; When the driving mode of the second display panel is high refresh rate mode, the first display data is linearly interpolated using an upsampling algorithm to obtain the second display data; The second display data is transmitted to the driving circuit of the second display panel for processing to obtain target display data for driving the second display panel to display. The target display data includes a first target scan signal of a first row of sub-pixels in a scan group and a second target scan signal of a second row of sub-pixels. The first target scan signal has a first target scan pulse, and the second target scan signal has a second target scan pulse. There is a target delay between the second target scan pulse and the first target scan pulse. The target delay is determined based on the total number of rows of the multiple sub-pixels of the second display panel and the refresh rate of the second display panel in the high refresh rate mode.

2. The processing unit according to claim 1, characterized in that, The processing unit determines the driving mode of the second display panel based on the first display data of the first display panel in the following manner: Receive first display data from the driving circuit of the first display panel; Determine whether the refresh rate of the first displayed data is within a preset frequency range; If the refresh rate of the first display data is within a preset frequency range, the display mode of the second display panel is controlled to be the standard mode; If the refresh rate of the first displayed data is outside the preset frequency range, the display mode of the second display panel is controlled to be a high refresh rate mode.

3. The processing unit according to claim 1, characterized in that, The processing unit obtains the second display data by linearly interpolating the first display data using an upsampling algorithm when the second display panel is in high refresh rate mode: When the display panel is in high refresh rate mode, an upsampling algorithm is used to linearly interpolate multiple data signals of the first display data in the horizontal direction to obtain second display data. The amount of data in the horizontal direction of the second display data is at least twice the amount of data in the horizontal direction of the first display data.

4. The processing unit according to claim 1, characterized in that, The driving circuit of the second display panel is a second driving circuit. The target display data includes multiple target scanning signals. The processing unit transmits the second display data to the driving circuit of the second display panel for processing in the following manner to obtain target display data for driving the second display panel to display: Multiple second scan signals of the second display data are transmitted to the gate driving unit of the second driving circuit to generate multiple target scan signals, which are used to scan each row of sub-pixels of the second display panel.

5. The processing unit according to claim 4, characterized in that, The processing unit transmits multiple second scan signals of the second display data to the gate driving unit of the second driving circuit in the following manner to generate multiple target scan signals: A second scan signal of the second displayed data is selected as the first target scan signal in a scan group of the target displayed data; The first target scanning signal is delayed according to the target time delay to obtain the second target scanning signal in a scanning group of the target display data.

6. The processing unit according to claim 5, characterized in that, When the second target scan signal is working in a scan group of the target display data, the sub-pixel row corresponding to the second scan signal writes the same target data signal as the sub-pixel row corresponding to the first target scan signal in the scan group.

7. The processing unit according to claim 5, characterized in that, The total number of target scan signals for the target display data is several times the total number of second scan signals for the second display data.

8. The processing unit according to any one of claims 1-7, characterized in that, The target latency is 0.5H, where H is determined based on the total number of rows of the multiple sub-pixels and the refresh rate of the second display panel in the high refresh rate mode.

9. A resolution reconstruction method, characterized in that, The resolution reconstruction method is applied to the processing unit as described in any one of claims 1-8, the processing unit being connected to a first display panel and a second display panel, wherein the first display panel and the second display panel have different resolutions, and the resolution reconstruction method includes: The driving mode of the second display panel is determined based on the first display data of the first display panel; When the driving mode of the second display panel is high refresh rate mode, the first display data is linearly interpolated using an upsampling algorithm to obtain the second display data; The second display data is transmitted to the driving circuit of the second display panel for processing to obtain target display data for driving the second display panel to display. The target display data includes a first target scan signal of a first row of sub-pixels in a scan group and a second target scan signal of a second row of sub-pixels. The first target scan signal has a first target scan pulse, and the second target scan signal has a second target scan pulse. There is a target delay between the second target scan pulse and the first target scan pulse. The target delay is determined based on the total number of rows of the multiple sub-pixels of the second display panel and the refresh rate of the second display panel in the high refresh rate mode.

10. A resolution reconstruction system, characterized in that, The resolution reconstruction system includes a processing unit as described in any one of claims 1-8, a first display panel and a second display panel connected to the processing unit, wherein the first display panel and the second display panel have different resolutions.

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