A host startup control method, device, computer program, and storage medium

Abstract

This application discloses a host startup control method, device, computer program, and storage medium, applied in the field of computer technology. The method includes: during the memory initialization phase of the host's power-on startup, performing host memory parameter training; when memory parameter training fails, reading recording data of failed memory parameter training from a predefined first storage space; based on the recording data, determining whether the cumulative number of failed memory parameter training sessions within the most recent first time period has reached a preset threshold; if not, generating recording data of the current failed memory parameter training session and storing the recording data in the first storage space; restarting the host and re-performing the host's memory parameter training; if yes, performing host startup control according to a preset processing strategy. Applying the solution of this application can effectively achieve host startup control, improve the success rate of memory parameter training, and reduce the cost of manual operation and maintenance management.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a host computer startup control method, device, computer program, and storage medium. Background Technology

[0002] Memory parameter training is a critical step in the power-on process of servers and other host devices. Its purpose is to calibrate the signal timing, voltage, and impedance between the memory controller and DRAM (Dynamic Random Access Memory) to ensure reliable data transmission. However, memory parameter training can sometimes fail due to the following factors: First, signal integrity issues, referring to mismatched PCB (Printed Circuit Board) trace lengths, causing timing offsets, crosstalk, or power supply noise that leads to signal jitter. Second, hardware differences: DRAM chips from different manufacturers may have slight differences in electrical characteristics, and variations in the contact impedance of memory slots / connectors may prevent standard training parameters from being compatible with all memory modules. Third, environmental interference: Temperature fluctuations, power supply noise, PCB signal crosstalk, and transient voltage drops during server operation can affect memory parameter training. Fourth, aging and degradation: Servers that have been running for a long time may experience memory chip aging and changes in PCB impedance, causing the original training parameters to become invalid.

[0003] Currently, when server memory parameter training fails, the system crashes immediately, requiring staff intervention. This increases the cost of manual operation and maintenance and does not fully utilize the adaptive capabilities of modern server hardware.

[0004] In summary, how to effectively control the startup of the host, improve the success rate of memory parameter training, and reduce the cost of manual operation and maintenance management are technical problems that urgently need to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a host startup control method, device, computer program, and storage medium to effectively realize host startup control, improve the success rate of memory parameter training, and reduce the cost of manual operation and maintenance management.

[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0007] In a first aspect, the present invention provides a host startup control method, comprising:

[0008] During the memory initialization phase of the host's power-on startup, the host's memory parameters are trained.

[0009] When memory parameter training fails, the recorded data of memory parameter training failure is read from the first storage space; wherein, the first storage space is a non-volatile storage space;

[0010] Based on the recorded data, it is determined whether the cumulative number of training failures of memory parameters within the most recent first time period has reached a preset threshold.

[0011] If not, then generate record data indicating that the training of memory parameters failed this time, and store the record data in the first storage space;

[0012] Restart the host and return to the memory initialization phase that was executed when the host was powered on, to train the host's memory parameters;

[0013] If so, the host startup control will be performed according to the preset processing strategy.

[0014] In one implementation, the host startup control is performed according to a preset processing strategy, including:

[0015] The host is prohibited from powering on and starting up.

[0016] In one implementation, the host startup control is performed according to a preset processing strategy, including:

[0017] Determine whether fault isolation is enabled;

[0018] If not, then the host computer is prevented from powering on and starting up;

[0019] If so, identify the individual memory locations that caused the memory parameter training to fail, and after disabling each of the aforementioned memory locations, continue with the power-on startup process of the host.

[0020] In one implementation, restarting the host includes:

[0021] Send a reboot command to the specified processor in the host;

[0022] The programmable logic device is notified by the rising edge signal of the specified interface so that the programmable logic device can perform power timing control on the motherboard of the host when it is powered down and when it is powered on.

[0023] The rising edge signal is a rising edge signal with added potential debouncing mechanism to increase the rising edge duration of the rising edge signal.

[0024] In one implementation, it further includes:

[0025] Identify the individual memory locations that caused the memory parameter training to fail.

[0026] If the cumulative number of memory parameter training failures does not reach the threshold number within the most recent first time period, but exceeds the first threshold, then in the next memory parameter training operation of the host, the operating frequency of each memory is fixed to the lowest operating frequency of the memory for each identified memory.

[0027] Wherein, the first threshold is greater than 0 and lower than the number threshold.

[0028] In one implementation, generating record data of failed memory parameter training and storing the record data in the first storage space includes:

[0029] Identify the memory numbers of each memory that caused the memory parameter training to fail, as well as the processor numbers to which each memory belongs;

[0030] For any of the aforementioned memory locations, obtain the memory parameter information of that memory location during the current memory parameter training process;

[0031] The memory number of each memory, the processor number to which each memory belongs, and the memory parameter information of each memory are used as the generated record data of the failed memory parameter training, and the record data is stored in the first storage space.

[0032] In one implementation, it further includes:

[0033] When the cumulative number of memory parameter training failures within the most recent first time period does not reach the number threshold but exceeds the second threshold, the recorded data in the first storage space within the most recent first time period is input into the memory parameter training optimization model so that the memory parameter information in the input data can be analyzed by the memory parameter training optimization model.

[0034] The system receives the suggested information output by the memory parameter training and optimization model, which indicates the direction of adjustment when adjusting the parameters of each memory segment during memory parameter training, so that the host's memory parameters are trained based on the suggested information in the next memory parameter training operation.

[0035] Wherein, the second threshold is greater than 0 and lower than the number threshold.

[0036] In a second aspect, the present invention provides an electronic device, comprising:

[0037] Memory, used to store computer programs;

[0038] A processor, used to implement the steps of the host startup control method as described above when executing the computer program.

[0039] Thirdly, the present invention provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of the host startup control method as described above.

[0040] Fourthly, the present invention provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the host startup control method as described above.

[0041] Applying the technical solution provided in this invention, considering the tight timing during the initialization phase after the host power-on, parameter adjustments are made within a specified range during memory initialization to achieve memory parameter training. If appropriate parameters cannot be adjusted to complete memory initialization within a certain time, memory parameter training will fail. Furthermore, some recoverable transient faults (non-permanent damage) can also lead to memory parameter training failure. To address this, this application's solution allows memory parameter training to be performed during the host power-on memory initialization phase. When memory parameter training fails, the system reads the failed training data from a predefined first storage space. If, based on the recorded data, the cumulative number of failed memory parameter training attempts within the most recent first time period does not reach a preset threshold, it allows for another attempt at memory parameter training. The host can then be restarted, and the operation of performing memory parameter training during the host power-on memory initialization phase can be resumed. In other words, this application's solution allows for multiple memory parameter training attempts, effectively improving the success rate of memory parameter training. Of course, if the cumulative number of memory parameter training failures reaches a preset threshold within the most recent first time period, it indicates a high probability of an unrecoverable fault. Therefore, it is necessary to control the host startup according to the preset processing strategy, such as causing the host to crash. Furthermore, the recorded data of this memory parameter training failure, if stored in memory, will be lost after the host is powered on again. Therefore, this application solution needs to store it in a first storage space. The first storage space is a non-volatile storage space, possessing the characteristic of retaining data even after power failure. This allows the first storage space to effectively record the training status of each layer of memory parameters, enabling this application solution to determine whether to retrain the memory parameters or control the host startup according to the preset processing strategy based on the recorded data in the first storage space.

[0042] In summary, the proposed solution can effectively control the host startup, improve the success rate of memory parameter training, and set up an automatic restart strategy for memory parameter retraining without manual intervention, thus reducing the cost of manual operation and maintenance. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a flowchart illustrating the implementation of a host startup control method according to a specific embodiment of the present invention.

[0045] Figure 2 This is a schematic diagram of the structure of an electronic device provided in a specific embodiment of the present invention;

[0046] Figure 3 This is a schematic diagram of the structure of a computer-readable storage medium according to the present invention. Detailed Implementation

[0047] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0048] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0049] Please refer to Figure 1 , Figure 1 The following is a flowchart illustrating an implementation of a host startup control method according to a specific embodiment of the present invention. The host startup control method may include the following steps:

[0050] Step S101: During the memory initialization phase of the host power-on startup, train the host's memory parameters.

[0051] In this application, the host can specifically be a server, edge computing device, personal computer, or other similar device. Upon power-on, the host needs to undergo initialization, during which memory initialization can be performed to train the host's memory parameters. For example, in one implementation, the BIOS's UEFI firmware typically executes a series of hardware initialization processes, including the initialization and configuration of critical peripherals such as PCIe devices, memory controllers, and the CPU. Complex parameter training is required during memory initialization to ensure signal integrity between the memory controller and the DRAM module.

[0052] Memory initialization requires complex memory parameter training, making it a crucial step in the power-on process of servers and other host devices. The purpose is to calibrate the signal timing, voltage, and impedance between the memory controller and DRAM. This primarily involves optimizing parameters such as signal timing, relevant voltage settings in the memory, and OTT impedance settings to ensure the stability of high-speed signal transmission. In practical applications, the specific parameters requiring optimization during host memory parameter training can be set according to actual needs. Furthermore, default memory parameter training methods are typically used for ease of implementation and to minimize additional workload for staff.

[0053] Step S102: When memory parameter training fails, read the record data of memory parameter training failure from the designated first storage space. The first storage space is a non-volatile storage space.

[0054] When training the host's memory parameters, the relevant parameters are adjusted within the corresponding parameter range. However, due to reasons such as memory hardware damage, momentary failures caused by environmental interference, and memory chip aging, the memory parameter training may fail within the limited time period.

[0055] In this application, when memory parameter training fails, the system does not crash directly. Instead, it reads the record data of memory parameter training failure from the set first storage space and then determines whether memory parameter retraining is required.

[0056] In this application, whenever memory parameter training fails, the recorded data of the failure can be stored in the first storage space. The first storage space is a non-volatile storage space. This is because current host devices such as servers use a hard reboot strategy after power failure. Therefore, if these recorded data are stored in memory by setting variables, it will be impossible to correctly obtain the previously recorded data of memory parameter training failure when restarting the host and retraining the memory parameters. Therefore, it is necessary to use a non-volatile storage space for recording.

[0057] Furthermore, it is understandable that if the memory parameters are trained successfully, the subsequent initialization process can proceed normally, and this application will not elaborate further on this.

[0058] Step S103: Based on the recorded data, determine whether the cumulative number of training failures of memory parameters in the most recent first time period has reached the preset threshold; if not, proceed to step S104, if yes, proceed to step S106.

[0059] Since the failure record is stored in the first storage space whenever memory parameter training fails, it is possible to determine whether the cumulative number of memory parameter training failures within the most recent first time period has reached a preset threshold based on the recorded data. In other words, if multiple consecutive memory parameter retraining attempts have been performed recently, reaching the preset threshold, it indicates a high probability of an unrecoverable fault, such as hardware damage. Even if memory parameter retraining continues, the probability of successful training is low. Therefore, step S106 can be executed to control the host startup according to the preset processing strategy.

[0060] If the cumulative number of memory parameter training failures has not reached the preset threshold within the most recent first time period, the present application allows memory parameter training to be re-performed, and steps S104 and S105 can be executed.

[0061] Furthermore, it is understandable that the purpose of setting the first duration in this application is to determine whether it is necessary to continue trying to retrain the memory parameters based on the cumulative number of recent memory parameter training failures. In other words, the specific value of the first duration can be set and adjusted according to actual needs, but it should be a relatively short value. For example, in one scenario, it can be set to ten minutes to avoid introducing prematurely recorded data.

[0062] The threshold value can be set according to actual needs, such as 3 or 5. It should not be set too high to avoid too many restarts affecting the user experience, nor should it be set too low to ensure that a reasonable number of memory parameter retraining operations can be performed.

[0063] Step S104: Generate the record data of the failed memory parameter training and store the record data in the first storage space.

[0064] It is understandable that before retraining the memory parameters, record data indicating the failure of this memory parameter training should be generated and then stored in the first storage space. As described above, the first storage space is a non-volatile storage space so that the data content in the first storage space will not be lost after restarting the host. For example, in one specific embodiment, the record data indicating the failure of this memory parameter training can be written to the non-volatile memory inside a specified real-time clock chip via the I2C protocol. The storage space provided by the non-volatile memory inside the real-time clock chip in this example is the first storage space described in this application. Of course, in other specific embodiments, the first storage space required by this application can be provided by other non-volatile memories.

[0065] Step S105: Restart the host and return to the memory initialization phase during the host power-on startup to train the host's memory parameters.

[0066] After storing the recorded data of the failed memory parameter training into the first storage space, the host can be restarted, and then the operation of step S101 can be returned to perform memory parameter training again.

[0067] In one specific embodiment of the present invention, the host restart described in step S105 may specifically include:

[0068] Send a reboot command to the specified processor in the host;

[0069] The rising edge signal of the specified interface is used to notify the programmable logic device so that the programmable logic device can control the power timing of the host motherboard when it is powered down and when it is powered on.

[0070] Among them, the rising edge signal is a rising edge signal with added potential de-jitter mechanism to increase the rising edge duration of the rising edge signal.

[0071] This implementation takes into account that, when restarting the host, a restart command can be sent to a designated CPU in the host via the SCMI interface protocol to restart the CPU. Simultaneously, a rising edge signal from a designated interface can be used to notify the programmable logic device (PLD), for example, by sending a rising edge signal to the CPLD via a designated GPIO interface. This instructs the CPLD to control the power sequence of the motherboard, specifically the power sequence when the motherboard powers down and when it powers on. Furthermore, this implementation considers that if the duration of the rising edge signal is too short, it may be considered interference by the CPLD. Therefore, to ensure effective restarting of this application, a potential debouncing mechanism can be added to increase the duration of the rising edge signal. For example, increasing the duration of the rising edge can achieve a duration of approximately 200ms.

[0072] After restarting the host, the memory parameters can be trained again during the memory initialization phase of the host's power-on startup. For example, in one scenario, the initial memory parameter training might fail due to transient interference. However, after restarting the host, the second memory parameter training attempt will complete successfully. Similarly, if the parameters are not adjusted to appropriate values ​​within the specified time during the second memory parameter training attempt, causing it to fail again, the third attempt after restarting the host will complete successfully. It can be seen that multiple restarts and multiple training iterations of the memory parameters can effectively increase the probability of successful training.

[0073] Step S106: Perform host startup control according to the preset processing strategy.

[0074] When step S106 is triggered, it indicates that multiple memory parameter training attempts have been performed, all of which have failed, and the cumulative number of failures has reached a preset threshold. Therefore, memory parameter retraining is no longer performed; instead, host startup control is implemented according to a preset processing strategy. The specific content of the preset processing strategy can be set according to actual needs. For example, in one specific embodiment of the invention, host startup control according to the preset processing strategy may include: prohibiting host power-on startup. In this embodiment, when step S106 is triggered, host power-on startup can be directly prohibited, meaning the host will directly crash, which is relatively simple and convenient to implement.

[0075] In practical applications, when step S106 is triggered, relevant fault information can be sent to the BMC, and fault alarms can be issued through the BMC to notify staff to intervene and handle the issue in a timely manner.

[0076] In one specific embodiment of the present invention, controlling the startup of the host according to a preset processing strategy may include:

[0077] Determine whether fault isolation is enabled;

[0078] If not, then prevent the host from powering on and starting up;

[0079] If so, identify the individual memory locations that caused the memory parameter training to fail, disable each memory location, and then continue with the host power-on startup process.

[0080] This implementation takes into account that when step S106 is triggered, it can be determined whether the fault isolation function is enabled. If the fault isolation function is not enabled, the host can be prevented from powering on and starting up. If the fault isolation function is enabled, the faulty memory can be shielded so that the host can still start up. That is, it will identify each memory that caused the failure of this memory parameter training, and then shield these faulty memory and continue the subsequent power-on and startup process of the host, which can improve the availability of the system.

[0081] In one specific embodiment of the present invention, it may further include:

[0082] Identify the individual memory locations that caused the memory parameter training to fail.

[0083] If the cumulative number of memory parameter training failures does not reach the threshold within the most recent first time period, but exceeds the first threshold, then in the next memory parameter training operation on the host, the memory operating frequency for each identified memory will be fixed at the lowest memory operating frequency.

[0084] Among them, the first threshold is greater than 0 and lower than the number of times threshold.

[0085] This implementation takes into account that while choosing the lowest operating frequency of the memory sacrifices some performance, it helps to increase the success rate of memory parameter training. Therefore, in this implementation, when the cumulative number of memory parameter training failures in the most recent first time period does not reach the threshold but exceeds the first threshold, it indicates that the number of memory parameter training failures has reached a certain value. Although it has not yet reached the point where memory parameter retraining should no longer be performed, the success rate of memory parameter training can be increased by fixing the memory operating frequency to the lowest operating frequency of the memory.

[0086] In this implementation, if the cumulative number of memory parameter training failures within the most recent first time period does not reach the number threshold but exceeds the first threshold, the memory that caused the memory parameter training failure will be identified. Then, in the next memory parameter training operation of the host, the operating frequency of these identified memory will be fixed to the minimum operating frequency of the memory to increase the success rate of memory parameter training.

[0087] In one specific embodiment of the present invention, generating record data of failed memory parameter training and storing the record data in a first storage space may include:

[0088] Identify the memory IDs of each memory location that caused the memory parameter training to fail, as well as the processor IDs to which each memory location belongs;

[0089] For any memory location, obtain the memory parameter information of that memory location during this memory parameter training process;

[0090] The memory number of each memory, the processor number to which each memory belongs, and the memory parameter information of each memory are used as the record data for the failure of this memory parameter training, and the record data is stored in the first storage space.

[0091] This implementation takes into account that the first storage space in this application can be used to record relevant data when each memory parameter training fails. In order to facilitate the subsequent processing by the staff, the relevant information can be recorded in as much detail as possible.

[0092] Specifically, after a memory parameter training failure, the memory number of each memory that caused the failure can be determined, that is, the memory slot number to which these faulty memory belong. In addition, the processor number to which each memory belongs can be determined, that is, the CPU number to which each memory belongs.

[0093] In addition to the memory number and its corresponding processor number, this implementation also acquires the memory parameter information of the faulty memory during the current memory parameter training process. Specifically, this includes the signal timing, relevant voltage settings, OTT impedance settings, and other parameter information of the memory during the current memory parameter training process. Then, the memory number of the faulty memory, its corresponding processor number, and the corresponding memory parameter information of each memory are used as the generated record data of the memory parameter training failure, and the record data is stored in the first storage space.

[0094] By restarting multiple times, the proposed solution can perform multiple training sessions on memory parameters to increase the success rate of training. However, it is understood that if the training rules during the execution of memory parameter training are not changed, each memory parameter training session can be considered an independent event, meaning it will not be affected by previous failed memory parameter training sessions. Furthermore, the proposed solution considers that if recent failed memory parameter training sessions can serve as a reference for the current memory parameter training, then there will be a basis for adjusting the relevant parameters during the current memory parameter training, which can further improve the success rate of the current memory parameter training.

[0095] In one specific embodiment of the present invention, it may further include:

[0096] When the cumulative number of memory parameter training failures within the most recent first time period does not reach the number threshold but exceeds the second threshold, the recorded data in the first storage space within the most recent first time period is input into the memory parameter training optimization model so that the memory parameter information in the input data can be analyzed by the memory parameter training optimization model.

[0097] The system receives output from the memory parameter training and optimization model, which suggests the direction of parameter adjustments for each memory segment during training. This information is then used to guide subsequent host memory parameter training based on the suggested adjustments. The second threshold is greater than 0 and less than the number of iterations threshold.

[0098] This implementation takes into account that if the cumulative number of memory parameter training failures does not reach the threshold in the most recent first time period, but exceeds the second threshold, it indicates that the number of memory parameter training failures has reached a certain value. Although it has not yet reached the point where memory parameter retraining should no longer be performed, at this time, the recorded data of these memory parameter training failures can be input into the memory parameter training optimization model. Through the memory parameter training optimization model, the input data can be analyzed, that is, the memory parameter information in the input data can be analyzed, thereby providing suggestions on the adjustment direction when adjusting the parameters of each memory, increasing the success probability of the next memory parameter training.

[0099] For example, when training memory parameters, the value of this parameter can be selected within the range of 3.0V to 4V. For instance, in the first memory parameter training process, the parameter was tested with values ​​of 3.0V, 3.1V, and 3.2V, and the first training attempt failed. In the second memory parameter training process, the parameter was tested with values ​​of 3.0V, 3.3V, and 3.2V, and the second training attempt also failed. In the third memory parameter training process, the parameter was tested with values ​​of 3.0V, 3.5V, and 3.2V, and the third training attempt also failed. After inputting the recorded data from these three memory parameter training attempts into the memory parameter training optimization model, the model, through analysis, provides suggestions such as prioritizing voltage values ​​between 3.5V and 4V for the next memory parameter training iteration.

[0100] It is understandable that the above example is merely a simple illustration of the principle of input data analysis and output suggestion information for memory parameter training and optimization models. In practical applications, memory parameter training is a complex process involving the interaction of multiple parameters. Sometimes, it's not just a single parameter value that's inappropriate, but rather an inappropriate combination of several parameter values. Memory parameter training and optimization models can perform more in-depth analysis to provide reasonable suggestions. Considering the widespread application and powerful learning capabilities of artificial intelligence, in practical applications, for example, relevant artificial intelligence models can be used to implement the memory parameter training and optimization model required for this embodiment of the application, enabling more in-depth data analysis and providing reasonable suggestions.

[0101] Furthermore, it is understood that in this implementation, the host's memory parameters need to be trained based on the suggested information during the next host memory parameter training operation. Therefore, this implementation method needs to be applied in situations where modification of the memory parameter training process is allowed. That is, in some implementations, if memory initialization requires strict adherence to the default procedure for memory parameter training, essentially creating an inoperable black box structure, other external programs can only receive the results of memory parameter training but cannot adjust the process, then this implementation method cannot be applied. In other words, this implementation method is suitable for situations where adjustment of the memory parameter training process is allowed.

[0102] In one specific embodiment of the present invention, after step S104 and before restarting the host, the method may further include: updating the single execution limit duration for memory parameter training and increasing the single execution limit duration. This embodiment takes into account that if some embodiments allow adjustments to the execution process of memory parameter training, the single execution limit duration for memory parameter training can be updated to increase it. That is, during memory initialization, in this embodiment, after memory parameter training fails, the single execution limit duration for memory parameter training can be increased, allowing for a longer training time during retraining of memory parameters, which is beneficial for improving the success rate of memory parameter training.

[0103] Applying the technical solution provided in this invention, considering the tight timing during the initialization phase after the host power-on, parameter adjustments are made within a specified range during memory initialization to achieve memory parameter training. If appropriate parameters cannot be adjusted to complete memory initialization within a certain time, memory parameter training will fail. Furthermore, some recoverable transient faults (non-permanent damage) can also lead to memory parameter training failure. To address this, this application's solution allows memory parameter training to be performed during the host power-on memory initialization phase. When memory parameter training fails, the system reads the failed training data from a predefined first storage space. If, based on the recorded data, the cumulative number of failed memory parameter training attempts within the most recent first time period does not reach a preset threshold, it allows for another attempt at memory parameter training. The host can then be restarted, and the operation of performing memory parameter training during the host power-on memory initialization phase can be resumed. In other words, this application's solution allows for multiple memory parameter training attempts, effectively improving the success rate of memory parameter training. Of course, if the cumulative number of memory parameter training failures reaches a preset threshold within the most recent first time period, it indicates a high probability of an unrecoverable fault. Therefore, it is necessary to control the host startup according to the preset processing strategy, such as causing the host to crash. Furthermore, the recorded data of this memory parameter training failure, if stored in memory, will be lost after the host is powered on again. Therefore, this application solution needs to store it in a first storage space. The first storage space is a non-volatile storage space, possessing the characteristic of retaining data even after power failure. This allows the first storage space to effectively record the training status of each layer of memory parameters, enabling this application solution to determine whether to retrain the memory parameters or control the host startup according to the preset processing strategy based on the recorded data in the first storage space.

[0104] In summary, the proposed solution can effectively control the host startup, improve the success rate of memory parameter training, and set up an automatic restart strategy for memory parameter retraining without manual intervention, thus reducing the cost of manual operation and maintenance.

[0105] Corresponding to the above methods and system embodiments, this invention also provides an electronic device, a computer-readable storage medium, and a computer program product, which can be referred to in conjunction with the above.

[0106] See Figure 2 As shown, the device may include:

[0107] Memory 201 is used to store computer programs;

[0108] Processor 202 is configured to execute a computer program to implement the steps of the host startup control method as described in any of the above embodiments.

[0109] The computer program product includes a computer program / instructions that, when executed by a processor, implement the steps of the host startup control method as described in any of the above embodiments.

[0110] See also Figure 3 The computer-readable storage medium 30 stores a computer program 31, which, when executed by a processor, implements the steps of the host startup control method as described in any of the above embodiments. The computer-readable storage medium 30 referred to herein includes RAM (Random Access Memory), main memory, ROM (Read-Only Memory), EEPROM (Electrically Erasable Programmable Read Only Memory), registers, hard disks, removable disks, or any other form of storage medium known in the art.

[0111] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0112] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the invention. Specific examples have been used herein to illustrate the principles and implementation methods of the invention. The description of the above embodiments is only intended to help understand the technical solutions and core ideas of the invention. It should be noted that those skilled in the art can make several improvements and modifications to the invention without departing from the principles of the invention, and these improvements and modifications also fall within the protection scope of the invention.

Claims

1. A method for controlling the startup of a host computer, characterized in that, include: During the memory initialization phase of the host's power-on startup, the host's memory parameters are trained. When memory parameter training fails, the recorded data of memory parameter training failure is read from the first storage space; wherein, the first storage space is a non-volatile storage space; Based on the recorded data, it is determined whether the cumulative number of training failures of memory parameters within the most recent first time period has reached a preset threshold. If not, then generate record data indicating that the training of memory parameters failed this time, and store the record data in the first storage space; Restart the host and return to the memory initialization phase that was executed when the host was powered on, to train the host's memory parameters; If so, the host startup control will be performed according to the preset processing strategy; Also includes: Identify the individual memory locations that caused the memory parameter training to fail. If, within the most recent first time period, the cumulative number of memory parameter training failures does not reach the number threshold but exceeds the first threshold, then in the next memory parameter training operation of the host, for each identified memory, the operating frequency of the memory is fixed to the lowest operating frequency of the memory; wherein, the first threshold is greater than 0 and lower than the number threshold; Generate record data for failed memory parameter training and store the record data in the first storage space, including: Identify the memory numbers of each memory that caused the memory parameter training to fail, as well as the processor numbers to which each memory belongs; For any of the aforementioned memory locations, obtain the memory parameter information of that memory location during the current memory parameter training process; The memory number of each memory, the processor number to which each memory belongs, and the memory parameter information of each memory are used as the generated record data of the failure of this memory parameter training, and the record data is stored in the first storage space. Also includes: When the cumulative number of memory parameter training failures within the most recent first time period does not reach the number threshold but exceeds the second threshold, the recorded data in the first storage space within the most recent first time period is input into the memory parameter training optimization model so that the memory parameter information in the input data can be analyzed by the memory parameter training optimization model. The system receives suggested information output by the memory parameter training optimization model, which indicates the direction of adjustment when adjusting the parameters of each memory segment during memory parameter training, so that the host's memory parameters are trained based on the suggested information in the next memory parameter training operation; wherein the second threshold is greater than 0 and lower than the number of times threshold.

2. The host startup control method according to claim 1, characterized in that, The host startup is controlled according to a preset processing strategy, including: The host is prohibited from powering on and starting up.

3. The host startup control method according to claim 1, characterized in that, The host startup is controlled according to a preset processing strategy, including: Determine whether fault isolation is enabled; If not, then the host computer is prevented from powering on and starting up; If so, identify the individual memory locations that caused the memory parameter training to fail, and after disabling each of the aforementioned memory locations, continue with the power-on startup process of the host.

4. The host startup control method according to claim 1, characterized in that, Restarting the host includes: Send a reboot command to the specified processor in the host; The programmable logic device is notified by the rising edge signal of the specified interface so that the programmable logic device can perform power timing control on the motherboard of the host when it is powered down and when it is powered on. The rising edge signal is a rising edge signal with added potential debouncing mechanism to increase the rising edge duration of the rising edge signal.

5. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the host startup control method as described in any one of claims 1 to 4 when executing the computer program.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the host startup control method as described in any one of claims 1 to 4.

7. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the host startup control method as described in any one of claims 1 to 4.

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