一种用于多核系统中的硬件访问控制装置

By introducing a hardware lock module into a multi-core system, the problem of resource access conflicts in multi-core systems is solved, and hardware-level atomic mutual exclusion access is achieved, thereby improving the system's response speed and stability.

CN121501722BActive Publication Date: 2026-07-17CHANGSHA CHIXIN SEMICON TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHANGSHA CHIXIN SEMICON TECH CO LTD
Filing Date
2025-11-13
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

In multi-core systems, existing software semaphores or mutexes rely on software interrupts for resource access synchronization, resulting in large response delays, inability to guarantee the atomicity of operations, high synchronization complexity, and difficulty in debugging.

Method used

A hardware lock module is introduced, including a hardware lock register module and a hardware lock arbitration response module, to achieve atomic mutual exclusion access at the hardware level and prevent conflicts caused by multiple cores accessing peripheral or memory resources simultaneously.

Benefits of technology

It implements hardware-level atomic mutual exclusion access, avoids read/write asynchrony and arbitration timing competition, reduces system wait time, improves real-time response of multi-core access, and enhances system operational stability.

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Abstract

本发明提供一种用于多核系统中的硬件访问控制装置,装置包括多个主核和硬件锁模块;硬件锁模块包括硬件锁寄存器模块和硬件锁仲裁响应模块;硬件锁寄存器模块中的寄存器的位宽与主核的个数一致,每个bit对应一个主核的访问许可标志,同一个时刻仅允许一个bit被置位,若一个主核已设置其lock bit,则其他主核不能再设置,等该lock bit被解锁后才能设置;硬件锁仲裁响应模块包括外设硬件锁仲裁模块和内存硬件锁仲裁模块,外设硬件锁仲裁模块和内存硬件锁仲裁模块分别对应APB、AHB总线访问路径。本发明提供的用于多核系统中的硬件访问控制装置,通过在多核系统中引入硬件锁模块,实现资源访问的硬件级原子互斥访问,防止多核同时访问外设或内存资源的冲突。
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