Interlaced totem pole AC-DC converter and bias current sharing suppression control method

Abstract

This invention belongs to the field of converter technology, and relates to an interleaved totem-pole AC-DC converter and a method for suppressing bias current sharing. The AC input of the converter, after passing through an LC filter, is connected to the primary-side switching network. The primary-side switching network adopts a totem-pole and dual active bridge arm multiplexing structure. The primary side of the isolation transformer is connected across the center points of the first and second arms of the primary-side switching network via a power transfer inductor. The secondary winding of the transformer, which is rectified and output from the secondary side, is connected to a full-bridge rectifier circuit composed of two arms to directly supply power to the DC load. This invention systematically solves core problems such as power transmission, current balance, and core bias through a collaborative design of a triple closed loop encompassing main power, current sharing, and bias. Based on their physical coupling relationships and disturbance characteristics, each loop employs a hierarchical bandwidth design, achieving fast dynamic response while ensuring global stability, thus realizing collaborative control.

Description

Technical Field

[0001] This invention belongs to the field of converter technology, specifically relating to an interleaved totem pole AC-DC converter and a bias current equalization suppression control method. Background Technology

[0002] Dual active bridge (DAB) converters, as high-performance isolated DC-DC converters, are widely studied and applied due to their advantages such as bidirectional power flow and ease of soft switching. In traditional DC-DC DAB applications, the magnetization problem of high-frequency transformers is a known technical challenge. A common solution to the magnetization problem in DC-DC DABs is to connect a DC blocking capacitor in series on the primary or secondary side of the transformer. This capacitor, utilizing its "DC blocking, AC passing" characteristic, can automatically block and absorb the DC voltage component generated by control or device asymmetry, thereby ensuring that the net DC component of the voltage applied to the transformer windings is zero. This physically forces magnetic flux symmetry, fundamentally eliminating the risk of magnetization.

[0003] However, as applications expand to more complex topologies such as single-stage and interleaved parallel totem-pole dual active bridge AC-DC converters, continuing to use DC blocking capacitors faces significant challenges. While the capacitor itself introduces issues such as size, cost, complexity, and ESR losses—acceptable costs in traditional DC-DC applications—these drawbacks are dramatically amplified in new topologies with extremely stringent efficiency and power density requirements, transforming it from a "reasonable compromise" into an "unacceptable weakness." Furthermore, introducing DC blocking capacitors alters the system's dynamic model and control characteristics, further exacerbating the following interconnected technical challenges within the system: 1. The fundamental difference in circuit operating mechanisms and the increased complexity of the bias magnetization problem. The converter is not a DC-DC system operating at a steady-state DC point, but rather a single-stage AC-DC system directly processing the mains frequency AC input. One of its core control objectives is to achieve unity power factor correction, that is, to ensure that the input current tracks the sinusoidally changing input voltage in real time within each half-wave cycle of the mains frequency. This objective dictates that the modulation signal (including duty cycle and shift ratio) is a rapidly and continuously changing dynamic time-varying variable, rather than a relatively stable static value in a DC-DC system. In this complex dynamic modulation process, any minute control deviation, sampling error, or device parameter mismatch is easily amplified, leading to a dynamic imbalance of positive and negative volt-second products in the generated high-frequency square wave voltage within each high-frequency switching cycle. This imbalance is no longer a static deviation in DC-DC, but a time-varying DC bias that fluctuates with the power frequency cycle. Its behavior is more subtle and unpredictable, posing a continuous and dynamic saturation threat to the transformer. 2. Inherent limitations of the topology and loss of control freedom. In this bridge-arm multiplexing topology circuit, the three primary arms need to work together to complete two functions: totem-pole bridgeless PFC rectification and high-frequency inversion on the DAB primary side. This functional coupling severely limits the freedom of choice in modulation strategy selection. Specifically, the drive of bridge arm 3 must be phase-synchronized with the input voltage to complete the power frequency rectification commutation. The drives of bridge arms 1 and 2 must simultaneously consider two intertwined objectives: generating a high-frequency square wave for power interaction with the secondary side and controlling the Boost inductor current through their intrinsic duty cycle. This structure makes it difficult to implement multi-phase-shift modulation strategies with higher degrees of freedom, and the control system lacks sufficient independent degrees of freedom to simultaneously and perfectly achieve all control objectives.

[0004] 3. Deep coupling between current sharing and magnetization issues. The limitations of the topology directly lead to a severe coupling between current sharing and magnetization issues, a core contradiction that existing technologies cannot effectively resolve. To achieve two interleaved parallel Boost inductors ( L boost1 , L boost2 To achieve current equalization, the control system must detect current differences and apply corrections. Since the parasitic parameters of the inductor and its path inevitably differ, the control system must artificially and actively introduce a subtle but crucial asymmetry in the midpoint voltage waveforms of bridge arms 1 and 2 to achieve current equalization. This artificially introduced voltage asymmetry between bridge arms for "current equalization" directly affects the power transfer inductor (…). This occurs on the primary winding of the high-frequency transformer. The direct consequence is that the volt-second product of the positive and negative half-cycles of the combined voltage waveform applied to the primary winding of the transformer is artificially disrupted.

[0005] In summary, the control actions aimed at solving the "current sharing" problem themselves become the direct trigger for the "magnetic bias" problem. Conversely, once the transformer becomes magnetically biased and tends towards saturation due to other reasons, the drastic change in its magnetizing inductance will also disrupt the previously established current sharing balance. This positive feedback coupling mechanism between "current sharing" and "magnetic bias" makes any traditional solution that attempts to solve either problem independently ineffective, and may even worsen system stability.

[0006] Therefore, there is a need for a solution that can be applied to a single-stage AC-DC DAB converter to fundamentally decouple and collaboratively solve the symbiotic technical problem of current sharing and bias, thereby improving the power density and reliability of the system and solving the above-mentioned technical problems without increasing additional hardware costs. Summary of the Invention

[0007] This invention provides the following technical solution: an interleaved totem pole AC-DC converter, comprising: The AC input passes through an LC filter and is then connected to the primary-side switching network.

[0008] The primary-side switching network adopts a totem pole and dual active bridge arm multiplexing structure. One end of the AC input is connected to the center point of the third bridge arm, and the other end of the AC input is connected to the center points of the first and second bridge arms respectively through two staggered parallel Boost inductors. Then, through an independent power transmission inductor, it is connected to both ends of the primary winding of the high-frequency isolation transformer, thus forming the main circuit for power transmission. A DC bus capacitor is connected in parallel to the total DC bus formed by the three primary-side bridge arms.

[0009] An isolation transformer is connected across the center points of the first and second arms of the primary-side switching network via a power transfer inductor.

[0010] The secondary-side rectified output transformer's secondary winding is connected to a full-bridge rectifier circuit consisting of two bridge arms to directly power the DC load.

[0011] The control module is configured to: generate corresponding compensation quantities by sampling multiple inductor currents and transformer primary currents, and perform current sharing closed-loop control and bias suppression closed-loop control on the converter in parallel.

[0012] Preferably, the converter includes: an input power supply AC, an output power supply DC, and an inductor L. in L boost1 L boost2 L trans Capacitor C in C bus C out Switching transistors S1-S 10 The converter's circuit connection method is as follows: one end of the input power supply AC is connected in series with an inductor L. in Capacitor C in Connect the other end of the input power supply AC; inductor L in Capacitor C in The intermediate nodes are connected in series with inductors L. boost1 L trans Connect one end of the primary winding of the isolation transformer, and connect the other end of the primary winding of the isolation transformer in series with an inductor L. boost2 Connect inductor L in Capacitor C in The intermediate node; the two ends of the series connection of switching transistors S1 and S2 are respectively connected to capacitor C. bus The two ends of the series-connected switching transistors S3 and S4 are respectively connected to capacitor C. bus The two ends of the series-connected switching transistors S5 and S6 are respectively connected to capacitor C. busThe two ends; the middle node of the switching transistors S1 and S2 is connected to the inductor L. boost1 L trans The intermediate node of the switching transistors S3 and S4 is connected to the inductor L. boost2 The intermediate nodes of the isolation transformer and the intermediate nodes of switching transistors S5 and S6 are connected to the power supply AC and capacitor C. in The intermediate node; capacitor C is connected to the two ends of the series connection of switching transistors S7 and S8. out At both ends, the switching transistors S9 and S 10 The two ends of the series connection are respectively connected to capacitor C. out The two ends of the output power supply DC are respectively connected to capacitor C. out The two ends; the middle node of switching transistors S7 and S8, and switching transistors S9 and S... 10 The intermediate nodes are connected to both ends of the secondary side of the isolation transformer.

[0013] Preferably, the third bridge arm operates in power frequency mode. During the positive half-cycle of the input AC voltage, the upper transistor of the third bridge arm remains normally off and the lower transistor remains normally on, clamping the reference terminal of the AC input to the negative terminal of the DC bus. During the negative half-cycle of the input AC voltage, the upper transistor of the third bridge arm remains normally on and the lower transistor remains normally off, clamping the reference terminal of the AC input to the positive terminal of the DC bus.

[0014] Preferably, the first bridge arm and the second bridge arm are multiplexed, and the first bridge arm and the second bridge arm operate simultaneously in a high-frequency switching state. The intermediate node of the first bridge arm and the intermediate node of the second bridge arm are connected to the two ends of the primary winding of the high-frequency transformer through a power transmission inductor. The first bridge arm and the second bridge arm generate a high-frequency AC square wave voltage through a high-frequency complementary switch and apply it to the primary side of the transformer. The power transmitted through the transformer is adjusted by controlling the phase difference between the secondary voltage and the high-frequency AC square wave voltage.

[0015] This invention also discloses a bias current sharing suppression control method for an interleaved totem-pole AC-DC converter. This control method is used to control the aforementioned converter and includes current sharing closed-loop control, which comprises: A1. Real-time calculation of the difference in current between the two Boost inductors .

[0016] A2, the difference Input flow equalization regulator.

[0017] A3. To optimize system linearity, divide the output of the current sharing regulator by the bus capacitor voltage. The result obtained will serve as the final compensation amount. This operation can offset... The effect of the change on the regulator gain ensures that the control characteristics of the current sharing loop remain consistent at different operating points.

[0018] A4. Compensation Amount The duty cycle reference values ​​of the first and second bridge arms on the primary side are added to the primary side, and the currents of the two inductors are forced to be consistent through modulation.

[0019] A5. Considering It exhibits a sinusoidal half-wave variation within the power frequency cycle. When its value is too small, the division operation in the preceding steps may lead to... Excessive voltage can introduce disturbances to the power loop and bias loop. To prevent this, a voltage threshold is set. The control system will only detect Only then should the flow equalization regulator be activated and updated. ;when When below this threshold, maintain The value should be zero or the previous effective value to avoid generating excessively large ineffective control quantities near the zero-crossing region of the bus voltage.

[0020] A6 Updated at the end of each cycle on the AC side, with the same duty cycle as the DC side. The shift of the DC side relative to the AC side synchronous.

[0021] Preferably, in step A2, the current sharing regulator is a PI controller with a low-pass filter. The PI controller with a low-pass filter introduces a low-pass filter on the basis of PI to filter out the switching frequency component, prevent steady-state error introduced by the discrete execution of the controller, and improve the current sharing accuracy of the system.

[0022] Preferably, the control method includes bias magnetic closed-loop control, which includes: The output of the bias control loop is:

[0023] in, To suppress dynamic bias on the secondary side, To suppress the bias magnetization of the primary side current sharing, To suppress residual bias; Secondary side dynamic bias suppression for:

[0024] in, , , , , Each is the result of the previous switching cycle. , .

[0025] Primary side current sharing bias suppression for:

[0026] in, The voltage amplitude on the AC side of the power transmission inductor. This represents the DC-side voltage amplitude of the power transfer inductor.

[0027] More preferably, the residual bias suppression The method is as follows: B1. Real-time sampling of transformer primary current Set the control target to The DC component is adjusted to zero, and the error signal is... .

[0028] B2. Send the error signal to the bias regulator.

[0029] B3. Divide the output of the bias regulator by the output voltage. The result obtained will serve as the final compensation amount. This operation can offset... The effect of the change on the regulator gain ensures that the control characteristics of the bias ring remain consistent at different operating points.

[0030] Preferably, the main power control closed loop adopts any one of the following three control strategies, and the output of the main power control closed loop is the transmission power reference value P, which is used in the subsequent dual active bridge modulation stage: C1. Control based on rotating coordinate system transformation: AC quantity is converted into DC quantity through coordinate transformation, and a PI controller is used for tracking; C2. Control based on high gain at power frequency: High gain is provided at the fundamental power frequency to directly adjust the error signal; C3. PI control based on sinusoidal feedforward: A PI regulator is used to adjust the error, while a sinusoidal signal with the same frequency and phase as the grid voltage is introduced as feedforward to transmit the main power.

[0031] The beneficial effects of this invention are: 1. This invention systematically solves core problems such as power transmission, current balancing, and core biasing through a collaborative design of three closed loops: main power, current sharing, and biasing. Each loop employs a hierarchical bandwidth design (fastest for the main power loop, followed by the biasing loop, and slowest for the current sharing loop) based on its physical coupling relationship and disturbance characteristics, ensuring global stability under rapid dynamic response. Therefore, this invention achieves collaborative control.

[0032] 2. The bias suppression of this invention is achieved by sampling the primary current and controlling its DC component to zero. This method, through mathematical derivation, is equivalent to steady-state excitation current suppression. It avoids directly detecting complex and costly magnetic flux or excitation current signals, significantly reducing the system's implementation complexity and cost. Therefore, this invention simplifies the sampling scheme.

[0033] 3. This invention proposes a triple bias compensation mechanism to achieve refined control: "feedforward decoupling," through the "secondary-side dynamic bias suppression" module, feedforward compensation is provided for bias generated by modulation dynamics; disturbance isolation, through the "primary-side current sharing bias suppression" module, decouples and cancels the influence of current sharing regulation on bias in real time; feedback correction, through the "residual bias suppression" PI controller with low-pass filter, feedback suppresses all unmodeled residual bias, ensuring steady-state accuracy and robustness; therefore, this invention achieves decoupling and refined bias suppression.

[0034] 4. The present invention preferably uses a PI controller with a low-pass filter in the critical loop. The filter effectively suppresses the oscillation risk caused by discrete control and switching noise, thereby improving the reliability of the system in practical engineering. Therefore, the present invention achieves engineering optimization. Attached Figure Description

[0035] Figure 1 This is a topology diagram of the alternating totem pole AC-DC converter and the bias current sharing suppression control method of the present invention. Figure 2 This is an explanatory diagram illustrating the definition of the converter state variables of the present invention; Figure 3 This is an explanatory diagram illustrating the definition of the modulation variable in this invention; Figure 4 This is a switching state transition diagram of the present invention; Figure 5 This is an illustration of the main power control closed loop of the present invention; Figure 6 This is a schematic diagram of the duty cycle fine-tuning of the present invention; Figure 7 This is an illustration of the closed-loop flow sharing control of the present invention; Figure 8 This is an illustration of the bias control closed loop of the present invention; Figure 9 This is a simulation circuit diagram of the interleaved totem pole AC-DC converter of the present invention; Figure 10 This is a diagram showing the parameter configuration of the simulation system of the present invention; Figure 11 This is a comparison diagram of the standard parameter operating waveforms of the present invention; Figure 12 This is a waveform diagram of the standard parameters of this invention. Figure 13 This is a comparison diagram of the working waveforms of the asymmetric parameters of the present invention; Figure 14 This is a waveform diagram of the asymmetric parameters of the present invention. Detailed Implementation

[0036] The related technologies of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0037] like Figures 1-14 As shown, the interleaved totem pole AC-DC converter of the present invention mainly comprises four parts: AC input, primary-side switching network, isolation transformer, and secondary-side rectified output.

[0038] The AC input, after passing through an LC filter, is connected to the primary-side switching network. This network employs a totem-pole and dual active bridge arm multiplexing structure: one end of the AC input is connected to the center point of bridge arm 3, and the other end is connected to the center points of bridge arms 1 and 2 through two interleaved parallel Boost inductors. Then, through an independent power transfer inductor, it is connected to both ends of the primary winding of the high-frequency isolation transformer, thus forming the main power transfer circuit. A DC bus capacitor is connected in parallel to the total DC bus formed by the three primary-side bridge arms. On the secondary side, the transformer secondary winding is connected to a full-bridge rectifier circuit consisting of two bridge arms, directly supplying power to the DC load.

[0039] The descriptions of the various state variables in this invention are shown in Figure 2: where, AC power supply voltage; For input current; This refers to the input capacitor voltage; and These represent the currents of the two Boost inductors, respectively. For bridge arm i ( i The midpoint potential of (=1,2,3,4,5); This is the bus capacitor voltage; , , These are the primary current, secondary current, and magnetizing current of the transformer, respectively. This refers to the current referred from the secondary side to the primary side of the transformer. , These are the primary voltage and secondary voltage of the transformer, respectively. , These represent the output voltage and the output current, respectively.

[0040] The modulation principle of this invention is based on the dual active bridge (DAB) modulation principle, employing an EPS modulation scheme. Power transmission is controlled by adjusting the duty cycle shift ratio, as shown in Figure 3. The phase shift method depends on the power flow direction: the voltage waveform at the power input port always leads the voltage waveform at the output port. Specifically: DC side duty cycle; The shift of the DC side relative to the AC side; and All are within the range of greater than or equal to 0 and less than or equal to 1.

[0041] The switching state transition of the present invention is shown in Figure 4. Three-level voltage output is achieved by applying an inward shift ratio between the two bridge arms of the AC and DC ports.

[0042] Bridge arm 3 operates specifically in power frequency mode. During the positive half-cycle of the input AC voltage, its upper transistor remains normally off and its lower transistor remains normally on, clamping the AC input reference terminal to the negative terminal of the DC bus. During the negative half-cycle, its upper transistor remains normally on and its lower transistor remains normally off, clamping the AC input reference terminal to the positive terminal of the DC bus. This operation achieves a power frequency commutation function similar to that of a traditional totem-pole PFC.

[0043] Bridge arms 1 and 2 are multiplexed, operating simultaneously in a high-frequency switching state, serving a dual function: acting as the primary-side bridge arms of the DAB (Digital Amplifier Block). The midpoints of bridge arms 1 and 2 are connected to the primary winding of the high-frequency transformer via a power transfer inductor. They generate a high-frequency AC square wave voltage applied to the primary winding of the transformer through a high-frequency complementary switch. By controlling the phase difference between the secondary voltage and this square wave voltage, the power transmitted through the transformer is precisely regulated.

[0044] As the switching arms of the interleaved parallel Boost PFC: at the same time, arms 1 and 2 are also connected to the two input Boost inductors respectively. , This forms two interleaved parallel Boost converters, which stabilize the DC bus voltage. Its function.

[0045] The sampling section of this invention acquires electrical signals from key nodes of the system in real time: wherein: AC input side: AC power supply voltage Input current .

[0046] Preamplifier with interleaved inductor totem pole PFC: Input capacitor voltage First Boost Inductor Current Second Boost Inductor Current .

[0047] Dual active bridge section: bus capacitor voltage transformer primary current .

[0048] Output DC side: Output DC voltage Output DC current .

[0049] The main power control closed-loop structure of this invention is shown in Figure 5. The function of the main power control closed-loop is to generate a duty cycle reference and shift ratio for the transformer secondary voltage based on the error between the input current reference value and the sampled current, thereby achieving precise control of power flow. The control strategy of the main power control closed-loop is to achieve zero steady-state error tracking of the power frequency AC signal, and one of the following mature control methods can be adopted: Control based on rotating coordinate system (dq transformation): Convert AC quantity into DC quantity and use PI controller for tracking.

[0050] High-gain controllers (such as proportional resonant PR controllers) provide high gain at the power frequency, directly adjusting the error.

[0051] Controller based on feedforward sine wave signal: The feedforward sine wave signal is used to transmit power, and the error part is adjusted using a PI regulator.

[0052] The simulation of this invention uses a controller based on a feedforward sine signal, and the control output is a transmission power reference value P, which is used in the subsequent DAB modulation stage.

[0053] The parameter conversion and power command generation of the main power control closed loop include: To adapt the power command to the DAB modulation model, a power conversion module is set up to perform the following calculations: 1. Calculate the AC voltage amplitude of the power transfer inductor. .

[0054] 2. Calculate the DC-side voltage amplitude of the power transfer inductor. , where n is the transformer turns ratio.

[0055] 3. Calculate the voltage ratio .

[0056] 4. Calculate the transmission power reference value ,in For switching frequency, This refers to the inductance of the power transfer inductor.

[0057] 5. Calculate the per-unit value of transmission power. .

[0058] based on and The duty cycle reference of the secondary H-bridge is obtained by solving the DAB modulation algorithm (such as SPS, EPS, etc.). Compared to moving The above results form the basis for subsequent adjustments to the current sharing and bias magnetic closed-loop.

[0059] The current sharing closed-loop design structure of this invention is shown in Figure 7, which solves the problem of current sharing between the two Boost inductors. and The problem of imbalance. Current sharing closed-loop methods include: 1. Calculate the difference between the currents of the two inductors in real time. .

[0060] 2. The difference Input a current sharing regulator (preferably a PI controller with a low-pass filter, mainly used to filter out the switching frequency component, prevent steady-state error introduced by the discrete execution of the controller, and improve the current sharing accuracy of the system).

[0061] 3. To optimize system linearity, divide the output of the current sharing regulator by the bus capacitor voltage. The result obtained will serve as the final compensation amount. This operation can offset... The effect of the change on the regulator gain ensures that the control characteristics of the current sharing loop remain consistent at different operating points.

[0062] 4. The amount of compensation The duty cycle reference values ​​of primary bridge arms 1 and 2 are added, and the currents of the two inductors are forced to converge through modulation. The fine-tuning compensation method is shown in Figure 6.

[0063] 5. Considering It exhibits a sinusoidal half-wave variation within the power frequency cycle. When its value is too small, the division operation in the preceding steps may lead to... If the voltage is too high, it will introduce excessive disturbances to the power loop and the bias loop. To prevent this, a voltage threshold is set. (Typical value is 50V). The control system will only detect... Only then will the aforementioned flow sharing regulator be activated and updated. ;when When below this threshold, maintain The value should be zero or the previous effective value to avoid generating excessively large ineffective control quantities near the zero-crossing region of the bus voltage.

[0064] 6. Updated at the end of each cycle on the communication side. , synchronous.

[0065] The bias magnetization closed-loop design structure of this invention is shown in Figure 8; it can suppress the core bias of the high-frequency transformer and prevent core saturation. The structure of the bias magnetization closed-loop is as follows: the output of the bias magnetization control loop is the sum of three parts:

[0066] Among them, the dynamic bias suppression of the secondary side Its function is to suppress the bias magnetism caused by the dynamic change of the duty cycle compared to the secondary side shift.

[0067] Secondary side dynamic bias suppression The calculation is as follows: Calculate the modulation delay of bridge arm 4 and bridge arm 5:

[0068]

[0069] Define function f(x) = x + |x - 0.25| - |x + 0.25| calculate

[0070] in, , For the previous switching cycle ,

[0071] Primary side current sharing bias suppression Its function is to suppress the bias magnetism generated by the primary-side current equalization, thereby achieving decoupling of the bias magnetism and current equalization. Primary side current sharing bias suppression The calculation is as follows:

[0072] Residual bias suppression Its function is to suppress residual bias magnetism caused by non-ideal factors such as parasitic parameters and inconsistent switching action, as a supplement to the aforementioned bias magnetism suppression measures, and to ensure the safety of the magnetic core under all operating conditions.

[0073] Residual bias suppression The method is as follows: Real-time sampling of transformer primary current Set the control target to When the DC component is adjusted to zero, its error signal is: .

[0074] The error signal is fed into the bias magnetizer (preferably a PI controller with a low-pass filter, which can effectively filter out high-frequency noise in the error signal and improve the stability and robustness of the loop). To optimize system linearity, the output of the bias regulator is divided by the output voltage. The result obtained will serve as the final compensation amount. This operation can offset... The effect of the change on the regulator gain ensures that the control characteristics of the bias ring remain consistent at different operating points.

[0075] The basis for selecting the control quantity in this invention is: selecting the primary side current for control. Instead of directly controlling the excitation current This is mainly based on the following considerations: Feasibility: The excitation current cannot be directly obtained from a sensor; it requires complex algorithms to reconstruct it from the primary and secondary currents. The sampling circuit and calculations are extremely complex. Direct sampling Simple and reliable.

[0076] System optimization: Controlling primary current The DC component is zero, which can directly minimize the conduction loss and switching loss of the primary and secondary side switches, thereby improving the overall system efficiency.

[0077] Equivalence: From the perspective of circuit coupling, controlling the primary current The DC component is zero, which can be proven mathematically. Its direct effect is to suppress the transformer excitation current. The steady-state DC bias magnetization achieves the goal of preventing core saturation. Although a limited and acceptable bias magnetization may be introduced during transient processes to meet current sharing requirements under non-ideal conditions such as inconsistent inductance parameters, this bias magnetization will not accumulate in each power frequency cycle and will return to zero at the end of the cycle. This scheme achieves the core control objective while avoiding direct control. This leads to the disadvantage of increased conduction losses in the switching transistor.

[0078] The control quantity selection is executed as follows: the total bias compensation amount is set to... The duty cycle references attached to secondary side arms 4 and 5 are as follows: Figure 6 As shown, and at the end of each cycle with , Synchronized updates.

[0079] The hierarchical design of this invention includes a hierarchical bandwidth design strategy to address the coupling relationships between control loops. This strategy is based on a thorough analysis of the disturbance propagation paths between loops: the adjustment action of the current sharing loop simultaneously affects the bias state and transmission power; the compensation effect of the bias loop directly affects the dynamics of power transmission; and the dynamic process of the main power loop has negligible impact on disturbances from external current sharing and bias loops. Therefore, the core of this strategy is to ensure that the core performance loop can effectively suppress disturbances from auxiliary loops. The main power control closed loop is designed with the highest bandwidth to ensure fast tracking of power frequency commands and to suppress power disturbances introduced by current sharing and bias regulation in real time.

[0080] The bias suppression closed loop is designed to have a medium bandwidth, with a speed lower than the main power loop but higher than the current sharing loop, so as to quickly compensate for bias caused by factors such as current sharing operation and prevent it from interfering with system stability.

[0081] The current sharing closed loop is designed to have the lowest bandwidth. Since current sharing regulation will affect both main power and bias control at the same time, it is used as a slow calibration link. Once the main power and bias are stable, it gradually achieves current balance, avoiding the impact of its regulation on the dynamic performance of the system.

[0082] This bandwidth architecture effectively utilizes the characteristics of the controlled object, digesting disturbances step by step, and ensuring the overall stability and performance of the system under multi-ring collaborative operation.

[0083] Example Build the interleaved totem pole AC-DC converter simulation circuit as shown in Figure 1 in the Simulink environment, such as... Figure 9 As shown in Figure 10, the system parameter configuration is detailed in the figure. The effectiveness of the proposed control strategy is verified through the following simulation scenario.

[0084] Scenario 1 (Standard Parameters): Verify the basic performance of the control strategy under ideal symmetric parameters.

[0085] Scenario 2 (Asymmetric Parameters): Non-ideal factors are artificially introduced to simulate parameter differences and control errors in actual engineering. Specifically, a 0.01Ω resistor is connected in series with Boost inductor 1 and a 0.001Ω resistor is connected in series with Boost inductor 2 to simulate inconsistencies in inductor parameters. At the same time, a 0.2% duty cycle bias is superimposed on the drive signal of primary bridge arm 1 to simulate the asymmetry of the control channel.

[0086] For the two scenarios described above, the performance of the system without dedicated bias magnetization and current sharing suppression schemes and the system using the bias magnetization and current sharing suppression schemes of this invention were compared. The simulation results are shown in Figures 11 to 14, each figure including the waveforms of AC side voltage / current, DC side voltage / current, transformer primary current, transformer excitation current, and the currents of the two Boost inductors (average value of switching cycles).

[0087] By comparing the simulation results above, the technical effects of the control strategy proposed in this invention can be clearly seen: Excellent bias suppression capability: Under standard parameters, the present invention (Figure 12) successfully eliminates transient bias magnetization caused by secondary-side modulation dynamics, controls the steady-state error of the excitation current to almost zero, and its maximum value (3.06A) is only the ripple component.

[0088] Under severe asymmetric parameters, the system without the present invention (Figure 13) exhibits a continuous accumulation of DC bias in its excitation current (with a maximum value of 6.60A during the simulation time), posing a risk of core saturation. However, with the present invention (Figure 14), although there is an unavoidable transient bias due to current sharing, the system can successfully correct it at the end of each power frequency cycle, preventing the accumulation of bias. The maximum excitation current is limited to 4.53A, ensuring the safe and reliable operation of the transformer.

[0089] Precise flow control performance: Under standard parameters, this invention reduces the average current deviation between the two Boost inductors from 0.25A to 0.05A, achieving near-perfect current sharing.

[0090] Under asymmetric parameters, the current sharing effect of the system without the present invention deteriorates sharply, with a current deviation as high as 4.06A; while with the present invention, the current deviation is greatly suppressed to an extremely low level of 0.04A, which fully demonstrates that the present invention has extremely strong robustness when facing non-ideal factors such as inconsistent parameters.

[0091] Optimized system power quality and performance: Regardless of whether the parameters are standard or asymmetric, the total harmonic distortion (THD) of the AC input current is further reduced after adopting this invention (from 0.67% / 0.73% to 0.48% / 0.47%), indicating that this control strategy not only solves the problems of bias magnetization and current sharing, but also helps to improve the input characteristics of the system and enhance power quality. In summary, the simulation results of this invention fully verify that the cooperative control strategy can effectively solve the bias magnetization and current sharing problems in the interleaved totem pole AC-DC converter system, significantly improve the system's stability, robustness, and overall performance, and has important engineering application value.

[0092] It should be emphasized that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any way. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention shall still fall within the scope of the technical solution of the present invention.

Claims

1. A method for suppressing bias current sharing in an interleaved totem-pole AC-DC converter, characterized in that, The interleaved totem pole AC-DC converter includes: The AC input is filtered by an LC filter and then connected to the primary-side switching network. The primary-side switching network adopts a bridge arm multiplexing structure of totem pole and dual active bridge. One end of the AC input is connected to the center point of the third bridge arm, and the other end of the AC input is connected to the center points of the first and second bridge arms respectively through two staggered parallel Boost inductors. Then, through an independent power transmission inductor, it is connected to both ends of the primary winding of the high-frequency isolation transformer, thus forming the main circuit for power transmission. A DC bus capacitor is connected in parallel to the total DC bus formed by the three primary-side bridge arms. An isolation transformer, wherein the primary side of the isolation transformer is connected across the center points of the first and second arms of the primary-side switching network via a power transmission inductor; The secondary-side rectified output transformer's secondary winding is connected to a full-bridge rectifier circuit consisting of two bridge arms to directly power the DC load. The control module is configured to: generate corresponding compensation quantities by sampling multiple inductor currents and transformer primary currents, and perform current sharing closed-loop control and bias suppression closed-loop control on the converter in parallel; The control method includes current sharing closed-loop control, wherein the current sharing closed-loop control includes: A1. Real-time calculation of the difference in current between the two Boost inductors ; A2. The difference Input flow equalization regulator; A3. Divide the output of the current sharing regulator by the bus capacitor voltage. The result obtained will serve as the final compensation amount. ; A4. Compensation Amount The duty cycle reference values ​​of the first and second bridge arms on the primary side are added to the primary side, and the currents of the two inductors are forced to be consistent through modulation. A5. Set a voltage threshold. The control system will only detect Only then will the flow equalization regulator be activated and updated. ;when When below this threshold, maintain Zero or the previous valid value; A6 Updated at the end of each cycle on the AC side, with the same duty cycle as the DC side. The shift of the DC side relative to the AC side synchronous; The control method includes bias magnetic closed-loop control, which includes: The output of the bias control loop is: in, To suppress dynamic bias on the secondary side, To suppress the bias magnetization of the primary side current sharing, To suppress residual bias; Secondary side dynamic bias suppression for: in, , , , , Each is the result of the previous switching cycle. , ; Primary side current sharing bias suppression for: in, The voltage amplitude on the AC side of the power transmission inductor. This refers to the DC-side voltage amplitude of the power transfer inductor. The control quantity selection is executed as follows: the total bias compensation amount is... The duty cycle reference is added to the secondary side arm and synchronized with it at the end of each cycle. , Synchronized updates.

2. The bias current sharing suppression control method for an interleaved totem-pole AC-DC converter according to claim 1, characterized in that, The converter includes: an input power supply AC, an output power supply DC, and an inductor L. in L boost1 L boost2 L trans Capacitor C in C bus C out Switching transistors S1-S 10 The circuit connection of the converter is as follows: one end of the input power supply AC is connected in series with an inductor L. in Capacitor C in Connect the other end of the input power supply AC; inductor L in Capacitor C in The intermediate nodes are connected in series with inductors L. boost1 L trans Connect one end of the primary winding of the isolation transformer, and connect the other end of the primary winding of the isolation transformer in series with an inductor L. boost2 Connect inductor L in Capacitor C in The intermediate node; the two ends of the series connection of switching transistors S1 and S2 are respectively connected to capacitor C. bus The two ends of the series-connected switching transistors S3 and S4 are respectively connected to capacitor C. bus The two ends of the series-connected switching transistors S5 and S6 are respectively connected to capacitor C. bus The two ends; the middle node of the switching transistors S1 and S2 is connected to the inductor L. boost1 L trans The intermediate node of the switching transistors S3 and S4 is connected to the inductor L. boost2 The intermediate nodes of the isolation transformer and the intermediate nodes of switching transistors S5 and S6 are connected to the power supply AC and capacitor C. in The intermediate node; capacitor C is connected to the two ends of the series connection of switching transistors S7 and S8. out At both ends, the switching transistors S9 and S 10 The two ends of the series connection are respectively connected to capacitor C. out The two ends of the output power supply DC are respectively connected to capacitor C. out The two ends; the middle node of switching transistors S7 and S8, and switching transistors S9 and S... 10 The intermediate nodes are connected to both ends of the secondary side of the isolation transformer.

3. The bias current sharing suppression control method for an interleaved totem-pole AC-DC converter according to claim 1, characterized in that, The third bridge arm operates in power frequency mode. During the positive half-cycle of the input AC voltage, the upper transistor of the third bridge arm remains normally off and the lower transistor remains normally on, clamping the reference terminal of the AC input to the negative terminal of the DC bus. During the negative half-cycle of the input AC voltage, the upper transistor of the third bridge arm remains normally on and the lower transistor remains normally off, clamping the reference terminal of the AC input to the positive terminal of the DC bus.

4. The bias current sharing suppression control method for an interleaved totem-pole AC-DC converter according to claim 1, characterized in that, The first bridge arm and the second bridge arm are multiplexed. The first bridge arm and the second bridge arm operate simultaneously in a high-frequency switching state. The intermediate node of the first bridge arm and the intermediate node of the second bridge arm are connected to the two ends of the primary winding of the high-frequency transformer through a power transmission inductor. The first bridge arm and the second bridge arm generate a high-frequency AC square wave voltage through a high-frequency complementary switch and apply it to the primary side of the transformer. The power transmitted through the transformer is adjusted by controlling the phase difference between the secondary voltage and the high-frequency AC square wave voltage.

5. The bias current sharing suppression control method for an interleaved totem pole AC-DC converter according to claim 1, characterized in that, In step A2, the current sharing regulator is a PI controller with a low-pass filter. The PI controller with a low-pass filter introduces a low-pass filter on the basis of the PI controller to filter out the switching frequency component.

6. The bias current sharing suppression control method for an interleaved totem-pole AC-DC converter according to claim 1, characterized in that, The residual bias suppression The method is as follows: B1. Real-time sampling of transformer primary current Set the control target to The DC component is adjusted to zero, and the error signal is... ; B2. Send the error signal to the bias regulator; B3. Divide the output of the bias regulator by the output voltage. The result obtained will serve as the final compensation amount. .

7. The bias current sharing suppression control method for an interleaved totem-pole AC-DC converter according to claim 1, characterized in that, The main power control closed loop of the control method adopts any one of the following three control strategies, and the output of the main power control closed loop is the transmission power reference value P, which is used in the subsequent dual active bridge modulation stage: C1. Control based on rotating coordinate system transformation: AC quantity is converted into DC quantity through coordinate transformation, and a PI controller is used for tracking; C2. Control based on high gain at power frequency: High gain is provided at the fundamental power frequency to directly adjust the error signal; C3. PI control based on sinusoidal feedforward: A PI regulator is used to adjust the error, while a sinusoidal signal with the same frequency and phase as the grid voltage is introduced as feedforward to transmit the main power.

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